* Reverted previous patch.
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "inferior.h"
24 #include "symfile.h" /* for entry_point_address */
25 #include "gdbcore.h"
26 #include "arch-utils.h"
27 #include "floatformat.h"
28 #include "regcache.h"
29 #include "doublest.h"
30 #include "value.h"
31
32 #include "objfiles.h"
33 #include "elf/common.h" /* for DT_PLTGOT value */
34 #include "elf-bfd.h"
35
36 /* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45 CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47 /* An enumeration of the different IA-64 instruction types. */
48
49 typedef enum instruction_type
50 {
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59 } instruction_type;
60
61 /* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76 #define SLOT_MULTIPLIER 1
77
78 /* Length in bytes of an instruction bundle */
79
80 #define BUNDLE_LEN 16
81
82 /* FIXME: These extern declarations should go in ia64-tdep.h. */
83 extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
84 extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
85
86 static gdbarch_init_ftype ia64_gdbarch_init;
87
88 static gdbarch_register_name_ftype ia64_register_name;
89 static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92 static gdbarch_register_byte_ftype ia64_register_byte;
93 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94 static gdbarch_frame_chain_ftype ia64_frame_chain;
95 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
96 static gdbarch_get_saved_register_ftype ia64_get_saved_register;
97 static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
98 static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
99 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
100 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
101 static gdbarch_store_struct_return_ftype ia64_store_struct_return;
102 static gdbarch_push_arguments_ftype ia64_push_arguments;
103 static gdbarch_push_return_address_ftype ia64_push_return_address;
104 static gdbarch_pop_frame_ftype ia64_pop_frame;
105 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
106 static void ia64_pop_frame_regular (struct frame_info *frame);
107 static struct type *is_float_or_hfa_type (struct type *t);
108
109 static int ia64_num_regs = 590;
110
111 static int pc_regnum = IA64_IP_REGNUM;
112 static int sp_regnum = IA64_GR12_REGNUM;
113 static int fp_regnum = IA64_VFP_REGNUM;
114 static int lr_regnum = IA64_VRAP_REGNUM;
115
116 static LONGEST ia64_call_dummy_words[] = {0};
117
118 /* Array of register names; There should be ia64_num_regs strings in
119 the initializer. */
120
121 static char *ia64_register_names[] =
122 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
123 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
124 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
125 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
126 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
127 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
128 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
129 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
130 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
131 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
132 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
133 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
134 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
135 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
136 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
137 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
138
139 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
140 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
141 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
142 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
143 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
144 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
145 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
146 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
147 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
148 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
149 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
150 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
151 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
152 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
153 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
154 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
155
156 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
157 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
158 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
159 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
160 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
161 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
162 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
163 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
164
165 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
166
167 "vfp", "vrap",
168
169 "pr", "ip", "psr", "cfm",
170
171 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
172 "", "", "", "", "", "", "", "",
173 "rsc", "bsp", "bspstore", "rnat",
174 "", "fcr", "", "",
175 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
176 "ccv", "", "", "", "unat", "", "", "",
177 "fpsr", "", "", "", "itc",
178 "", "", "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "", "",
180 "pfs", "lc", "ec",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "",
188 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
189 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
190 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
191 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
192 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
193 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
194 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
195 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
196 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
197 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
198 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
199 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
200 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
201 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
202 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
203 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
204 };
205
206 struct frame_extra_info
207 {
208 CORE_ADDR bsp; /* points at r32 for the current frame */
209 CORE_ADDR cfm; /* cfm value for current frame */
210 int sof; /* Size of frame (decoded from cfm value) */
211 int sol; /* Size of locals (decoded from cfm value) */
212 CORE_ADDR after_prologue;
213 /* Address of first instruction after the last
214 prologue instruction; Note that there may
215 be instructions from the function's body
216 intermingled with the prologue. */
217 int mem_stack_frame_size;
218 /* Size of the memory stack frame (may be zero),
219 or -1 if it has not been determined yet. */
220 int fp_reg; /* Register number (if any) used a frame pointer
221 for this frame. 0 if no register is being used
222 as the frame pointer. */
223 };
224
225 struct gdbarch_tdep
226 {
227 int os_ident; /* From the ELF header, one of the ELFOSABI_
228 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
229 etc. */
230 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
231 /* OS specific function which, given a frame address
232 and register number, returns the offset to the
233 given register from the start of the frame. */
234 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
235 };
236
237 #define SIGCONTEXT_REGISTER_ADDRESS \
238 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
239 #define FIND_GLOBAL_POINTER \
240 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
241
242 static const char *
243 ia64_register_name (int reg)
244 {
245 return ia64_register_names[reg];
246 }
247
248 int
249 ia64_register_raw_size (int reg)
250 {
251 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
252 }
253
254 int
255 ia64_register_virtual_size (int reg)
256 {
257 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
258 }
259
260 /* Return true iff register N's virtual format is different from
261 its raw format. */
262 int
263 ia64_register_convertible (int nr)
264 {
265 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
266 }
267
268 const struct floatformat floatformat_ia64_ext =
269 {
270 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
271 floatformat_intbit_yes
272 };
273
274 void
275 ia64_register_convert_to_virtual (int regnum, struct type *type,
276 char *from, char *to)
277 {
278 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
279 {
280 DOUBLEST val;
281 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
282 store_floating(to, TYPE_LENGTH(type), val);
283 }
284 else
285 error("ia64_register_convert_to_virtual called with non floating point register number");
286 }
287
288 void
289 ia64_register_convert_to_raw (struct type *type, int regnum,
290 char *from, char *to)
291 {
292 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
293 {
294 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
295 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
296 }
297 else
298 error("ia64_register_convert_to_raw called with non floating point register number");
299 }
300
301 struct type *
302 ia64_register_virtual_type (int reg)
303 {
304 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
305 return builtin_type_long_double;
306 else
307 return builtin_type_long;
308 }
309
310 int
311 ia64_register_byte (int reg)
312 {
313 return (8 * reg) +
314 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
315 }
316
317 /* Read the given register from a sigcontext structure in the
318 specified frame. */
319
320 static CORE_ADDR
321 read_sigcontext_register (struct frame_info *frame, int regnum)
322 {
323 CORE_ADDR regaddr;
324
325 if (frame == NULL)
326 internal_error (__FILE__, __LINE__,
327 "read_sigcontext_register: NULL frame");
328 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
329 internal_error (__FILE__, __LINE__,
330 "read_sigcontext_register: frame not a signal trampoline");
331 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
332 internal_error (__FILE__, __LINE__,
333 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
334
335 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
336 if (regaddr)
337 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
338 else
339 internal_error (__FILE__, __LINE__,
340 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
341 }
342
343 /* Extract ``len'' bits from an instruction bundle starting at
344 bit ``from''. */
345
346 static long long
347 extract_bit_field (char *bundle, int from, int len)
348 {
349 long long result = 0LL;
350 int to = from + len;
351 int from_byte = from / 8;
352 int to_byte = to / 8;
353 unsigned char *b = (unsigned char *) bundle;
354 unsigned char c;
355 int lshift;
356 int i;
357
358 c = b[from_byte];
359 if (from_byte == to_byte)
360 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
361 result = c >> (from % 8);
362 lshift = 8 - (from % 8);
363
364 for (i = from_byte+1; i < to_byte; i++)
365 {
366 result |= ((long long) b[i]) << lshift;
367 lshift += 8;
368 }
369
370 if (from_byte < to_byte && (to % 8 != 0))
371 {
372 c = b[to_byte];
373 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
374 result |= ((long long) c) << lshift;
375 }
376
377 return result;
378 }
379
380 /* Replace the specified bits in an instruction bundle */
381
382 static void
383 replace_bit_field (char *bundle, long long val, int from, int len)
384 {
385 int to = from + len;
386 int from_byte = from / 8;
387 int to_byte = to / 8;
388 unsigned char *b = (unsigned char *) bundle;
389 unsigned char c;
390
391 if (from_byte == to_byte)
392 {
393 unsigned char left, right;
394 c = b[from_byte];
395 left = (c >> (to % 8)) << (to % 8);
396 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
397 c = (unsigned char) (val & 0xff);
398 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
399 c |= right | left;
400 b[from_byte] = c;
401 }
402 else
403 {
404 int i;
405 c = b[from_byte];
406 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
407 c = c | (val << (from % 8));
408 b[from_byte] = c;
409 val >>= 8 - from % 8;
410
411 for (i = from_byte+1; i < to_byte; i++)
412 {
413 c = val & 0xff;
414 val >>= 8;
415 b[i] = c;
416 }
417
418 if (to % 8 != 0)
419 {
420 unsigned char cv = (unsigned char) val;
421 c = b[to_byte];
422 c = c >> (to % 8) << (to % 8);
423 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
424 b[to_byte] = c;
425 }
426 }
427 }
428
429 /* Return the contents of slot N (for N = 0, 1, or 2) in
430 and instruction bundle */
431
432 static long long
433 slotN_contents (char *bundle, int slotnum)
434 {
435 return extract_bit_field (bundle, 5+41*slotnum, 41);
436 }
437
438 /* Store an instruction in an instruction bundle */
439
440 static void
441 replace_slotN_contents (char *bundle, long long instr, int slotnum)
442 {
443 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
444 }
445
446 static enum instruction_type template_encoding_table[32][3] =
447 {
448 { M, I, I }, /* 00 */
449 { M, I, I }, /* 01 */
450 { M, I, I }, /* 02 */
451 { M, I, I }, /* 03 */
452 { M, L, X }, /* 04 */
453 { M, L, X }, /* 05 */
454 { undefined, undefined, undefined }, /* 06 */
455 { undefined, undefined, undefined }, /* 07 */
456 { M, M, I }, /* 08 */
457 { M, M, I }, /* 09 */
458 { M, M, I }, /* 0A */
459 { M, M, I }, /* 0B */
460 { M, F, I }, /* 0C */
461 { M, F, I }, /* 0D */
462 { M, M, F }, /* 0E */
463 { M, M, F }, /* 0F */
464 { M, I, B }, /* 10 */
465 { M, I, B }, /* 11 */
466 { M, B, B }, /* 12 */
467 { M, B, B }, /* 13 */
468 { undefined, undefined, undefined }, /* 14 */
469 { undefined, undefined, undefined }, /* 15 */
470 { B, B, B }, /* 16 */
471 { B, B, B }, /* 17 */
472 { M, M, B }, /* 18 */
473 { M, M, B }, /* 19 */
474 { undefined, undefined, undefined }, /* 1A */
475 { undefined, undefined, undefined }, /* 1B */
476 { M, F, B }, /* 1C */
477 { M, F, B }, /* 1D */
478 { undefined, undefined, undefined }, /* 1E */
479 { undefined, undefined, undefined }, /* 1F */
480 };
481
482 /* Fetch and (partially) decode an instruction at ADDR and return the
483 address of the next instruction to fetch. */
484
485 static CORE_ADDR
486 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
487 {
488 char bundle[BUNDLE_LEN];
489 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
490 long long template;
491 int val;
492
493 /* Warn about slot numbers greater than 2. We used to generate
494 an error here on the assumption that the user entered an invalid
495 address. But, sometimes GDB itself requests an invalid address.
496 This can (easily) happen when execution stops in a function for
497 which there are no symbols. The prologue scanner will attempt to
498 find the beginning of the function - if the nearest symbol
499 happens to not be aligned on a bundle boundary (16 bytes), the
500 resulting starting address will cause GDB to think that the slot
501 number is too large.
502
503 So we warn about it and set the slot number to zero. It is
504 not necessarily a fatal condition, particularly if debugging
505 at the assembly language level. */
506 if (slotnum > 2)
507 {
508 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
509 "Using slot 0 instead");
510 slotnum = 0;
511 }
512
513 addr &= ~0x0f;
514
515 val = target_read_memory (addr, bundle, BUNDLE_LEN);
516
517 if (val != 0)
518 return 0;
519
520 *instr = slotN_contents (bundle, slotnum);
521 template = extract_bit_field (bundle, 0, 5);
522 *it = template_encoding_table[(int)template][slotnum];
523
524 if (slotnum == 2 || (slotnum == 1 && *it == L))
525 addr += 16;
526 else
527 addr += (slotnum + 1) * SLOT_MULTIPLIER;
528
529 return addr;
530 }
531
532 /* There are 5 different break instructions (break.i, break.b,
533 break.m, break.f, and break.x), but they all have the same
534 encoding. (The five bit template in the low five bits of the
535 instruction bundle distinguishes one from another.)
536
537 The runtime architecture manual specifies that break instructions
538 used for debugging purposes must have the upper two bits of the 21
539 bit immediate set to a 0 and a 1 respectively. A breakpoint
540 instruction encodes the most significant bit of its 21 bit
541 immediate at bit 36 of the 41 bit instruction. The penultimate msb
542 is at bit 25 which leads to the pattern below.
543
544 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
545 it turns out that 0x80000 was used as the syscall break in the early
546 simulators. So I changed the pattern slightly to do "break.i 0x080001"
547 instead. But that didn't work either (I later found out that this
548 pattern was used by the simulator that I was using.) So I ended up
549 using the pattern seen below. */
550
551 #if 0
552 #define BREAKPOINT 0x00002000040LL
553 #endif
554 #define BREAKPOINT 0x00003333300LL
555
556 static int
557 ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
558 {
559 char bundle[BUNDLE_LEN];
560 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
561 long long instr;
562 int val;
563 int template;
564
565 if (slotnum > 2)
566 error("Can't insert breakpoint for slot numbers greater than 2.");
567
568 addr &= ~0x0f;
569
570 val = target_read_memory (addr, bundle, BUNDLE_LEN);
571
572 /* Check for L type instruction in 2nd slot, if present then
573 bump up the slot number to the 3rd slot */
574 template = extract_bit_field (bundle, 0, 5);
575 if (slotnum == 1 && template_encoding_table[template][1] == L)
576 {
577 slotnum = 2;
578 }
579
580 instr = slotN_contents (bundle, slotnum);
581 memcpy(contents_cache, &instr, sizeof(instr));
582 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
583 if (val == 0)
584 target_write_memory (addr, bundle, BUNDLE_LEN);
585
586 return val;
587 }
588
589 static int
590 ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
591 {
592 char bundle[BUNDLE_LEN];
593 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
594 long long instr;
595 int val;
596 int template;
597
598 addr &= ~0x0f;
599
600 val = target_read_memory (addr, bundle, BUNDLE_LEN);
601
602 /* Check for L type instruction in 2nd slot, if present then
603 bump up the slot number to the 3rd slot */
604 template = extract_bit_field (bundle, 0, 5);
605 if (slotnum == 1 && template_encoding_table[template][1] == L)
606 {
607 slotnum = 2;
608 }
609
610 memcpy (&instr, contents_cache, sizeof instr);
611 replace_slotN_contents (bundle, instr, slotnum);
612 if (val == 0)
613 target_write_memory (addr, bundle, BUNDLE_LEN);
614
615 return val;
616 }
617
618 /* We don't really want to use this, but remote.c needs to call it in order
619 to figure out if Z-packets are supported or not. Oh, well. */
620 const unsigned char *
621 ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
622 {
623 static unsigned char breakpoint[] =
624 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
625 *lenptr = sizeof (breakpoint);
626 #if 0
627 *pcptr &= ~0x0f;
628 #endif
629 return breakpoint;
630 }
631
632 CORE_ADDR
633 ia64_read_pc (ptid_t ptid)
634 {
635 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
636 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
637 int slot_num = (psr_value >> 41) & 3;
638
639 return pc_value | (slot_num * SLOT_MULTIPLIER);
640 }
641
642 void
643 ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
644 {
645 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
646 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
647 psr_value &= ~(3LL << 41);
648 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
649
650 new_pc &= ~0xfLL;
651
652 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
653 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
654 }
655
656 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
657
658 /* Returns the address of the slot that's NSLOTS slots away from
659 the address ADDR. NSLOTS may be positive or negative. */
660 static CORE_ADDR
661 rse_address_add(CORE_ADDR addr, int nslots)
662 {
663 CORE_ADDR new_addr;
664 int mandatory_nat_slots = nslots / 63;
665 int direction = nslots < 0 ? -1 : 1;
666
667 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
668
669 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
670 new_addr += 8 * direction;
671
672 if (IS_NaT_COLLECTION_ADDR(new_addr))
673 new_addr += 8 * direction;
674
675 return new_addr;
676 }
677
678 /* The IA-64 frame chain is a bit odd. We won't always have a frame
679 pointer, so we use the SP value as the FP for the purpose of
680 creating a frame. There is sometimes a register (not fixed) which
681 is used as a frame pointer. When this register exists, it is not
682 especially hard to determine which one is being used. It isn't
683 even really hard to compute the frame chain, but it can be
684 computationally expensive. So, instead of making life difficult
685 (and slow), we pick a more convenient representation of the frame
686 chain, knowing that we'll have to make some small adjustments in
687 other places. (E.g, note that read_fp() is actually read_sp() in
688 ia64_gdbarch_init() below.)
689
690 Okay, so what is the frame chain exactly? It'll be the SP value
691 at the time that the function in question was entered.
692
693 Note that this *should* actually the frame pointer for the current
694 function! But as I note above, if we were to attempt to find the
695 address of the beginning of the previous frame, we'd waste a lot
696 of cycles for no good reason. So instead, we simply choose to
697 represent the frame chain as the end of the previous frame instead
698 of the beginning. */
699
700 CORE_ADDR
701 ia64_frame_chain (struct frame_info *frame)
702 {
703 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
704 return read_sigcontext_register (frame, sp_regnum);
705 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
706 get_frame_base (frame),
707 get_frame_base (frame)))
708 return get_frame_base (frame);
709 else
710 {
711 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
712 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
713 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
714 else
715 return (get_frame_base (frame)
716 + get_frame_extra_info (frame)->mem_stack_frame_size);
717 }
718 }
719
720 CORE_ADDR
721 ia64_frame_saved_pc (struct frame_info *frame)
722 {
723 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
724 return read_sigcontext_register (frame, pc_regnum);
725 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
726 get_frame_base (frame),
727 get_frame_base (frame)))
728 return deprecated_read_register_dummy (get_frame_pc (frame),
729 get_frame_base (frame), pc_regnum);
730 else
731 {
732 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
733
734 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
735 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
736 else if (get_next_frame (frame)
737 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
738 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
739 else /* either frameless, or not far enough along in the prologue... */
740 return ia64_saved_pc_after_call (frame);
741 }
742 }
743
744 /* Limit the number of skipped non-prologue instructions since examining
745 of the prologue is expensive. */
746 static int max_skip_non_prologue_insns = 10;
747
748 /* Given PC representing the starting address of a function, and
749 LIM_PC which is the (sloppy) limit to which to scan when looking
750 for a prologue, attempt to further refine this limit by using
751 the line data in the symbol table. If successful, a better guess
752 on where the prologue ends is returned, otherwise the previous
753 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
754 which will be set to indicate whether the returned limit may be
755 used with no further scanning in the event that the function is
756 frameless. */
757
758 static CORE_ADDR
759 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
760 {
761 struct symtab_and_line prologue_sal;
762 CORE_ADDR start_pc = pc;
763
764 /* Start off not trusting the limit. */
765 *trust_limit = 0;
766
767 prologue_sal = find_pc_line (pc, 0);
768 if (prologue_sal.line != 0)
769 {
770 int i;
771 CORE_ADDR addr = prologue_sal.end;
772
773 /* Handle the case in which compiler's optimizer/scheduler
774 has moved instructions into the prologue. We scan ahead
775 in the function looking for address ranges whose corresponding
776 line number is less than or equal to the first one that we
777 found for the function. (It can be less than when the
778 scheduler puts a body instruction before the first prologue
779 instruction.) */
780 for (i = 2 * max_skip_non_prologue_insns;
781 i > 0 && (lim_pc == 0 || addr < lim_pc);
782 i--)
783 {
784 struct symtab_and_line sal;
785
786 sal = find_pc_line (addr, 0);
787 if (sal.line == 0)
788 break;
789 if (sal.line <= prologue_sal.line
790 && sal.symtab == prologue_sal.symtab)
791 {
792 prologue_sal = sal;
793 }
794 addr = sal.end;
795 }
796
797 if (lim_pc == 0 || prologue_sal.end < lim_pc)
798 {
799 lim_pc = prologue_sal.end;
800 if (start_pc == get_pc_function_start (lim_pc))
801 *trust_limit = 1;
802 }
803 }
804 return lim_pc;
805 }
806
807 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
808 || (8 <= (_regnum_) && (_regnum_) <= 11) \
809 || (14 <= (_regnum_) && (_regnum_) <= 31))
810 #define imm9(_instr_) \
811 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
812 | (((_instr_) & 0x00008000000LL) >> 20) \
813 | (((_instr_) & 0x00000001fc0LL) >> 6))
814
815 static CORE_ADDR
816 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
817 {
818 CORE_ADDR next_pc;
819 CORE_ADDR last_prologue_pc = pc;
820 instruction_type it;
821 long long instr;
822 int do_fsr_stuff = 0;
823
824 int cfm_reg = 0;
825 int ret_reg = 0;
826 int fp_reg = 0;
827 int unat_save_reg = 0;
828 int pr_save_reg = 0;
829 int mem_stack_frame_size = 0;
830 int spill_reg = 0;
831 CORE_ADDR spill_addr = 0;
832 char instores[8];
833 char infpstores[8];
834 int trust_limit;
835
836 memset (instores, 0, sizeof instores);
837 memset (infpstores, 0, sizeof infpstores);
838
839 if (frame && !get_frame_saved_regs (frame))
840 {
841 frame_saved_regs_zalloc (frame);
842 do_fsr_stuff = 1;
843 }
844
845 if (frame
846 && !do_fsr_stuff
847 && get_frame_extra_info (frame)->after_prologue != 0
848 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
849 return get_frame_extra_info (frame)->after_prologue;
850
851 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
852
853 /* Must start with an alloc instruction */
854 next_pc = fetch_instruction (pc, &it, &instr);
855 if (pc < lim_pc && next_pc
856 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
857 {
858 /* alloc */
859 int sor = (int) ((instr & 0x00078000000LL) >> 27);
860 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
861 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
862 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
863 we could compare against the size given to us via the cfm as
864 either a sanity check or possibly to see if the frame has been
865 changed by a later alloc instruction... */
866 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
867 cfm_reg = rN;
868 last_prologue_pc = next_pc;
869 pc = next_pc;
870 }
871 else
872 {
873 pc = lim_pc; /* Frameless: We're done early. */
874 if (trust_limit)
875 last_prologue_pc = lim_pc;
876 }
877
878 /* Loop, looking for prologue instructions, keeping track of
879 where preserved registers were spilled. */
880 while (pc < lim_pc)
881 {
882 next_pc = fetch_instruction (pc, &it, &instr);
883 if (next_pc == 0)
884 break;
885
886 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
887 || ((instr & 0x3fLL) != 0LL))
888 {
889 /* Exit loop upon hitting a non-nop branch instruction
890 or a predicated instruction. */
891 break;
892 }
893 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
894 {
895 /* Move from BR */
896 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
897 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
898 int qp = (int) (instr & 0x0000000003f);
899
900 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
901 {
902 ret_reg = rN;
903 last_prologue_pc = next_pc;
904 }
905 }
906 else if ((it == I || it == M)
907 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
908 {
909 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
910 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
911 | ((instr & 0x001f8000000LL) >> 20)
912 | ((instr & 0x000000fe000LL) >> 13));
913 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
914 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
915 int qp = (int) (instr & 0x0000000003fLL);
916
917 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
918 {
919 /* mov rN, r12 */
920 fp_reg = rN;
921 last_prologue_pc = next_pc;
922 }
923 else if (qp == 0 && rN == 12 && rM == 12)
924 {
925 /* adds r12, -mem_stack_frame_size, r12 */
926 mem_stack_frame_size -= imm;
927 last_prologue_pc = next_pc;
928 }
929 else if (qp == 0 && rN == 2
930 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
931 {
932 /* adds r2, spilloffset, rFramePointer
933 or
934 adds r2, spilloffset, r12
935
936 Get ready for stf.spill or st8.spill instructions.
937 The address to start spilling at is loaded into r2.
938 FIXME: Why r2? That's what gcc currently uses; it
939 could well be different for other compilers. */
940
941 /* Hmm... whether or not this will work will depend on
942 where the pc is. If it's still early in the prologue
943 this'll be wrong. FIXME */
944 spill_addr = (frame ? get_frame_base (frame) : 0)
945 + (rM == 12 ? 0 : mem_stack_frame_size)
946 + imm;
947 spill_reg = rN;
948 last_prologue_pc = next_pc;
949 }
950 }
951 else if (it == M
952 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
953 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
954 {
955 /* stf.spill [rN] = fM, imm9
956 or
957 stf.spill [rN] = fM */
958
959 int imm = imm9(instr);
960 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
961 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
962 int qp = (int) (instr & 0x0000000003fLL);
963 if (qp == 0 && rN == spill_reg && spill_addr != 0
964 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
965 {
966 if (do_fsr_stuff)
967 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
968
969 if ((instr & 0x1efc0000000) == 0x0eec0000000)
970 spill_addr += imm;
971 else
972 spill_addr = 0; /* last one; must be done */
973 last_prologue_pc = next_pc;
974 }
975 }
976 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
977 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
978 {
979 /* mov.m rN = arM
980 or
981 mov.i rN = arM */
982
983 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
984 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
985 int qp = (int) (instr & 0x0000000003fLL);
986 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
987 {
988 /* We have something like "mov.m r3 = ar.unat". Remember the
989 r3 (or whatever) and watch for a store of this register... */
990 unat_save_reg = rN;
991 last_prologue_pc = next_pc;
992 }
993 }
994 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
995 {
996 /* mov rN = pr */
997 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
998 int qp = (int) (instr & 0x0000000003fLL);
999 if (qp == 0 && isScratch (rN))
1000 {
1001 pr_save_reg = rN;
1002 last_prologue_pc = next_pc;
1003 }
1004 }
1005 else if (it == M
1006 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1007 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1008 {
1009 /* st8 [rN] = rM
1010 or
1011 st8 [rN] = rM, imm9 */
1012 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1013 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1014 int qp = (int) (instr & 0x0000000003fLL);
1015 if (qp == 0 && rN == spill_reg && spill_addr != 0
1016 && (rM == unat_save_reg || rM == pr_save_reg))
1017 {
1018 /* We've found a spill of either the UNAT register or the PR
1019 register. (Well, not exactly; what we've actually found is
1020 a spill of the register that UNAT or PR was moved to).
1021 Record that fact and move on... */
1022 if (rM == unat_save_reg)
1023 {
1024 /* Track UNAT register */
1025 if (do_fsr_stuff)
1026 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
1027 unat_save_reg = 0;
1028 }
1029 else
1030 {
1031 /* Track PR register */
1032 if (do_fsr_stuff)
1033 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
1034 pr_save_reg = 0;
1035 }
1036 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1037 /* st8 [rN] = rM, imm9 */
1038 spill_addr += imm9(instr);
1039 else
1040 spill_addr = 0; /* must be done spilling */
1041 last_prologue_pc = next_pc;
1042 }
1043 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1044 {
1045 /* Allow up to one store of each input register. */
1046 instores[rM-32] = 1;
1047 last_prologue_pc = next_pc;
1048 }
1049 }
1050 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1051 {
1052 /* One of
1053 st1 [rN] = rM
1054 st2 [rN] = rM
1055 st4 [rN] = rM
1056 st8 [rN] = rM
1057 Note that the st8 case is handled in the clause above.
1058
1059 Advance over stores of input registers. One store per input
1060 register is permitted. */
1061 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1062 int qp = (int) (instr & 0x0000000003fLL);
1063 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1064 {
1065 instores[rM-32] = 1;
1066 last_prologue_pc = next_pc;
1067 }
1068 }
1069 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1070 {
1071 /* Either
1072 stfs [rN] = fM
1073 or
1074 stfd [rN] = fM
1075
1076 Advance over stores of floating point input registers. Again
1077 one store per register is permitted */
1078 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1079 int qp = (int) (instr & 0x0000000003fLL);
1080 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1081 {
1082 infpstores[fM-8] = 1;
1083 last_prologue_pc = next_pc;
1084 }
1085 }
1086 else if (it == M
1087 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1088 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1089 {
1090 /* st8.spill [rN] = rM
1091 or
1092 st8.spill [rN] = rM, imm9 */
1093 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1094 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1095 int qp = (int) (instr & 0x0000000003fLL);
1096 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1097 {
1098 /* We've found a spill of one of the preserved general purpose
1099 regs. Record the spill address and advance the spill
1100 register if appropriate. */
1101 if (do_fsr_stuff)
1102 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
1103 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1104 /* st8.spill [rN] = rM, imm9 */
1105 spill_addr += imm9(instr);
1106 else
1107 spill_addr = 0; /* Done spilling */
1108 last_prologue_pc = next_pc;
1109 }
1110 }
1111
1112 pc = next_pc;
1113 }
1114
1115 if (do_fsr_stuff) {
1116 int i;
1117 CORE_ADDR addr;
1118 int sor, rrb_gr;
1119
1120 /* Extract the size of the rotating portion of the stack
1121 frame and the register rename base from the current
1122 frame marker. */
1123 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1124 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
1125
1126 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1127 i < get_frame_extra_info (frame)->sof;
1128 i++, addr += 8)
1129 {
1130 if (IS_NaT_COLLECTION_ADDR (addr))
1131 {
1132 addr += 8;
1133 }
1134 if (i < sor)
1135 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1136 = addr;
1137 else
1138 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
1139
1140 if (i+32 == cfm_reg)
1141 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
1142 if (i+32 == ret_reg)
1143 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
1144 if (i+32 == fp_reg)
1145 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
1146 }
1147 }
1148
1149 if (frame && get_frame_extra_info (frame))
1150 {
1151 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1152 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1153 get_frame_extra_info (frame)->fp_reg = fp_reg;
1154 }
1155
1156 return last_prologue_pc;
1157 }
1158
1159 CORE_ADDR
1160 ia64_skip_prologue (CORE_ADDR pc)
1161 {
1162 return examine_prologue (pc, pc+1024, 0);
1163 }
1164
1165 void
1166 ia64_frame_init_saved_regs (struct frame_info *frame)
1167 {
1168 if (get_frame_saved_regs (frame))
1169 return;
1170
1171 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
1172 {
1173 int regno;
1174
1175 frame_saved_regs_zalloc (frame);
1176
1177 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1178 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
1179 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1180 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
1181 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1182 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
1183 #if 0
1184 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
1185 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1186 #endif
1187 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1188 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
1189 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1190 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
1191 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1192 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
1193 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1194 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
1195 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1196 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
1197 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1198 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
1199 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1200 if (regno != sp_regnum)
1201 get_frame_saved_regs (frame)[regno] =
1202 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1203 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1204 get_frame_saved_regs (frame)[regno] =
1205 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1206 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1207 get_frame_saved_regs (frame)[regno] =
1208 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1209 }
1210 else
1211 {
1212 CORE_ADDR func_start;
1213
1214 func_start = get_pc_function_start (get_frame_pc (frame));
1215 examine_prologue (func_start, get_frame_pc (frame), frame);
1216 }
1217 }
1218
1219 void
1220 ia64_get_saved_register (char *raw_buffer,
1221 int *optimized,
1222 CORE_ADDR *addrp,
1223 struct frame_info *frame,
1224 int regnum,
1225 enum lval_type *lval)
1226 {
1227 int is_dummy_frame;
1228
1229 if (!target_has_registers)
1230 error ("No registers.");
1231
1232 if (optimized != NULL)
1233 *optimized = 0;
1234
1235 if (addrp != NULL)
1236 *addrp = 0;
1237
1238 if (lval != NULL)
1239 *lval = not_lval;
1240
1241 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1242 get_frame_base (frame),
1243 get_frame_base (frame));
1244
1245 if (regnum == SP_REGNUM && get_next_frame (frame))
1246 {
1247 /* Handle SP values for all frames but the topmost. */
1248 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1249 get_frame_base (frame));
1250 }
1251 else if (regnum == IA64_BSP_REGNUM)
1252 {
1253 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1254 get_frame_extra_info (frame)->bsp);
1255 }
1256 else if (regnum == IA64_VFP_REGNUM)
1257 {
1258 /* If the function in question uses an automatic register (r32-r127)
1259 for the frame pointer, it'll be found by ia64_find_saved_register()
1260 above. If the function lacks one of these frame pointers, we can
1261 still provide a value since we know the size of the frame */
1262 CORE_ADDR vfp = (get_frame_base (frame)
1263 + get_frame_extra_info (frame)->mem_stack_frame_size);
1264 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1265 }
1266 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1267 {
1268 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1269 int pr_optim;
1270 enum lval_type pr_lval;
1271 CORE_ADDR pr_addr;
1272 int prN_val;
1273 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1274 frame, IA64_PR_REGNUM, &pr_lval);
1275 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1276 {
1277 /* Fetch predicate register rename base from current frame
1278 marker for this frame. */
1279 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
1280
1281 /* Adjust the register number to account for register rotation. */
1282 regnum = IA64_PR16_REGNUM
1283 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1284 }
1285 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1286 regnum - IA64_PR0_REGNUM, 1);
1287 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
1288 }
1289 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1290 {
1291 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1292 int unat_optim;
1293 enum lval_type unat_lval;
1294 CORE_ADDR unat_addr;
1295 int unatN_val;
1296 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1297 frame, IA64_UNAT_REGNUM, &unat_lval);
1298 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1299 regnum - IA64_NAT0_REGNUM, 1);
1300 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1301 unatN_val);
1302 }
1303 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1304 {
1305 int natval = 0;
1306 /* Find address of general register corresponding to nat bit we're
1307 interested in. */
1308 CORE_ADDR gr_addr = 0;
1309
1310 if (!is_dummy_frame)
1311 {
1312 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1313 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1314 + IA64_GR0_REGNUM];
1315 }
1316 if (gr_addr)
1317 {
1318 /* Compute address of nat collection bits */
1319 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1320 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1321 CORE_ADDR nat_collection;
1322 int nat_bit;
1323 /* If our nat collection address is bigger than bsp, we have to get
1324 the nat collection from rnat. Otherwise, we fetch the nat
1325 collection from the computed address. */
1326 if (nat_addr >= bsp)
1327 nat_collection = read_register (IA64_RNAT_REGNUM);
1328 else
1329 nat_collection = read_memory_integer (nat_addr, 8);
1330 nat_bit = (gr_addr >> 3) & 0x3f;
1331 natval = (nat_collection >> nat_bit) & 1;
1332 }
1333 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
1334 }
1335 else if (regnum == IA64_IP_REGNUM)
1336 {
1337 CORE_ADDR pc;
1338 if (get_next_frame (frame))
1339 {
1340 /* FIXME: Set *addrp, *lval when possible. */
1341 pc = ia64_frame_saved_pc (get_next_frame (frame));
1342 }
1343 else
1344 {
1345 pc = read_pc ();
1346 }
1347 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1348 }
1349 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1350 {
1351 CORE_ADDR addr = 0;
1352 if (!is_dummy_frame)
1353 {
1354 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1355 addr = get_frame_saved_regs (frame)[regnum];
1356 }
1357
1358 if (addr != 0)
1359 {
1360 if (lval != NULL)
1361 *lval = lval_memory;
1362 if (addrp != NULL)
1363 *addrp = addr;
1364 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1365 }
1366 else
1367 {
1368 /* r32 - r127 must be fetchable via memory. If they aren't,
1369 then the register is unavailable */
1370 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1371 }
1372 }
1373 else
1374 {
1375 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1376 {
1377 /* Fetch floating point register rename base from current
1378 frame marker for this frame. */
1379 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
1380
1381 /* Adjust the floating point register number to account for
1382 register rotation. */
1383 regnum = IA64_FR32_REGNUM
1384 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1385 }
1386
1387 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1388 frame, regnum, lval);
1389 }
1390 }
1391
1392 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1393 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1394 and TYPE is the type (which is known to be struct, union or array). */
1395 int
1396 ia64_use_struct_convention (int gcc_p, struct type *type)
1397 {
1398 struct type *float_elt_type;
1399
1400 /* HFAs are structures (or arrays) consisting entirely of floating
1401 point values of the same length. Up to 8 of these are returned
1402 in registers. Don't use the struct convention when this is the
1403 case. */
1404 float_elt_type = is_float_or_hfa_type (type);
1405 if (float_elt_type != NULL
1406 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1407 return 0;
1408
1409 /* Other structs of length 32 or less are returned in r8-r11.
1410 Don't use the struct convention for those either. */
1411 return TYPE_LENGTH (type) > 32;
1412 }
1413
1414 void
1415 ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1416 {
1417 struct type *float_elt_type;
1418
1419 float_elt_type = is_float_or_hfa_type (type);
1420 if (float_elt_type != NULL)
1421 {
1422 int offset = 0;
1423 int regnum = IA64_FR8_REGNUM;
1424 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1425
1426 while (n-- > 0)
1427 {
1428 ia64_register_convert_to_virtual (regnum, float_elt_type,
1429 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1430 offset += TYPE_LENGTH (float_elt_type);
1431 regnum++;
1432 }
1433 }
1434 else
1435 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1436 TYPE_LENGTH (type));
1437 }
1438
1439 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1440 like this is necessary though since the IA-64 calling conventions specify
1441 that r8 is not preserved. */
1442 static CORE_ADDR struct_return_address;
1443
1444 CORE_ADDR
1445 ia64_extract_struct_value_address (char *regbuf)
1446 {
1447 /* FIXME: See above. */
1448 return struct_return_address;
1449 }
1450
1451 void
1452 ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1453 {
1454 /* FIXME: See above. */
1455 /* Note that most of the work was done in ia64_push_arguments() */
1456 struct_return_address = addr;
1457 }
1458
1459 int
1460 ia64_frameless_function_invocation (struct frame_info *frame)
1461 {
1462 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1463 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
1464 }
1465
1466 CORE_ADDR
1467 ia64_saved_pc_after_call (struct frame_info *frame)
1468 {
1469 return read_register (IA64_BR0_REGNUM);
1470 }
1471
1472 CORE_ADDR
1473 ia64_frame_args_address (struct frame_info *frame)
1474 {
1475 /* frame->frame points at the SP for this frame; But we want the start
1476 of the frame, not the end. Calling frame chain will get his for us. */
1477 return ia64_frame_chain (frame);
1478 }
1479
1480 CORE_ADDR
1481 ia64_frame_locals_address (struct frame_info *frame)
1482 {
1483 /* frame->frame points at the SP for this frame; But we want the start
1484 of the frame, not the end. Calling frame chain will get his for us. */
1485 return ia64_frame_chain (frame);
1486 }
1487
1488 void
1489 ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1490 {
1491 CORE_ADDR bsp, cfm;
1492 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1493 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1494 get_frame_base (get_next_frame (frame)),
1495 get_frame_base (get_next_frame (frame))));
1496
1497 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
1498
1499 if (get_next_frame (frame) == 0)
1500 {
1501 bsp = read_register (IA64_BSP_REGNUM);
1502 cfm = read_register (IA64_CFM_REGNUM);
1503
1504 }
1505 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
1506 {
1507 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1508 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
1509 }
1510 else if (next_frame_is_call_dummy)
1511 {
1512 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1513 get_frame_base (get_next_frame (frame)),
1514 IA64_BSP_REGNUM);
1515 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1516 get_frame_base (get_next_frame (frame)),
1517 IA64_CFM_REGNUM);
1518 }
1519 else
1520 {
1521 struct frame_info *frn = get_next_frame (frame);
1522
1523 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
1524
1525 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1526 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
1527 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1528 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1529 else if (get_next_frame (frn)
1530 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1531 get_frame_base (get_next_frame (frn)),
1532 get_frame_base (get_next_frame (frn))))
1533 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1534 get_frame_base (get_next_frame (frn)),
1535 IA64_PFS_REGNUM);
1536 else
1537 cfm = read_register (IA64_PFS_REGNUM);
1538
1539 bsp = get_frame_extra_info (frn)->bsp;
1540 }
1541 get_frame_extra_info (frame)->cfm = cfm;
1542 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1543 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
1544 if (get_next_frame (frame) == 0
1545 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
1546 || next_frame_is_call_dummy)
1547 get_frame_extra_info (frame)->bsp =
1548 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
1549 else
1550 get_frame_extra_info (frame)->bsp =
1551 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
1552
1553 get_frame_extra_info (frame)->after_prologue = 0;
1554 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1555 get_frame_extra_info (frame)->fp_reg = 0;
1556 }
1557
1558 static int
1559 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1560 {
1561 switch (TYPE_CODE (t))
1562 {
1563 case TYPE_CODE_FLT:
1564 if (*etp)
1565 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1566 else
1567 {
1568 *etp = t;
1569 return 1;
1570 }
1571 break;
1572 case TYPE_CODE_ARRAY:
1573 return
1574 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1575 etp);
1576 break;
1577 case TYPE_CODE_STRUCT:
1578 {
1579 int i;
1580
1581 for (i = 0; i < TYPE_NFIELDS (t); i++)
1582 if (!is_float_or_hfa_type_recurse
1583 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
1584 return 0;
1585 return 1;
1586 }
1587 break;
1588 default:
1589 return 0;
1590 break;
1591 }
1592 }
1593
1594 /* Determine if the given type is one of the floating point types or
1595 and HFA (which is a struct, array, or combination thereof whose
1596 bottom-most elements are all of the same floating point type.) */
1597
1598 static struct type *
1599 is_float_or_hfa_type (struct type *t)
1600 {
1601 struct type *et = 0;
1602
1603 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1604 }
1605
1606
1607 /* Return 1 if the alignment of T is such that the next even slot
1608 should be used. Return 0, if the next available slot should
1609 be used. (See section 8.5.1 of the IA-64 Software Conventions
1610 and Runtime manual.) */
1611
1612 static int
1613 slot_alignment_is_next_even (struct type *t)
1614 {
1615 switch (TYPE_CODE (t))
1616 {
1617 case TYPE_CODE_INT:
1618 case TYPE_CODE_FLT:
1619 if (TYPE_LENGTH (t) > 8)
1620 return 1;
1621 else
1622 return 0;
1623 case TYPE_CODE_ARRAY:
1624 return
1625 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1626 case TYPE_CODE_STRUCT:
1627 {
1628 int i;
1629
1630 for (i = 0; i < TYPE_NFIELDS (t); i++)
1631 if (slot_alignment_is_next_even
1632 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1633 return 1;
1634 return 0;
1635 }
1636 default:
1637 return 0;
1638 }
1639 }
1640
1641 /* Attempt to find (and return) the global pointer for the given
1642 function.
1643
1644 This is a rather nasty bit of code searchs for the .dynamic section
1645 in the objfile corresponding to the pc of the function we're trying
1646 to call. Once it finds the addresses at which the .dynamic section
1647 lives in the child process, it scans the Elf64_Dyn entries for a
1648 DT_PLTGOT tag. If it finds one of these, the corresponding
1649 d_un.d_ptr value is the global pointer. */
1650
1651 static CORE_ADDR
1652 generic_elf_find_global_pointer (CORE_ADDR faddr)
1653 {
1654 struct obj_section *faddr_sect;
1655
1656 faddr_sect = find_pc_section (faddr);
1657 if (faddr_sect != NULL)
1658 {
1659 struct obj_section *osect;
1660
1661 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1662 {
1663 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1664 break;
1665 }
1666
1667 if (osect < faddr_sect->objfile->sections_end)
1668 {
1669 CORE_ADDR addr;
1670
1671 addr = osect->addr;
1672 while (addr < osect->endaddr)
1673 {
1674 int status;
1675 LONGEST tag;
1676 char buf[8];
1677
1678 status = target_read_memory (addr, buf, sizeof (buf));
1679 if (status != 0)
1680 break;
1681 tag = extract_signed_integer (buf, sizeof (buf));
1682
1683 if (tag == DT_PLTGOT)
1684 {
1685 CORE_ADDR global_pointer;
1686
1687 status = target_read_memory (addr + 8, buf, sizeof (buf));
1688 if (status != 0)
1689 break;
1690 global_pointer = extract_address (buf, sizeof (buf));
1691
1692 /* The payoff... */
1693 return global_pointer;
1694 }
1695
1696 if (tag == DT_NULL)
1697 break;
1698
1699 addr += 16;
1700 }
1701 }
1702 }
1703 return 0;
1704 }
1705
1706 /* Given a function's address, attempt to find (and return) the
1707 corresponding (canonical) function descriptor. Return 0 if
1708 not found. */
1709 static CORE_ADDR
1710 find_extant_func_descr (CORE_ADDR faddr)
1711 {
1712 struct obj_section *faddr_sect;
1713
1714 /* Return early if faddr is already a function descriptor */
1715 faddr_sect = find_pc_section (faddr);
1716 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
1717 return faddr;
1718
1719 if (faddr_sect != NULL)
1720 {
1721 struct obj_section *osect;
1722 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1723 {
1724 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1725 break;
1726 }
1727
1728 if (osect < faddr_sect->objfile->sections_end)
1729 {
1730 CORE_ADDR addr;
1731
1732 addr = osect->addr;
1733 while (addr < osect->endaddr)
1734 {
1735 int status;
1736 LONGEST faddr2;
1737 char buf[8];
1738
1739 status = target_read_memory (addr, buf, sizeof (buf));
1740 if (status != 0)
1741 break;
1742 faddr2 = extract_signed_integer (buf, sizeof (buf));
1743
1744 if (faddr == faddr2)
1745 return addr;
1746
1747 addr += 16;
1748 }
1749 }
1750 }
1751 return 0;
1752 }
1753
1754 /* Attempt to find a function descriptor corresponding to the
1755 given address. If none is found, construct one on the
1756 stack using the address at fdaptr */
1757
1758 static CORE_ADDR
1759 find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1760 {
1761 CORE_ADDR fdesc;
1762
1763 fdesc = find_extant_func_descr (faddr);
1764
1765 if (fdesc == 0)
1766 {
1767 CORE_ADDR global_pointer;
1768 char buf[16];
1769
1770 fdesc = *fdaptr;
1771 *fdaptr += 16;
1772
1773 global_pointer = FIND_GLOBAL_POINTER (faddr);
1774
1775 if (global_pointer == 0)
1776 global_pointer = read_register (IA64_GR1_REGNUM);
1777
1778 store_address (buf, 8, faddr);
1779 store_address (buf + 8, 8, global_pointer);
1780
1781 write_memory (fdesc, buf, 16);
1782 }
1783
1784 return fdesc;
1785 }
1786
1787 CORE_ADDR
1788 ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
1789 int struct_return, CORE_ADDR struct_addr)
1790 {
1791 int argno;
1792 struct value *arg;
1793 struct type *type;
1794 int len, argoffset;
1795 int nslots, rseslots, memslots, slotnum, nfuncargs;
1796 int floatreg;
1797 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
1798
1799 nslots = 0;
1800 nfuncargs = 0;
1801 /* Count the number of slots needed for the arguments */
1802 for (argno = 0; argno < nargs; argno++)
1803 {
1804 arg = args[argno];
1805 type = check_typedef (VALUE_TYPE (arg));
1806 len = TYPE_LENGTH (type);
1807
1808 if ((nslots & 1) && slot_alignment_is_next_even (type))
1809 nslots++;
1810
1811 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1812 nfuncargs++;
1813
1814 nslots += (len + 7) / 8;
1815 }
1816
1817 /* Divvy up the slots between the RSE and the memory stack */
1818 rseslots = (nslots > 8) ? 8 : nslots;
1819 memslots = nslots - rseslots;
1820
1821 /* Allocate a new RSE frame */
1822 cfm = read_register (IA64_CFM_REGNUM);
1823
1824 bsp = read_register (IA64_BSP_REGNUM);
1825 bsp = rse_address_add (bsp, cfm & 0x7f);
1826 new_bsp = rse_address_add (bsp, rseslots);
1827 write_register (IA64_BSP_REGNUM, new_bsp);
1828
1829 pfs = read_register (IA64_PFS_REGNUM);
1830 pfs &= 0xc000000000000000LL;
1831 pfs |= (cfm & 0xffffffffffffLL);
1832 write_register (IA64_PFS_REGNUM, pfs);
1833
1834 cfm &= 0xc000000000000000LL;
1835 cfm |= rseslots;
1836 write_register (IA64_CFM_REGNUM, cfm);
1837
1838 /* We will attempt to find function descriptors in the .opd segment,
1839 but if we can't we'll construct them ourselves. That being the
1840 case, we'll need to reserve space on the stack for them. */
1841 funcdescaddr = sp - nfuncargs * 16;
1842 funcdescaddr &= ~0xfLL;
1843
1844 /* Adjust the stack pointer to it's new value. The calling conventions
1845 require us to have 16 bytes of scratch, plus whatever space is
1846 necessary for the memory slots and our function descriptors */
1847 sp = sp - 16 - (memslots + nfuncargs) * 8;
1848 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1849
1850 /* Place the arguments where they belong. The arguments will be
1851 either placed in the RSE backing store or on the memory stack.
1852 In addition, floating point arguments or HFAs are placed in
1853 floating point registers. */
1854 slotnum = 0;
1855 floatreg = IA64_FR8_REGNUM;
1856 for (argno = 0; argno < nargs; argno++)
1857 {
1858 struct type *float_elt_type;
1859
1860 arg = args[argno];
1861 type = check_typedef (VALUE_TYPE (arg));
1862 len = TYPE_LENGTH (type);
1863
1864 /* Special handling for function parameters */
1865 if (len == 8
1866 && TYPE_CODE (type) == TYPE_CODE_PTR
1867 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1868 {
1869 char val_buf[8];
1870
1871 store_address (val_buf, 8,
1872 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1873 &funcdescaddr));
1874 if (slotnum < rseslots)
1875 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1876 else
1877 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1878 slotnum++;
1879 continue;
1880 }
1881
1882 /* Normal slots */
1883
1884 /* Skip odd slot if necessary... */
1885 if ((slotnum & 1) && slot_alignment_is_next_even (type))
1886 slotnum++;
1887
1888 argoffset = 0;
1889 while (len > 0)
1890 {
1891 char val_buf[8];
1892
1893 memset (val_buf, 0, 8);
1894 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1895
1896 if (slotnum < rseslots)
1897 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1898 else
1899 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1900
1901 argoffset += 8;
1902 len -= 8;
1903 slotnum++;
1904 }
1905
1906 /* Handle floating point types (including HFAs) */
1907 float_elt_type = is_float_or_hfa_type (type);
1908 if (float_elt_type != NULL)
1909 {
1910 argoffset = 0;
1911 len = TYPE_LENGTH (type);
1912 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1913 {
1914 ia64_register_convert_to_raw (
1915 float_elt_type,
1916 floatreg,
1917 VALUE_CONTENTS (arg) + argoffset,
1918 &deprecated_registers[REGISTER_BYTE (floatreg)]);
1919 floatreg++;
1920 argoffset += TYPE_LENGTH (float_elt_type);
1921 len -= TYPE_LENGTH (float_elt_type);
1922 }
1923 }
1924 }
1925
1926 /* Store the struct return value in r8 if necessary. */
1927 if (struct_return)
1928 {
1929 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1930 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1931 struct_addr);
1932 }
1933
1934 /* Sync gdb's idea of what the registers are with the target. */
1935 target_store_registers (-1);
1936
1937 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1938 to be defined to call generic_save_dummy_frame_tos(). But at the
1939 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1940 I chose to put this call here instead of using the old mechanisms.
1941 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1942 line
1943
1944 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1945
1946 to ia64_gdbarch_init() and remove the line below. */
1947 generic_save_dummy_frame_tos (sp);
1948
1949 return sp;
1950 }
1951
1952 CORE_ADDR
1953 ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1954 {
1955 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
1956
1957 if (global_pointer != 0)
1958 write_register (IA64_GR1_REGNUM, global_pointer);
1959
1960 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1961 return sp;
1962 }
1963
1964 void
1965 ia64_store_return_value (struct type *type, char *valbuf)
1966 {
1967 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1968 {
1969 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1970 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1971 target_store_registers (IA64_FR8_REGNUM);
1972 }
1973 else
1974 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1975 valbuf, TYPE_LENGTH (type));
1976 }
1977
1978 void
1979 ia64_pop_frame (void)
1980 {
1981 generic_pop_current_frame (ia64_pop_frame_regular);
1982 }
1983
1984 static void
1985 ia64_pop_frame_regular (struct frame_info *frame)
1986 {
1987 int regno;
1988 CORE_ADDR bsp, cfm, pfs;
1989
1990 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1991
1992 for (regno = 0; regno < ia64_num_regs; regno++)
1993 {
1994 if (get_frame_saved_regs (frame)[regno]
1995 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1996 && regno != pc_regnum
1997 && regno != sp_regnum
1998 && regno != IA64_PFS_REGNUM
1999 && regno != IA64_CFM_REGNUM
2000 && regno != IA64_BSP_REGNUM
2001 && regno != IA64_BSPSTORE_REGNUM)
2002 {
2003 write_register (regno,
2004 read_memory_integer (get_frame_saved_regs (frame)[regno],
2005 REGISTER_RAW_SIZE (regno)));
2006 }
2007 }
2008
2009 write_register (sp_regnum, FRAME_CHAIN (frame));
2010 write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
2011
2012 cfm = read_register (IA64_CFM_REGNUM);
2013
2014 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
2015 {
2016 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
2017 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2018 }
2019 else
2020 pfs = read_register (IA64_PFS_REGNUM);
2021
2022 /* Compute the new bsp by *adding* the difference between the
2023 size of the frame and the size of the locals (both wrt the
2024 frame that we're going back to). This seems kind of strange,
2025 especially since it seems like we ought to be subtracting the
2026 size of the locals... and we should; but the Linux kernel
2027 wants bsp to be set at the end of all used registers. It's
2028 likely that this code will need to be revised to accomodate
2029 other operating systems. */
2030 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
2031 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2032 write_register (IA64_BSP_REGNUM, bsp);
2033
2034 /* FIXME: What becomes of the epilog count in the PFS? */
2035 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2036 write_register (IA64_CFM_REGNUM, cfm);
2037
2038 flush_cached_frames ();
2039 }
2040
2041 static void
2042 ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2043 CORE_ADDR *targ_addr, int *targ_len)
2044 {
2045 *targ_addr = memaddr;
2046 *targ_len = nr_bytes;
2047 }
2048
2049 static void
2050 process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2051 {
2052 int *os_ident_ptr = obj;
2053 const char *name;
2054 unsigned int sectsize;
2055
2056 name = bfd_get_section_name (abfd, sect);
2057 sectsize = bfd_section_size (abfd, sect);
2058 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2059 {
2060 unsigned int name_length, data_length, note_type;
2061 char *note = alloca (sectsize);
2062
2063 bfd_get_section_contents (abfd, sect, note,
2064 (file_ptr) 0, (bfd_size_type) sectsize);
2065
2066 name_length = bfd_h_get_32 (abfd, note);
2067 data_length = bfd_h_get_32 (abfd, note + 4);
2068 note_type = bfd_h_get_32 (abfd, note + 8);
2069
2070 if (name_length == 4 && data_length == 16 && note_type == 1
2071 && strcmp (note + 12, "GNU") == 0)
2072 {
2073 int os_number = bfd_h_get_32 (abfd, note + 16);
2074
2075 /* The case numbers are from abi-tags in glibc */
2076 switch (os_number)
2077 {
2078 case 0 :
2079 *os_ident_ptr = ELFOSABI_LINUX;
2080 break;
2081 case 1 :
2082 *os_ident_ptr = ELFOSABI_HURD;
2083 break;
2084 case 2 :
2085 *os_ident_ptr = ELFOSABI_SOLARIS;
2086 break;
2087 default :
2088 internal_error (__FILE__, __LINE__,
2089 "process_note_abi_sections: unknown OS number %d", os_number);
2090 break;
2091 }
2092 }
2093 }
2094 }
2095
2096 static struct gdbarch *
2097 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2098 {
2099 struct gdbarch *gdbarch;
2100 struct gdbarch_tdep *tdep;
2101 int os_ident;
2102
2103 if (info.abfd != NULL
2104 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2105 {
2106 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2107
2108 /* If os_ident is 0, it is not necessarily the case that we're
2109 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2110 GNU/Linux uses a note section to record OS/ABI info, but
2111 leaves e_ident[EI_OSABI] zero. So we have to check for note
2112 sections too. */
2113 if (os_ident == 0)
2114 {
2115 bfd_map_over_sections (info.abfd,
2116 process_note_abi_tag_sections,
2117 &os_ident);
2118 }
2119 }
2120 else
2121 os_ident = -1;
2122
2123 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2124 arches != NULL;
2125 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2126 {
2127 tdep = gdbarch_tdep (arches->gdbarch);
2128 if (tdep &&tdep->os_ident == os_ident)
2129 return arches->gdbarch;
2130 }
2131
2132 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2133 gdbarch = gdbarch_alloc (&info, tdep);
2134 tdep->os_ident = os_ident;
2135
2136 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2137 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2138 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
2139
2140 /* Set the method of obtaining the sigcontext addresses at which
2141 registers are saved. The method of checking to see if
2142 native_find_global_pointer is nonzero to indicate that we're
2143 on AIX is kind of hokey, but I can't think of a better way
2144 to do it. */
2145 if (os_ident == ELFOSABI_LINUX)
2146 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
2147 else if (native_find_global_pointer != 0)
2148 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
2149 else
2150 tdep->sigcontext_register_address = 0;
2151
2152 /* We know that GNU/Linux won't have to resort to the
2153 native_find_global_pointer hackery. But that's the only one we
2154 know about so far, so if native_find_global_pointer is set to
2155 something non-zero, then use it. Otherwise fall back to using
2156 generic_elf_find_global_pointer. This arrangement should (in
2157 theory) allow us to cross debug GNU/Linux binaries from an AIX
2158 machine. */
2159 if (os_ident == ELFOSABI_LINUX)
2160 tdep->find_global_pointer = generic_elf_find_global_pointer;
2161 else if (native_find_global_pointer != 0)
2162 tdep->find_global_pointer = native_find_global_pointer;
2163 else
2164 tdep->find_global_pointer = generic_elf_find_global_pointer;
2165
2166 set_gdbarch_short_bit (gdbarch, 16);
2167 set_gdbarch_int_bit (gdbarch, 32);
2168 set_gdbarch_long_bit (gdbarch, 64);
2169 set_gdbarch_long_long_bit (gdbarch, 64);
2170 set_gdbarch_float_bit (gdbarch, 32);
2171 set_gdbarch_double_bit (gdbarch, 64);
2172 set_gdbarch_long_double_bit (gdbarch, 64);
2173 set_gdbarch_ptr_bit (gdbarch, 64);
2174
2175 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2176 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2177 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2178 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
2179 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
2180
2181 set_gdbarch_register_name (gdbarch, ia64_register_name);
2182 set_gdbarch_register_size (gdbarch, 8);
2183 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2184 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2185 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2186 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
2187 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2188 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
2189 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2190
2191 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2192
2193 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2194 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2195
2196 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2197
2198 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
2199 set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2200
2201 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2202 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
2203
2204 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2205 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2206 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2207
2208 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2209 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
2210
2211 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
2212 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
2213 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2214
2215 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2216 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2217 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2218 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2219 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2220
2221 /* Settings for calling functions in the inferior. */
2222 set_gdbarch_call_dummy_length (gdbarch, 0);
2223 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2224 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2225 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
2226
2227 set_gdbarch_call_dummy_p (gdbarch, 1);
2228 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2229 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2230 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2231 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2232 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2233 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2234
2235 /* We won't necessarily have a frame pointer and even if we do,
2236 it winds up being extraordinarly messy when attempting to find
2237 the frame chain. So for the purposes of creating frames (which
2238 is all read_fp() is used for), simply use the stack pointer value
2239 instead. */
2240 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2241
2242 /* Settings that should be unnecessary. */
2243 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2244
2245 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2246 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2247
2248 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2249 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2250 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2251 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2252 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2253
2254 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2255 set_gdbarch_function_start_offset (gdbarch, 0);
2256 set_gdbarch_frame_args_skip (gdbarch, 0);
2257
2258 set_gdbarch_remote_translate_xfer_address (
2259 gdbarch, ia64_remote_translate_xfer_address);
2260
2261 return gdbarch;
2262 }
2263
2264 void
2265 _initialize_ia64_tdep (void)
2266 {
2267 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2268
2269 tm_print_insn = print_insn_ia64;
2270 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2271 }
This page took 0.078721 seconds and 4 git commands to generate.