*** empty log message ***
[deliverable/binutils-gdb.git] / gdb / ia64-tdep.c
1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "inferior.h"
24 #include "symfile.h" /* for entry_point_address */
25 #include "gdbcore.h"
26 #include "arch-utils.h"
27 #include "floatformat.h"
28 #include "regcache.h"
29 #include "doublest.h"
30 #include "value.h"
31
32 #include "objfiles.h"
33 #include "elf/common.h" /* for DT_PLTGOT value */
34 #include "elf-bfd.h"
35
36 /* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45 CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47 /* An enumeration of the different IA-64 instruction types. */
48
49 typedef enum instruction_type
50 {
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59 } instruction_type;
60
61 /* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76 #define SLOT_MULTIPLIER 1
77
78 /* Length in bytes of an instruction bundle */
79
80 #define BUNDLE_LEN 16
81
82 /* FIXME: These extern declarations should go in ia64-tdep.h. */
83 extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
84 extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
85
86 static gdbarch_init_ftype ia64_gdbarch_init;
87
88 static gdbarch_register_name_ftype ia64_register_name;
89 static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92 static gdbarch_register_byte_ftype ia64_register_byte;
93 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
95 static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
96 static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
97 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
98 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
99 static gdbarch_push_return_address_ftype ia64_push_return_address;
100 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
101 static void ia64_pop_frame_regular (struct frame_info *frame);
102 static struct type *is_float_or_hfa_type (struct type *t);
103
104 static int ia64_num_regs = 590;
105
106 static int pc_regnum = IA64_IP_REGNUM;
107 static int sp_regnum = IA64_GR12_REGNUM;
108 static int fp_regnum = IA64_VFP_REGNUM;
109 static int lr_regnum = IA64_VRAP_REGNUM;
110
111 static LONGEST ia64_call_dummy_words[] = {0};
112
113 /* Array of register names; There should be ia64_num_regs strings in
114 the initializer. */
115
116 static char *ia64_register_names[] =
117 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
118 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
119 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
120 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
121 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
122 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
123 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
124 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
125 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
126 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
127 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
128 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
129 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
130 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
131 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
132 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
133
134 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
135 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
136 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
137 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
138 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
139 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
140 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
141 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
142 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
143 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
144 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
145 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
146 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
147 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
148 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
149 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
150
151 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
152 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
153 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
154 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
155 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
156 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
157 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
158 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
159
160 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
161
162 "vfp", "vrap",
163
164 "pr", "ip", "psr", "cfm",
165
166 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
167 "", "", "", "", "", "", "", "",
168 "rsc", "bsp", "bspstore", "rnat",
169 "", "fcr", "", "",
170 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
171 "ccv", "", "", "", "unat", "", "", "",
172 "fpsr", "", "", "", "itc",
173 "", "", "", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "", "",
175 "pfs", "lc", "ec",
176 "", "", "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "", "",
182 "",
183 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
184 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
185 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
186 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
187 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
188 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
189 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
190 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
191 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
192 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
193 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
194 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
195 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
196 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
197 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
198 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
199 };
200
201 struct frame_extra_info
202 {
203 CORE_ADDR bsp; /* points at r32 for the current frame */
204 CORE_ADDR cfm; /* cfm value for current frame */
205 int sof; /* Size of frame (decoded from cfm value) */
206 int sol; /* Size of locals (decoded from cfm value) */
207 CORE_ADDR after_prologue;
208 /* Address of first instruction after the last
209 prologue instruction; Note that there may
210 be instructions from the function's body
211 intermingled with the prologue. */
212 int mem_stack_frame_size;
213 /* Size of the memory stack frame (may be zero),
214 or -1 if it has not been determined yet. */
215 int fp_reg; /* Register number (if any) used a frame pointer
216 for this frame. 0 if no register is being used
217 as the frame pointer. */
218 };
219
220 struct gdbarch_tdep
221 {
222 int os_ident; /* From the ELF header, one of the ELFOSABI_
223 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
224 etc. */
225 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
226 /* OS specific function which, given a frame address
227 and register number, returns the offset to the
228 given register from the start of the frame. */
229 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
230 };
231
232 #define SIGCONTEXT_REGISTER_ADDRESS \
233 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
234 #define FIND_GLOBAL_POINTER \
235 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
236
237 static const char *
238 ia64_register_name (int reg)
239 {
240 return ia64_register_names[reg];
241 }
242
243 int
244 ia64_register_raw_size (int reg)
245 {
246 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
247 }
248
249 int
250 ia64_register_virtual_size (int reg)
251 {
252 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
253 }
254
255 /* Return true iff register N's virtual format is different from
256 its raw format. */
257 int
258 ia64_register_convertible (int nr)
259 {
260 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
261 }
262
263 const struct floatformat floatformat_ia64_ext =
264 {
265 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
266 floatformat_intbit_yes
267 };
268
269 void
270 ia64_register_convert_to_virtual (int regnum, struct type *type,
271 char *from, char *to)
272 {
273 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
274 {
275 DOUBLEST val;
276 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
277 store_floating(to, TYPE_LENGTH(type), val);
278 }
279 else
280 error("ia64_register_convert_to_virtual called with non floating point register number");
281 }
282
283 void
284 ia64_register_convert_to_raw (struct type *type, int regnum,
285 char *from, char *to)
286 {
287 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
288 {
289 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
290 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
291 }
292 else
293 error("ia64_register_convert_to_raw called with non floating point register number");
294 }
295
296 struct type *
297 ia64_register_virtual_type (int reg)
298 {
299 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
300 return builtin_type_long_double;
301 else
302 return builtin_type_long;
303 }
304
305 int
306 ia64_register_byte (int reg)
307 {
308 return (8 * reg) +
309 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
310 }
311
312 /* Read the given register from a sigcontext structure in the
313 specified frame. */
314
315 static CORE_ADDR
316 read_sigcontext_register (struct frame_info *frame, int regnum)
317 {
318 CORE_ADDR regaddr;
319
320 if (frame == NULL)
321 internal_error (__FILE__, __LINE__,
322 "read_sigcontext_register: NULL frame");
323 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
324 internal_error (__FILE__, __LINE__,
325 "read_sigcontext_register: frame not a signal trampoline");
326 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
327 internal_error (__FILE__, __LINE__,
328 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
329
330 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
331 if (regaddr)
332 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
333 else
334 internal_error (__FILE__, __LINE__,
335 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
336 }
337
338 /* Extract ``len'' bits from an instruction bundle starting at
339 bit ``from''. */
340
341 static long long
342 extract_bit_field (char *bundle, int from, int len)
343 {
344 long long result = 0LL;
345 int to = from + len;
346 int from_byte = from / 8;
347 int to_byte = to / 8;
348 unsigned char *b = (unsigned char *) bundle;
349 unsigned char c;
350 int lshift;
351 int i;
352
353 c = b[from_byte];
354 if (from_byte == to_byte)
355 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
356 result = c >> (from % 8);
357 lshift = 8 - (from % 8);
358
359 for (i = from_byte+1; i < to_byte; i++)
360 {
361 result |= ((long long) b[i]) << lshift;
362 lshift += 8;
363 }
364
365 if (from_byte < to_byte && (to % 8 != 0))
366 {
367 c = b[to_byte];
368 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
369 result |= ((long long) c) << lshift;
370 }
371
372 return result;
373 }
374
375 /* Replace the specified bits in an instruction bundle */
376
377 static void
378 replace_bit_field (char *bundle, long long val, int from, int len)
379 {
380 int to = from + len;
381 int from_byte = from / 8;
382 int to_byte = to / 8;
383 unsigned char *b = (unsigned char *) bundle;
384 unsigned char c;
385
386 if (from_byte == to_byte)
387 {
388 unsigned char left, right;
389 c = b[from_byte];
390 left = (c >> (to % 8)) << (to % 8);
391 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
392 c = (unsigned char) (val & 0xff);
393 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
394 c |= right | left;
395 b[from_byte] = c;
396 }
397 else
398 {
399 int i;
400 c = b[from_byte];
401 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
402 c = c | (val << (from % 8));
403 b[from_byte] = c;
404 val >>= 8 - from % 8;
405
406 for (i = from_byte+1; i < to_byte; i++)
407 {
408 c = val & 0xff;
409 val >>= 8;
410 b[i] = c;
411 }
412
413 if (to % 8 != 0)
414 {
415 unsigned char cv = (unsigned char) val;
416 c = b[to_byte];
417 c = c >> (to % 8) << (to % 8);
418 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
419 b[to_byte] = c;
420 }
421 }
422 }
423
424 /* Return the contents of slot N (for N = 0, 1, or 2) in
425 and instruction bundle */
426
427 static long long
428 slotN_contents (char *bundle, int slotnum)
429 {
430 return extract_bit_field (bundle, 5+41*slotnum, 41);
431 }
432
433 /* Store an instruction in an instruction bundle */
434
435 static void
436 replace_slotN_contents (char *bundle, long long instr, int slotnum)
437 {
438 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
439 }
440
441 static enum instruction_type template_encoding_table[32][3] =
442 {
443 { M, I, I }, /* 00 */
444 { M, I, I }, /* 01 */
445 { M, I, I }, /* 02 */
446 { M, I, I }, /* 03 */
447 { M, L, X }, /* 04 */
448 { M, L, X }, /* 05 */
449 { undefined, undefined, undefined }, /* 06 */
450 { undefined, undefined, undefined }, /* 07 */
451 { M, M, I }, /* 08 */
452 { M, M, I }, /* 09 */
453 { M, M, I }, /* 0A */
454 { M, M, I }, /* 0B */
455 { M, F, I }, /* 0C */
456 { M, F, I }, /* 0D */
457 { M, M, F }, /* 0E */
458 { M, M, F }, /* 0F */
459 { M, I, B }, /* 10 */
460 { M, I, B }, /* 11 */
461 { M, B, B }, /* 12 */
462 { M, B, B }, /* 13 */
463 { undefined, undefined, undefined }, /* 14 */
464 { undefined, undefined, undefined }, /* 15 */
465 { B, B, B }, /* 16 */
466 { B, B, B }, /* 17 */
467 { M, M, B }, /* 18 */
468 { M, M, B }, /* 19 */
469 { undefined, undefined, undefined }, /* 1A */
470 { undefined, undefined, undefined }, /* 1B */
471 { M, F, B }, /* 1C */
472 { M, F, B }, /* 1D */
473 { undefined, undefined, undefined }, /* 1E */
474 { undefined, undefined, undefined }, /* 1F */
475 };
476
477 /* Fetch and (partially) decode an instruction at ADDR and return the
478 address of the next instruction to fetch. */
479
480 static CORE_ADDR
481 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
482 {
483 char bundle[BUNDLE_LEN];
484 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
485 long long template;
486 int val;
487
488 /* Warn about slot numbers greater than 2. We used to generate
489 an error here on the assumption that the user entered an invalid
490 address. But, sometimes GDB itself requests an invalid address.
491 This can (easily) happen when execution stops in a function for
492 which there are no symbols. The prologue scanner will attempt to
493 find the beginning of the function - if the nearest symbol
494 happens to not be aligned on a bundle boundary (16 bytes), the
495 resulting starting address will cause GDB to think that the slot
496 number is too large.
497
498 So we warn about it and set the slot number to zero. It is
499 not necessarily a fatal condition, particularly if debugging
500 at the assembly language level. */
501 if (slotnum > 2)
502 {
503 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
504 "Using slot 0 instead");
505 slotnum = 0;
506 }
507
508 addr &= ~0x0f;
509
510 val = target_read_memory (addr, bundle, BUNDLE_LEN);
511
512 if (val != 0)
513 return 0;
514
515 *instr = slotN_contents (bundle, slotnum);
516 template = extract_bit_field (bundle, 0, 5);
517 *it = template_encoding_table[(int)template][slotnum];
518
519 if (slotnum == 2 || (slotnum == 1 && *it == L))
520 addr += 16;
521 else
522 addr += (slotnum + 1) * SLOT_MULTIPLIER;
523
524 return addr;
525 }
526
527 /* There are 5 different break instructions (break.i, break.b,
528 break.m, break.f, and break.x), but they all have the same
529 encoding. (The five bit template in the low five bits of the
530 instruction bundle distinguishes one from another.)
531
532 The runtime architecture manual specifies that break instructions
533 used for debugging purposes must have the upper two bits of the 21
534 bit immediate set to a 0 and a 1 respectively. A breakpoint
535 instruction encodes the most significant bit of its 21 bit
536 immediate at bit 36 of the 41 bit instruction. The penultimate msb
537 is at bit 25 which leads to the pattern below.
538
539 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
540 it turns out that 0x80000 was used as the syscall break in the early
541 simulators. So I changed the pattern slightly to do "break.i 0x080001"
542 instead. But that didn't work either (I later found out that this
543 pattern was used by the simulator that I was using.) So I ended up
544 using the pattern seen below. */
545
546 #if 0
547 #define BREAKPOINT 0x00002000040LL
548 #endif
549 #define BREAKPOINT 0x00003333300LL
550
551 static int
552 ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
553 {
554 char bundle[BUNDLE_LEN];
555 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
556 long long instr;
557 int val;
558 int template;
559
560 if (slotnum > 2)
561 error("Can't insert breakpoint for slot numbers greater than 2.");
562
563 addr &= ~0x0f;
564
565 val = target_read_memory (addr, bundle, BUNDLE_LEN);
566
567 /* Check for L type instruction in 2nd slot, if present then
568 bump up the slot number to the 3rd slot */
569 template = extract_bit_field (bundle, 0, 5);
570 if (slotnum == 1 && template_encoding_table[template][1] == L)
571 {
572 slotnum = 2;
573 }
574
575 instr = slotN_contents (bundle, slotnum);
576 memcpy(contents_cache, &instr, sizeof(instr));
577 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
578 if (val == 0)
579 target_write_memory (addr, bundle, BUNDLE_LEN);
580
581 return val;
582 }
583
584 static int
585 ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
586 {
587 char bundle[BUNDLE_LEN];
588 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
589 long long instr;
590 int val;
591 int template;
592
593 addr &= ~0x0f;
594
595 val = target_read_memory (addr, bundle, BUNDLE_LEN);
596
597 /* Check for L type instruction in 2nd slot, if present then
598 bump up the slot number to the 3rd slot */
599 template = extract_bit_field (bundle, 0, 5);
600 if (slotnum == 1 && template_encoding_table[template][1] == L)
601 {
602 slotnum = 2;
603 }
604
605 memcpy (&instr, contents_cache, sizeof instr);
606 replace_slotN_contents (bundle, instr, slotnum);
607 if (val == 0)
608 target_write_memory (addr, bundle, BUNDLE_LEN);
609
610 return val;
611 }
612
613 /* We don't really want to use this, but remote.c needs to call it in order
614 to figure out if Z-packets are supported or not. Oh, well. */
615 const unsigned char *
616 ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
617 {
618 static unsigned char breakpoint[] =
619 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
620 *lenptr = sizeof (breakpoint);
621 #if 0
622 *pcptr &= ~0x0f;
623 #endif
624 return breakpoint;
625 }
626
627 CORE_ADDR
628 ia64_read_pc (ptid_t ptid)
629 {
630 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
631 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
632 int slot_num = (psr_value >> 41) & 3;
633
634 return pc_value | (slot_num * SLOT_MULTIPLIER);
635 }
636
637 void
638 ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
639 {
640 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
641 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
642 psr_value &= ~(3LL << 41);
643 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
644
645 new_pc &= ~0xfLL;
646
647 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
648 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
649 }
650
651 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
652
653 /* Returns the address of the slot that's NSLOTS slots away from
654 the address ADDR. NSLOTS may be positive or negative. */
655 static CORE_ADDR
656 rse_address_add(CORE_ADDR addr, int nslots)
657 {
658 CORE_ADDR new_addr;
659 int mandatory_nat_slots = nslots / 63;
660 int direction = nslots < 0 ? -1 : 1;
661
662 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
663
664 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
665 new_addr += 8 * direction;
666
667 if (IS_NaT_COLLECTION_ADDR(new_addr))
668 new_addr += 8 * direction;
669
670 return new_addr;
671 }
672
673 /* The IA-64 frame chain is a bit odd. We won't always have a frame
674 pointer, so we use the SP value as the FP for the purpose of
675 creating a frame. There is sometimes a register (not fixed) which
676 is used as a frame pointer. When this register exists, it is not
677 especially hard to determine which one is being used. It isn't
678 even really hard to compute the frame chain, but it can be
679 computationally expensive. So, instead of making life difficult
680 (and slow), we pick a more convenient representation of the frame
681 chain, knowing that we'll have to make some small adjustments in
682 other places. (E.g, note that read_fp() is actually read_sp() in
683 ia64_gdbarch_init() below.)
684
685 Okay, so what is the frame chain exactly? It'll be the SP value
686 at the time that the function in question was entered.
687
688 Note that this *should* actually the frame pointer for the current
689 function! But as I note above, if we were to attempt to find the
690 address of the beginning of the previous frame, we'd waste a lot
691 of cycles for no good reason. So instead, we simply choose to
692 represent the frame chain as the end of the previous frame instead
693 of the beginning. */
694
695 CORE_ADDR
696 ia64_frame_chain (struct frame_info *frame)
697 {
698 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
699 return read_sigcontext_register (frame, sp_regnum);
700 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
701 get_frame_base (frame),
702 get_frame_base (frame)))
703 return get_frame_base (frame);
704 else
705 {
706 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
707 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
708 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
709 else
710 return (get_frame_base (frame)
711 + get_frame_extra_info (frame)->mem_stack_frame_size);
712 }
713 }
714
715 CORE_ADDR
716 ia64_frame_saved_pc (struct frame_info *frame)
717 {
718 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
719 return read_sigcontext_register (frame, pc_regnum);
720 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
721 get_frame_base (frame),
722 get_frame_base (frame)))
723 return deprecated_read_register_dummy (get_frame_pc (frame),
724 get_frame_base (frame), pc_regnum);
725 else
726 {
727 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
728
729 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
730 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
731 else if (get_next_frame (frame)
732 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
733 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
734 else /* either frameless, or not far enough along in the prologue... */
735 return ia64_saved_pc_after_call (frame);
736 }
737 }
738
739 /* Limit the number of skipped non-prologue instructions since examining
740 of the prologue is expensive. */
741 static int max_skip_non_prologue_insns = 10;
742
743 /* Given PC representing the starting address of a function, and
744 LIM_PC which is the (sloppy) limit to which to scan when looking
745 for a prologue, attempt to further refine this limit by using
746 the line data in the symbol table. If successful, a better guess
747 on where the prologue ends is returned, otherwise the previous
748 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
749 which will be set to indicate whether the returned limit may be
750 used with no further scanning in the event that the function is
751 frameless. */
752
753 static CORE_ADDR
754 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
755 {
756 struct symtab_and_line prologue_sal;
757 CORE_ADDR start_pc = pc;
758
759 /* Start off not trusting the limit. */
760 *trust_limit = 0;
761
762 prologue_sal = find_pc_line (pc, 0);
763 if (prologue_sal.line != 0)
764 {
765 int i;
766 CORE_ADDR addr = prologue_sal.end;
767
768 /* Handle the case in which compiler's optimizer/scheduler
769 has moved instructions into the prologue. We scan ahead
770 in the function looking for address ranges whose corresponding
771 line number is less than or equal to the first one that we
772 found for the function. (It can be less than when the
773 scheduler puts a body instruction before the first prologue
774 instruction.) */
775 for (i = 2 * max_skip_non_prologue_insns;
776 i > 0 && (lim_pc == 0 || addr < lim_pc);
777 i--)
778 {
779 struct symtab_and_line sal;
780
781 sal = find_pc_line (addr, 0);
782 if (sal.line == 0)
783 break;
784 if (sal.line <= prologue_sal.line
785 && sal.symtab == prologue_sal.symtab)
786 {
787 prologue_sal = sal;
788 }
789 addr = sal.end;
790 }
791
792 if (lim_pc == 0 || prologue_sal.end < lim_pc)
793 {
794 lim_pc = prologue_sal.end;
795 if (start_pc == get_pc_function_start (lim_pc))
796 *trust_limit = 1;
797 }
798 }
799 return lim_pc;
800 }
801
802 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
803 || (8 <= (_regnum_) && (_regnum_) <= 11) \
804 || (14 <= (_regnum_) && (_regnum_) <= 31))
805 #define imm9(_instr_) \
806 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
807 | (((_instr_) & 0x00008000000LL) >> 20) \
808 | (((_instr_) & 0x00000001fc0LL) >> 6))
809
810 static CORE_ADDR
811 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
812 {
813 CORE_ADDR next_pc;
814 CORE_ADDR last_prologue_pc = pc;
815 instruction_type it;
816 long long instr;
817 int do_fsr_stuff = 0;
818
819 int cfm_reg = 0;
820 int ret_reg = 0;
821 int fp_reg = 0;
822 int unat_save_reg = 0;
823 int pr_save_reg = 0;
824 int mem_stack_frame_size = 0;
825 int spill_reg = 0;
826 CORE_ADDR spill_addr = 0;
827 char instores[8];
828 char infpstores[8];
829 int trust_limit;
830
831 memset (instores, 0, sizeof instores);
832 memset (infpstores, 0, sizeof infpstores);
833
834 if (frame && !get_frame_saved_regs (frame))
835 {
836 frame_saved_regs_zalloc (frame);
837 do_fsr_stuff = 1;
838 }
839
840 if (frame
841 && !do_fsr_stuff
842 && get_frame_extra_info (frame)->after_prologue != 0
843 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
844 return get_frame_extra_info (frame)->after_prologue;
845
846 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
847
848 /* Must start with an alloc instruction */
849 next_pc = fetch_instruction (pc, &it, &instr);
850 if (pc < lim_pc && next_pc
851 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
852 {
853 /* alloc */
854 int sor = (int) ((instr & 0x00078000000LL) >> 27);
855 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
856 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
857 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
858 we could compare against the size given to us via the cfm as
859 either a sanity check or possibly to see if the frame has been
860 changed by a later alloc instruction... */
861 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
862 cfm_reg = rN;
863 last_prologue_pc = next_pc;
864 pc = next_pc;
865 }
866 else
867 {
868 pc = lim_pc; /* Frameless: We're done early. */
869 if (trust_limit)
870 last_prologue_pc = lim_pc;
871 }
872
873 /* Loop, looking for prologue instructions, keeping track of
874 where preserved registers were spilled. */
875 while (pc < lim_pc)
876 {
877 next_pc = fetch_instruction (pc, &it, &instr);
878 if (next_pc == 0)
879 break;
880
881 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
882 || ((instr & 0x3fLL) != 0LL))
883 {
884 /* Exit loop upon hitting a non-nop branch instruction
885 or a predicated instruction. */
886 break;
887 }
888 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
889 {
890 /* Move from BR */
891 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
892 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
893 int qp = (int) (instr & 0x0000000003f);
894
895 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
896 {
897 ret_reg = rN;
898 last_prologue_pc = next_pc;
899 }
900 }
901 else if ((it == I || it == M)
902 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
903 {
904 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
905 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
906 | ((instr & 0x001f8000000LL) >> 20)
907 | ((instr & 0x000000fe000LL) >> 13));
908 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
909 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
910 int qp = (int) (instr & 0x0000000003fLL);
911
912 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
913 {
914 /* mov rN, r12 */
915 fp_reg = rN;
916 last_prologue_pc = next_pc;
917 }
918 else if (qp == 0 && rN == 12 && rM == 12)
919 {
920 /* adds r12, -mem_stack_frame_size, r12 */
921 mem_stack_frame_size -= imm;
922 last_prologue_pc = next_pc;
923 }
924 else if (qp == 0 && rN == 2
925 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
926 {
927 /* adds r2, spilloffset, rFramePointer
928 or
929 adds r2, spilloffset, r12
930
931 Get ready for stf.spill or st8.spill instructions.
932 The address to start spilling at is loaded into r2.
933 FIXME: Why r2? That's what gcc currently uses; it
934 could well be different for other compilers. */
935
936 /* Hmm... whether or not this will work will depend on
937 where the pc is. If it's still early in the prologue
938 this'll be wrong. FIXME */
939 spill_addr = (frame ? get_frame_base (frame) : 0)
940 + (rM == 12 ? 0 : mem_stack_frame_size)
941 + imm;
942 spill_reg = rN;
943 last_prologue_pc = next_pc;
944 }
945 }
946 else if (it == M
947 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
948 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
949 {
950 /* stf.spill [rN] = fM, imm9
951 or
952 stf.spill [rN] = fM */
953
954 int imm = imm9(instr);
955 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
956 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
957 int qp = (int) (instr & 0x0000000003fLL);
958 if (qp == 0 && rN == spill_reg && spill_addr != 0
959 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
960 {
961 if (do_fsr_stuff)
962 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
963
964 if ((instr & 0x1efc0000000) == 0x0eec0000000)
965 spill_addr += imm;
966 else
967 spill_addr = 0; /* last one; must be done */
968 last_prologue_pc = next_pc;
969 }
970 }
971 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
972 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
973 {
974 /* mov.m rN = arM
975 or
976 mov.i rN = arM */
977
978 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
979 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
980 int qp = (int) (instr & 0x0000000003fLL);
981 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
982 {
983 /* We have something like "mov.m r3 = ar.unat". Remember the
984 r3 (or whatever) and watch for a store of this register... */
985 unat_save_reg = rN;
986 last_prologue_pc = next_pc;
987 }
988 }
989 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
990 {
991 /* mov rN = pr */
992 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
993 int qp = (int) (instr & 0x0000000003fLL);
994 if (qp == 0 && isScratch (rN))
995 {
996 pr_save_reg = rN;
997 last_prologue_pc = next_pc;
998 }
999 }
1000 else if (it == M
1001 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1002 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1003 {
1004 /* st8 [rN] = rM
1005 or
1006 st8 [rN] = rM, imm9 */
1007 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1008 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1009 int qp = (int) (instr & 0x0000000003fLL);
1010 if (qp == 0 && rN == spill_reg && spill_addr != 0
1011 && (rM == unat_save_reg || rM == pr_save_reg))
1012 {
1013 /* We've found a spill of either the UNAT register or the PR
1014 register. (Well, not exactly; what we've actually found is
1015 a spill of the register that UNAT or PR was moved to).
1016 Record that fact and move on... */
1017 if (rM == unat_save_reg)
1018 {
1019 /* Track UNAT register */
1020 if (do_fsr_stuff)
1021 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
1022 unat_save_reg = 0;
1023 }
1024 else
1025 {
1026 /* Track PR register */
1027 if (do_fsr_stuff)
1028 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
1029 pr_save_reg = 0;
1030 }
1031 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1032 /* st8 [rN] = rM, imm9 */
1033 spill_addr += imm9(instr);
1034 else
1035 spill_addr = 0; /* must be done spilling */
1036 last_prologue_pc = next_pc;
1037 }
1038 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1039 {
1040 /* Allow up to one store of each input register. */
1041 instores[rM-32] = 1;
1042 last_prologue_pc = next_pc;
1043 }
1044 }
1045 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1046 {
1047 /* One of
1048 st1 [rN] = rM
1049 st2 [rN] = rM
1050 st4 [rN] = rM
1051 st8 [rN] = rM
1052 Note that the st8 case is handled in the clause above.
1053
1054 Advance over stores of input registers. One store per input
1055 register is permitted. */
1056 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1057 int qp = (int) (instr & 0x0000000003fLL);
1058 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1059 {
1060 instores[rM-32] = 1;
1061 last_prologue_pc = next_pc;
1062 }
1063 }
1064 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1065 {
1066 /* Either
1067 stfs [rN] = fM
1068 or
1069 stfd [rN] = fM
1070
1071 Advance over stores of floating point input registers. Again
1072 one store per register is permitted */
1073 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1074 int qp = (int) (instr & 0x0000000003fLL);
1075 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1076 {
1077 infpstores[fM-8] = 1;
1078 last_prologue_pc = next_pc;
1079 }
1080 }
1081 else if (it == M
1082 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1083 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1084 {
1085 /* st8.spill [rN] = rM
1086 or
1087 st8.spill [rN] = rM, imm9 */
1088 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1089 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1090 int qp = (int) (instr & 0x0000000003fLL);
1091 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1092 {
1093 /* We've found a spill of one of the preserved general purpose
1094 regs. Record the spill address and advance the spill
1095 register if appropriate. */
1096 if (do_fsr_stuff)
1097 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
1098 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1099 /* st8.spill [rN] = rM, imm9 */
1100 spill_addr += imm9(instr);
1101 else
1102 spill_addr = 0; /* Done spilling */
1103 last_prologue_pc = next_pc;
1104 }
1105 }
1106
1107 pc = next_pc;
1108 }
1109
1110 if (do_fsr_stuff) {
1111 int i;
1112 CORE_ADDR addr;
1113 int sor, rrb_gr;
1114
1115 /* Extract the size of the rotating portion of the stack
1116 frame and the register rename base from the current
1117 frame marker. */
1118 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1119 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
1120
1121 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1122 i < get_frame_extra_info (frame)->sof;
1123 i++, addr += 8)
1124 {
1125 if (IS_NaT_COLLECTION_ADDR (addr))
1126 {
1127 addr += 8;
1128 }
1129 if (i < sor)
1130 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1131 = addr;
1132 else
1133 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
1134
1135 if (i+32 == cfm_reg)
1136 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
1137 if (i+32 == ret_reg)
1138 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
1139 if (i+32 == fp_reg)
1140 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
1141 }
1142 }
1143
1144 if (frame && get_frame_extra_info (frame))
1145 {
1146 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1147 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1148 get_frame_extra_info (frame)->fp_reg = fp_reg;
1149 }
1150
1151 return last_prologue_pc;
1152 }
1153
1154 CORE_ADDR
1155 ia64_skip_prologue (CORE_ADDR pc)
1156 {
1157 return examine_prologue (pc, pc+1024, 0);
1158 }
1159
1160 void
1161 ia64_frame_init_saved_regs (struct frame_info *frame)
1162 {
1163 if (get_frame_saved_regs (frame))
1164 return;
1165
1166 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
1167 {
1168 int regno;
1169
1170 frame_saved_regs_zalloc (frame);
1171
1172 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1173 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
1174 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1175 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
1176 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1177 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
1178 #if 0
1179 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
1180 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1181 #endif
1182 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1183 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
1184 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1185 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
1186 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1187 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
1188 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1189 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
1190 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1191 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
1192 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1193 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
1194 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1195 if (regno != sp_regnum)
1196 get_frame_saved_regs (frame)[regno] =
1197 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1198 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1199 get_frame_saved_regs (frame)[regno] =
1200 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1201 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1202 get_frame_saved_regs (frame)[regno] =
1203 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1204 }
1205 else
1206 {
1207 CORE_ADDR func_start;
1208
1209 func_start = get_pc_function_start (get_frame_pc (frame));
1210 examine_prologue (func_start, get_frame_pc (frame), frame);
1211 }
1212 }
1213
1214 void
1215 ia64_get_saved_register (char *raw_buffer,
1216 int *optimized,
1217 CORE_ADDR *addrp,
1218 struct frame_info *frame,
1219 int regnum,
1220 enum lval_type *lval)
1221 {
1222 int is_dummy_frame;
1223
1224 if (!target_has_registers)
1225 error ("No registers.");
1226
1227 if (optimized != NULL)
1228 *optimized = 0;
1229
1230 if (addrp != NULL)
1231 *addrp = 0;
1232
1233 if (lval != NULL)
1234 *lval = not_lval;
1235
1236 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1237 get_frame_base (frame),
1238 get_frame_base (frame));
1239
1240 if (regnum == SP_REGNUM && get_next_frame (frame))
1241 {
1242 /* Handle SP values for all frames but the topmost. */
1243 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1244 get_frame_base (frame));
1245 }
1246 else if (regnum == IA64_BSP_REGNUM)
1247 {
1248 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1249 get_frame_extra_info (frame)->bsp);
1250 }
1251 else if (regnum == IA64_VFP_REGNUM)
1252 {
1253 /* If the function in question uses an automatic register (r32-r127)
1254 for the frame pointer, it'll be found by ia64_find_saved_register()
1255 above. If the function lacks one of these frame pointers, we can
1256 still provide a value since we know the size of the frame */
1257 CORE_ADDR vfp = (get_frame_base (frame)
1258 + get_frame_extra_info (frame)->mem_stack_frame_size);
1259 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1260 }
1261 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1262 {
1263 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1264 int pr_optim;
1265 enum lval_type pr_lval;
1266 CORE_ADDR pr_addr;
1267 int prN_val;
1268 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1269 frame, IA64_PR_REGNUM, &pr_lval);
1270 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1271 {
1272 /* Fetch predicate register rename base from current frame
1273 marker for this frame. */
1274 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
1275
1276 /* Adjust the register number to account for register rotation. */
1277 regnum = IA64_PR16_REGNUM
1278 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1279 }
1280 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1281 regnum - IA64_PR0_REGNUM, 1);
1282 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
1283 }
1284 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1285 {
1286 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1287 int unat_optim;
1288 enum lval_type unat_lval;
1289 CORE_ADDR unat_addr;
1290 int unatN_val;
1291 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1292 frame, IA64_UNAT_REGNUM, &unat_lval);
1293 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1294 regnum - IA64_NAT0_REGNUM, 1);
1295 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1296 unatN_val);
1297 }
1298 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1299 {
1300 int natval = 0;
1301 /* Find address of general register corresponding to nat bit we're
1302 interested in. */
1303 CORE_ADDR gr_addr = 0;
1304
1305 if (!is_dummy_frame)
1306 {
1307 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1308 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1309 + IA64_GR0_REGNUM];
1310 }
1311 if (gr_addr)
1312 {
1313 /* Compute address of nat collection bits */
1314 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1315 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1316 CORE_ADDR nat_collection;
1317 int nat_bit;
1318 /* If our nat collection address is bigger than bsp, we have to get
1319 the nat collection from rnat. Otherwise, we fetch the nat
1320 collection from the computed address. */
1321 if (nat_addr >= bsp)
1322 nat_collection = read_register (IA64_RNAT_REGNUM);
1323 else
1324 nat_collection = read_memory_integer (nat_addr, 8);
1325 nat_bit = (gr_addr >> 3) & 0x3f;
1326 natval = (nat_collection >> nat_bit) & 1;
1327 }
1328 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
1329 }
1330 else if (regnum == IA64_IP_REGNUM)
1331 {
1332 CORE_ADDR pc;
1333 if (get_next_frame (frame))
1334 {
1335 /* FIXME: Set *addrp, *lval when possible. */
1336 pc = ia64_frame_saved_pc (get_next_frame (frame));
1337 }
1338 else
1339 {
1340 pc = read_pc ();
1341 }
1342 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1343 }
1344 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1345 {
1346 CORE_ADDR addr = 0;
1347 if (!is_dummy_frame)
1348 {
1349 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1350 addr = get_frame_saved_regs (frame)[regnum];
1351 }
1352
1353 if (addr != 0)
1354 {
1355 if (lval != NULL)
1356 *lval = lval_memory;
1357 if (addrp != NULL)
1358 *addrp = addr;
1359 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1360 }
1361 else
1362 {
1363 /* r32 - r127 must be fetchable via memory. If they aren't,
1364 then the register is unavailable */
1365 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1366 }
1367 }
1368 else
1369 {
1370 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1371 {
1372 /* Fetch floating point register rename base from current
1373 frame marker for this frame. */
1374 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
1375
1376 /* Adjust the floating point register number to account for
1377 register rotation. */
1378 regnum = IA64_FR32_REGNUM
1379 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1380 }
1381
1382 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1383 frame, regnum, lval);
1384 }
1385 }
1386
1387 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1388 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1389 and TYPE is the type (which is known to be struct, union or array). */
1390 int
1391 ia64_use_struct_convention (int gcc_p, struct type *type)
1392 {
1393 struct type *float_elt_type;
1394
1395 /* HFAs are structures (or arrays) consisting entirely of floating
1396 point values of the same length. Up to 8 of these are returned
1397 in registers. Don't use the struct convention when this is the
1398 case. */
1399 float_elt_type = is_float_or_hfa_type (type);
1400 if (float_elt_type != NULL
1401 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1402 return 0;
1403
1404 /* Other structs of length 32 or less are returned in r8-r11.
1405 Don't use the struct convention for those either. */
1406 return TYPE_LENGTH (type) > 32;
1407 }
1408
1409 void
1410 ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1411 {
1412 struct type *float_elt_type;
1413
1414 float_elt_type = is_float_or_hfa_type (type);
1415 if (float_elt_type != NULL)
1416 {
1417 int offset = 0;
1418 int regnum = IA64_FR8_REGNUM;
1419 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1420
1421 while (n-- > 0)
1422 {
1423 ia64_register_convert_to_virtual (regnum, float_elt_type,
1424 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1425 offset += TYPE_LENGTH (float_elt_type);
1426 regnum++;
1427 }
1428 }
1429 else
1430 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1431 TYPE_LENGTH (type));
1432 }
1433
1434 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1435 like this is necessary though since the IA-64 calling conventions specify
1436 that r8 is not preserved. */
1437 static CORE_ADDR struct_return_address;
1438
1439 CORE_ADDR
1440 ia64_extract_struct_value_address (char *regbuf)
1441 {
1442 /* FIXME: See above. */
1443 return struct_return_address;
1444 }
1445
1446 void
1447 ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1448 {
1449 /* FIXME: See above. */
1450 /* Note that most of the work was done in ia64_push_arguments() */
1451 struct_return_address = addr;
1452 }
1453
1454 int
1455 ia64_frameless_function_invocation (struct frame_info *frame)
1456 {
1457 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1458 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
1459 }
1460
1461 CORE_ADDR
1462 ia64_saved_pc_after_call (struct frame_info *frame)
1463 {
1464 return read_register (IA64_BR0_REGNUM);
1465 }
1466
1467 CORE_ADDR
1468 ia64_frame_args_address (struct frame_info *frame)
1469 {
1470 /* frame->frame points at the SP for this frame; But we want the start
1471 of the frame, not the end. Calling frame chain will get his for us. */
1472 return ia64_frame_chain (frame);
1473 }
1474
1475 CORE_ADDR
1476 ia64_frame_locals_address (struct frame_info *frame)
1477 {
1478 /* frame->frame points at the SP for this frame; But we want the start
1479 of the frame, not the end. Calling frame chain will get his for us. */
1480 return ia64_frame_chain (frame);
1481 }
1482
1483 void
1484 ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1485 {
1486 CORE_ADDR bsp, cfm;
1487 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1488 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1489 get_frame_base (get_next_frame (frame)),
1490 get_frame_base (get_next_frame (frame))));
1491
1492 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
1493
1494 if (get_next_frame (frame) == 0)
1495 {
1496 bsp = read_register (IA64_BSP_REGNUM);
1497 cfm = read_register (IA64_CFM_REGNUM);
1498
1499 }
1500 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
1501 {
1502 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1503 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
1504 }
1505 else if (next_frame_is_call_dummy)
1506 {
1507 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1508 get_frame_base (get_next_frame (frame)),
1509 IA64_BSP_REGNUM);
1510 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1511 get_frame_base (get_next_frame (frame)),
1512 IA64_CFM_REGNUM);
1513 }
1514 else
1515 {
1516 struct frame_info *frn = get_next_frame (frame);
1517
1518 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
1519
1520 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1521 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
1522 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1523 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1524 else if (get_next_frame (frn)
1525 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1526 get_frame_base (get_next_frame (frn)),
1527 get_frame_base (get_next_frame (frn))))
1528 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1529 get_frame_base (get_next_frame (frn)),
1530 IA64_PFS_REGNUM);
1531 else
1532 cfm = read_register (IA64_PFS_REGNUM);
1533
1534 bsp = get_frame_extra_info (frn)->bsp;
1535 }
1536 get_frame_extra_info (frame)->cfm = cfm;
1537 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1538 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
1539 if (get_next_frame (frame) == 0
1540 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
1541 || next_frame_is_call_dummy)
1542 get_frame_extra_info (frame)->bsp =
1543 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
1544 else
1545 get_frame_extra_info (frame)->bsp =
1546 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
1547
1548 get_frame_extra_info (frame)->after_prologue = 0;
1549 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1550 get_frame_extra_info (frame)->fp_reg = 0;
1551 }
1552
1553 static int
1554 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1555 {
1556 switch (TYPE_CODE (t))
1557 {
1558 case TYPE_CODE_FLT:
1559 if (*etp)
1560 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1561 else
1562 {
1563 *etp = t;
1564 return 1;
1565 }
1566 break;
1567 case TYPE_CODE_ARRAY:
1568 return
1569 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1570 etp);
1571 break;
1572 case TYPE_CODE_STRUCT:
1573 {
1574 int i;
1575
1576 for (i = 0; i < TYPE_NFIELDS (t); i++)
1577 if (!is_float_or_hfa_type_recurse
1578 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
1579 return 0;
1580 return 1;
1581 }
1582 break;
1583 default:
1584 return 0;
1585 break;
1586 }
1587 }
1588
1589 /* Determine if the given type is one of the floating point types or
1590 and HFA (which is a struct, array, or combination thereof whose
1591 bottom-most elements are all of the same floating point type.) */
1592
1593 static struct type *
1594 is_float_or_hfa_type (struct type *t)
1595 {
1596 struct type *et = 0;
1597
1598 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1599 }
1600
1601
1602 /* Return 1 if the alignment of T is such that the next even slot
1603 should be used. Return 0, if the next available slot should
1604 be used. (See section 8.5.1 of the IA-64 Software Conventions
1605 and Runtime manual.) */
1606
1607 static int
1608 slot_alignment_is_next_even (struct type *t)
1609 {
1610 switch (TYPE_CODE (t))
1611 {
1612 case TYPE_CODE_INT:
1613 case TYPE_CODE_FLT:
1614 if (TYPE_LENGTH (t) > 8)
1615 return 1;
1616 else
1617 return 0;
1618 case TYPE_CODE_ARRAY:
1619 return
1620 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1621 case TYPE_CODE_STRUCT:
1622 {
1623 int i;
1624
1625 for (i = 0; i < TYPE_NFIELDS (t); i++)
1626 if (slot_alignment_is_next_even
1627 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1628 return 1;
1629 return 0;
1630 }
1631 default:
1632 return 0;
1633 }
1634 }
1635
1636 /* Attempt to find (and return) the global pointer for the given
1637 function.
1638
1639 This is a rather nasty bit of code searchs for the .dynamic section
1640 in the objfile corresponding to the pc of the function we're trying
1641 to call. Once it finds the addresses at which the .dynamic section
1642 lives in the child process, it scans the Elf64_Dyn entries for a
1643 DT_PLTGOT tag. If it finds one of these, the corresponding
1644 d_un.d_ptr value is the global pointer. */
1645
1646 static CORE_ADDR
1647 generic_elf_find_global_pointer (CORE_ADDR faddr)
1648 {
1649 struct obj_section *faddr_sect;
1650
1651 faddr_sect = find_pc_section (faddr);
1652 if (faddr_sect != NULL)
1653 {
1654 struct obj_section *osect;
1655
1656 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1657 {
1658 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1659 break;
1660 }
1661
1662 if (osect < faddr_sect->objfile->sections_end)
1663 {
1664 CORE_ADDR addr;
1665
1666 addr = osect->addr;
1667 while (addr < osect->endaddr)
1668 {
1669 int status;
1670 LONGEST tag;
1671 char buf[8];
1672
1673 status = target_read_memory (addr, buf, sizeof (buf));
1674 if (status != 0)
1675 break;
1676 tag = extract_signed_integer (buf, sizeof (buf));
1677
1678 if (tag == DT_PLTGOT)
1679 {
1680 CORE_ADDR global_pointer;
1681
1682 status = target_read_memory (addr + 8, buf, sizeof (buf));
1683 if (status != 0)
1684 break;
1685 global_pointer = extract_address (buf, sizeof (buf));
1686
1687 /* The payoff... */
1688 return global_pointer;
1689 }
1690
1691 if (tag == DT_NULL)
1692 break;
1693
1694 addr += 16;
1695 }
1696 }
1697 }
1698 return 0;
1699 }
1700
1701 /* Given a function's address, attempt to find (and return) the
1702 corresponding (canonical) function descriptor. Return 0 if
1703 not found. */
1704 static CORE_ADDR
1705 find_extant_func_descr (CORE_ADDR faddr)
1706 {
1707 struct obj_section *faddr_sect;
1708
1709 /* Return early if faddr is already a function descriptor */
1710 faddr_sect = find_pc_section (faddr);
1711 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
1712 return faddr;
1713
1714 if (faddr_sect != NULL)
1715 {
1716 struct obj_section *osect;
1717 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1718 {
1719 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1720 break;
1721 }
1722
1723 if (osect < faddr_sect->objfile->sections_end)
1724 {
1725 CORE_ADDR addr;
1726
1727 addr = osect->addr;
1728 while (addr < osect->endaddr)
1729 {
1730 int status;
1731 LONGEST faddr2;
1732 char buf[8];
1733
1734 status = target_read_memory (addr, buf, sizeof (buf));
1735 if (status != 0)
1736 break;
1737 faddr2 = extract_signed_integer (buf, sizeof (buf));
1738
1739 if (faddr == faddr2)
1740 return addr;
1741
1742 addr += 16;
1743 }
1744 }
1745 }
1746 return 0;
1747 }
1748
1749 /* Attempt to find a function descriptor corresponding to the
1750 given address. If none is found, construct one on the
1751 stack using the address at fdaptr */
1752
1753 static CORE_ADDR
1754 find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1755 {
1756 CORE_ADDR fdesc;
1757
1758 fdesc = find_extant_func_descr (faddr);
1759
1760 if (fdesc == 0)
1761 {
1762 CORE_ADDR global_pointer;
1763 char buf[16];
1764
1765 fdesc = *fdaptr;
1766 *fdaptr += 16;
1767
1768 global_pointer = FIND_GLOBAL_POINTER (faddr);
1769
1770 if (global_pointer == 0)
1771 global_pointer = read_register (IA64_GR1_REGNUM);
1772
1773 store_address (buf, 8, faddr);
1774 store_address (buf + 8, 8, global_pointer);
1775
1776 write_memory (fdesc, buf, 16);
1777 }
1778
1779 return fdesc;
1780 }
1781
1782 CORE_ADDR
1783 ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
1784 int struct_return, CORE_ADDR struct_addr)
1785 {
1786 int argno;
1787 struct value *arg;
1788 struct type *type;
1789 int len, argoffset;
1790 int nslots, rseslots, memslots, slotnum, nfuncargs;
1791 int floatreg;
1792 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
1793
1794 nslots = 0;
1795 nfuncargs = 0;
1796 /* Count the number of slots needed for the arguments */
1797 for (argno = 0; argno < nargs; argno++)
1798 {
1799 arg = args[argno];
1800 type = check_typedef (VALUE_TYPE (arg));
1801 len = TYPE_LENGTH (type);
1802
1803 if ((nslots & 1) && slot_alignment_is_next_even (type))
1804 nslots++;
1805
1806 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1807 nfuncargs++;
1808
1809 nslots += (len + 7) / 8;
1810 }
1811
1812 /* Divvy up the slots between the RSE and the memory stack */
1813 rseslots = (nslots > 8) ? 8 : nslots;
1814 memslots = nslots - rseslots;
1815
1816 /* Allocate a new RSE frame */
1817 cfm = read_register (IA64_CFM_REGNUM);
1818
1819 bsp = read_register (IA64_BSP_REGNUM);
1820 bsp = rse_address_add (bsp, cfm & 0x7f);
1821 new_bsp = rse_address_add (bsp, rseslots);
1822 write_register (IA64_BSP_REGNUM, new_bsp);
1823
1824 pfs = read_register (IA64_PFS_REGNUM);
1825 pfs &= 0xc000000000000000LL;
1826 pfs |= (cfm & 0xffffffffffffLL);
1827 write_register (IA64_PFS_REGNUM, pfs);
1828
1829 cfm &= 0xc000000000000000LL;
1830 cfm |= rseslots;
1831 write_register (IA64_CFM_REGNUM, cfm);
1832
1833 /* We will attempt to find function descriptors in the .opd segment,
1834 but if we can't we'll construct them ourselves. That being the
1835 case, we'll need to reserve space on the stack for them. */
1836 funcdescaddr = sp - nfuncargs * 16;
1837 funcdescaddr &= ~0xfLL;
1838
1839 /* Adjust the stack pointer to it's new value. The calling conventions
1840 require us to have 16 bytes of scratch, plus whatever space is
1841 necessary for the memory slots and our function descriptors */
1842 sp = sp - 16 - (memslots + nfuncargs) * 8;
1843 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1844
1845 /* Place the arguments where they belong. The arguments will be
1846 either placed in the RSE backing store or on the memory stack.
1847 In addition, floating point arguments or HFAs are placed in
1848 floating point registers. */
1849 slotnum = 0;
1850 floatreg = IA64_FR8_REGNUM;
1851 for (argno = 0; argno < nargs; argno++)
1852 {
1853 struct type *float_elt_type;
1854
1855 arg = args[argno];
1856 type = check_typedef (VALUE_TYPE (arg));
1857 len = TYPE_LENGTH (type);
1858
1859 /* Special handling for function parameters */
1860 if (len == 8
1861 && TYPE_CODE (type) == TYPE_CODE_PTR
1862 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1863 {
1864 char val_buf[8];
1865
1866 store_address (val_buf, 8,
1867 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1868 &funcdescaddr));
1869 if (slotnum < rseslots)
1870 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1871 else
1872 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1873 slotnum++;
1874 continue;
1875 }
1876
1877 /* Normal slots */
1878
1879 /* Skip odd slot if necessary... */
1880 if ((slotnum & 1) && slot_alignment_is_next_even (type))
1881 slotnum++;
1882
1883 argoffset = 0;
1884 while (len > 0)
1885 {
1886 char val_buf[8];
1887
1888 memset (val_buf, 0, 8);
1889 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1890
1891 if (slotnum < rseslots)
1892 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1893 else
1894 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1895
1896 argoffset += 8;
1897 len -= 8;
1898 slotnum++;
1899 }
1900
1901 /* Handle floating point types (including HFAs) */
1902 float_elt_type = is_float_or_hfa_type (type);
1903 if (float_elt_type != NULL)
1904 {
1905 argoffset = 0;
1906 len = TYPE_LENGTH (type);
1907 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1908 {
1909 ia64_register_convert_to_raw (
1910 float_elt_type,
1911 floatreg,
1912 VALUE_CONTENTS (arg) + argoffset,
1913 &deprecated_registers[REGISTER_BYTE (floatreg)]);
1914 floatreg++;
1915 argoffset += TYPE_LENGTH (float_elt_type);
1916 len -= TYPE_LENGTH (float_elt_type);
1917 }
1918 }
1919 }
1920
1921 /* Store the struct return value in r8 if necessary. */
1922 if (struct_return)
1923 {
1924 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1925 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1926 struct_addr);
1927 }
1928
1929 /* Sync gdb's idea of what the registers are with the target. */
1930 target_store_registers (-1);
1931
1932 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1933 to be defined to call generic_save_dummy_frame_tos(). But at the
1934 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1935 I chose to put this call here instead of using the old mechanisms.
1936 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1937 line
1938
1939 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1940
1941 to ia64_gdbarch_init() and remove the line below. */
1942 generic_save_dummy_frame_tos (sp);
1943
1944 return sp;
1945 }
1946
1947 CORE_ADDR
1948 ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1949 {
1950 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
1951
1952 if (global_pointer != 0)
1953 write_register (IA64_GR1_REGNUM, global_pointer);
1954
1955 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1956 return sp;
1957 }
1958
1959 void
1960 ia64_store_return_value (struct type *type, char *valbuf)
1961 {
1962 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1963 {
1964 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1965 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1966 target_store_registers (IA64_FR8_REGNUM);
1967 }
1968 else
1969 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1970 valbuf, TYPE_LENGTH (type));
1971 }
1972
1973 void
1974 ia64_pop_frame (void)
1975 {
1976 generic_pop_current_frame (ia64_pop_frame_regular);
1977 }
1978
1979 static void
1980 ia64_pop_frame_regular (struct frame_info *frame)
1981 {
1982 int regno;
1983 CORE_ADDR bsp, cfm, pfs;
1984
1985 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1986
1987 for (regno = 0; regno < ia64_num_regs; regno++)
1988 {
1989 if (get_frame_saved_regs (frame)[regno]
1990 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1991 && regno != pc_regnum
1992 && regno != sp_regnum
1993 && regno != IA64_PFS_REGNUM
1994 && regno != IA64_CFM_REGNUM
1995 && regno != IA64_BSP_REGNUM
1996 && regno != IA64_BSPSTORE_REGNUM)
1997 {
1998 write_register (regno,
1999 read_memory_integer (get_frame_saved_regs (frame)[regno],
2000 REGISTER_RAW_SIZE (regno)));
2001 }
2002 }
2003
2004 write_register (sp_regnum, DEPRECATED_FRAME_CHAIN (frame));
2005 write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
2006
2007 cfm = read_register (IA64_CFM_REGNUM);
2008
2009 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
2010 {
2011 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
2012 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2013 }
2014 else
2015 pfs = read_register (IA64_PFS_REGNUM);
2016
2017 /* Compute the new bsp by *adding* the difference between the
2018 size of the frame and the size of the locals (both wrt the
2019 frame that we're going back to). This seems kind of strange,
2020 especially since it seems like we ought to be subtracting the
2021 size of the locals... and we should; but the Linux kernel
2022 wants bsp to be set at the end of all used registers. It's
2023 likely that this code will need to be revised to accomodate
2024 other operating systems. */
2025 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
2026 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2027 write_register (IA64_BSP_REGNUM, bsp);
2028
2029 /* FIXME: What becomes of the epilog count in the PFS? */
2030 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2031 write_register (IA64_CFM_REGNUM, cfm);
2032
2033 flush_cached_frames ();
2034 }
2035
2036 static void
2037 ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2038 CORE_ADDR *targ_addr, int *targ_len)
2039 {
2040 *targ_addr = memaddr;
2041 *targ_len = nr_bytes;
2042 }
2043
2044 static void
2045 process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2046 {
2047 int *os_ident_ptr = obj;
2048 const char *name;
2049 unsigned int sectsize;
2050
2051 name = bfd_get_section_name (abfd, sect);
2052 sectsize = bfd_section_size (abfd, sect);
2053 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2054 {
2055 unsigned int name_length, data_length, note_type;
2056 char *note = alloca (sectsize);
2057
2058 bfd_get_section_contents (abfd, sect, note,
2059 (file_ptr) 0, (bfd_size_type) sectsize);
2060
2061 name_length = bfd_h_get_32 (abfd, note);
2062 data_length = bfd_h_get_32 (abfd, note + 4);
2063 note_type = bfd_h_get_32 (abfd, note + 8);
2064
2065 if (name_length == 4 && data_length == 16 && note_type == 1
2066 && strcmp (note + 12, "GNU") == 0)
2067 {
2068 int os_number = bfd_h_get_32 (abfd, note + 16);
2069
2070 /* The case numbers are from abi-tags in glibc */
2071 switch (os_number)
2072 {
2073 case 0 :
2074 *os_ident_ptr = ELFOSABI_LINUX;
2075 break;
2076 case 1 :
2077 *os_ident_ptr = ELFOSABI_HURD;
2078 break;
2079 case 2 :
2080 *os_ident_ptr = ELFOSABI_SOLARIS;
2081 break;
2082 default :
2083 internal_error (__FILE__, __LINE__,
2084 "process_note_abi_sections: unknown OS number %d", os_number);
2085 break;
2086 }
2087 }
2088 }
2089 }
2090
2091 static struct gdbarch *
2092 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2093 {
2094 struct gdbarch *gdbarch;
2095 struct gdbarch_tdep *tdep;
2096 int os_ident;
2097
2098 if (info.abfd != NULL
2099 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2100 {
2101 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2102
2103 /* If os_ident is 0, it is not necessarily the case that we're
2104 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2105 GNU/Linux uses a note section to record OS/ABI info, but
2106 leaves e_ident[EI_OSABI] zero. So we have to check for note
2107 sections too. */
2108 if (os_ident == 0)
2109 {
2110 bfd_map_over_sections (info.abfd,
2111 process_note_abi_tag_sections,
2112 &os_ident);
2113 }
2114 }
2115 else
2116 os_ident = -1;
2117
2118 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2119 arches != NULL;
2120 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2121 {
2122 tdep = gdbarch_tdep (arches->gdbarch);
2123 if (tdep &&tdep->os_ident == os_ident)
2124 return arches->gdbarch;
2125 }
2126
2127 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2128 gdbarch = gdbarch_alloc (&info, tdep);
2129 tdep->os_ident = os_ident;
2130
2131 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2132 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2133 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
2134
2135 /* Set the method of obtaining the sigcontext addresses at which
2136 registers are saved. The method of checking to see if
2137 native_find_global_pointer is nonzero to indicate that we're
2138 on AIX is kind of hokey, but I can't think of a better way
2139 to do it. */
2140 if (os_ident == ELFOSABI_LINUX)
2141 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
2142 else if (native_find_global_pointer != 0)
2143 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
2144 else
2145 tdep->sigcontext_register_address = 0;
2146
2147 /* We know that GNU/Linux won't have to resort to the
2148 native_find_global_pointer hackery. But that's the only one we
2149 know about so far, so if native_find_global_pointer is set to
2150 something non-zero, then use it. Otherwise fall back to using
2151 generic_elf_find_global_pointer. This arrangement should (in
2152 theory) allow us to cross debug GNU/Linux binaries from an AIX
2153 machine. */
2154 if (os_ident == ELFOSABI_LINUX)
2155 tdep->find_global_pointer = generic_elf_find_global_pointer;
2156 else if (native_find_global_pointer != 0)
2157 tdep->find_global_pointer = native_find_global_pointer;
2158 else
2159 tdep->find_global_pointer = generic_elf_find_global_pointer;
2160
2161 set_gdbarch_short_bit (gdbarch, 16);
2162 set_gdbarch_int_bit (gdbarch, 32);
2163 set_gdbarch_long_bit (gdbarch, 64);
2164 set_gdbarch_long_long_bit (gdbarch, 64);
2165 set_gdbarch_float_bit (gdbarch, 32);
2166 set_gdbarch_double_bit (gdbarch, 64);
2167 set_gdbarch_long_double_bit (gdbarch, 64);
2168 set_gdbarch_ptr_bit (gdbarch, 64);
2169
2170 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2171 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2172 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2173 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
2174 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
2175
2176 set_gdbarch_register_name (gdbarch, ia64_register_name);
2177 set_gdbarch_register_size (gdbarch, 8);
2178 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2179 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2180 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2181 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
2182 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2183 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
2184 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2185
2186 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2187
2188 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2189 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2190
2191 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2192
2193 set_gdbarch_deprecated_frame_chain (gdbarch, ia64_frame_chain);
2194 set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2195
2196 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2197 set_gdbarch_deprecated_get_saved_register (gdbarch, ia64_get_saved_register);
2198
2199 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2200 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2201 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2202
2203 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2204 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
2205
2206 set_gdbarch_deprecated_store_struct_return (gdbarch, ia64_store_struct_return);
2207 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
2208 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2209
2210 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2211 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2212 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2213 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2214 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2215
2216 /* Settings for calling functions in the inferior. */
2217 set_gdbarch_call_dummy_length (gdbarch, 0);
2218 set_gdbarch_deprecated_push_arguments (gdbarch, ia64_push_arguments);
2219 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2220 set_gdbarch_deprecated_pop_frame (gdbarch, ia64_pop_frame);
2221
2222 set_gdbarch_call_dummy_p (gdbarch, 1);
2223 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2224 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2225 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2226 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2227 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2228 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2229
2230 /* We won't necessarily have a frame pointer and even if we do,
2231 it winds up being extraordinarly messy when attempting to find
2232 the frame chain. So for the purposes of creating frames (which
2233 is all read_fp() is used for), simply use the stack pointer value
2234 instead. */
2235 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2236
2237 /* Settings that should be unnecessary. */
2238 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2239
2240 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2241 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2242
2243 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2244 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2245 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2246 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2247
2248 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2249 set_gdbarch_function_start_offset (gdbarch, 0);
2250 set_gdbarch_frame_args_skip (gdbarch, 0);
2251
2252 set_gdbarch_remote_translate_xfer_address (
2253 gdbarch, ia64_remote_translate_xfer_address);
2254
2255 return gdbarch;
2256 }
2257
2258 void
2259 _initialize_ia64_tdep (void)
2260 {
2261 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2262
2263 tm_print_insn = print_insn_ia64;
2264 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2265 }
This page took 0.078448 seconds and 4 git commands to generate.