1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
30 #include "reggroups.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
36 #include "gdb_assert.h"
38 #include "elf/common.h" /* for DT_PLTGOT value */
43 #include "ia64-tdep.h"
46 #ifdef HAVE_LIBUNWIND_IA64_H
47 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
48 #include "libunwind-frame.h"
49 #include "libunwind-ia64.h"
51 /* Note: KERNEL_START is supposed to be an address which is not going
52 to ever contain any valid unwind info. For ia64 linux, the choice
53 of 0xc000000000000000 is fairly safe since that's uncached space.
55 We use KERNEL_START as follows: after obtaining the kernel's
56 unwind table via getunwind(), we project its unwind data into
57 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
58 when ia64_access_mem() sees a memory access to this
59 address-range, we redirect it to ktab instead.
61 None of this hackery is needed with a modern kernel/libcs
62 which uses the kernel virtual DSO to provide access to the
63 kernel's unwind info. In that case, ktab_size remains 0 and
64 hence the value of KERNEL_START doesn't matter. */
66 #define KERNEL_START 0xc000000000000000ULL
68 static size_t ktab_size
= 0;
69 struct ia64_table_entry
71 uint64_t start_offset
;
76 static struct ia64_table_entry
*ktab
= NULL
;
80 /* An enumeration of the different IA-64 instruction types. */
82 typedef enum instruction_type
84 A
, /* Integer ALU ; I-unit or M-unit */
85 I
, /* Non-ALU integer; I-unit */
86 M
, /* Memory ; M-unit */
87 F
, /* Floating-point ; F-unit */
88 B
, /* Branch ; B-unit */
89 L
, /* Extended (L+X) ; I-unit */
90 X
, /* Extended (L+X) ; I-unit */
91 undefined
/* undefined or reserved */
94 /* We represent IA-64 PC addresses as the value of the instruction
95 pointer or'd with some bit combination in the low nibble which
96 represents the slot number in the bundle addressed by the
97 instruction pointer. The problem is that the Linux kernel
98 multiplies its slot numbers (for exceptions) by one while the
99 disassembler multiplies its slot numbers by 6. In addition, I've
100 heard it said that the simulator uses 1 as the multiplier.
102 I've fixed the disassembler so that the bytes_per_line field will
103 be the slot multiplier. If bytes_per_line comes in as zero, it
104 is set to six (which is how it was set up initially). -- objdump
105 displays pretty disassembly dumps with this value. For our purposes,
106 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
107 never want to also display the raw bytes the way objdump does. */
109 #define SLOT_MULTIPLIER 1
111 /* Length in bytes of an instruction bundle */
113 #define BUNDLE_LEN 16
115 static gdbarch_init_ftype ia64_gdbarch_init
;
117 static gdbarch_register_name_ftype ia64_register_name
;
118 static gdbarch_register_type_ftype ia64_register_type
;
119 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
120 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
121 static struct type
*is_float_or_hfa_type (struct type
*t
);
122 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
124 static struct type
*builtin_type_ia64_ext
;
126 #define NUM_IA64_RAW_REGS 462
128 static int sp_regnum
= IA64_GR12_REGNUM
;
129 static int fp_regnum
= IA64_VFP_REGNUM
;
130 static int lr_regnum
= IA64_VRAP_REGNUM
;
132 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
133 they may not be accessible via the ptrace register get/set interfaces. */
134 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
135 V127_REGNUM
= V32_REGNUM
+ 95,
136 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
138 /* Array of register names; There should be ia64_num_regs strings in
141 static char *ia64_register_names
[] =
142 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
143 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
144 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
145 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
159 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
160 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
161 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
162 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
163 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
164 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
165 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
166 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
167 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
168 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
169 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
170 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
171 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
172 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
173 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
174 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
185 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
189 "pr", "ip", "psr", "cfm",
191 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
192 "", "", "", "", "", "", "", "",
193 "rsc", "bsp", "bspstore", "rnat",
195 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
196 "ccv", "", "", "", "unat", "", "", "",
197 "fpsr", "", "", "", "itc",
198 "", "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
208 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
209 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
210 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
211 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
212 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
213 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
214 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
215 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
216 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
217 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
218 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
219 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
220 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
221 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
222 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
223 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
227 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
228 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
229 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
230 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
231 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
232 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
233 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
234 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
235 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
236 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
237 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
238 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
240 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
241 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
242 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
243 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
244 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
245 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
246 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
247 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
250 struct ia64_frame_cache
252 CORE_ADDR base
; /* frame pointer base for frame */
253 CORE_ADDR pc
; /* function start pc for frame */
254 CORE_ADDR saved_sp
; /* stack pointer for frame */
255 CORE_ADDR bsp
; /* points at r32 for the current frame */
256 CORE_ADDR cfm
; /* cfm value for current frame */
257 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
259 int sof
; /* Size of frame (decoded from cfm value) */
260 int sol
; /* Size of locals (decoded from cfm value) */
261 int sor
; /* Number of rotating registers. (decoded from cfm value) */
262 CORE_ADDR after_prologue
;
263 /* Address of first instruction after the last
264 prologue instruction; Note that there may
265 be instructions from the function's body
266 intermingled with the prologue. */
267 int mem_stack_frame_size
;
268 /* Size of the memory stack frame (may be zero),
269 or -1 if it has not been determined yet. */
270 int fp_reg
; /* Register number (if any) used a frame pointer
271 for this frame. 0 if no register is being used
272 as the frame pointer. */
274 /* Saved registers. */
275 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
279 #define SIGCONTEXT_REGISTER_ADDRESS \
280 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
283 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
284 struct reggroup
*group
)
289 if (group
== all_reggroup
)
291 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
292 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
293 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
294 if (group
== float_reggroup
)
296 if (group
== vector_reggroup
)
298 if (group
== general_reggroup
)
299 return (!vector_p
&& !float_p
);
300 if (group
== save_reggroup
|| group
== restore_reggroup
)
306 ia64_register_name (int reg
)
308 return ia64_register_names
[reg
];
312 ia64_register_type (struct gdbarch
*arch
, int reg
)
314 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
315 return builtin_type_ia64_ext
;
317 return builtin_type_long
;
321 ia64_dwarf_reg_to_regnum (int reg
)
323 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
324 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
329 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
334 const struct floatformat floatformat_ia64_ext
=
336 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
337 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
340 const struct floatformat
*floatformats_ia64_ext
[2] =
342 &floatformat_ia64_ext
,
343 &floatformat_ia64_ext
347 /* Extract ``len'' bits from an instruction bundle starting at
351 extract_bit_field (char *bundle
, int from
, int len
)
353 long long result
= 0LL;
355 int from_byte
= from
/ 8;
356 int to_byte
= to
/ 8;
357 unsigned char *b
= (unsigned char *) bundle
;
363 if (from_byte
== to_byte
)
364 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
365 result
= c
>> (from
% 8);
366 lshift
= 8 - (from
% 8);
368 for (i
= from_byte
+1; i
< to_byte
; i
++)
370 result
|= ((long long) b
[i
]) << lshift
;
374 if (from_byte
< to_byte
&& (to
% 8 != 0))
377 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
378 result
|= ((long long) c
) << lshift
;
384 /* Replace the specified bits in an instruction bundle */
387 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
390 int from_byte
= from
/ 8;
391 int to_byte
= to
/ 8;
392 unsigned char *b
= (unsigned char *) bundle
;
395 if (from_byte
== to_byte
)
397 unsigned char left
, right
;
399 left
= (c
>> (to
% 8)) << (to
% 8);
400 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
401 c
= (unsigned char) (val
& 0xff);
402 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
410 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
411 c
= c
| (val
<< (from
% 8));
413 val
>>= 8 - from
% 8;
415 for (i
= from_byte
+1; i
< to_byte
; i
++)
424 unsigned char cv
= (unsigned char) val
;
426 c
= c
>> (to
% 8) << (to
% 8);
427 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
433 /* Return the contents of slot N (for N = 0, 1, or 2) in
434 and instruction bundle */
437 slotN_contents (char *bundle
, int slotnum
)
439 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
442 /* Store an instruction in an instruction bundle */
445 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
447 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
450 static enum instruction_type template_encoding_table
[32][3] =
452 { M
, I
, I
}, /* 00 */
453 { M
, I
, I
}, /* 01 */
454 { M
, I
, I
}, /* 02 */
455 { M
, I
, I
}, /* 03 */
456 { M
, L
, X
}, /* 04 */
457 { M
, L
, X
}, /* 05 */
458 { undefined
, undefined
, undefined
}, /* 06 */
459 { undefined
, undefined
, undefined
}, /* 07 */
460 { M
, M
, I
}, /* 08 */
461 { M
, M
, I
}, /* 09 */
462 { M
, M
, I
}, /* 0A */
463 { M
, M
, I
}, /* 0B */
464 { M
, F
, I
}, /* 0C */
465 { M
, F
, I
}, /* 0D */
466 { M
, M
, F
}, /* 0E */
467 { M
, M
, F
}, /* 0F */
468 { M
, I
, B
}, /* 10 */
469 { M
, I
, B
}, /* 11 */
470 { M
, B
, B
}, /* 12 */
471 { M
, B
, B
}, /* 13 */
472 { undefined
, undefined
, undefined
}, /* 14 */
473 { undefined
, undefined
, undefined
}, /* 15 */
474 { B
, B
, B
}, /* 16 */
475 { B
, B
, B
}, /* 17 */
476 { M
, M
, B
}, /* 18 */
477 { M
, M
, B
}, /* 19 */
478 { undefined
, undefined
, undefined
}, /* 1A */
479 { undefined
, undefined
, undefined
}, /* 1B */
480 { M
, F
, B
}, /* 1C */
481 { M
, F
, B
}, /* 1D */
482 { undefined
, undefined
, undefined
}, /* 1E */
483 { undefined
, undefined
, undefined
}, /* 1F */
486 /* Fetch and (partially) decode an instruction at ADDR and return the
487 address of the next instruction to fetch. */
490 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
492 char bundle
[BUNDLE_LEN
];
493 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
497 /* Warn about slot numbers greater than 2. We used to generate
498 an error here on the assumption that the user entered an invalid
499 address. But, sometimes GDB itself requests an invalid address.
500 This can (easily) happen when execution stops in a function for
501 which there are no symbols. The prologue scanner will attempt to
502 find the beginning of the function - if the nearest symbol
503 happens to not be aligned on a bundle boundary (16 bytes), the
504 resulting starting address will cause GDB to think that the slot
507 So we warn about it and set the slot number to zero. It is
508 not necessarily a fatal condition, particularly if debugging
509 at the assembly language level. */
512 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
513 "Using slot 0 instead"));
519 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
524 *instr
= slotN_contents (bundle
, slotnum
);
525 template = extract_bit_field (bundle
, 0, 5);
526 *it
= template_encoding_table
[(int)template][slotnum
];
528 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
531 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
536 /* There are 5 different break instructions (break.i, break.b,
537 break.m, break.f, and break.x), but they all have the same
538 encoding. (The five bit template in the low five bits of the
539 instruction bundle distinguishes one from another.)
541 The runtime architecture manual specifies that break instructions
542 used for debugging purposes must have the upper two bits of the 21
543 bit immediate set to a 0 and a 1 respectively. A breakpoint
544 instruction encodes the most significant bit of its 21 bit
545 immediate at bit 36 of the 41 bit instruction. The penultimate msb
546 is at bit 25 which leads to the pattern below.
548 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
549 it turns out that 0x80000 was used as the syscall break in the early
550 simulators. So I changed the pattern slightly to do "break.i 0x080001"
551 instead. But that didn't work either (I later found out that this
552 pattern was used by the simulator that I was using.) So I ended up
553 using the pattern seen below. */
556 #define IA64_BREAKPOINT 0x00002000040LL
558 #define IA64_BREAKPOINT 0x00003333300LL
561 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
563 CORE_ADDR addr
= bp_tgt
->placed_address
;
564 char bundle
[BUNDLE_LEN
];
565 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
571 error (_("Can't insert breakpoint for slot numbers greater than 2."));
575 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
577 /* Check for L type instruction in 2nd slot, if present then
578 bump up the slot number to the 3rd slot */
579 template = extract_bit_field (bundle
, 0, 5);
580 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
585 instr
= slotN_contents (bundle
, slotnum
);
586 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
587 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
588 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
590 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
596 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
598 CORE_ADDR addr
= bp_tgt
->placed_address
;
599 char bundle
[BUNDLE_LEN
];
600 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
607 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
609 /* Check for L type instruction in 2nd slot, if present then
610 bump up the slot number to the 3rd slot */
611 template = extract_bit_field (bundle
, 0, 5);
612 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
617 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
618 replace_slotN_contents (bundle
, instr
, slotnum
);
620 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
625 /* We don't really want to use this, but remote.c needs to call it in order
626 to figure out if Z-packets are supported or not. Oh, well. */
627 const unsigned char *
628 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
630 static unsigned char breakpoint
[] =
631 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
632 *lenptr
= sizeof (breakpoint
);
640 ia64_read_pc (struct regcache
*regcache
)
642 ULONGEST psr_value
, pc_value
;
645 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
646 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
647 slot_num
= (psr_value
>> 41) & 3;
649 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
653 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
655 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
658 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
659 psr_value
&= ~(3LL << 41);
660 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
664 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
665 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
668 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
670 /* Returns the address of the slot that's NSLOTS slots away from
671 the address ADDR. NSLOTS may be positive or negative. */
673 rse_address_add(CORE_ADDR addr
, int nslots
)
676 int mandatory_nat_slots
= nslots
/ 63;
677 int direction
= nslots
< 0 ? -1 : 1;
679 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
681 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
682 new_addr
+= 8 * direction
;
684 if (IS_NaT_COLLECTION_ADDR(new_addr
))
685 new_addr
+= 8 * direction
;
691 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
692 int regnum
, gdb_byte
*buf
)
694 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
696 #ifdef HAVE_LIBUNWIND_IA64_H
697 /* First try and use the libunwind special reg accessor, otherwise fallback to
699 if (!libunwind_is_initialized ()
700 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
703 /* The fallback position is to assume that r32-r127 are found sequentially
704 in memory starting at $bof. This isn't always true, but without libunwind,
705 this is the best we can do. */
709 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
710 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
712 /* The bsp points at the end of the register frame so we
713 subtract the size of frame from it to get start of register frame. */
714 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
716 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
718 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
719 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
720 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
723 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
726 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
730 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
731 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
732 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
734 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
736 ULONGEST natN_val
= 0;
739 CORE_ADDR gr_addr
= 0;
740 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
741 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
743 /* The bsp points at the end of the register frame so we
744 subtract the size of frame from it to get start of register frame. */
745 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
747 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
748 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
752 /* Compute address of nat collection bits. */
753 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
754 CORE_ADDR nat_collection
;
756 /* If our nat collection address is bigger than bsp, we have to get
757 the nat collection from rnat. Otherwise, we fetch the nat
758 collection from the computed address. */
760 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
762 nat_collection
= read_memory_integer (nat_addr
, 8);
763 nat_bit
= (gr_addr
>> 3) & 0x3f;
764 natN_val
= (nat_collection
>> nat_bit
) & 1;
767 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
769 else if (regnum
== VBOF_REGNUM
)
771 /* A virtual register frame start is provided for user convenience.
772 It can be calculated as the bsp - sof (sizeof frame). */
776 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
777 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
779 /* The bsp points at the end of the register frame so we
780 subtract the size of frame from it to get beginning of frame. */
781 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
782 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
784 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
790 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
791 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
793 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
795 /* Fetch predicate register rename base from current frame
796 marker for this frame. */
797 int rrb_pr
= (cfm
>> 32) & 0x3f;
799 /* Adjust the register number to account for register rotation. */
801 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
803 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
804 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
807 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
811 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
812 int regnum
, const gdb_byte
*buf
)
814 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
819 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
820 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
822 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
824 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
826 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
827 write_memory (reg_addr
, (void *)buf
, 8);
830 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
832 ULONGEST unatN_val
, unat
, unatN_mask
;
833 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
834 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
835 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
838 else if (unatN_val
== 1)
840 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
842 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
847 CORE_ADDR gr_addr
= 0;
848 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
849 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
851 /* The bsp points at the end of the register frame so we
852 subtract the size of frame from it to get start of register frame. */
853 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
855 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
856 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
858 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
860 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
862 /* Compute address of nat collection bits. */
863 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
864 CORE_ADDR nat_collection
;
865 int natN_bit
= (gr_addr
>> 3) & 0x3f;
866 ULONGEST natN_mask
= (1LL << natN_bit
);
867 /* If our nat collection address is bigger than bsp, we have to get
868 the nat collection from rnat. Otherwise, we fetch the nat
869 collection from the computed address. */
872 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
874 nat_collection
|= natN_mask
;
876 nat_collection
&= ~natN_mask
;
877 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
882 nat_collection
= read_memory_integer (nat_addr
, 8);
884 nat_collection
|= natN_mask
;
886 nat_collection
&= ~natN_mask
;
887 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
888 write_memory (nat_addr
, nat_buf
, 8);
892 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
899 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
900 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
902 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
904 /* Fetch predicate register rename base from current frame
905 marker for this frame. */
906 int rrb_pr
= (cfm
>> 32) & 0x3f;
908 /* Adjust the register number to account for register rotation. */
910 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
912 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
913 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
916 else if (prN_val
== 1)
918 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
922 /* The ia64 needs to convert between various ieee floating-point formats
923 and the special ia64 floating point register format. */
926 ia64_convert_register_p (int regno
, struct type
*type
)
928 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
932 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
933 struct type
*valtype
, gdb_byte
*out
)
935 char in
[MAX_REGISTER_SIZE
];
936 frame_register_read (frame
, regnum
, in
);
937 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
941 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
942 struct type
*valtype
, const gdb_byte
*in
)
944 char out
[MAX_REGISTER_SIZE
];
945 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
946 put_frame_register (frame
, regnum
, out
);
950 /* Limit the number of skipped non-prologue instructions since examining
951 of the prologue is expensive. */
952 static int max_skip_non_prologue_insns
= 40;
954 /* Given PC representing the starting address of a function, and
955 LIM_PC which is the (sloppy) limit to which to scan when looking
956 for a prologue, attempt to further refine this limit by using
957 the line data in the symbol table. If successful, a better guess
958 on where the prologue ends is returned, otherwise the previous
959 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
960 which will be set to indicate whether the returned limit may be
961 used with no further scanning in the event that the function is
964 /* FIXME: cagney/2004-02-14: This function and logic have largely been
965 superseded by skip_prologue_using_sal. */
968 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
970 struct symtab_and_line prologue_sal
;
971 CORE_ADDR start_pc
= pc
;
973 /* Start off not trusting the limit. */
976 prologue_sal
= find_pc_line (pc
, 0);
977 if (prologue_sal
.line
!= 0)
980 CORE_ADDR addr
= prologue_sal
.end
;
982 /* Handle the case in which compiler's optimizer/scheduler
983 has moved instructions into the prologue. We scan ahead
984 in the function looking for address ranges whose corresponding
985 line number is less than or equal to the first one that we
986 found for the function. (It can be less than when the
987 scheduler puts a body instruction before the first prologue
989 for (i
= 2 * max_skip_non_prologue_insns
;
990 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
993 struct symtab_and_line sal
;
995 sal
= find_pc_line (addr
, 0);
998 if (sal
.line
<= prologue_sal
.line
999 && sal
.symtab
== prologue_sal
.symtab
)
1006 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1008 lim_pc
= prologue_sal
.end
;
1009 if (start_pc
== get_pc_function_start (lim_pc
))
1016 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1017 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1018 || (14 <= (_regnum_) && (_regnum_) <= 31))
1019 #define imm9(_instr_) \
1020 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1021 | (((_instr_) & 0x00008000000LL) >> 20) \
1022 | (((_instr_) & 0x00000001fc0LL) >> 6))
1024 /* Allocate and initialize a frame cache. */
1026 static struct ia64_frame_cache
*
1027 ia64_alloc_frame_cache (void)
1029 struct ia64_frame_cache
*cache
;
1032 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1038 cache
->prev_cfm
= 0;
1044 cache
->frameless
= 1;
1046 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1047 cache
->saved_regs
[i
] = 0;
1053 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1056 CORE_ADDR last_prologue_pc
= pc
;
1057 instruction_type it
;
1062 int unat_save_reg
= 0;
1063 int pr_save_reg
= 0;
1064 int mem_stack_frame_size
= 0;
1066 CORE_ADDR spill_addr
= 0;
1069 char reg_contents
[256];
1075 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1077 memset (instores
, 0, sizeof instores
);
1078 memset (infpstores
, 0, sizeof infpstores
);
1079 memset (reg_contents
, 0, sizeof reg_contents
);
1081 if (cache
->after_prologue
!= 0
1082 && cache
->after_prologue
<= lim_pc
)
1083 return cache
->after_prologue
;
1085 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1086 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1088 /* We want to check if we have a recognizable function start before we
1089 look ahead for a prologue. */
1090 if (pc
< lim_pc
&& next_pc
1091 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1093 /* alloc - start of a regular function. */
1094 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1095 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1096 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1097 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1099 /* Verify that the current cfm matches what we think is the
1100 function start. If we have somehow jumped within a function,
1101 we do not want to interpret the prologue and calculate the
1102 addresses of various registers such as the return address.
1103 We will instead treat the frame as frameless. */
1105 (sof
== (cache
->cfm
& 0x7f) &&
1106 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1110 last_prologue_pc
= next_pc
;
1115 /* Look for a leaf routine. */
1116 if (pc
< lim_pc
&& next_pc
1117 && (it
== I
|| it
== M
)
1118 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1120 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1121 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1122 | ((instr
& 0x001f8000000LL
) >> 20)
1123 | ((instr
& 0x000000fe000LL
) >> 13));
1124 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1125 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1126 int qp
= (int) (instr
& 0x0000000003fLL
);
1127 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1129 /* mov r2, r12 - beginning of leaf routine */
1131 last_prologue_pc
= next_pc
;
1135 /* If we don't recognize a regular function or leaf routine, we are
1141 last_prologue_pc
= lim_pc
;
1145 /* Loop, looking for prologue instructions, keeping track of
1146 where preserved registers were spilled. */
1149 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1153 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1155 /* Exit loop upon hitting a non-nop branch instruction. */
1160 else if (((instr
& 0x3fLL
) != 0LL) &&
1161 (frameless
|| ret_reg
!= 0))
1163 /* Exit loop upon hitting a predicated instruction if
1164 we already have the return register or if we are frameless. */
1169 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1172 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1173 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1174 int qp
= (int) (instr
& 0x0000000003f);
1176 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1179 last_prologue_pc
= next_pc
;
1182 else if ((it
== I
|| it
== M
)
1183 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1185 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1186 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1187 | ((instr
& 0x001f8000000LL
) >> 20)
1188 | ((instr
& 0x000000fe000LL
) >> 13));
1189 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1190 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1191 int qp
= (int) (instr
& 0x0000000003fLL
);
1193 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1197 last_prologue_pc
= next_pc
;
1199 else if (qp
== 0 && rN
== 12 && rM
== 12)
1201 /* adds r12, -mem_stack_frame_size, r12 */
1202 mem_stack_frame_size
-= imm
;
1203 last_prologue_pc
= next_pc
;
1205 else if (qp
== 0 && rN
== 2
1206 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1208 char buf
[MAX_REGISTER_SIZE
];
1209 CORE_ADDR saved_sp
= 0;
1210 /* adds r2, spilloffset, rFramePointer
1212 adds r2, spilloffset, r12
1214 Get ready for stf.spill or st8.spill instructions.
1215 The address to start spilling at is loaded into r2.
1216 FIXME: Why r2? That's what gcc currently uses; it
1217 could well be different for other compilers. */
1219 /* Hmm... whether or not this will work will depend on
1220 where the pc is. If it's still early in the prologue
1221 this'll be wrong. FIXME */
1224 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1225 saved_sp
= extract_unsigned_integer (buf
, 8);
1227 spill_addr
= saved_sp
1228 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1231 last_prologue_pc
= next_pc
;
1233 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1234 rN
< 256 && imm
== 0)
1236 /* mov rN, rM where rM is an input register */
1237 reg_contents
[rN
] = rM
;
1238 last_prologue_pc
= next_pc
;
1240 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1244 last_prologue_pc
= next_pc
;
1249 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1250 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1252 /* stf.spill [rN] = fM, imm9
1254 stf.spill [rN] = fM */
1256 int imm
= imm9(instr
);
1257 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1258 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1259 int qp
= (int) (instr
& 0x0000000003fLL
);
1260 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1261 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1263 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1265 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1268 spill_addr
= 0; /* last one; must be done */
1269 last_prologue_pc
= next_pc
;
1272 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1273 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1279 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1280 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1281 int qp
= (int) (instr
& 0x0000000003fLL
);
1282 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1284 /* We have something like "mov.m r3 = ar.unat". Remember the
1285 r3 (or whatever) and watch for a store of this register... */
1287 last_prologue_pc
= next_pc
;
1290 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1293 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1294 int qp
= (int) (instr
& 0x0000000003fLL
);
1295 if (qp
== 0 && isScratch (rN
))
1298 last_prologue_pc
= next_pc
;
1302 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1303 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1307 st8 [rN] = rM, imm9 */
1308 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1309 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1310 int qp
= (int) (instr
& 0x0000000003fLL
);
1311 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1312 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1313 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1315 /* We've found a spill of either the UNAT register or the PR
1316 register. (Well, not exactly; what we've actually found is
1317 a spill of the register that UNAT or PR was moved to).
1318 Record that fact and move on... */
1319 if (rM
== unat_save_reg
)
1321 /* Track UNAT register */
1322 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1327 /* Track PR register */
1328 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1331 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1332 /* st8 [rN] = rM, imm9 */
1333 spill_addr
+= imm9(instr
);
1335 spill_addr
= 0; /* must be done spilling */
1336 last_prologue_pc
= next_pc
;
1338 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1340 /* Allow up to one store of each input register. */
1341 instores
[rM
-32] = 1;
1342 last_prologue_pc
= next_pc
;
1344 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1345 !instores
[indirect
-32])
1347 /* Allow an indirect store of an input register. */
1348 instores
[indirect
-32] = 1;
1349 last_prologue_pc
= next_pc
;
1352 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1359 Note that the st8 case is handled in the clause above.
1361 Advance over stores of input registers. One store per input
1362 register is permitted. */
1363 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1364 int qp
= (int) (instr
& 0x0000000003fLL
);
1365 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1366 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1368 instores
[rM
-32] = 1;
1369 last_prologue_pc
= next_pc
;
1371 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1372 !instores
[indirect
-32])
1374 /* Allow an indirect store of an input register. */
1375 instores
[indirect
-32] = 1;
1376 last_prologue_pc
= next_pc
;
1379 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1386 Advance over stores of floating point input registers. Again
1387 one store per register is permitted */
1388 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1389 int qp
= (int) (instr
& 0x0000000003fLL
);
1390 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1392 infpstores
[fM
-8] = 1;
1393 last_prologue_pc
= next_pc
;
1397 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1398 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1400 /* st8.spill [rN] = rM
1402 st8.spill [rN] = rM, imm9 */
1403 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1404 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1405 int qp
= (int) (instr
& 0x0000000003fLL
);
1406 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1408 /* We've found a spill of one of the preserved general purpose
1409 regs. Record the spill address and advance the spill
1410 register if appropriate. */
1411 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1412 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1413 /* st8.spill [rN] = rM, imm9 */
1414 spill_addr
+= imm9(instr
);
1416 spill_addr
= 0; /* Done spilling */
1417 last_prologue_pc
= next_pc
;
1424 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1425 registers for the previous frame which will be needed later. */
1427 if (!frameless
&& next_frame
)
1429 /* Extract the size of the rotating portion of the stack
1430 frame and the register rename base from the current
1436 rrb_gr
= (cfm
>> 18) & 0x7f;
1438 /* Find the bof (beginning of frame). */
1439 bof
= rse_address_add (cache
->bsp
, -sof
);
1441 for (i
= 0, addr
= bof
;
1445 if (IS_NaT_COLLECTION_ADDR (addr
))
1449 if (i
+32 == cfm_reg
)
1450 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1451 if (i
+32 == ret_reg
)
1452 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1454 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1457 /* For the previous argument registers we require the previous bof.
1458 If we can't find the previous cfm, then we can do nothing. */
1460 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1462 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1464 else if (cfm_reg
!= 0)
1466 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1467 cfm
= extract_unsigned_integer (buf
, 8);
1469 cache
->prev_cfm
= cfm
;
1473 sor
= ((cfm
>> 14) & 0xf) * 8;
1475 sol
= (cfm
>> 7) & 0x7f;
1476 rrb_gr
= (cfm
>> 18) & 0x7f;
1478 /* The previous bof only requires subtraction of the sol (size of locals)
1479 due to the overlap between output and input of subsequent frames. */
1480 bof
= rse_address_add (bof
, -sol
);
1482 for (i
= 0, addr
= bof
;
1486 if (IS_NaT_COLLECTION_ADDR (addr
))
1491 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1494 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1500 /* Try and trust the lim_pc value whenever possible. */
1501 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1502 last_prologue_pc
= lim_pc
;
1504 cache
->frameless
= frameless
;
1505 cache
->after_prologue
= last_prologue_pc
;
1506 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1507 cache
->fp_reg
= fp_reg
;
1509 return last_prologue_pc
;
1513 ia64_skip_prologue (CORE_ADDR pc
)
1515 struct ia64_frame_cache cache
;
1517 cache
.after_prologue
= 0;
1521 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1522 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1526 /* Normal frames. */
1528 static struct ia64_frame_cache
*
1529 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1531 struct ia64_frame_cache
*cache
;
1533 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1539 cache
= ia64_alloc_frame_cache ();
1540 *this_cache
= cache
;
1542 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1543 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1545 /* We always want the bsp to point to the end of frame.
1546 This way, we can always get the beginning of frame (bof)
1547 by subtracting frame size. */
1548 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1549 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1551 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1552 psr
= extract_unsigned_integer (buf
, 8);
1554 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1555 cfm
= extract_unsigned_integer (buf
, 8);
1557 cache
->sof
= (cfm
& 0x7f);
1558 cache
->sol
= (cfm
>> 7) & 0x7f;
1559 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1563 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1566 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1568 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1574 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1575 struct frame_id
*this_id
)
1577 struct ia64_frame_cache
*cache
=
1578 ia64_frame_cache (next_frame
, this_cache
);
1580 /* If outermost frame, mark with null frame id. */
1581 if (cache
->base
== 0)
1582 (*this_id
) = null_frame_id
;
1584 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1585 if (gdbarch_debug
>= 1)
1586 fprintf_unfiltered (gdb_stdlog
,
1587 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1588 paddr_nz (this_id
->code_addr
),
1589 paddr_nz (this_id
->stack_addr
),
1590 paddr_nz (cache
->bsp
), next_frame
);
1594 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1595 int regnum
, int *optimizedp
,
1596 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1597 int *realnump
, gdb_byte
*valuep
)
1599 struct ia64_frame_cache
*cache
=
1600 ia64_frame_cache (next_frame
, this_cache
);
1601 char dummy_valp
[MAX_REGISTER_SIZE
];
1604 gdb_assert (regnum
>= 0);
1606 if (!target_has_registers
)
1607 error (_("No registers."));
1614 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1615 when valuep is not supplied. */
1617 valuep
= dummy_valp
;
1619 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1621 if (regnum
== gdbarch_sp_regnum (current_gdbarch
))
1623 /* Handle SP values for all frames but the topmost. */
1624 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1627 else if (regnum
== IA64_BSP_REGNUM
)
1629 char cfm_valuep
[MAX_REGISTER_SIZE
];
1632 enum lval_type cfm_lval
;
1634 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1636 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1637 This corresponds to what the hardware bsp register will be if we pop the frame
1638 back which is why we might have been called. We know the beginning of the current
1639 frame is cache->bsp - cache->sof. This value in the previous frame points to
1640 the start of the output registers. We can calculate the end of that frame by adding
1641 the size of output (sof (size of frame) - sol (size of locals)). */
1642 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1643 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1644 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1646 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1647 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1649 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1652 else if (regnum
== IA64_CFM_REGNUM
)
1654 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1658 *lvalp
= lval_memory
;
1660 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1662 else if (cache
->prev_cfm
)
1663 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1664 else if (cache
->frameless
)
1667 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1670 else if (regnum
== IA64_VFP_REGNUM
)
1672 /* If the function in question uses an automatic register (r32-r127)
1673 for the frame pointer, it'll be found by ia64_find_saved_register()
1674 above. If the function lacks one of these frame pointers, we can
1675 still provide a value since we know the size of the frame. */
1676 CORE_ADDR vfp
= cache
->base
;
1677 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1679 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1681 char pr_valuep
[MAX_REGISTER_SIZE
];
1684 enum lval_type pr_lval
;
1687 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1688 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1689 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1691 /* Fetch predicate register rename base from current frame
1692 marker for this frame. */
1693 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1695 /* Adjust the register number to account for register rotation. */
1696 regnum
= VP16_REGNUM
1697 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1699 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1700 regnum
- VP0_REGNUM
, 1);
1701 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1703 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1705 char unat_valuep
[MAX_REGISTER_SIZE
];
1708 enum lval_type unat_lval
;
1709 CORE_ADDR unat_addr
;
1711 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1712 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1713 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1714 regnum
- IA64_NAT0_REGNUM
, 1);
1715 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1718 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1721 /* Find address of general register corresponding to nat bit we're
1725 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1729 /* Compute address of nat collection bits. */
1730 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1732 CORE_ADDR nat_collection
;
1734 /* If our nat collection address is bigger than bsp, we have to get
1735 the nat collection from rnat. Otherwise, we fetch the nat
1736 collection from the computed address. */
1737 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1738 bsp
= extract_unsigned_integer (buf
, 8);
1739 if (nat_addr
>= bsp
)
1741 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1742 nat_collection
= extract_unsigned_integer (buf
, 8);
1745 nat_collection
= read_memory_integer (nat_addr
, 8);
1746 nat_bit
= (gr_addr
>> 3) & 0x3f;
1747 natval
= (nat_collection
>> nat_bit
) & 1;
1750 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1752 else if (regnum
== IA64_IP_REGNUM
)
1755 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1759 *lvalp
= lval_memory
;
1761 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1762 pc
= extract_unsigned_integer (buf
, 8);
1764 else if (cache
->frameless
)
1766 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1767 pc
= extract_unsigned_integer (buf
, 8);
1770 store_unsigned_integer (valuep
, 8, pc
);
1772 else if (regnum
== IA64_PSR_REGNUM
)
1774 /* We don't know how to get the complete previous PSR, but we need it for
1775 the slot information when we unwind the pc (pc is formed of IP register
1776 plus slot information from PSR). To get the previous slot information,
1777 we mask it off the return address. */
1778 ULONGEST slot_num
= 0;
1781 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1783 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1784 psr
= extract_unsigned_integer (buf
, 8);
1788 *lvalp
= lval_memory
;
1790 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1791 pc
= extract_unsigned_integer (buf
, 8);
1793 else if (cache
->frameless
)
1796 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1797 pc
= extract_unsigned_integer (buf
, 8);
1799 psr
&= ~(3LL << 41);
1800 slot_num
= pc
& 0x3LL
;
1801 psr
|= (CORE_ADDR
)slot_num
<< 41;
1802 store_unsigned_integer (valuep
, 8, psr
);
1804 else if (regnum
== IA64_BR0_REGNUM
)
1807 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1810 *lvalp
= lval_memory
;
1812 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1813 br0
= extract_unsigned_integer (buf
, 8);
1815 store_unsigned_integer (valuep
, 8, br0
);
1817 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1818 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1821 if (regnum
>= V32_REGNUM
)
1822 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1823 addr
= cache
->saved_regs
[regnum
];
1826 *lvalp
= lval_memory
;
1828 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1830 else if (cache
->frameless
)
1832 char r_valuep
[MAX_REGISTER_SIZE
];
1835 enum lval_type r_lval
;
1837 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1839 if (regnum
>= V32_REGNUM
)
1840 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1841 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1842 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1843 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1844 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1845 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1846 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1847 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1849 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1850 *lvalp
= lval_memory
;
1852 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1858 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1860 /* Fetch floating point register rename base from current
1861 frame marker for this frame. */
1862 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1864 /* Adjust the floating point register number to account for
1865 register rotation. */
1866 regnum
= IA64_FR32_REGNUM
1867 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1870 /* If we have stored a memory address, access the register. */
1871 addr
= cache
->saved_regs
[regnum
];
1874 *lvalp
= lval_memory
;
1876 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1878 /* Otherwise, punt and get the current value of the register. */
1880 frame_unwind_register (next_frame
, regnum
, valuep
);
1883 if (gdbarch_debug
>= 1)
1884 fprintf_unfiltered (gdb_stdlog
,
1885 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1886 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1887 ? ia64_register_names
[regnum
] : "r??"),
1888 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1891 static const struct frame_unwind ia64_frame_unwind
=
1894 &ia64_frame_this_id
,
1895 &ia64_frame_prev_register
1898 static const struct frame_unwind
*
1899 ia64_frame_sniffer (struct frame_info
*next_frame
)
1901 return &ia64_frame_unwind
;
1904 /* Signal trampolines. */
1907 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1909 if (SIGCONTEXT_REGISTER_ADDRESS
)
1913 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1914 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1915 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1916 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1917 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1918 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1919 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1920 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1921 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1922 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1923 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1924 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1925 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1926 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1927 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1928 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1929 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1930 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1931 cache
->saved_regs
[IA64_LC_REGNUM
] =
1932 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1933 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1934 cache
->saved_regs
[regno
] =
1935 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1936 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1937 cache
->saved_regs
[regno
] =
1938 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1939 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1940 cache
->saved_regs
[regno
] =
1941 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1945 static struct ia64_frame_cache
*
1946 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1948 struct ia64_frame_cache
*cache
;
1956 cache
= ia64_alloc_frame_cache ();
1958 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1959 /* Note that frame size is hard-coded below. We cannot calculate it
1960 via prologue examination. */
1961 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1963 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1964 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1966 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1967 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1968 cache
->sof
= cache
->cfm
& 0x7f;
1970 ia64_sigtramp_frame_init_saved_regs (cache
);
1972 *this_cache
= cache
;
1977 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1978 void **this_cache
, struct frame_id
*this_id
)
1980 struct ia64_frame_cache
*cache
=
1981 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1983 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1984 if (gdbarch_debug
>= 1)
1985 fprintf_unfiltered (gdb_stdlog
,
1986 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1987 paddr_nz (this_id
->code_addr
),
1988 paddr_nz (this_id
->stack_addr
),
1989 paddr_nz (cache
->bsp
), next_frame
);
1993 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1995 int regnum
, int *optimizedp
,
1996 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1997 int *realnump
, gdb_byte
*valuep
)
1999 char dummy_valp
[MAX_REGISTER_SIZE
];
2000 char buf
[MAX_REGISTER_SIZE
];
2002 struct ia64_frame_cache
*cache
=
2003 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2005 gdb_assert (regnum
>= 0);
2007 if (!target_has_registers
)
2008 error (_("No registers."));
2015 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2016 when valuep is not supplied. */
2018 valuep
= dummy_valp
;
2020 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2022 if (regnum
== IA64_IP_REGNUM
)
2025 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2029 *lvalp
= lval_memory
;
2031 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2032 pc
= extract_unsigned_integer (buf
, 8);
2035 store_unsigned_integer (valuep
, 8, pc
);
2037 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2038 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2041 if (regnum
>= V32_REGNUM
)
2042 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2043 addr
= cache
->saved_regs
[regnum
];
2046 *lvalp
= lval_memory
;
2048 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2053 /* All other registers not listed above. */
2054 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2057 *lvalp
= lval_memory
;
2059 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2063 if (gdbarch_debug
>= 1)
2064 fprintf_unfiltered (gdb_stdlog
,
2065 "sigtramp prev register <%s> is 0x%s\n",
2066 (regnum
< IA64_GR32_REGNUM
2067 || (regnum
> IA64_GR127_REGNUM
2068 && regnum
< LAST_PSEUDO_REGNUM
))
2069 ? ia64_register_names
[regnum
]
2070 : (regnum
< LAST_PSEUDO_REGNUM
2071 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2073 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2076 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2079 ia64_sigtramp_frame_this_id
,
2080 ia64_sigtramp_frame_prev_register
2083 static const struct frame_unwind
*
2084 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2086 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
2087 if (tdep
->pc_in_sigtramp
)
2089 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2091 if (tdep
->pc_in_sigtramp (pc
))
2092 return &ia64_sigtramp_frame_unwind
;
2100 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2102 struct ia64_frame_cache
*cache
=
2103 ia64_frame_cache (next_frame
, this_cache
);
2108 static const struct frame_base ia64_frame_base
=
2111 ia64_frame_base_address
,
2112 ia64_frame_base_address
,
2113 ia64_frame_base_address
2116 #ifdef HAVE_LIBUNWIND_IA64_H
2118 struct ia64_unwind_table_entry
2120 unw_word_t start_offset
;
2121 unw_word_t end_offset
;
2122 unw_word_t info_offset
;
2125 static __inline__
uint64_t
2126 ia64_rse_slot_num (uint64_t addr
)
2128 return (addr
>> 3) & 0x3f;
2131 /* Skip over a designated number of registers in the backing
2132 store, remembering every 64th position is for NAT. */
2133 static __inline__
uint64_t
2134 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2136 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2140 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2143 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2144 number to a libunwind register number. */
2146 ia64_gdb2uw_regnum (int regnum
)
2148 if (regnum
== sp_regnum
)
2150 else if (regnum
== IA64_BSP_REGNUM
)
2151 return UNW_IA64_BSP
;
2152 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2153 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2154 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2155 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2156 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2157 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2158 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2160 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2161 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2162 else if (regnum
== IA64_PR_REGNUM
)
2164 else if (regnum
== IA64_IP_REGNUM
)
2166 else if (regnum
== IA64_CFM_REGNUM
)
2167 return UNW_IA64_CFM
;
2168 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2169 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2170 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2171 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2176 /* Gdb libunwind-frame callback function to convert from a libunwind register
2177 number to a ia64 gdb register number. */
2179 ia64_uw2gdb_regnum (int uw_regnum
)
2181 if (uw_regnum
== UNW_IA64_SP
)
2183 else if (uw_regnum
== UNW_IA64_BSP
)
2184 return IA64_BSP_REGNUM
;
2185 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2186 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2187 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2188 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2189 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2190 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2191 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2192 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2193 else if (uw_regnum
== UNW_IA64_PR
)
2194 return IA64_PR_REGNUM
;
2195 else if (uw_regnum
== UNW_REG_IP
)
2196 return IA64_IP_REGNUM
;
2197 else if (uw_regnum
== UNW_IA64_CFM
)
2198 return IA64_CFM_REGNUM
;
2199 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2200 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2201 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2202 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2207 /* Gdb libunwind-frame callback function to reveal if register is a float
2210 ia64_is_fpreg (int uw_regnum
)
2212 return unw_is_fpreg (uw_regnum
);
2215 /* Libunwind callback accessor function for general registers. */
2217 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2218 int write
, void *arg
)
2220 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2221 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2222 struct frame_info
*next_frame
= arg
;
2223 long new_sof
, old_sof
;
2224 char buf
[MAX_REGISTER_SIZE
];
2226 /* We never call any libunwind routines that need to write registers. */
2227 gdb_assert (!write
);
2232 /* Libunwind expects to see the pc value which means the slot number
2233 from the psr must be merged with the ip word address. */
2234 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2235 ip
= extract_unsigned_integer (buf
, 8);
2236 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2237 psr
= extract_unsigned_integer (buf
, 8);
2238 *val
= ip
| ((psr
>> 41) & 0x3);
2241 case UNW_IA64_AR_BSP
:
2242 /* Libunwind expects to see the beginning of the current register
2243 frame so we must account for the fact that ptrace() will return a value
2244 for bsp that points *after* the current register frame. */
2245 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2246 bsp
= extract_unsigned_integer (buf
, 8);
2247 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2248 cfm
= extract_unsigned_integer (buf
, 8);
2250 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2253 case UNW_IA64_AR_BSPSTORE
:
2254 /* Libunwind wants bspstore to be after the current register frame.
2255 This is what ptrace() and gdb treats as the regular bsp value. */
2256 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2257 *val
= extract_unsigned_integer (buf
, 8);
2261 /* For all other registers, just unwind the value directly. */
2262 frame_unwind_register (next_frame
, regnum
, buf
);
2263 *val
= extract_unsigned_integer (buf
, 8);
2267 if (gdbarch_debug
>= 1)
2268 fprintf_unfiltered (gdb_stdlog
,
2269 " access_reg: from cache: %4s=0x%s\n",
2270 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2271 ? ia64_register_names
[regnum
] : "r??"),
2276 /* Libunwind callback accessor function for floating-point registers. */
2278 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2279 int write
, void *arg
)
2281 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2282 struct frame_info
*next_frame
= arg
;
2284 /* We never call any libunwind routines that need to write registers. */
2285 gdb_assert (!write
);
2287 frame_unwind_register (next_frame
, regnum
, (char *) val
);
2292 /* Libunwind callback accessor function for top-level rse registers. */
2294 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2295 int write
, void *arg
)
2297 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2298 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2299 struct regcache
*regcache
= arg
;
2300 long new_sof
, old_sof
;
2301 char buf
[MAX_REGISTER_SIZE
];
2303 /* We never call any libunwind routines that need to write registers. */
2304 gdb_assert (!write
);
2309 /* Libunwind expects to see the pc value which means the slot number
2310 from the psr must be merged with the ip word address. */
2311 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2312 ip
= extract_unsigned_integer (buf
, 8);
2313 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2314 psr
= extract_unsigned_integer (buf
, 8);
2315 *val
= ip
| ((psr
>> 41) & 0x3);
2318 case UNW_IA64_AR_BSP
:
2319 /* Libunwind expects to see the beginning of the current register
2320 frame so we must account for the fact that ptrace() will return a value
2321 for bsp that points *after* the current register frame. */
2322 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2323 bsp
= extract_unsigned_integer (buf
, 8);
2324 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2325 cfm
= extract_unsigned_integer (buf
, 8);
2327 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2330 case UNW_IA64_AR_BSPSTORE
:
2331 /* Libunwind wants bspstore to be after the current register frame.
2332 This is what ptrace() and gdb treats as the regular bsp value. */
2333 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2334 *val
= extract_unsigned_integer (buf
, 8);
2338 /* For all other registers, just unwind the value directly. */
2339 regcache_cooked_read (regcache
, regnum
, buf
);
2340 *val
= extract_unsigned_integer (buf
, 8);
2344 if (gdbarch_debug
>= 1)
2345 fprintf_unfiltered (gdb_stdlog
,
2346 " access_rse_reg: from cache: %4s=0x%s\n",
2347 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2348 ? ia64_register_names
[regnum
] : "r??"),
2354 /* Libunwind callback accessor function for top-level fp registers. */
2356 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2357 unw_fpreg_t
*val
, int write
, void *arg
)
2359 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2360 struct regcache
*regcache
= arg
;
2362 /* We never call any libunwind routines that need to write registers. */
2363 gdb_assert (!write
);
2365 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2370 /* Libunwind callback accessor function for accessing memory. */
2372 ia64_access_mem (unw_addr_space_t as
,
2373 unw_word_t addr
, unw_word_t
*val
,
2374 int write
, void *arg
)
2376 if (addr
- KERNEL_START
< ktab_size
)
2378 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2379 + (addr
- KERNEL_START
));
2388 /* XXX do we need to normalize byte-order here? */
2390 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2392 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2395 /* Call low-level function to access the kernel unwind table. */
2397 getunwind_table (gdb_byte
**buf_p
)
2401 /* FIXME drow/2005-09-10: This code used to call
2402 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2403 for the currently running ia64-linux kernel. That data should
2404 come from the core file and be accessed via the auxv vector; if
2405 we want to preserve fall back to the running kernel's table, then
2406 we should find a way to override the corefile layer's
2407 xfer_partial method. */
2409 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2415 /* Get the kernel unwind table. */
2417 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2419 static struct ia64_table_entry
*etab
;
2426 size
= getunwind_table (&ktab_buf
);
2428 return -UNW_ENOINFO
;
2430 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2433 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2434 etab
->info_offset
+= KERNEL_START
;
2437 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2438 return -UNW_ENOINFO
;
2440 di
->format
= UNW_INFO_FORMAT_TABLE
;
2442 di
->start_ip
= ktab
[0].start_offset
;
2443 di
->end_ip
= etab
[-1].end_offset
;
2444 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2445 di
->u
.ti
.segbase
= 0;
2446 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2447 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2449 if (gdbarch_debug
>= 1)
2450 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2451 "segbase=0x%s, length=%s, gp=0x%s\n",
2452 (char *) di
->u
.ti
.name_ptr
,
2453 paddr_nz (di
->u
.ti
.segbase
),
2454 paddr_u (di
->u
.ti
.table_len
),
2459 /* Find the unwind table entry for a specified address. */
2461 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2462 unw_dyn_info_t
*dip
, void **buf
)
2464 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2465 Elf_Internal_Ehdr
*ehdr
;
2466 unw_word_t segbase
= 0;
2467 CORE_ADDR load_base
;
2471 bfd
= objfile
->obfd
;
2473 ehdr
= elf_tdata (bfd
)->elf_header
;
2474 phdr
= elf_tdata (bfd
)->phdr
;
2476 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2478 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2480 switch (phdr
[i
].p_type
)
2483 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2488 case PT_IA_64_UNWIND
:
2489 p_unwind
= phdr
+ i
;
2497 if (!p_text
|| !p_unwind
)
2498 return -UNW_ENOINFO
;
2500 /* Verify that the segment that contains the IP also contains
2501 the static unwind table. If not, we may be in the Linux kernel's
2502 DSO gate page in which case the unwind table is another segment.
2503 Otherwise, we are dealing with runtime-generated code, for which we
2504 have no info here. */
2505 segbase
= p_text
->p_vaddr
+ load_base
;
2507 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2510 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2512 if (phdr
[i
].p_type
== PT_LOAD
2513 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2516 /* Get the segbase from the section containing the
2518 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2522 return -UNW_ENOINFO
;
2525 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2526 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2527 dip
->gp
= ia64_find_global_pointer (ip
);
2528 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2529 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2530 dip
->u
.rti
.segbase
= segbase
;
2531 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2532 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2537 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2539 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2540 int need_unwind_info
, void *arg
)
2542 struct obj_section
*sec
= find_pc_section (ip
);
2549 /* XXX This only works if the host and the target architecture are
2550 both ia64 and if the have (more or less) the same kernel
2552 if (get_kernel_table (ip
, &di
) < 0)
2553 return -UNW_ENOINFO
;
2555 if (gdbarch_debug
>= 1)
2556 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2557 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2558 "length=%s,data=0x%s)\n",
2559 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2560 paddr_nz (di
.u
.ti
.segbase
),
2561 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2563 paddr_u (di
.u
.ti
.table_len
),
2564 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2568 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2572 if (gdbarch_debug
>= 1)
2573 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2574 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2575 "length=%s,data=0x%s)\n",
2576 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2577 paddr_nz (di
.u
.rti
.segbase
),
2578 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2580 paddr_u (di
.u
.rti
.table_len
),
2581 paddr_nz (di
.u
.rti
.table_data
));
2584 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2587 /* We no longer need the dyn info storage so free it. */
2593 /* Libunwind callback accessor function for cleanup. */
2595 ia64_put_unwind_info (unw_addr_space_t as
,
2596 unw_proc_info_t
*pip
, void *arg
)
2598 /* Nothing required for now. */
2601 /* Libunwind callback accessor function to get head of the dynamic
2602 unwind-info registration list. */
2604 ia64_get_dyn_info_list (unw_addr_space_t as
,
2605 unw_word_t
*dilap
, void *arg
)
2607 struct obj_section
*text_sec
;
2608 struct objfile
*objfile
;
2609 unw_word_t ip
, addr
;
2613 if (!libunwind_is_initialized ())
2614 return -UNW_ENOINFO
;
2616 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2620 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2621 ip
= text_sec
->addr
;
2622 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2625 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2626 /* We no longer need the dyn info storage so free it. */
2631 if (gdbarch_debug
>= 1)
2632 fprintf_unfiltered (gdb_stdlog
,
2633 "dynamic unwind table in objfile %s "
2634 "at 0x%s (gp=0x%s)\n",
2635 bfd_get_filename (objfile
->obfd
),
2636 paddr_nz (addr
), paddr_nz (di
.gp
));
2642 return -UNW_ENOINFO
;
2646 /* Frame interface functions for libunwind. */
2649 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2650 struct frame_id
*this_id
)
2655 CORE_ADDR prev_ip
, addr
;
2656 int realnum
, optimized
;
2657 enum lval_type lval
;
2660 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2661 if (frame_id_eq (id
, null_frame_id
))
2663 (*this_id
) = null_frame_id
;
2667 /* We must add the bsp as the special address for frame comparison
2669 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2670 bsp
= extract_unsigned_integer (buf
, 8);
2672 /* If the previous frame pc value is 0, then we are at the end of the stack
2673 and don't want to unwind past this frame. We return a null frame_id to
2675 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2676 &optimized
, &lval
, &addr
, &realnum
, buf
);
2677 prev_ip
= extract_unsigned_integer (buf
, 8);
2680 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2682 (*this_id
) = null_frame_id
;
2684 if (gdbarch_debug
>= 1)
2685 fprintf_unfiltered (gdb_stdlog
,
2686 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2687 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2688 paddr_nz (bsp
), next_frame
);
2692 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2694 int regnum
, int *optimizedp
,
2695 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2696 int *realnump
, gdb_byte
*valuep
)
2700 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2701 reg
= IA64_PR_REGNUM
;
2702 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2703 reg
= IA64_UNAT_REGNUM
;
2705 /* Let libunwind do most of the work. */
2706 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2707 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2709 /* No more to do if the value is not supposed to be supplied. */
2713 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2717 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2721 unsigned char buf
[MAX_REGISTER_SIZE
];
2723 /* Fetch predicate register rename base from current frame
2724 marker for this frame. */
2725 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2726 cfm
= extract_unsigned_integer (buf
, 8);
2727 rrb_pr
= (cfm
>> 32) & 0x3f;
2729 /* Adjust the register number to account for register rotation. */
2730 regnum
= VP16_REGNUM
2731 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2733 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2734 regnum
- VP0_REGNUM
, 1);
2735 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2737 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2741 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2742 regnum
- IA64_NAT0_REGNUM
, 1);
2743 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2746 else if (regnum
== IA64_BSP_REGNUM
)
2748 char cfm_valuep
[MAX_REGISTER_SIZE
];
2751 enum lval_type cfm_lval
;
2753 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2755 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2756 This corresponds to what the hardware bsp register will be if we pop the frame
2757 back which is why we might have been called. We know that libunwind will pass us back
2758 the beginning of the current frame so we should just add sof to it. */
2759 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2760 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2761 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2762 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2763 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2765 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2769 if (gdbarch_debug
>= 1)
2770 fprintf_unfiltered (gdb_stdlog
,
2771 "libunwind prev register <%s> is 0x%s\n",
2772 (regnum
< IA64_GR32_REGNUM
2773 || (regnum
> IA64_GR127_REGNUM
2774 && regnum
< LAST_PSEUDO_REGNUM
))
2775 ? ia64_register_names
[regnum
]
2776 : (regnum
< LAST_PSEUDO_REGNUM
2777 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2779 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2782 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2785 ia64_libunwind_frame_this_id
,
2786 ia64_libunwind_frame_prev_register
,
2790 libunwind_frame_dealloc_cache
2793 static const struct frame_unwind
*
2794 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2796 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2797 return &ia64_libunwind_frame_unwind
;
2803 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2804 struct frame_id
*this_id
)
2811 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2812 if (frame_id_eq (id
, null_frame_id
))
2814 (*this_id
) = null_frame_id
;
2818 /* We must add the bsp as the special address for frame comparison
2820 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2821 bsp
= extract_unsigned_integer (buf
, 8);
2823 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2824 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2826 if (gdbarch_debug
>= 1)
2827 fprintf_unfiltered (gdb_stdlog
,
2828 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2829 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2830 paddr_nz (bsp
), next_frame
);
2834 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2836 int regnum
, int *optimizedp
,
2837 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2838 int *realnump
, gdb_byte
*valuep
)
2842 CORE_ADDR prev_ip
, addr
;
2843 int realnum
, optimized
;
2844 enum lval_type lval
;
2847 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2848 method of getting previous registers. */
2849 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2850 &optimized
, &lval
, &addr
, &realnum
, buf
);
2851 prev_ip
= extract_unsigned_integer (buf
, 8);
2855 void *tmp_cache
= NULL
;
2856 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2857 addrp
, realnump
, valuep
);
2860 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2861 addrp
, realnump
, valuep
);
2864 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2867 ia64_libunwind_sigtramp_frame_this_id
,
2868 ia64_libunwind_sigtramp_frame_prev_register
2871 static const struct frame_unwind
*
2872 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2874 if (libunwind_is_initialized ())
2876 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2877 return &ia64_libunwind_sigtramp_frame_unwind
;
2881 return ia64_sigtramp_frame_sniffer (next_frame
);
2884 /* Set of libunwind callback acccessor functions. */
2885 static unw_accessors_t ia64_unw_accessors
=
2887 ia64_find_proc_info_x
,
2888 ia64_put_unwind_info
,
2889 ia64_get_dyn_info_list
,
2897 /* Set of special libunwind callback acccessor functions specific for accessing
2898 the rse registers. At the top of the stack, we want libunwind to figure out
2899 how to read r32 - r127. Though usually they are found sequentially in memory
2900 starting from $bof, this is not always true. */
2901 static unw_accessors_t ia64_unw_rse_accessors
=
2903 ia64_find_proc_info_x
,
2904 ia64_put_unwind_info
,
2905 ia64_get_dyn_info_list
,
2907 ia64_access_rse_reg
,
2908 ia64_access_rse_fpreg
,
2913 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2914 static struct libunwind_descr ia64_libunwind_descr
=
2919 &ia64_unw_accessors
,
2920 &ia64_unw_rse_accessors
,
2923 #endif /* HAVE_LIBUNWIND_IA64_H */
2925 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2926 gdbarch_extract_return_value? GCC_P is true if compiled with gcc and TYPE
2927 is the type (which is known to be struct, union or array). */
2929 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2931 struct type
*float_elt_type
;
2933 /* HFAs are structures (or arrays) consisting entirely of floating
2934 point values of the same length. Up to 8 of these are returned
2935 in registers. Don't use the struct convention when this is the
2937 float_elt_type
= is_float_or_hfa_type (type
);
2938 if (float_elt_type
!= NULL
2939 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2942 /* Other structs of length 32 or less are returned in r8-r11.
2943 Don't use the struct convention for those either. */
2944 return TYPE_LENGTH (type
) > 32;
2948 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2951 struct type
*float_elt_type
;
2953 float_elt_type
= is_float_or_hfa_type (type
);
2954 if (float_elt_type
!= NULL
)
2956 char from
[MAX_REGISTER_SIZE
];
2958 int regnum
= IA64_FR8_REGNUM
;
2959 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2963 regcache_cooked_read (regcache
, regnum
, from
);
2964 convert_typed_floating (from
, builtin_type_ia64_ext
,
2965 (char *)valbuf
+ offset
, float_elt_type
);
2966 offset
+= TYPE_LENGTH (float_elt_type
);
2974 int regnum
= IA64_GR8_REGNUM
;
2975 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2977 int n
= TYPE_LENGTH (type
) / reglen
;
2978 int m
= TYPE_LENGTH (type
) % reglen
;
2983 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2984 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2991 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2992 memcpy ((char *)valbuf
+ offset
, &val
, m
);
2999 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3001 switch (TYPE_CODE (t
))
3005 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3012 case TYPE_CODE_ARRAY
:
3014 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3017 case TYPE_CODE_STRUCT
:
3021 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3022 if (!is_float_or_hfa_type_recurse
3023 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3034 /* Determine if the given type is one of the floating point types or
3035 and HFA (which is a struct, array, or combination thereof whose
3036 bottom-most elements are all of the same floating point type). */
3038 static struct type
*
3039 is_float_or_hfa_type (struct type
*t
)
3041 struct type
*et
= 0;
3043 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3047 /* Return 1 if the alignment of T is such that the next even slot
3048 should be used. Return 0, if the next available slot should
3049 be used. (See section 8.5.1 of the IA-64 Software Conventions
3050 and Runtime manual). */
3053 slot_alignment_is_next_even (struct type
*t
)
3055 switch (TYPE_CODE (t
))
3059 if (TYPE_LENGTH (t
) > 8)
3063 case TYPE_CODE_ARRAY
:
3065 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3066 case TYPE_CODE_STRUCT
:
3070 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3071 if (slot_alignment_is_next_even
3072 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3081 /* Attempt to find (and return) the global pointer for the given
3084 This is a rather nasty bit of code searchs for the .dynamic section
3085 in the objfile corresponding to the pc of the function we're trying
3086 to call. Once it finds the addresses at which the .dynamic section
3087 lives in the child process, it scans the Elf64_Dyn entries for a
3088 DT_PLTGOT tag. If it finds one of these, the corresponding
3089 d_un.d_ptr value is the global pointer. */
3092 ia64_find_global_pointer (CORE_ADDR faddr
)
3094 struct obj_section
*faddr_sect
;
3096 faddr_sect
= find_pc_section (faddr
);
3097 if (faddr_sect
!= NULL
)
3099 struct obj_section
*osect
;
3101 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3103 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3107 if (osect
< faddr_sect
->objfile
->sections_end
)
3112 while (addr
< osect
->endaddr
)
3118 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3121 tag
= extract_signed_integer (buf
, sizeof (buf
));
3123 if (tag
== DT_PLTGOT
)
3125 CORE_ADDR global_pointer
;
3127 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3130 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3133 return global_pointer
;
3146 /* Given a function's address, attempt to find (and return) the
3147 corresponding (canonical) function descriptor. Return 0 if
3150 find_extant_func_descr (CORE_ADDR faddr
)
3152 struct obj_section
*faddr_sect
;
3154 /* Return early if faddr is already a function descriptor. */
3155 faddr_sect
= find_pc_section (faddr
);
3156 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3159 if (faddr_sect
!= NULL
)
3161 struct obj_section
*osect
;
3162 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3164 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3168 if (osect
< faddr_sect
->objfile
->sections_end
)
3173 while (addr
< osect
->endaddr
)
3179 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3182 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3184 if (faddr
== faddr2
)
3194 /* Attempt to find a function descriptor corresponding to the
3195 given address. If none is found, construct one on the
3196 stack using the address at fdaptr. */
3199 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3203 fdesc
= find_extant_func_descr (faddr
);
3207 ULONGEST global_pointer
;
3213 global_pointer
= ia64_find_global_pointer (faddr
);
3215 if (global_pointer
== 0)
3216 regcache_cooked_read_unsigned (regcache
,
3217 IA64_GR1_REGNUM
, &global_pointer
);
3219 store_unsigned_integer (buf
, 8, faddr
);
3220 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3222 write_memory (fdesc
, buf
, 16);
3228 /* Use the following routine when printing out function pointers
3229 so the user can see the function address rather than just the
3230 function descriptor. */
3232 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3233 struct target_ops
*targ
)
3235 struct obj_section
*s
;
3237 s
= find_pc_section (addr
);
3239 /* check if ADDR points to a function descriptor. */
3240 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3241 return read_memory_unsigned_integer (addr
, 8);
3243 /* There are also descriptors embedded in vtables. */
3246 struct minimal_symbol
*minsym
;
3248 minsym
= lookup_minimal_symbol_by_pc (addr
);
3250 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3251 return read_memory_unsigned_integer (addr
, 8);
3258 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3264 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3265 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3266 int nargs
, struct value
**args
, CORE_ADDR sp
,
3267 int struct_return
, CORE_ADDR struct_addr
)
3273 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3275 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3276 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3277 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3281 /* Count the number of slots needed for the arguments. */
3282 for (argno
= 0; argno
< nargs
; argno
++)
3285 type
= check_typedef (value_type (arg
));
3286 len
= TYPE_LENGTH (type
);
3288 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3291 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3294 nslots
+= (len
+ 7) / 8;
3297 /* Divvy up the slots between the RSE and the memory stack. */
3298 rseslots
= (nslots
> 8) ? 8 : nslots
;
3299 memslots
= nslots
- rseslots
;
3301 /* Allocate a new RSE frame. */
3302 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3304 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3305 new_bsp
= rse_address_add (bsp
, rseslots
);
3306 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3308 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3309 pfs
&= 0xc000000000000000LL
;
3310 pfs
|= (cfm
& 0xffffffffffffLL
);
3311 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3313 cfm
&= 0xc000000000000000LL
;
3315 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3317 /* We will attempt to find function descriptors in the .opd segment,
3318 but if we can't we'll construct them ourselves. That being the
3319 case, we'll need to reserve space on the stack for them. */
3320 funcdescaddr
= sp
- nfuncargs
* 16;
3321 funcdescaddr
&= ~0xfLL
;
3323 /* Adjust the stack pointer to it's new value. The calling conventions
3324 require us to have 16 bytes of scratch, plus whatever space is
3325 necessary for the memory slots and our function descriptors. */
3326 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3327 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3329 /* Place the arguments where they belong. The arguments will be
3330 either placed in the RSE backing store or on the memory stack.
3331 In addition, floating point arguments or HFAs are placed in
3332 floating point registers. */
3334 floatreg
= IA64_FR8_REGNUM
;
3335 for (argno
= 0; argno
< nargs
; argno
++)
3337 struct type
*float_elt_type
;
3340 type
= check_typedef (value_type (arg
));
3341 len
= TYPE_LENGTH (type
);
3343 /* Special handling for function parameters. */
3345 && TYPE_CODE (type
) == TYPE_CODE_PTR
3346 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3349 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
), 8);
3350 store_unsigned_integer (val_buf
, 8,
3351 find_func_descr (regcache
, faddr
,
3353 if (slotnum
< rseslots
)
3354 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3356 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3363 /* Skip odd slot if necessary... */
3364 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3372 memset (val_buf
, 0, 8);
3373 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3375 if (slotnum
< rseslots
)
3376 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3378 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3385 /* Handle floating point types (including HFAs). */
3386 float_elt_type
= is_float_or_hfa_type (type
);
3387 if (float_elt_type
!= NULL
)
3390 len
= TYPE_LENGTH (type
);
3391 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3393 char to
[MAX_REGISTER_SIZE
];
3394 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3395 to
, builtin_type_ia64_ext
);
3396 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3398 argoffset
+= TYPE_LENGTH (float_elt_type
);
3399 len
-= TYPE_LENGTH (float_elt_type
);
3404 /* Store the struct return value in r8 if necessary. */
3407 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3410 global_pointer
= ia64_find_global_pointer (func_addr
);
3412 if (global_pointer
!= 0)
3413 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3415 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3417 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3422 static struct frame_id
3423 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3428 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3429 sp
= extract_unsigned_integer (buf
, 8);
3431 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3432 bsp
= extract_unsigned_integer (buf
, 8);
3434 if (gdbarch_debug
>= 1)
3435 fprintf_unfiltered (gdb_stdlog
,
3436 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3437 paddr_nz (frame_pc_unwind (next_frame
)),
3438 paddr_nz (sp
), paddr_nz (bsp
));
3440 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3444 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3447 CORE_ADDR ip
, psr
, pc
;
3449 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3450 ip
= extract_unsigned_integer (buf
, 8);
3451 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3452 psr
= extract_unsigned_integer (buf
, 8);
3454 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3459 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3460 const gdb_byte
*valbuf
)
3462 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3464 char to
[MAX_REGISTER_SIZE
];
3465 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3466 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3467 target_store_registers (regcache
, IA64_FR8_REGNUM
);
3470 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3474 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3476 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3477 return print_insn_ia64 (memaddr
, info
);
3480 static struct gdbarch
*
3481 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3483 struct gdbarch
*gdbarch
;
3484 struct gdbarch_tdep
*tdep
;
3486 /* If there is already a candidate, use it. */
3487 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3489 return arches
->gdbarch
;
3491 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3492 gdbarch
= gdbarch_alloc (&info
, tdep
);
3494 tdep
->sigcontext_register_address
= 0;
3495 tdep
->pc_in_sigtramp
= 0;
3497 /* Define the ia64 floating-point format to gdb. */
3498 builtin_type_ia64_ext
=
3499 init_type (TYPE_CODE_FLT
, 128 / 8,
3500 0, "builtin_type_ia64_ext", NULL
);
3501 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3503 /* According to the ia64 specs, instructions that store long double
3504 floats in memory use a long-double format different than that
3505 used in the floating registers. The memory format matches the
3506 x86 extended float format which is 80 bits. An OS may choose to
3507 use this format (e.g. GNU/Linux) or choose to use a different
3508 format for storing long doubles (e.g. HPUX). In the latter case,
3509 the setting of the format may be moved/overridden in an
3510 OS-specific tdep file. */
3511 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3513 set_gdbarch_short_bit (gdbarch
, 16);
3514 set_gdbarch_int_bit (gdbarch
, 32);
3515 set_gdbarch_long_bit (gdbarch
, 64);
3516 set_gdbarch_long_long_bit (gdbarch
, 64);
3517 set_gdbarch_float_bit (gdbarch
, 32);
3518 set_gdbarch_double_bit (gdbarch
, 64);
3519 set_gdbarch_long_double_bit (gdbarch
, 128);
3520 set_gdbarch_ptr_bit (gdbarch
, 64);
3522 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3523 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3524 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3525 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3527 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3528 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3530 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3531 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3532 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3533 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3534 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3535 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3536 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3538 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3540 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3541 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3543 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3545 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3546 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3547 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3548 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3549 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3551 /* Settings for calling functions in the inferior. */
3552 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3553 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3554 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3556 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3557 #ifdef HAVE_LIBUNWIND_IA64_H
3558 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3559 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3560 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3562 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3564 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3565 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3567 /* Settings that should be unnecessary. */
3568 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3570 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3571 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3573 /* The virtual table contains 16-byte descriptors, not pointers to
3575 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3577 /* Hook in ABI-specific overrides, if they have been registered. */
3578 gdbarch_init_osabi (info
, gdbarch
);
3583 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3586 _initialize_ia64_tdep (void)
3588 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);