1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
277 #define SIGCONTEXT_REGISTER_ADDRESS \
278 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
281 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
282 struct reggroup
*group
)
287 if (group
== all_reggroup
)
289 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
290 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
291 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
292 if (group
== float_reggroup
)
294 if (group
== vector_reggroup
)
296 if (group
== general_reggroup
)
297 return (!vector_p
&& !float_p
);
298 if (group
== save_reggroup
|| group
== restore_reggroup
)
304 ia64_register_name (int reg
)
306 return ia64_register_names
[reg
];
310 ia64_register_type (struct gdbarch
*arch
, int reg
)
312 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
313 return builtin_type_ia64_ext
;
315 return builtin_type_long
;
319 ia64_dwarf_reg_to_regnum (int reg
)
321 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
322 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
327 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
332 const struct floatformat floatformat_ia64_ext
=
334 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
335 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
338 const struct floatformat
*floatformats_ia64_ext
[2] =
340 &floatformat_ia64_ext
,
341 &floatformat_ia64_ext
345 /* Extract ``len'' bits from an instruction bundle starting at
349 extract_bit_field (char *bundle
, int from
, int len
)
351 long long result
= 0LL;
353 int from_byte
= from
/ 8;
354 int to_byte
= to
/ 8;
355 unsigned char *b
= (unsigned char *) bundle
;
361 if (from_byte
== to_byte
)
362 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
363 result
= c
>> (from
% 8);
364 lshift
= 8 - (from
% 8);
366 for (i
= from_byte
+1; i
< to_byte
; i
++)
368 result
|= ((long long) b
[i
]) << lshift
;
372 if (from_byte
< to_byte
&& (to
% 8 != 0))
375 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
376 result
|= ((long long) c
) << lshift
;
382 /* Replace the specified bits in an instruction bundle */
385 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
388 int from_byte
= from
/ 8;
389 int to_byte
= to
/ 8;
390 unsigned char *b
= (unsigned char *) bundle
;
393 if (from_byte
== to_byte
)
395 unsigned char left
, right
;
397 left
= (c
>> (to
% 8)) << (to
% 8);
398 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
399 c
= (unsigned char) (val
& 0xff);
400 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
408 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
409 c
= c
| (val
<< (from
% 8));
411 val
>>= 8 - from
% 8;
413 for (i
= from_byte
+1; i
< to_byte
; i
++)
422 unsigned char cv
= (unsigned char) val
;
424 c
= c
>> (to
% 8) << (to
% 8);
425 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
431 /* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
435 slotN_contents (char *bundle
, int slotnum
)
437 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
440 /* Store an instruction in an instruction bundle */
443 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
445 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
448 static enum instruction_type template_encoding_table
[32][3] =
450 { M
, I
, I
}, /* 00 */
451 { M
, I
, I
}, /* 01 */
452 { M
, I
, I
}, /* 02 */
453 { M
, I
, I
}, /* 03 */
454 { M
, L
, X
}, /* 04 */
455 { M
, L
, X
}, /* 05 */
456 { undefined
, undefined
, undefined
}, /* 06 */
457 { undefined
, undefined
, undefined
}, /* 07 */
458 { M
, M
, I
}, /* 08 */
459 { M
, M
, I
}, /* 09 */
460 { M
, M
, I
}, /* 0A */
461 { M
, M
, I
}, /* 0B */
462 { M
, F
, I
}, /* 0C */
463 { M
, F
, I
}, /* 0D */
464 { M
, M
, F
}, /* 0E */
465 { M
, M
, F
}, /* 0F */
466 { M
, I
, B
}, /* 10 */
467 { M
, I
, B
}, /* 11 */
468 { M
, B
, B
}, /* 12 */
469 { M
, B
, B
}, /* 13 */
470 { undefined
, undefined
, undefined
}, /* 14 */
471 { undefined
, undefined
, undefined
}, /* 15 */
472 { B
, B
, B
}, /* 16 */
473 { B
, B
, B
}, /* 17 */
474 { M
, M
, B
}, /* 18 */
475 { M
, M
, B
}, /* 19 */
476 { undefined
, undefined
, undefined
}, /* 1A */
477 { undefined
, undefined
, undefined
}, /* 1B */
478 { M
, F
, B
}, /* 1C */
479 { M
, F
, B
}, /* 1D */
480 { undefined
, undefined
, undefined
}, /* 1E */
481 { undefined
, undefined
, undefined
}, /* 1F */
484 /* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
488 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
490 char bundle
[BUNDLE_LEN
];
491 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
495 /* Warn about slot numbers greater than 2. We used to generate
496 an error here on the assumption that the user entered an invalid
497 address. But, sometimes GDB itself requests an invalid address.
498 This can (easily) happen when execution stops in a function for
499 which there are no symbols. The prologue scanner will attempt to
500 find the beginning of the function - if the nearest symbol
501 happens to not be aligned on a bundle boundary (16 bytes), the
502 resulting starting address will cause GDB to think that the slot
505 So we warn about it and set the slot number to zero. It is
506 not necessarily a fatal condition, particularly if debugging
507 at the assembly language level. */
510 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
511 "Using slot 0 instead"));
517 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
522 *instr
= slotN_contents (bundle
, slotnum
);
523 template = extract_bit_field (bundle
, 0, 5);
524 *it
= template_encoding_table
[(int)template][slotnum
];
526 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
529 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
534 /* There are 5 different break instructions (break.i, break.b,
535 break.m, break.f, and break.x), but they all have the same
536 encoding. (The five bit template in the low five bits of the
537 instruction bundle distinguishes one from another.)
539 The runtime architecture manual specifies that break instructions
540 used for debugging purposes must have the upper two bits of the 21
541 bit immediate set to a 0 and a 1 respectively. A breakpoint
542 instruction encodes the most significant bit of its 21 bit
543 immediate at bit 36 of the 41 bit instruction. The penultimate msb
544 is at bit 25 which leads to the pattern below.
546 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
547 it turns out that 0x80000 was used as the syscall break in the early
548 simulators. So I changed the pattern slightly to do "break.i 0x080001"
549 instead. But that didn't work either (I later found out that this
550 pattern was used by the simulator that I was using.) So I ended up
551 using the pattern seen below. */
554 #define IA64_BREAKPOINT 0x00002000040LL
556 #define IA64_BREAKPOINT 0x00003333300LL
559 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
561 CORE_ADDR addr
= bp_tgt
->placed_address
;
562 char bundle
[BUNDLE_LEN
];
563 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
569 error (_("Can't insert breakpoint for slot numbers greater than 2."));
573 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
575 /* Check for L type instruction in 2nd slot, if present then
576 bump up the slot number to the 3rd slot */
577 template = extract_bit_field (bundle
, 0, 5);
578 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
583 instr
= slotN_contents (bundle
, slotnum
);
584 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
585 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
586 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
588 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
594 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
596 CORE_ADDR addr
= bp_tgt
->placed_address
;
597 char bundle
[BUNDLE_LEN
];
598 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
605 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
607 /* Check for L type instruction in 2nd slot, if present then
608 bump up the slot number to the 3rd slot */
609 template = extract_bit_field (bundle
, 0, 5);
610 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
615 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
616 replace_slotN_contents (bundle
, instr
, slotnum
);
618 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
623 /* We don't really want to use this, but remote.c needs to call it in order
624 to figure out if Z-packets are supported or not. Oh, well. */
625 const unsigned char *
626 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
628 static unsigned char breakpoint
[] =
629 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
630 *lenptr
= sizeof (breakpoint
);
638 ia64_read_pc (struct regcache
*regcache
)
640 ULONGEST psr_value
, pc_value
;
643 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
644 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
645 slot_num
= (psr_value
>> 41) & 3;
647 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
651 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
653 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
656 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
657 psr_value
&= ~(3LL << 41);
658 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
662 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
663 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
666 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
668 /* Returns the address of the slot that's NSLOTS slots away from
669 the address ADDR. NSLOTS may be positive or negative. */
671 rse_address_add(CORE_ADDR addr
, int nslots
)
674 int mandatory_nat_slots
= nslots
/ 63;
675 int direction
= nslots
< 0 ? -1 : 1;
677 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
679 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
680 new_addr
+= 8 * direction
;
682 if (IS_NaT_COLLECTION_ADDR(new_addr
))
683 new_addr
+= 8 * direction
;
689 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
690 int regnum
, gdb_byte
*buf
)
692 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
694 #ifdef HAVE_LIBUNWIND_IA64_H
695 /* First try and use the libunwind special reg accessor, otherwise fallback to
697 if (!libunwind_is_initialized ()
698 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
701 /* The fallback position is to assume that r32-r127 are found sequentially
702 in memory starting at $bof. This isn't always true, but without libunwind,
703 this is the best we can do. */
707 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
708 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
710 /* The bsp points at the end of the register frame so we
711 subtract the size of frame from it to get start of register frame. */
712 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
714 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
716 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
717 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
718 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
721 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
724 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
728 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
729 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
730 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
732 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
734 ULONGEST natN_val
= 0;
737 CORE_ADDR gr_addr
= 0;
738 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
739 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
741 /* The bsp points at the end of the register frame so we
742 subtract the size of frame from it to get start of register frame. */
743 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
745 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
746 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
750 /* Compute address of nat collection bits. */
751 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
752 CORE_ADDR nat_collection
;
754 /* If our nat collection address is bigger than bsp, we have to get
755 the nat collection from rnat. Otherwise, we fetch the nat
756 collection from the computed address. */
758 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
760 nat_collection
= read_memory_integer (nat_addr
, 8);
761 nat_bit
= (gr_addr
>> 3) & 0x3f;
762 natN_val
= (nat_collection
>> nat_bit
) & 1;
765 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
767 else if (regnum
== VBOF_REGNUM
)
769 /* A virtual register frame start is provided for user convenience.
770 It can be calculated as the bsp - sof (sizeof frame). */
774 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
775 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
777 /* The bsp points at the end of the register frame so we
778 subtract the size of frame from it to get beginning of frame. */
779 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
780 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
782 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
788 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
789 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
791 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
793 /* Fetch predicate register rename base from current frame
794 marker for this frame. */
795 int rrb_pr
= (cfm
>> 32) & 0x3f;
797 /* Adjust the register number to account for register rotation. */
799 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
801 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
802 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
805 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
809 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
810 int regnum
, const gdb_byte
*buf
)
812 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
817 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
818 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
820 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
822 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
824 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
825 write_memory (reg_addr
, (void *)buf
, 8);
828 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
830 ULONGEST unatN_val
, unat
, unatN_mask
;
831 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
832 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
833 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
836 else if (unatN_val
== 1)
838 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
840 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
845 CORE_ADDR gr_addr
= 0;
846 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
847 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
849 /* The bsp points at the end of the register frame so we
850 subtract the size of frame from it to get start of register frame. */
851 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
853 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
854 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
856 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
858 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
860 /* Compute address of nat collection bits. */
861 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
862 CORE_ADDR nat_collection
;
863 int natN_bit
= (gr_addr
>> 3) & 0x3f;
864 ULONGEST natN_mask
= (1LL << natN_bit
);
865 /* If our nat collection address is bigger than bsp, we have to get
866 the nat collection from rnat. Otherwise, we fetch the nat
867 collection from the computed address. */
870 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
872 nat_collection
|= natN_mask
;
874 nat_collection
&= ~natN_mask
;
875 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
880 nat_collection
= read_memory_integer (nat_addr
, 8);
882 nat_collection
|= natN_mask
;
884 nat_collection
&= ~natN_mask
;
885 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
886 write_memory (nat_addr
, nat_buf
, 8);
890 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
897 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
898 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
900 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
902 /* Fetch predicate register rename base from current frame
903 marker for this frame. */
904 int rrb_pr
= (cfm
>> 32) & 0x3f;
906 /* Adjust the register number to account for register rotation. */
908 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
910 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
911 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
914 else if (prN_val
== 1)
916 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
920 /* The ia64 needs to convert between various ieee floating-point formats
921 and the special ia64 floating point register format. */
924 ia64_convert_register_p (int regno
, struct type
*type
)
926 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
930 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
931 struct type
*valtype
, gdb_byte
*out
)
933 char in
[MAX_REGISTER_SIZE
];
934 frame_register_read (frame
, regnum
, in
);
935 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
939 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
940 struct type
*valtype
, const gdb_byte
*in
)
942 char out
[MAX_REGISTER_SIZE
];
943 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
944 put_frame_register (frame
, regnum
, out
);
948 /* Limit the number of skipped non-prologue instructions since examining
949 of the prologue is expensive. */
950 static int max_skip_non_prologue_insns
= 40;
952 /* Given PC representing the starting address of a function, and
953 LIM_PC which is the (sloppy) limit to which to scan when looking
954 for a prologue, attempt to further refine this limit by using
955 the line data in the symbol table. If successful, a better guess
956 on where the prologue ends is returned, otherwise the previous
957 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
958 which will be set to indicate whether the returned limit may be
959 used with no further scanning in the event that the function is
962 /* FIXME: cagney/2004-02-14: This function and logic have largely been
963 superseded by skip_prologue_using_sal. */
966 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
968 struct symtab_and_line prologue_sal
;
969 CORE_ADDR start_pc
= pc
;
972 /* The prologue can not possibly go past the function end itself,
973 so we can already adjust LIM_PC accordingly. */
974 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
977 /* Start off not trusting the limit. */
980 prologue_sal
= find_pc_line (pc
, 0);
981 if (prologue_sal
.line
!= 0)
984 CORE_ADDR addr
= prologue_sal
.end
;
986 /* Handle the case in which compiler's optimizer/scheduler
987 has moved instructions into the prologue. We scan ahead
988 in the function looking for address ranges whose corresponding
989 line number is less than or equal to the first one that we
990 found for the function. (It can be less than when the
991 scheduler puts a body instruction before the first prologue
993 for (i
= 2 * max_skip_non_prologue_insns
;
994 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
997 struct symtab_and_line sal
;
999 sal
= find_pc_line (addr
, 0);
1002 if (sal
.line
<= prologue_sal
.line
1003 && sal
.symtab
== prologue_sal
.symtab
)
1010 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1012 lim_pc
= prologue_sal
.end
;
1013 if (start_pc
== get_pc_function_start (lim_pc
))
1020 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1021 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1022 || (14 <= (_regnum_) && (_regnum_) <= 31))
1023 #define imm9(_instr_) \
1024 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1025 | (((_instr_) & 0x00008000000LL) >> 20) \
1026 | (((_instr_) & 0x00000001fc0LL) >> 6))
1028 /* Allocate and initialize a frame cache. */
1030 static struct ia64_frame_cache
*
1031 ia64_alloc_frame_cache (void)
1033 struct ia64_frame_cache
*cache
;
1036 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1042 cache
->prev_cfm
= 0;
1048 cache
->frameless
= 1;
1050 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1051 cache
->saved_regs
[i
] = 0;
1057 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1060 CORE_ADDR last_prologue_pc
= pc
;
1061 instruction_type it
;
1066 int unat_save_reg
= 0;
1067 int pr_save_reg
= 0;
1068 int mem_stack_frame_size
= 0;
1070 CORE_ADDR spill_addr
= 0;
1073 char reg_contents
[256];
1079 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1081 memset (instores
, 0, sizeof instores
);
1082 memset (infpstores
, 0, sizeof infpstores
);
1083 memset (reg_contents
, 0, sizeof reg_contents
);
1085 if (cache
->after_prologue
!= 0
1086 && cache
->after_prologue
<= lim_pc
)
1087 return cache
->after_prologue
;
1089 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1090 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1092 /* We want to check if we have a recognizable function start before we
1093 look ahead for a prologue. */
1094 if (pc
< lim_pc
&& next_pc
1095 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1097 /* alloc - start of a regular function. */
1098 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1099 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1100 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1101 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1103 /* Verify that the current cfm matches what we think is the
1104 function start. If we have somehow jumped within a function,
1105 we do not want to interpret the prologue and calculate the
1106 addresses of various registers such as the return address.
1107 We will instead treat the frame as frameless. */
1109 (sof
== (cache
->cfm
& 0x7f) &&
1110 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1114 last_prologue_pc
= next_pc
;
1119 /* Look for a leaf routine. */
1120 if (pc
< lim_pc
&& next_pc
1121 && (it
== I
|| it
== M
)
1122 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1124 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1125 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1126 | ((instr
& 0x001f8000000LL
) >> 20)
1127 | ((instr
& 0x000000fe000LL
) >> 13));
1128 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1129 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1130 int qp
= (int) (instr
& 0x0000000003fLL
);
1131 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1133 /* mov r2, r12 - beginning of leaf routine */
1135 last_prologue_pc
= next_pc
;
1139 /* If we don't recognize a regular function or leaf routine, we are
1145 last_prologue_pc
= lim_pc
;
1149 /* Loop, looking for prologue instructions, keeping track of
1150 where preserved registers were spilled. */
1153 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1157 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1159 /* Exit loop upon hitting a non-nop branch instruction. */
1164 else if (((instr
& 0x3fLL
) != 0LL) &&
1165 (frameless
|| ret_reg
!= 0))
1167 /* Exit loop upon hitting a predicated instruction if
1168 we already have the return register or if we are frameless. */
1173 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1176 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1177 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1178 int qp
= (int) (instr
& 0x0000000003f);
1180 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1183 last_prologue_pc
= next_pc
;
1186 else if ((it
== I
|| it
== M
)
1187 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1189 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1190 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1191 | ((instr
& 0x001f8000000LL
) >> 20)
1192 | ((instr
& 0x000000fe000LL
) >> 13));
1193 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1194 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1195 int qp
= (int) (instr
& 0x0000000003fLL
);
1197 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1201 last_prologue_pc
= next_pc
;
1203 else if (qp
== 0 && rN
== 12 && rM
== 12)
1205 /* adds r12, -mem_stack_frame_size, r12 */
1206 mem_stack_frame_size
-= imm
;
1207 last_prologue_pc
= next_pc
;
1209 else if (qp
== 0 && rN
== 2
1210 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1212 char buf
[MAX_REGISTER_SIZE
];
1213 CORE_ADDR saved_sp
= 0;
1214 /* adds r2, spilloffset, rFramePointer
1216 adds r2, spilloffset, r12
1218 Get ready for stf.spill or st8.spill instructions.
1219 The address to start spilling at is loaded into r2.
1220 FIXME: Why r2? That's what gcc currently uses; it
1221 could well be different for other compilers. */
1223 /* Hmm... whether or not this will work will depend on
1224 where the pc is. If it's still early in the prologue
1225 this'll be wrong. FIXME */
1228 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1229 saved_sp
= extract_unsigned_integer (buf
, 8);
1231 spill_addr
= saved_sp
1232 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1235 last_prologue_pc
= next_pc
;
1237 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1238 rN
< 256 && imm
== 0)
1240 /* mov rN, rM where rM is an input register */
1241 reg_contents
[rN
] = rM
;
1242 last_prologue_pc
= next_pc
;
1244 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1248 last_prologue_pc
= next_pc
;
1253 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1254 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1256 /* stf.spill [rN] = fM, imm9
1258 stf.spill [rN] = fM */
1260 int imm
= imm9(instr
);
1261 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1262 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1263 int qp
= (int) (instr
& 0x0000000003fLL
);
1264 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1265 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1267 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1269 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1272 spill_addr
= 0; /* last one; must be done */
1273 last_prologue_pc
= next_pc
;
1276 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1277 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1283 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1284 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1285 int qp
= (int) (instr
& 0x0000000003fLL
);
1286 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1288 /* We have something like "mov.m r3 = ar.unat". Remember the
1289 r3 (or whatever) and watch for a store of this register... */
1291 last_prologue_pc
= next_pc
;
1294 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1297 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1298 int qp
= (int) (instr
& 0x0000000003fLL
);
1299 if (qp
== 0 && isScratch (rN
))
1302 last_prologue_pc
= next_pc
;
1306 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1307 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1311 st8 [rN] = rM, imm9 */
1312 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1313 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1314 int qp
= (int) (instr
& 0x0000000003fLL
);
1315 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1316 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1317 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1319 /* We've found a spill of either the UNAT register or the PR
1320 register. (Well, not exactly; what we've actually found is
1321 a spill of the register that UNAT or PR was moved to).
1322 Record that fact and move on... */
1323 if (rM
== unat_save_reg
)
1325 /* Track UNAT register */
1326 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1331 /* Track PR register */
1332 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1335 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1336 /* st8 [rN] = rM, imm9 */
1337 spill_addr
+= imm9(instr
);
1339 spill_addr
= 0; /* must be done spilling */
1340 last_prologue_pc
= next_pc
;
1342 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1344 /* Allow up to one store of each input register. */
1345 instores
[rM
-32] = 1;
1346 last_prologue_pc
= next_pc
;
1348 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1349 !instores
[indirect
-32])
1351 /* Allow an indirect store of an input register. */
1352 instores
[indirect
-32] = 1;
1353 last_prologue_pc
= next_pc
;
1356 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1363 Note that the st8 case is handled in the clause above.
1365 Advance over stores of input registers. One store per input
1366 register is permitted. */
1367 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1368 int qp
= (int) (instr
& 0x0000000003fLL
);
1369 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1370 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1372 instores
[rM
-32] = 1;
1373 last_prologue_pc
= next_pc
;
1375 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1376 !instores
[indirect
-32])
1378 /* Allow an indirect store of an input register. */
1379 instores
[indirect
-32] = 1;
1380 last_prologue_pc
= next_pc
;
1383 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1390 Advance over stores of floating point input registers. Again
1391 one store per register is permitted */
1392 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1393 int qp
= (int) (instr
& 0x0000000003fLL
);
1394 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1396 infpstores
[fM
-8] = 1;
1397 last_prologue_pc
= next_pc
;
1401 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1402 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1404 /* st8.spill [rN] = rM
1406 st8.spill [rN] = rM, imm9 */
1407 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1408 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1409 int qp
= (int) (instr
& 0x0000000003fLL
);
1410 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1412 /* We've found a spill of one of the preserved general purpose
1413 regs. Record the spill address and advance the spill
1414 register if appropriate. */
1415 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1416 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1417 /* st8.spill [rN] = rM, imm9 */
1418 spill_addr
+= imm9(instr
);
1420 spill_addr
= 0; /* Done spilling */
1421 last_prologue_pc
= next_pc
;
1428 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1429 registers for the previous frame which will be needed later. */
1431 if (!frameless
&& next_frame
)
1433 /* Extract the size of the rotating portion of the stack
1434 frame and the register rename base from the current
1440 rrb_gr
= (cfm
>> 18) & 0x7f;
1442 /* Find the bof (beginning of frame). */
1443 bof
= rse_address_add (cache
->bsp
, -sof
);
1445 for (i
= 0, addr
= bof
;
1449 if (IS_NaT_COLLECTION_ADDR (addr
))
1453 if (i
+32 == cfm_reg
)
1454 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1455 if (i
+32 == ret_reg
)
1456 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1458 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1461 /* For the previous argument registers we require the previous bof.
1462 If we can't find the previous cfm, then we can do nothing. */
1464 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1466 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1468 else if (cfm_reg
!= 0)
1470 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1471 cfm
= extract_unsigned_integer (buf
, 8);
1473 cache
->prev_cfm
= cfm
;
1477 sor
= ((cfm
>> 14) & 0xf) * 8;
1479 sol
= (cfm
>> 7) & 0x7f;
1480 rrb_gr
= (cfm
>> 18) & 0x7f;
1482 /* The previous bof only requires subtraction of the sol (size of locals)
1483 due to the overlap between output and input of subsequent frames. */
1484 bof
= rse_address_add (bof
, -sol
);
1486 for (i
= 0, addr
= bof
;
1490 if (IS_NaT_COLLECTION_ADDR (addr
))
1495 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1498 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1504 /* Try and trust the lim_pc value whenever possible. */
1505 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1506 last_prologue_pc
= lim_pc
;
1508 cache
->frameless
= frameless
;
1509 cache
->after_prologue
= last_prologue_pc
;
1510 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1511 cache
->fp_reg
= fp_reg
;
1513 return last_prologue_pc
;
1517 ia64_skip_prologue (CORE_ADDR pc
)
1519 struct ia64_frame_cache cache
;
1521 cache
.after_prologue
= 0;
1525 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1526 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1530 /* Normal frames. */
1532 static struct ia64_frame_cache
*
1533 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1535 struct ia64_frame_cache
*cache
;
1537 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1543 cache
= ia64_alloc_frame_cache ();
1544 *this_cache
= cache
;
1546 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1547 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1549 /* We always want the bsp to point to the end of frame.
1550 This way, we can always get the beginning of frame (bof)
1551 by subtracting frame size. */
1552 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1553 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1555 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1556 psr
= extract_unsigned_integer (buf
, 8);
1558 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1559 cfm
= extract_unsigned_integer (buf
, 8);
1561 cache
->sof
= (cfm
& 0x7f);
1562 cache
->sol
= (cfm
>> 7) & 0x7f;
1563 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1567 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1570 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1572 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1578 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1579 struct frame_id
*this_id
)
1581 struct ia64_frame_cache
*cache
=
1582 ia64_frame_cache (next_frame
, this_cache
);
1584 /* If outermost frame, mark with null frame id. */
1585 if (cache
->base
== 0)
1586 (*this_id
) = null_frame_id
;
1588 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1589 if (gdbarch_debug
>= 1)
1590 fprintf_unfiltered (gdb_stdlog
,
1591 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1592 paddr_nz (this_id
->code_addr
),
1593 paddr_nz (this_id
->stack_addr
),
1594 paddr_nz (cache
->bsp
), next_frame
);
1598 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1599 int regnum
, int *optimizedp
,
1600 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1601 int *realnump
, gdb_byte
*valuep
)
1603 struct ia64_frame_cache
*cache
=
1604 ia64_frame_cache (next_frame
, this_cache
);
1605 char dummy_valp
[MAX_REGISTER_SIZE
];
1608 gdb_assert (regnum
>= 0);
1610 if (!target_has_registers
)
1611 error (_("No registers."));
1618 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1619 when valuep is not supplied. */
1621 valuep
= dummy_valp
;
1623 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1625 if (regnum
== gdbarch_sp_regnum (current_gdbarch
))
1627 /* Handle SP values for all frames but the topmost. */
1628 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1631 else if (regnum
== IA64_BSP_REGNUM
)
1633 char cfm_valuep
[MAX_REGISTER_SIZE
];
1636 enum lval_type cfm_lval
;
1638 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1640 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1641 This corresponds to what the hardware bsp register will be if we pop the frame
1642 back which is why we might have been called. We know the beginning of the current
1643 frame is cache->bsp - cache->sof. This value in the previous frame points to
1644 the start of the output registers. We can calculate the end of that frame by adding
1645 the size of output (sof (size of frame) - sol (size of locals)). */
1646 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1647 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1648 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1650 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1651 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1653 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1656 else if (regnum
== IA64_CFM_REGNUM
)
1658 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1662 *lvalp
= lval_memory
;
1664 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1666 else if (cache
->prev_cfm
)
1667 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1668 else if (cache
->frameless
)
1671 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1674 else if (regnum
== IA64_VFP_REGNUM
)
1676 /* If the function in question uses an automatic register (r32-r127)
1677 for the frame pointer, it'll be found by ia64_find_saved_register()
1678 above. If the function lacks one of these frame pointers, we can
1679 still provide a value since we know the size of the frame. */
1680 CORE_ADDR vfp
= cache
->base
;
1681 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1683 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1685 char pr_valuep
[MAX_REGISTER_SIZE
];
1688 enum lval_type pr_lval
;
1691 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1692 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1693 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1695 /* Fetch predicate register rename base from current frame
1696 marker for this frame. */
1697 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1699 /* Adjust the register number to account for register rotation. */
1700 regnum
= VP16_REGNUM
1701 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1703 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1704 regnum
- VP0_REGNUM
, 1);
1705 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1707 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1709 char unat_valuep
[MAX_REGISTER_SIZE
];
1712 enum lval_type unat_lval
;
1713 CORE_ADDR unat_addr
;
1715 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1716 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1717 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1718 regnum
- IA64_NAT0_REGNUM
, 1);
1719 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1722 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1725 /* Find address of general register corresponding to nat bit we're
1729 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1733 /* Compute address of nat collection bits. */
1734 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1736 CORE_ADDR nat_collection
;
1738 /* If our nat collection address is bigger than bsp, we have to get
1739 the nat collection from rnat. Otherwise, we fetch the nat
1740 collection from the computed address. */
1741 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1742 bsp
= extract_unsigned_integer (buf
, 8);
1743 if (nat_addr
>= bsp
)
1745 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1746 nat_collection
= extract_unsigned_integer (buf
, 8);
1749 nat_collection
= read_memory_integer (nat_addr
, 8);
1750 nat_bit
= (gr_addr
>> 3) & 0x3f;
1751 natval
= (nat_collection
>> nat_bit
) & 1;
1754 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1756 else if (regnum
== IA64_IP_REGNUM
)
1759 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1763 *lvalp
= lval_memory
;
1765 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1766 pc
= extract_unsigned_integer (buf
, 8);
1768 else if (cache
->frameless
)
1770 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1771 pc
= extract_unsigned_integer (buf
, 8);
1774 store_unsigned_integer (valuep
, 8, pc
);
1776 else if (regnum
== IA64_PSR_REGNUM
)
1778 /* We don't know how to get the complete previous PSR, but we need it for
1779 the slot information when we unwind the pc (pc is formed of IP register
1780 plus slot information from PSR). To get the previous slot information,
1781 we mask it off the return address. */
1782 ULONGEST slot_num
= 0;
1785 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1787 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1788 psr
= extract_unsigned_integer (buf
, 8);
1792 *lvalp
= lval_memory
;
1794 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1795 pc
= extract_unsigned_integer (buf
, 8);
1797 else if (cache
->frameless
)
1800 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1801 pc
= extract_unsigned_integer (buf
, 8);
1803 psr
&= ~(3LL << 41);
1804 slot_num
= pc
& 0x3LL
;
1805 psr
|= (CORE_ADDR
)slot_num
<< 41;
1806 store_unsigned_integer (valuep
, 8, psr
);
1808 else if (regnum
== IA64_BR0_REGNUM
)
1811 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1814 *lvalp
= lval_memory
;
1816 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1817 br0
= extract_unsigned_integer (buf
, 8);
1819 store_unsigned_integer (valuep
, 8, br0
);
1821 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1822 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1825 if (regnum
>= V32_REGNUM
)
1826 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1827 addr
= cache
->saved_regs
[regnum
];
1830 *lvalp
= lval_memory
;
1832 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1834 else if (cache
->frameless
)
1836 char r_valuep
[MAX_REGISTER_SIZE
];
1839 enum lval_type r_lval
;
1841 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1843 if (regnum
>= V32_REGNUM
)
1844 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1845 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1846 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1847 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1848 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1849 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1850 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1851 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1853 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1854 *lvalp
= lval_memory
;
1856 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1862 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1864 /* Fetch floating point register rename base from current
1865 frame marker for this frame. */
1866 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1868 /* Adjust the floating point register number to account for
1869 register rotation. */
1870 regnum
= IA64_FR32_REGNUM
1871 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1874 /* If we have stored a memory address, access the register. */
1875 addr
= cache
->saved_regs
[regnum
];
1878 *lvalp
= lval_memory
;
1880 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1882 /* Otherwise, punt and get the current value of the register. */
1884 frame_unwind_register (next_frame
, regnum
, valuep
);
1887 if (gdbarch_debug
>= 1)
1888 fprintf_unfiltered (gdb_stdlog
,
1889 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1890 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1891 ? ia64_register_names
[regnum
] : "r??"),
1892 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1895 static const struct frame_unwind ia64_frame_unwind
=
1898 &ia64_frame_this_id
,
1899 &ia64_frame_prev_register
1902 static const struct frame_unwind
*
1903 ia64_frame_sniffer (struct frame_info
*next_frame
)
1905 return &ia64_frame_unwind
;
1908 /* Signal trampolines. */
1911 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1913 if (SIGCONTEXT_REGISTER_ADDRESS
)
1917 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1918 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1919 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1920 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1921 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1922 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1923 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1924 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1925 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1926 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1927 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1928 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1929 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1930 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1931 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1932 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1933 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1934 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1935 cache
->saved_regs
[IA64_LC_REGNUM
] =
1936 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1937 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1938 cache
->saved_regs
[regno
] =
1939 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1940 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1941 cache
->saved_regs
[regno
] =
1942 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1943 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1944 cache
->saved_regs
[regno
] =
1945 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1949 static struct ia64_frame_cache
*
1950 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1952 struct ia64_frame_cache
*cache
;
1960 cache
= ia64_alloc_frame_cache ();
1962 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1963 /* Note that frame size is hard-coded below. We cannot calculate it
1964 via prologue examination. */
1965 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1967 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1968 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1970 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1971 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1972 cache
->sof
= cache
->cfm
& 0x7f;
1974 ia64_sigtramp_frame_init_saved_regs (cache
);
1976 *this_cache
= cache
;
1981 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1982 void **this_cache
, struct frame_id
*this_id
)
1984 struct ia64_frame_cache
*cache
=
1985 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1987 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1988 if (gdbarch_debug
>= 1)
1989 fprintf_unfiltered (gdb_stdlog
,
1990 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1991 paddr_nz (this_id
->code_addr
),
1992 paddr_nz (this_id
->stack_addr
),
1993 paddr_nz (cache
->bsp
), next_frame
);
1997 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1999 int regnum
, int *optimizedp
,
2000 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2001 int *realnump
, gdb_byte
*valuep
)
2003 char dummy_valp
[MAX_REGISTER_SIZE
];
2004 char buf
[MAX_REGISTER_SIZE
];
2006 struct ia64_frame_cache
*cache
=
2007 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2009 gdb_assert (regnum
>= 0);
2011 if (!target_has_registers
)
2012 error (_("No registers."));
2019 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2020 when valuep is not supplied. */
2022 valuep
= dummy_valp
;
2024 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2026 if (regnum
== IA64_IP_REGNUM
)
2029 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2033 *lvalp
= lval_memory
;
2035 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2036 pc
= extract_unsigned_integer (buf
, 8);
2039 store_unsigned_integer (valuep
, 8, pc
);
2041 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2042 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2045 if (regnum
>= V32_REGNUM
)
2046 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2047 addr
= cache
->saved_regs
[regnum
];
2050 *lvalp
= lval_memory
;
2052 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2057 /* All other registers not listed above. */
2058 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2061 *lvalp
= lval_memory
;
2063 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2067 if (gdbarch_debug
>= 1)
2068 fprintf_unfiltered (gdb_stdlog
,
2069 "sigtramp prev register <%s> is 0x%s\n",
2070 (regnum
< IA64_GR32_REGNUM
2071 || (regnum
> IA64_GR127_REGNUM
2072 && regnum
< LAST_PSEUDO_REGNUM
))
2073 ? ia64_register_names
[regnum
]
2074 : (regnum
< LAST_PSEUDO_REGNUM
2075 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2077 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2080 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2083 ia64_sigtramp_frame_this_id
,
2084 ia64_sigtramp_frame_prev_register
2087 static const struct frame_unwind
*
2088 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2090 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
2091 if (tdep
->pc_in_sigtramp
)
2093 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2095 if (tdep
->pc_in_sigtramp (pc
))
2096 return &ia64_sigtramp_frame_unwind
;
2104 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2106 struct ia64_frame_cache
*cache
=
2107 ia64_frame_cache (next_frame
, this_cache
);
2112 static const struct frame_base ia64_frame_base
=
2115 ia64_frame_base_address
,
2116 ia64_frame_base_address
,
2117 ia64_frame_base_address
2120 #ifdef HAVE_LIBUNWIND_IA64_H
2122 struct ia64_unwind_table_entry
2124 unw_word_t start_offset
;
2125 unw_word_t end_offset
;
2126 unw_word_t info_offset
;
2129 static __inline__
uint64_t
2130 ia64_rse_slot_num (uint64_t addr
)
2132 return (addr
>> 3) & 0x3f;
2135 /* Skip over a designated number of registers in the backing
2136 store, remembering every 64th position is for NAT. */
2137 static __inline__
uint64_t
2138 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2140 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2144 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2147 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2148 number to a libunwind register number. */
2150 ia64_gdb2uw_regnum (int regnum
)
2152 if (regnum
== sp_regnum
)
2154 else if (regnum
== IA64_BSP_REGNUM
)
2155 return UNW_IA64_BSP
;
2156 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2157 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2158 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2159 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2160 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2161 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2162 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2164 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2165 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2166 else if (regnum
== IA64_PR_REGNUM
)
2168 else if (regnum
== IA64_IP_REGNUM
)
2170 else if (regnum
== IA64_CFM_REGNUM
)
2171 return UNW_IA64_CFM
;
2172 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2173 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2174 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2175 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2180 /* Gdb libunwind-frame callback function to convert from a libunwind register
2181 number to a ia64 gdb register number. */
2183 ia64_uw2gdb_regnum (int uw_regnum
)
2185 if (uw_regnum
== UNW_IA64_SP
)
2187 else if (uw_regnum
== UNW_IA64_BSP
)
2188 return IA64_BSP_REGNUM
;
2189 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2190 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2191 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2192 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2193 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2194 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2195 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2196 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2197 else if (uw_regnum
== UNW_IA64_PR
)
2198 return IA64_PR_REGNUM
;
2199 else if (uw_regnum
== UNW_REG_IP
)
2200 return IA64_IP_REGNUM
;
2201 else if (uw_regnum
== UNW_IA64_CFM
)
2202 return IA64_CFM_REGNUM
;
2203 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2204 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2205 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2206 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2211 /* Gdb libunwind-frame callback function to reveal if register is a float
2214 ia64_is_fpreg (int uw_regnum
)
2216 return unw_is_fpreg (uw_regnum
);
2219 /* Libunwind callback accessor function for general registers. */
2221 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2222 int write
, void *arg
)
2224 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2225 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2226 struct frame_info
*next_frame
= arg
;
2227 long new_sof
, old_sof
;
2228 char buf
[MAX_REGISTER_SIZE
];
2230 /* We never call any libunwind routines that need to write registers. */
2231 gdb_assert (!write
);
2236 /* Libunwind expects to see the pc value which means the slot number
2237 from the psr must be merged with the ip word address. */
2238 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2239 ip
= extract_unsigned_integer (buf
, 8);
2240 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2241 psr
= extract_unsigned_integer (buf
, 8);
2242 *val
= ip
| ((psr
>> 41) & 0x3);
2245 case UNW_IA64_AR_BSP
:
2246 /* Libunwind expects to see the beginning of the current register
2247 frame so we must account for the fact that ptrace() will return a value
2248 for bsp that points *after* the current register frame. */
2249 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2250 bsp
= extract_unsigned_integer (buf
, 8);
2251 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2252 cfm
= extract_unsigned_integer (buf
, 8);
2254 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2257 case UNW_IA64_AR_BSPSTORE
:
2258 /* Libunwind wants bspstore to be after the current register frame.
2259 This is what ptrace() and gdb treats as the regular bsp value. */
2260 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2261 *val
= extract_unsigned_integer (buf
, 8);
2265 /* For all other registers, just unwind the value directly. */
2266 frame_unwind_register (next_frame
, regnum
, buf
);
2267 *val
= extract_unsigned_integer (buf
, 8);
2271 if (gdbarch_debug
>= 1)
2272 fprintf_unfiltered (gdb_stdlog
,
2273 " access_reg: from cache: %4s=0x%s\n",
2274 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2275 ? ia64_register_names
[regnum
] : "r??"),
2280 /* Libunwind callback accessor function for floating-point registers. */
2282 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2283 int write
, void *arg
)
2285 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2286 struct frame_info
*next_frame
= arg
;
2288 /* We never call any libunwind routines that need to write registers. */
2289 gdb_assert (!write
);
2291 frame_unwind_register (next_frame
, regnum
, (char *) val
);
2296 /* Libunwind callback accessor function for top-level rse registers. */
2298 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2299 int write
, void *arg
)
2301 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2302 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2303 struct regcache
*regcache
= arg
;
2304 long new_sof
, old_sof
;
2305 char buf
[MAX_REGISTER_SIZE
];
2307 /* We never call any libunwind routines that need to write registers. */
2308 gdb_assert (!write
);
2313 /* Libunwind expects to see the pc value which means the slot number
2314 from the psr must be merged with the ip word address. */
2315 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2316 ip
= extract_unsigned_integer (buf
, 8);
2317 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2318 psr
= extract_unsigned_integer (buf
, 8);
2319 *val
= ip
| ((psr
>> 41) & 0x3);
2322 case UNW_IA64_AR_BSP
:
2323 /* Libunwind expects to see the beginning of the current register
2324 frame so we must account for the fact that ptrace() will return a value
2325 for bsp that points *after* the current register frame. */
2326 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2327 bsp
= extract_unsigned_integer (buf
, 8);
2328 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2329 cfm
= extract_unsigned_integer (buf
, 8);
2331 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2334 case UNW_IA64_AR_BSPSTORE
:
2335 /* Libunwind wants bspstore to be after the current register frame.
2336 This is what ptrace() and gdb treats as the regular bsp value. */
2337 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2338 *val
= extract_unsigned_integer (buf
, 8);
2342 /* For all other registers, just unwind the value directly. */
2343 regcache_cooked_read (regcache
, regnum
, buf
);
2344 *val
= extract_unsigned_integer (buf
, 8);
2348 if (gdbarch_debug
>= 1)
2349 fprintf_unfiltered (gdb_stdlog
,
2350 " access_rse_reg: from cache: %4s=0x%s\n",
2351 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2352 ? ia64_register_names
[regnum
] : "r??"),
2358 /* Libunwind callback accessor function for top-level fp registers. */
2360 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2361 unw_fpreg_t
*val
, int write
, void *arg
)
2363 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2364 struct regcache
*regcache
= arg
;
2366 /* We never call any libunwind routines that need to write registers. */
2367 gdb_assert (!write
);
2369 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2374 /* Libunwind callback accessor function for accessing memory. */
2376 ia64_access_mem (unw_addr_space_t as
,
2377 unw_word_t addr
, unw_word_t
*val
,
2378 int write
, void *arg
)
2380 if (addr
- KERNEL_START
< ktab_size
)
2382 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2383 + (addr
- KERNEL_START
));
2392 /* XXX do we need to normalize byte-order here? */
2394 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2396 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2399 /* Call low-level function to access the kernel unwind table. */
2401 getunwind_table (gdb_byte
**buf_p
)
2405 /* FIXME drow/2005-09-10: This code used to call
2406 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2407 for the currently running ia64-linux kernel. That data should
2408 come from the core file and be accessed via the auxv vector; if
2409 we want to preserve fall back to the running kernel's table, then
2410 we should find a way to override the corefile layer's
2411 xfer_partial method. */
2413 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2419 /* Get the kernel unwind table. */
2421 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2423 static struct ia64_table_entry
*etab
;
2430 size
= getunwind_table (&ktab_buf
);
2432 return -UNW_ENOINFO
;
2434 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2437 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2438 etab
->info_offset
+= KERNEL_START
;
2441 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2442 return -UNW_ENOINFO
;
2444 di
->format
= UNW_INFO_FORMAT_TABLE
;
2446 di
->start_ip
= ktab
[0].start_offset
;
2447 di
->end_ip
= etab
[-1].end_offset
;
2448 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2449 di
->u
.ti
.segbase
= 0;
2450 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2451 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2453 if (gdbarch_debug
>= 1)
2454 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2455 "segbase=0x%s, length=%s, gp=0x%s\n",
2456 (char *) di
->u
.ti
.name_ptr
,
2457 paddr_nz (di
->u
.ti
.segbase
),
2458 paddr_u (di
->u
.ti
.table_len
),
2463 /* Find the unwind table entry for a specified address. */
2465 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2466 unw_dyn_info_t
*dip
, void **buf
)
2468 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2469 Elf_Internal_Ehdr
*ehdr
;
2470 unw_word_t segbase
= 0;
2471 CORE_ADDR load_base
;
2475 bfd
= objfile
->obfd
;
2477 ehdr
= elf_tdata (bfd
)->elf_header
;
2478 phdr
= elf_tdata (bfd
)->phdr
;
2480 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2482 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2484 switch (phdr
[i
].p_type
)
2487 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2492 case PT_IA_64_UNWIND
:
2493 p_unwind
= phdr
+ i
;
2501 if (!p_text
|| !p_unwind
)
2502 return -UNW_ENOINFO
;
2504 /* Verify that the segment that contains the IP also contains
2505 the static unwind table. If not, we may be in the Linux kernel's
2506 DSO gate page in which case the unwind table is another segment.
2507 Otherwise, we are dealing with runtime-generated code, for which we
2508 have no info here. */
2509 segbase
= p_text
->p_vaddr
+ load_base
;
2511 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2514 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2516 if (phdr
[i
].p_type
== PT_LOAD
2517 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2520 /* Get the segbase from the section containing the
2522 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2526 return -UNW_ENOINFO
;
2529 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2530 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2531 dip
->gp
= ia64_find_global_pointer (ip
);
2532 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2533 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2534 dip
->u
.rti
.segbase
= segbase
;
2535 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2536 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2541 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2543 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2544 int need_unwind_info
, void *arg
)
2546 struct obj_section
*sec
= find_pc_section (ip
);
2553 /* XXX This only works if the host and the target architecture are
2554 both ia64 and if the have (more or less) the same kernel
2556 if (get_kernel_table (ip
, &di
) < 0)
2557 return -UNW_ENOINFO
;
2559 if (gdbarch_debug
>= 1)
2560 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2561 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2562 "length=%s,data=0x%s)\n",
2563 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2564 paddr_nz (di
.u
.ti
.segbase
),
2565 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2567 paddr_u (di
.u
.ti
.table_len
),
2568 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2572 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2576 if (gdbarch_debug
>= 1)
2577 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2578 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2579 "length=%s,data=0x%s)\n",
2580 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2581 paddr_nz (di
.u
.rti
.segbase
),
2582 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2584 paddr_u (di
.u
.rti
.table_len
),
2585 paddr_nz (di
.u
.rti
.table_data
));
2588 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2591 /* We no longer need the dyn info storage so free it. */
2597 /* Libunwind callback accessor function for cleanup. */
2599 ia64_put_unwind_info (unw_addr_space_t as
,
2600 unw_proc_info_t
*pip
, void *arg
)
2602 /* Nothing required for now. */
2605 /* Libunwind callback accessor function to get head of the dynamic
2606 unwind-info registration list. */
2608 ia64_get_dyn_info_list (unw_addr_space_t as
,
2609 unw_word_t
*dilap
, void *arg
)
2611 struct obj_section
*text_sec
;
2612 struct objfile
*objfile
;
2613 unw_word_t ip
, addr
;
2617 if (!libunwind_is_initialized ())
2618 return -UNW_ENOINFO
;
2620 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2624 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2625 ip
= text_sec
->addr
;
2626 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2629 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2630 /* We no longer need the dyn info storage so free it. */
2635 if (gdbarch_debug
>= 1)
2636 fprintf_unfiltered (gdb_stdlog
,
2637 "dynamic unwind table in objfile %s "
2638 "at 0x%s (gp=0x%s)\n",
2639 bfd_get_filename (objfile
->obfd
),
2640 paddr_nz (addr
), paddr_nz (di
.gp
));
2646 return -UNW_ENOINFO
;
2650 /* Frame interface functions for libunwind. */
2653 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2654 struct frame_id
*this_id
)
2659 CORE_ADDR prev_ip
, addr
;
2660 int realnum
, optimized
;
2661 enum lval_type lval
;
2664 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2665 if (frame_id_eq (id
, null_frame_id
))
2667 (*this_id
) = null_frame_id
;
2671 /* We must add the bsp as the special address for frame comparison
2673 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2674 bsp
= extract_unsigned_integer (buf
, 8);
2676 /* If the previous frame pc value is 0, then we are at the end of the stack
2677 and don't want to unwind past this frame. We return a null frame_id to
2679 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2680 &optimized
, &lval
, &addr
, &realnum
, buf
);
2681 prev_ip
= extract_unsigned_integer (buf
, 8);
2684 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2686 (*this_id
) = null_frame_id
;
2688 if (gdbarch_debug
>= 1)
2689 fprintf_unfiltered (gdb_stdlog
,
2690 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2691 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2692 paddr_nz (bsp
), next_frame
);
2696 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2698 int regnum
, int *optimizedp
,
2699 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2700 int *realnump
, gdb_byte
*valuep
)
2704 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2705 reg
= IA64_PR_REGNUM
;
2706 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2707 reg
= IA64_UNAT_REGNUM
;
2709 /* Let libunwind do most of the work. */
2710 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2711 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2713 /* No more to do if the value is not supposed to be supplied. */
2717 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2721 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2725 unsigned char buf
[MAX_REGISTER_SIZE
];
2727 /* Fetch predicate register rename base from current frame
2728 marker for this frame. */
2729 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2730 cfm
= extract_unsigned_integer (buf
, 8);
2731 rrb_pr
= (cfm
>> 32) & 0x3f;
2733 /* Adjust the register number to account for register rotation. */
2734 regnum
= VP16_REGNUM
2735 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2737 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2738 regnum
- VP0_REGNUM
, 1);
2739 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2741 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2745 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2746 regnum
- IA64_NAT0_REGNUM
, 1);
2747 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2750 else if (regnum
== IA64_BSP_REGNUM
)
2752 char cfm_valuep
[MAX_REGISTER_SIZE
];
2755 enum lval_type cfm_lval
;
2757 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2759 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2760 This corresponds to what the hardware bsp register will be if we pop the frame
2761 back which is why we might have been called. We know that libunwind will pass us back
2762 the beginning of the current frame so we should just add sof to it. */
2763 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2764 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2765 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2766 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2767 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2769 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2773 if (gdbarch_debug
>= 1)
2774 fprintf_unfiltered (gdb_stdlog
,
2775 "libunwind prev register <%s> is 0x%s\n",
2776 (regnum
< IA64_GR32_REGNUM
2777 || (regnum
> IA64_GR127_REGNUM
2778 && regnum
< LAST_PSEUDO_REGNUM
))
2779 ? ia64_register_names
[regnum
]
2780 : (regnum
< LAST_PSEUDO_REGNUM
2781 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2783 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2786 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2789 ia64_libunwind_frame_this_id
,
2790 ia64_libunwind_frame_prev_register
,
2794 libunwind_frame_dealloc_cache
2797 static const struct frame_unwind
*
2798 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2800 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2801 return &ia64_libunwind_frame_unwind
;
2807 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2808 struct frame_id
*this_id
)
2815 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2816 if (frame_id_eq (id
, null_frame_id
))
2818 (*this_id
) = null_frame_id
;
2822 /* We must add the bsp as the special address for frame comparison
2824 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2825 bsp
= extract_unsigned_integer (buf
, 8);
2827 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2828 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2830 if (gdbarch_debug
>= 1)
2831 fprintf_unfiltered (gdb_stdlog
,
2832 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2833 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2834 paddr_nz (bsp
), next_frame
);
2838 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2840 int regnum
, int *optimizedp
,
2841 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2842 int *realnump
, gdb_byte
*valuep
)
2846 CORE_ADDR prev_ip
, addr
;
2847 int realnum
, optimized
;
2848 enum lval_type lval
;
2851 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2852 method of getting previous registers. */
2853 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2854 &optimized
, &lval
, &addr
, &realnum
, buf
);
2855 prev_ip
= extract_unsigned_integer (buf
, 8);
2859 void *tmp_cache
= NULL
;
2860 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2861 addrp
, realnump
, valuep
);
2864 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2865 addrp
, realnump
, valuep
);
2868 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2871 ia64_libunwind_sigtramp_frame_this_id
,
2872 ia64_libunwind_sigtramp_frame_prev_register
2875 static const struct frame_unwind
*
2876 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2878 if (libunwind_is_initialized ())
2880 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2881 return &ia64_libunwind_sigtramp_frame_unwind
;
2885 return ia64_sigtramp_frame_sniffer (next_frame
);
2888 /* Set of libunwind callback acccessor functions. */
2889 static unw_accessors_t ia64_unw_accessors
=
2891 ia64_find_proc_info_x
,
2892 ia64_put_unwind_info
,
2893 ia64_get_dyn_info_list
,
2901 /* Set of special libunwind callback acccessor functions specific for accessing
2902 the rse registers. At the top of the stack, we want libunwind to figure out
2903 how to read r32 - r127. Though usually they are found sequentially in memory
2904 starting from $bof, this is not always true. */
2905 static unw_accessors_t ia64_unw_rse_accessors
=
2907 ia64_find_proc_info_x
,
2908 ia64_put_unwind_info
,
2909 ia64_get_dyn_info_list
,
2911 ia64_access_rse_reg
,
2912 ia64_access_rse_fpreg
,
2917 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2918 static struct libunwind_descr ia64_libunwind_descr
=
2923 &ia64_unw_accessors
,
2924 &ia64_unw_rse_accessors
,
2927 #endif /* HAVE_LIBUNWIND_IA64_H */
2929 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2930 gdbarch_extract_return_value? GCC_P is true if compiled with gcc and TYPE
2931 is the type (which is known to be struct, union or array). */
2933 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2935 struct type
*float_elt_type
;
2937 /* HFAs are structures (or arrays) consisting entirely of floating
2938 point values of the same length. Up to 8 of these are returned
2939 in registers. Don't use the struct convention when this is the
2941 float_elt_type
= is_float_or_hfa_type (type
);
2942 if (float_elt_type
!= NULL
2943 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2946 /* Other structs of length 32 or less are returned in r8-r11.
2947 Don't use the struct convention for those either. */
2948 return TYPE_LENGTH (type
) > 32;
2952 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2955 struct type
*float_elt_type
;
2957 float_elt_type
= is_float_or_hfa_type (type
);
2958 if (float_elt_type
!= NULL
)
2960 char from
[MAX_REGISTER_SIZE
];
2962 int regnum
= IA64_FR8_REGNUM
;
2963 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2967 regcache_cooked_read (regcache
, regnum
, from
);
2968 convert_typed_floating (from
, builtin_type_ia64_ext
,
2969 (char *)valbuf
+ offset
, float_elt_type
);
2970 offset
+= TYPE_LENGTH (float_elt_type
);
2978 int regnum
= IA64_GR8_REGNUM
;
2979 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2981 int n
= TYPE_LENGTH (type
) / reglen
;
2982 int m
= TYPE_LENGTH (type
) % reglen
;
2987 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2988 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2995 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2996 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3003 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3005 switch (TYPE_CODE (t
))
3009 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3016 case TYPE_CODE_ARRAY
:
3018 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3021 case TYPE_CODE_STRUCT
:
3025 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3026 if (!is_float_or_hfa_type_recurse
3027 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3038 /* Determine if the given type is one of the floating point types or
3039 and HFA (which is a struct, array, or combination thereof whose
3040 bottom-most elements are all of the same floating point type). */
3042 static struct type
*
3043 is_float_or_hfa_type (struct type
*t
)
3045 struct type
*et
= 0;
3047 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3051 /* Return 1 if the alignment of T is such that the next even slot
3052 should be used. Return 0, if the next available slot should
3053 be used. (See section 8.5.1 of the IA-64 Software Conventions
3054 and Runtime manual). */
3057 slot_alignment_is_next_even (struct type
*t
)
3059 switch (TYPE_CODE (t
))
3063 if (TYPE_LENGTH (t
) > 8)
3067 case TYPE_CODE_ARRAY
:
3069 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3070 case TYPE_CODE_STRUCT
:
3074 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3075 if (slot_alignment_is_next_even
3076 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3085 /* Attempt to find (and return) the global pointer for the given
3088 This is a rather nasty bit of code searchs for the .dynamic section
3089 in the objfile corresponding to the pc of the function we're trying
3090 to call. Once it finds the addresses at which the .dynamic section
3091 lives in the child process, it scans the Elf64_Dyn entries for a
3092 DT_PLTGOT tag. If it finds one of these, the corresponding
3093 d_un.d_ptr value is the global pointer. */
3096 ia64_find_global_pointer (CORE_ADDR faddr
)
3098 struct obj_section
*faddr_sect
;
3100 faddr_sect
= find_pc_section (faddr
);
3101 if (faddr_sect
!= NULL
)
3103 struct obj_section
*osect
;
3105 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3107 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3111 if (osect
< faddr_sect
->objfile
->sections_end
)
3116 while (addr
< osect
->endaddr
)
3122 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3125 tag
= extract_signed_integer (buf
, sizeof (buf
));
3127 if (tag
== DT_PLTGOT
)
3129 CORE_ADDR global_pointer
;
3131 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3134 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3137 return global_pointer
;
3150 /* Given a function's address, attempt to find (and return) the
3151 corresponding (canonical) function descriptor. Return 0 if
3154 find_extant_func_descr (CORE_ADDR faddr
)
3156 struct obj_section
*faddr_sect
;
3158 /* Return early if faddr is already a function descriptor. */
3159 faddr_sect
= find_pc_section (faddr
);
3160 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3163 if (faddr_sect
!= NULL
)
3165 struct obj_section
*osect
;
3166 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3168 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3172 if (osect
< faddr_sect
->objfile
->sections_end
)
3177 while (addr
< osect
->endaddr
)
3183 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3186 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3188 if (faddr
== faddr2
)
3198 /* Attempt to find a function descriptor corresponding to the
3199 given address. If none is found, construct one on the
3200 stack using the address at fdaptr. */
3203 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3207 fdesc
= find_extant_func_descr (faddr
);
3211 ULONGEST global_pointer
;
3217 global_pointer
= ia64_find_global_pointer (faddr
);
3219 if (global_pointer
== 0)
3220 regcache_cooked_read_unsigned (regcache
,
3221 IA64_GR1_REGNUM
, &global_pointer
);
3223 store_unsigned_integer (buf
, 8, faddr
);
3224 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3226 write_memory (fdesc
, buf
, 16);
3232 /* Use the following routine when printing out function pointers
3233 so the user can see the function address rather than just the
3234 function descriptor. */
3236 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3237 struct target_ops
*targ
)
3239 struct obj_section
*s
;
3241 s
= find_pc_section (addr
);
3243 /* check if ADDR points to a function descriptor. */
3244 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3245 return read_memory_unsigned_integer (addr
, 8);
3247 /* There are also descriptors embedded in vtables. */
3250 struct minimal_symbol
*minsym
;
3252 minsym
= lookup_minimal_symbol_by_pc (addr
);
3254 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3255 return read_memory_unsigned_integer (addr
, 8);
3262 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3268 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3269 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3270 int nargs
, struct value
**args
, CORE_ADDR sp
,
3271 int struct_return
, CORE_ADDR struct_addr
)
3277 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3279 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3280 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3281 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3285 /* Count the number of slots needed for the arguments. */
3286 for (argno
= 0; argno
< nargs
; argno
++)
3289 type
= check_typedef (value_type (arg
));
3290 len
= TYPE_LENGTH (type
);
3292 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3295 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3298 nslots
+= (len
+ 7) / 8;
3301 /* Divvy up the slots between the RSE and the memory stack. */
3302 rseslots
= (nslots
> 8) ? 8 : nslots
;
3303 memslots
= nslots
- rseslots
;
3305 /* Allocate a new RSE frame. */
3306 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3308 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3309 new_bsp
= rse_address_add (bsp
, rseslots
);
3310 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3312 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3313 pfs
&= 0xc000000000000000LL
;
3314 pfs
|= (cfm
& 0xffffffffffffLL
);
3315 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3317 cfm
&= 0xc000000000000000LL
;
3319 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3321 /* We will attempt to find function descriptors in the .opd segment,
3322 but if we can't we'll construct them ourselves. That being the
3323 case, we'll need to reserve space on the stack for them. */
3324 funcdescaddr
= sp
- nfuncargs
* 16;
3325 funcdescaddr
&= ~0xfLL
;
3327 /* Adjust the stack pointer to it's new value. The calling conventions
3328 require us to have 16 bytes of scratch, plus whatever space is
3329 necessary for the memory slots and our function descriptors. */
3330 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3331 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3333 /* Place the arguments where they belong. The arguments will be
3334 either placed in the RSE backing store or on the memory stack.
3335 In addition, floating point arguments or HFAs are placed in
3336 floating point registers. */
3338 floatreg
= IA64_FR8_REGNUM
;
3339 for (argno
= 0; argno
< nargs
; argno
++)
3341 struct type
*float_elt_type
;
3344 type
= check_typedef (value_type (arg
));
3345 len
= TYPE_LENGTH (type
);
3347 /* Special handling for function parameters. */
3349 && TYPE_CODE (type
) == TYPE_CODE_PTR
3350 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3353 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
), 8);
3354 store_unsigned_integer (val_buf
, 8,
3355 find_func_descr (regcache
, faddr
,
3357 if (slotnum
< rseslots
)
3358 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3360 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3367 /* Skip odd slot if necessary... */
3368 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3376 memset (val_buf
, 0, 8);
3377 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3379 if (slotnum
< rseslots
)
3380 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3382 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3389 /* Handle floating point types (including HFAs). */
3390 float_elt_type
= is_float_or_hfa_type (type
);
3391 if (float_elt_type
!= NULL
)
3394 len
= TYPE_LENGTH (type
);
3395 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3397 char to
[MAX_REGISTER_SIZE
];
3398 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3399 to
, builtin_type_ia64_ext
);
3400 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3402 argoffset
+= TYPE_LENGTH (float_elt_type
);
3403 len
-= TYPE_LENGTH (float_elt_type
);
3408 /* Store the struct return value in r8 if necessary. */
3411 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3414 global_pointer
= ia64_find_global_pointer (func_addr
);
3416 if (global_pointer
!= 0)
3417 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3419 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3421 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3426 static struct frame_id
3427 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3432 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3433 sp
= extract_unsigned_integer (buf
, 8);
3435 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3436 bsp
= extract_unsigned_integer (buf
, 8);
3438 if (gdbarch_debug
>= 1)
3439 fprintf_unfiltered (gdb_stdlog
,
3440 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3441 paddr_nz (frame_pc_unwind (next_frame
)),
3442 paddr_nz (sp
), paddr_nz (bsp
));
3444 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3448 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3451 CORE_ADDR ip
, psr
, pc
;
3453 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3454 ip
= extract_unsigned_integer (buf
, 8);
3455 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3456 psr
= extract_unsigned_integer (buf
, 8);
3458 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3463 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3464 const gdb_byte
*valbuf
)
3466 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3468 char to
[MAX_REGISTER_SIZE
];
3469 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3470 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3471 target_store_registers (regcache
, IA64_FR8_REGNUM
);
3474 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3478 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3480 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3481 return print_insn_ia64 (memaddr
, info
);
3484 static struct gdbarch
*
3485 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3487 struct gdbarch
*gdbarch
;
3488 struct gdbarch_tdep
*tdep
;
3490 /* If there is already a candidate, use it. */
3491 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3493 return arches
->gdbarch
;
3495 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3496 gdbarch
= gdbarch_alloc (&info
, tdep
);
3498 tdep
->sigcontext_register_address
= 0;
3499 tdep
->pc_in_sigtramp
= 0;
3501 /* Define the ia64 floating-point format to gdb. */
3502 builtin_type_ia64_ext
=
3503 init_type (TYPE_CODE_FLT
, 128 / 8,
3504 0, "builtin_type_ia64_ext", NULL
);
3505 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3507 /* According to the ia64 specs, instructions that store long double
3508 floats in memory use a long-double format different than that
3509 used in the floating registers. The memory format matches the
3510 x86 extended float format which is 80 bits. An OS may choose to
3511 use this format (e.g. GNU/Linux) or choose to use a different
3512 format for storing long doubles (e.g. HPUX). In the latter case,
3513 the setting of the format may be moved/overridden in an
3514 OS-specific tdep file. */
3515 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3517 set_gdbarch_short_bit (gdbarch
, 16);
3518 set_gdbarch_int_bit (gdbarch
, 32);
3519 set_gdbarch_long_bit (gdbarch
, 64);
3520 set_gdbarch_long_long_bit (gdbarch
, 64);
3521 set_gdbarch_float_bit (gdbarch
, 32);
3522 set_gdbarch_double_bit (gdbarch
, 64);
3523 set_gdbarch_long_double_bit (gdbarch
, 128);
3524 set_gdbarch_ptr_bit (gdbarch
, 64);
3526 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3527 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3528 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3529 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3531 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3532 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3534 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3535 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3536 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3537 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3538 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3539 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3540 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3542 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3544 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3545 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3547 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3549 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3550 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3551 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3552 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3553 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3555 /* Settings for calling functions in the inferior. */
3556 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3557 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3558 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3560 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3561 #ifdef HAVE_LIBUNWIND_IA64_H
3562 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3563 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3564 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3566 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3568 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3569 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3571 /* Settings that should be unnecessary. */
3572 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3574 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3575 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3577 /* The virtual table contains 16-byte descriptors, not pointers to
3579 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3581 /* Hook in ABI-specific overrides, if they have been registered. */
3582 gdbarch_init_osabi (info
, gdbarch
);
3587 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3590 _initialize_ia64_tdep (void)
3592 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);