1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
27 #include "reggroups.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
34 #include "elf/common.h" /* for DT_PLTGOT value */
39 #include "ia64-tdep.h"
42 #ifdef HAVE_LIBUNWIND_IA64_H
43 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
44 #include "ia64-libunwind-tdep.h"
46 /* Note: KERNEL_START is supposed to be an address which is not going
47 to ever contain any valid unwind info. For ia64 linux, the choice
48 of 0xc000000000000000 is fairly safe since that's uncached space.
50 We use KERNEL_START as follows: after obtaining the kernel's
51 unwind table via getunwind(), we project its unwind data into
52 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
53 when ia64_access_mem() sees a memory access to this
54 address-range, we redirect it to ktab instead.
56 None of this hackery is needed with a modern kernel/libcs
57 which uses the kernel virtual DSO to provide access to the
58 kernel's unwind info. In that case, ktab_size remains 0 and
59 hence the value of KERNEL_START doesn't matter. */
61 #define KERNEL_START 0xc000000000000000ULL
63 static size_t ktab_size
= 0;
64 struct ia64_table_entry
66 uint64_t start_offset
;
71 static struct ia64_table_entry
*ktab
= NULL
;
75 /* An enumeration of the different IA-64 instruction types. */
77 typedef enum instruction_type
79 A
, /* Integer ALU ; I-unit or M-unit */
80 I
, /* Non-ALU integer; I-unit */
81 M
, /* Memory ; M-unit */
82 F
, /* Floating-point ; F-unit */
83 B
, /* Branch ; B-unit */
84 L
, /* Extended (L+X) ; I-unit */
85 X
, /* Extended (L+X) ; I-unit */
86 undefined
/* undefined or reserved */
89 /* We represent IA-64 PC addresses as the value of the instruction
90 pointer or'd with some bit combination in the low nibble which
91 represents the slot number in the bundle addressed by the
92 instruction pointer. The problem is that the Linux kernel
93 multiplies its slot numbers (for exceptions) by one while the
94 disassembler multiplies its slot numbers by 6. In addition, I've
95 heard it said that the simulator uses 1 as the multiplier.
97 I've fixed the disassembler so that the bytes_per_line field will
98 be the slot multiplier. If bytes_per_line comes in as zero, it
99 is set to six (which is how it was set up initially). -- objdump
100 displays pretty disassembly dumps with this value. For our purposes,
101 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
102 never want to also display the raw bytes the way objdump does. */
104 #define SLOT_MULTIPLIER 1
106 /* Length in bytes of an instruction bundle. */
108 #define BUNDLE_LEN 16
110 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
112 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
113 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
116 static gdbarch_init_ftype ia64_gdbarch_init
;
118 static gdbarch_register_name_ftype ia64_register_name
;
119 static gdbarch_register_type_ftype ia64_register_type
;
120 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
121 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
122 static struct type
*is_float_or_hfa_type (struct type
*t
);
123 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
126 #define NUM_IA64_RAW_REGS 462
128 static int sp_regnum
= IA64_GR12_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as
131 pseudo-registers because they may not be accessible via the ptrace
132 register get/set interfaces. */
134 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
,
135 VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
136 V127_REGNUM
= V32_REGNUM
+ 95,
137 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16,
138 VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
140 /* Array of register names; There should be ia64_num_regs strings in
143 static const char *ia64_register_names
[] =
144 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
145 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
146 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
147 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
161 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
162 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
163 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
164 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
165 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
166 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
167 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
168 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
169 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
170 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
171 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
172 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
173 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
174 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
175 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
176 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
187 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
191 "pr", "ip", "psr", "cfm",
193 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
194 "", "", "", "", "", "", "", "",
195 "rsc", "bsp", "bspstore", "rnat",
197 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
198 "ccv", "", "", "", "unat", "", "", "",
199 "fpsr", "", "", "", "itc",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
210 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
211 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
212 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
213 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
214 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
215 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
216 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
217 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
218 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
219 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
220 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
221 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
222 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
223 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
224 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
225 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
229 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
230 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
231 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
232 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
233 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
234 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
235 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
236 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
237 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
238 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
239 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
240 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
242 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
243 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
244 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
245 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
246 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
247 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
248 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
249 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
252 struct ia64_frame_cache
254 CORE_ADDR base
; /* frame pointer base for frame */
255 CORE_ADDR pc
; /* function start pc for frame */
256 CORE_ADDR saved_sp
; /* stack pointer for frame */
257 CORE_ADDR bsp
; /* points at r32 for the current frame */
258 CORE_ADDR cfm
; /* cfm value for current frame */
259 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
261 int sof
; /* Size of frame (decoded from cfm value). */
262 int sol
; /* Size of locals (decoded from cfm value). */
263 int sor
; /* Number of rotating registers (decoded from
265 CORE_ADDR after_prologue
;
266 /* Address of first instruction after the last
267 prologue instruction; Note that there may
268 be instructions from the function's body
269 intermingled with the prologue. */
270 int mem_stack_frame_size
;
271 /* Size of the memory stack frame (may be zero),
272 or -1 if it has not been determined yet. */
273 int fp_reg
; /* Register number (if any) used a frame pointer
274 for this frame. 0 if no register is being used
275 as the frame pointer. */
277 /* Saved registers. */
278 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
283 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
288 static const struct floatformat floatformat_ia64_ext_little
=
290 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
291 floatformat_intbit_yes
, "floatformat_ia64_ext_little", floatformat_valid
, NULL
294 static const struct floatformat floatformat_ia64_ext_big
=
296 floatformat_big
, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
297 floatformat_intbit_yes
, "floatformat_ia64_ext_big", floatformat_valid
300 static const struct floatformat
*floatformats_ia64_ext
[2] =
302 &floatformat_ia64_ext_big
,
303 &floatformat_ia64_ext_little
307 ia64_ext_type (struct gdbarch
*gdbarch
)
309 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
311 if (!tdep
->ia64_ext_type
)
313 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
314 floatformats_ia64_ext
);
316 return tdep
->ia64_ext_type
;
320 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
321 struct reggroup
*group
)
326 if (group
== all_reggroup
)
328 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
329 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
330 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
331 if (group
== float_reggroup
)
333 if (group
== vector_reggroup
)
335 if (group
== general_reggroup
)
336 return (!vector_p
&& !float_p
);
337 if (group
== save_reggroup
|| group
== restore_reggroup
)
343 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
345 return ia64_register_names
[reg
];
349 ia64_register_type (struct gdbarch
*arch
, int reg
)
351 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
352 return ia64_ext_type (arch
);
354 return builtin_type (arch
)->builtin_long
;
358 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
360 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
361 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
366 /* Extract ``len'' bits from an instruction bundle starting at
370 extract_bit_field (const gdb_byte
*bundle
, int from
, int len
)
372 long long result
= 0LL;
374 int from_byte
= from
/ 8;
375 int to_byte
= to
/ 8;
376 unsigned char *b
= (unsigned char *) bundle
;
382 if (from_byte
== to_byte
)
383 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
384 result
= c
>> (from
% 8);
385 lshift
= 8 - (from
% 8);
387 for (i
= from_byte
+1; i
< to_byte
; i
++)
389 result
|= ((long long) b
[i
]) << lshift
;
393 if (from_byte
< to_byte
&& (to
% 8 != 0))
396 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
397 result
|= ((long long) c
) << lshift
;
403 /* Replace the specified bits in an instruction bundle. */
406 replace_bit_field (gdb_byte
*bundle
, long long val
, int from
, int len
)
409 int from_byte
= from
/ 8;
410 int to_byte
= to
/ 8;
411 unsigned char *b
= (unsigned char *) bundle
;
414 if (from_byte
== to_byte
)
416 unsigned char left
, right
;
418 left
= (c
>> (to
% 8)) << (to
% 8);
419 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
420 c
= (unsigned char) (val
& 0xff);
421 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
429 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
430 c
= c
| (val
<< (from
% 8));
432 val
>>= 8 - from
% 8;
434 for (i
= from_byte
+1; i
< to_byte
; i
++)
443 unsigned char cv
= (unsigned char) val
;
445 c
= c
>> (to
% 8) << (to
% 8);
446 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
452 /* Return the contents of slot N (for N = 0, 1, or 2) in
453 and instruction bundle. */
456 slotN_contents (gdb_byte
*bundle
, int slotnum
)
458 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
461 /* Store an instruction in an instruction bundle. */
464 replace_slotN_contents (gdb_byte
*bundle
, long long instr
, int slotnum
)
466 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
469 static const enum instruction_type template_encoding_table
[32][3] =
471 { M
, I
, I
}, /* 00 */
472 { M
, I
, I
}, /* 01 */
473 { M
, I
, I
}, /* 02 */
474 { M
, I
, I
}, /* 03 */
475 { M
, L
, X
}, /* 04 */
476 { M
, L
, X
}, /* 05 */
477 { undefined
, undefined
, undefined
}, /* 06 */
478 { undefined
, undefined
, undefined
}, /* 07 */
479 { M
, M
, I
}, /* 08 */
480 { M
, M
, I
}, /* 09 */
481 { M
, M
, I
}, /* 0A */
482 { M
, M
, I
}, /* 0B */
483 { M
, F
, I
}, /* 0C */
484 { M
, F
, I
}, /* 0D */
485 { M
, M
, F
}, /* 0E */
486 { M
, M
, F
}, /* 0F */
487 { M
, I
, B
}, /* 10 */
488 { M
, I
, B
}, /* 11 */
489 { M
, B
, B
}, /* 12 */
490 { M
, B
, B
}, /* 13 */
491 { undefined
, undefined
, undefined
}, /* 14 */
492 { undefined
, undefined
, undefined
}, /* 15 */
493 { B
, B
, B
}, /* 16 */
494 { B
, B
, B
}, /* 17 */
495 { M
, M
, B
}, /* 18 */
496 { M
, M
, B
}, /* 19 */
497 { undefined
, undefined
, undefined
}, /* 1A */
498 { undefined
, undefined
, undefined
}, /* 1B */
499 { M
, F
, B
}, /* 1C */
500 { M
, F
, B
}, /* 1D */
501 { undefined
, undefined
, undefined
}, /* 1E */
502 { undefined
, undefined
, undefined
}, /* 1F */
505 /* Fetch and (partially) decode an instruction at ADDR and return the
506 address of the next instruction to fetch. */
509 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
511 gdb_byte bundle
[BUNDLE_LEN
];
512 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
516 /* Warn about slot numbers greater than 2. We used to generate
517 an error here on the assumption that the user entered an invalid
518 address. But, sometimes GDB itself requests an invalid address.
519 This can (easily) happen when execution stops in a function for
520 which there are no symbols. The prologue scanner will attempt to
521 find the beginning of the function - if the nearest symbol
522 happens to not be aligned on a bundle boundary (16 bytes), the
523 resulting starting address will cause GDB to think that the slot
526 So we warn about it and set the slot number to zero. It is
527 not necessarily a fatal condition, particularly if debugging
528 at the assembly language level. */
531 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
532 "Using slot 0 instead"));
538 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
543 *instr
= slotN_contents (bundle
, slotnum
);
544 templ
= extract_bit_field (bundle
, 0, 5);
545 *it
= template_encoding_table
[(int)templ
][slotnum
];
547 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
550 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
555 /* There are 5 different break instructions (break.i, break.b,
556 break.m, break.f, and break.x), but they all have the same
557 encoding. (The five bit template in the low five bits of the
558 instruction bundle distinguishes one from another.)
560 The runtime architecture manual specifies that break instructions
561 used for debugging purposes must have the upper two bits of the 21
562 bit immediate set to a 0 and a 1 respectively. A breakpoint
563 instruction encodes the most significant bit of its 21 bit
564 immediate at bit 36 of the 41 bit instruction. The penultimate msb
565 is at bit 25 which leads to the pattern below.
567 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
568 it turns out that 0x80000 was used as the syscall break in the early
569 simulators. So I changed the pattern slightly to do "break.i 0x080001"
570 instead. But that didn't work either (I later found out that this
571 pattern was used by the simulator that I was using.) So I ended up
572 using the pattern seen below.
574 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
575 while we need bit-based addressing as the instructions length is 41 bits and
576 we must not modify/corrupt the adjacent slots in the same bundle.
577 Fortunately we may store larger memory incl. the adjacent bits with the
578 original memory content (not the possibly already stored breakpoints there).
579 We need to be careful in ia64_memory_remove_breakpoint to always restore
580 only the specific bits of this instruction ignoring any adjacent stored
583 We use the original addressing with the low nibble in the range <0..2> which
584 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
585 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
586 bytes just without these two possibly skipped bytes to not to exceed to the
589 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
590 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
591 In such case there is no other place where to store
592 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
593 SLOTNUM in ia64_memory_remove_breakpoint.
595 There is one special case where we need to be extra careful:
596 L-X instructions, which are instructions that occupy 2 slots
597 (The L part is always in slot 1, and the X part is always in
598 slot 2). We must refuse to insert breakpoints for an address
599 that points at slot 2 of a bundle where an L-X instruction is
600 present, since there is logically no instruction at that address.
601 However, to make things more interesting, the opcode of L-X
602 instructions is located in slot 2. This means that, to insert
603 a breakpoint at an address that points to slot 1, we actually
604 need to write the breakpoint in slot 2! Slot 1 is actually
605 the extended operand, so writing the breakpoint there would not
606 have the desired effect. Another side-effect of this issue
607 is that we need to make sure that the shadow contents buffer
608 does save byte 15 of our instruction bundle (this is the tail
609 end of slot 2, which wouldn't be saved if we were to insert
610 the breakpoint in slot 1).
612 ia64 16-byte bundle layout:
613 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
615 The current addressing used by the code below:
616 original PC placed_address placed_size required covered
617 == bp_tgt->shadow_len reqd \subset covered
618 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
619 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
620 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
622 L-X instructions are treated a little specially, as explained above:
623 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
625 `objdump -d' and some other tools show a bit unjustified offsets:
626 original PC byte where starts the instruction objdump offset
627 0xABCDE0 0xABCDE0 0xABCDE0
628 0xABCDE1 0xABCDE5 0xABCDE6
629 0xABCDE2 0xABCDEA 0xABCDEC
632 #define IA64_BREAKPOINT 0x00003333300LL
635 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
636 struct bp_target_info
*bp_tgt
)
638 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
639 gdb_byte bundle
[BUNDLE_LEN
];
640 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
641 long long instr_breakpoint
;
644 struct cleanup
*cleanup
;
647 error (_("Can't insert breakpoint for slot numbers greater than 2."));
651 /* Enable the automatic memory restoration from breakpoints while
652 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
653 Otherwise, we could possibly store into the shadow parts of the adjacent
654 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
655 breakpoint instruction bits region. */
656 cleanup
= make_show_memory_breakpoints_cleanup (0);
657 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
660 do_cleanups (cleanup
);
664 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
665 for addressing the SHADOW_CONTENTS placement. */
666 shadow_slotnum
= slotnum
;
668 /* Always cover the last byte of the bundle in case we are inserting
669 a breakpoint on an L-X instruction. */
670 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
672 templ
= extract_bit_field (bundle
, 0, 5);
673 if (template_encoding_table
[templ
][slotnum
] == X
)
675 /* X unit types can only be used in slot 2, and are actually
676 part of a 2-slot L-X instruction. We cannot break at this
677 address, as this is the second half of an instruction that
678 lives in slot 1 of that bundle. */
679 gdb_assert (slotnum
== 2);
680 error (_("Can't insert breakpoint for non-existing slot X"));
682 if (template_encoding_table
[templ
][slotnum
] == L
)
684 /* L unit types can only be used in slot 1. But the associated
685 opcode for that instruction is in slot 2, so bump the slot number
687 gdb_assert (slotnum
== 1);
691 /* Store the whole bundle, except for the initial skipped bytes by the slot
692 number interpreted as bytes offset in PLACED_ADDRESS. */
693 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
,
696 /* Re-read the same bundle as above except that, this time, read it in order
697 to compute the new bundle inside which we will be inserting the
698 breakpoint. Therefore, disable the automatic memory restoration from
699 breakpoints while we read our instruction bundle. Otherwise, the general
700 restoration mechanism kicks in and we would possibly remove parts of the
701 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
702 the real breakpoint instruction bits region. */
703 make_show_memory_breakpoints_cleanup (1);
704 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
707 do_cleanups (cleanup
);
711 /* Breakpoints already present in the code will get deteacted and not get
712 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
713 location cannot induce the internal error as they are optimized into
714 a single instance by update_global_location_list. */
715 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
716 if (instr_breakpoint
== IA64_BREAKPOINT
)
717 internal_error (__FILE__
, __LINE__
,
718 _("Address %s already contains a breakpoint."),
719 paddress (gdbarch
, bp_tgt
->placed_address
));
720 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
722 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
725 do_cleanups (cleanup
);
730 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
731 struct bp_target_info
*bp_tgt
)
733 CORE_ADDR addr
= bp_tgt
->placed_address
;
734 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
735 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
736 long long instr_breakpoint
, instr_saved
;
739 struct cleanup
*cleanup
;
743 /* Disable the automatic memory restoration from breakpoints while
744 we read our instruction bundle. Otherwise, the general restoration
745 mechanism kicks in and we would possibly remove parts of the adjacent
746 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
747 breakpoint instruction bits region. */
748 cleanup
= make_show_memory_breakpoints_cleanup (1);
749 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
752 do_cleanups (cleanup
);
756 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
757 for addressing the SHADOW_CONTENTS placement. */
758 shadow_slotnum
= slotnum
;
760 templ
= extract_bit_field (bundle_mem
, 0, 5);
761 if (template_encoding_table
[templ
][slotnum
] == X
)
763 /* X unit types can only be used in slot 2, and are actually
764 part of a 2-slot L-X instruction. We refuse to insert
765 breakpoints at this address, so there should be no reason
766 for us attempting to remove one there, except if the program's
767 code somehow got modified in memory. */
768 gdb_assert (slotnum
== 2);
769 warning (_("Cannot remove breakpoint at address %s from non-existing "
770 "X-type slot, memory has changed underneath"),
771 paddress (gdbarch
, bp_tgt
->placed_address
));
772 do_cleanups (cleanup
);
775 if (template_encoding_table
[templ
][slotnum
] == L
)
777 /* L unit types can only be used in slot 1. But the breakpoint
778 was actually saved using slot 2, so update the slot number
780 gdb_assert (slotnum
== 1);
784 gdb_assert (bp_tgt
->shadow_len
== BUNDLE_LEN
- shadow_slotnum
);
786 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
787 if (instr_breakpoint
!= IA64_BREAKPOINT
)
789 warning (_("Cannot remove breakpoint at address %s, "
790 "no break instruction at such address."),
791 paddress (gdbarch
, bp_tgt
->placed_address
));
792 do_cleanups (cleanup
);
796 /* Extract the original saved instruction from SLOTNUM normalizing its
797 bit-shift for INSTR_SAVED. */
798 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
799 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
801 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
803 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
804 and not any of the other ones that are stored in SHADOW_CONTENTS. */
805 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
806 val
= target_write_raw_memory (addr
, bundle_mem
, BUNDLE_LEN
);
808 do_cleanups (cleanup
);
812 /* Implement the breakpoint_kind_from_pc gdbarch method. */
815 ia64_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
817 /* A place holder of gdbarch method breakpoint_kind_from_pc. */
821 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
822 instruction slots ranges are bit-granular (41 bits) we have to provide an
823 extended range as described for ia64_memory_insert_breakpoint. We also take
824 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
825 make a match for permanent breakpoints. */
827 static const gdb_byte
*
828 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
,
829 CORE_ADDR
*pcptr
, int *lenptr
)
831 CORE_ADDR addr
= *pcptr
;
832 static gdb_byte bundle
[BUNDLE_LEN
];
833 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
834 long long instr_fetched
;
837 struct cleanup
*cleanup
;
840 error (_("Can't insert breakpoint for slot numbers greater than 2."));
844 /* Enable the automatic memory restoration from breakpoints while
845 we read our instruction bundle to match bp_loc_is_permanent. */
846 cleanup
= make_show_memory_breakpoints_cleanup (0);
847 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
848 do_cleanups (cleanup
);
850 /* The memory might be unreachable. This can happen, for instance,
851 when the user inserts a breakpoint at an invalid address. */
855 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
856 for addressing the SHADOW_CONTENTS placement. */
857 shadow_slotnum
= slotnum
;
859 /* Cover always the last byte of the bundle for the L-X slot case. */
860 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
862 /* Check for L type instruction in slot 1, if present then bump up the slot
863 number to the slot 2. */
864 templ
= extract_bit_field (bundle
, 0, 5);
865 if (template_encoding_table
[templ
][slotnum
] == X
)
867 gdb_assert (slotnum
== 2);
868 error (_("Can't insert breakpoint for non-existing slot X"));
870 if (template_encoding_table
[templ
][slotnum
] == L
)
872 gdb_assert (slotnum
== 1);
876 /* A break instruction has its all its opcode bits cleared except for
877 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
878 we should not touch the L slot - the upper 41 bits of the parameter. */
879 instr_fetched
= slotN_contents (bundle
, slotnum
);
880 instr_fetched
&= 0x1003ffffc0LL
;
881 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
883 return bundle
+ shadow_slotnum
;
887 ia64_read_pc (struct regcache
*regcache
)
889 ULONGEST psr_value
, pc_value
;
892 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
893 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
894 slot_num
= (psr_value
>> 41) & 3;
896 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
900 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
902 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
905 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
906 psr_value
&= ~(3LL << 41);
907 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
911 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
912 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
915 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
917 /* Returns the address of the slot that's NSLOTS slots away from
918 the address ADDR. NSLOTS may be positive or negative. */
920 rse_address_add(CORE_ADDR addr
, int nslots
)
923 int mandatory_nat_slots
= nslots
/ 63;
924 int direction
= nslots
< 0 ? -1 : 1;
926 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
928 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
929 new_addr
+= 8 * direction
;
931 if (IS_NaT_COLLECTION_ADDR(new_addr
))
932 new_addr
+= 8 * direction
;
937 static enum register_status
938 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
939 int regnum
, gdb_byte
*buf
)
941 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
942 enum register_status status
;
944 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
946 #ifdef HAVE_LIBUNWIND_IA64_H
947 /* First try and use the libunwind special reg accessor,
948 otherwise fallback to standard logic. */
949 if (!libunwind_is_initialized ()
950 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
953 /* The fallback position is to assume that r32-r127 are
954 found sequentially in memory starting at $bof. This
955 isn't always true, but without libunwind, this is the
957 enum register_status status
;
962 status
= regcache_cooked_read_unsigned (regcache
,
963 IA64_BSP_REGNUM
, &bsp
);
964 if (status
!= REG_VALID
)
967 status
= regcache_cooked_read_unsigned (regcache
,
968 IA64_CFM_REGNUM
, &cfm
);
969 if (status
!= REG_VALID
)
972 /* The bsp points at the end of the register frame so we
973 subtract the size of frame from it to get start of
975 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
977 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
979 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
980 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
981 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
985 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
989 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
993 status
= regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
994 if (status
!= REG_VALID
)
996 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
997 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
998 byte_order
, unatN_val
);
1000 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1002 ULONGEST natN_val
= 0;
1005 CORE_ADDR gr_addr
= 0;
1006 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1007 if (status
!= REG_VALID
)
1009 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1010 if (status
!= REG_VALID
)
1013 /* The bsp points at the end of the register frame so we
1014 subtract the size of frame from it to get start of register frame. */
1015 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1017 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1018 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1022 /* Compute address of nat collection bits. */
1023 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1024 CORE_ADDR nat_collection
;
1026 /* If our nat collection address is bigger than bsp, we have to get
1027 the nat collection from rnat. Otherwise, we fetch the nat
1028 collection from the computed address. */
1029 if (nat_addr
>= bsp
)
1030 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
,
1033 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1034 nat_bit
= (gr_addr
>> 3) & 0x3f;
1035 natN_val
= (nat_collection
>> nat_bit
) & 1;
1038 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1039 byte_order
, natN_val
);
1041 else if (regnum
== VBOF_REGNUM
)
1043 /* A virtual register frame start is provided for user convenience.
1044 It can be calculated as the bsp - sof (sizeof frame). */
1047 status
= regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1048 if (status
!= REG_VALID
)
1050 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1051 if (status
!= REG_VALID
)
1054 /* The bsp points at the end of the register frame so we
1055 subtract the size of frame from it to get beginning of frame. */
1056 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1057 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1060 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1065 status
= regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1066 if (status
!= REG_VALID
)
1068 status
= regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1069 if (status
!= REG_VALID
)
1072 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1074 /* Fetch predicate register rename base from current frame
1075 marker for this frame. */
1076 int rrb_pr
= (cfm
>> 32) & 0x3f;
1078 /* Adjust the register number to account for register rotation. */
1079 regnum
= VP16_REGNUM
1080 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1082 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1083 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1084 byte_order
, prN_val
);
1087 memset (buf
, 0, register_size (gdbarch
, regnum
));
1093 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1094 int regnum
, const gdb_byte
*buf
)
1096 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1098 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1102 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1103 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1105 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1107 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1109 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1110 write_memory (reg_addr
, buf
, 8);
1113 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1115 ULONGEST unatN_val
, unat
, unatN_mask
;
1116 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1117 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1120 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1122 unat
&= ~unatN_mask
;
1123 else if (unatN_val
== 1)
1125 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1127 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1132 CORE_ADDR gr_addr
= 0;
1133 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1134 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1136 /* The bsp points at the end of the register frame so we
1137 subtract the size of frame from it to get start of register frame. */
1138 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1140 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1141 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1143 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1147 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1149 /* Compute address of nat collection bits. */
1150 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1151 CORE_ADDR nat_collection
;
1152 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1153 ULONGEST natN_mask
= (1LL << natN_bit
);
1154 /* If our nat collection address is bigger than bsp, we have to get
1155 the nat collection from rnat. Otherwise, we fetch the nat
1156 collection from the computed address. */
1157 if (nat_addr
>= bsp
)
1159 regcache_cooked_read_unsigned (regcache
,
1163 nat_collection
|= natN_mask
;
1165 nat_collection
&= ~natN_mask
;
1166 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
,
1171 gdb_byte nat_buf
[8];
1172 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1174 nat_collection
|= natN_mask
;
1176 nat_collection
&= ~natN_mask
;
1177 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1178 byte_order
, nat_collection
);
1179 write_memory (nat_addr
, nat_buf
, 8);
1183 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1190 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1191 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1193 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1195 /* Fetch predicate register rename base from current frame
1196 marker for this frame. */
1197 int rrb_pr
= (cfm
>> 32) & 0x3f;
1199 /* Adjust the register number to account for register rotation. */
1200 regnum
= VP16_REGNUM
1201 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1203 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1205 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1208 else if (prN_val
== 1)
1210 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1214 /* The ia64 needs to convert between various ieee floating-point formats
1215 and the special ia64 floating point register format. */
1218 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1220 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1221 && type
!= ia64_ext_type (gdbarch
));
1225 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1226 struct type
*valtype
, gdb_byte
*out
,
1227 int *optimizedp
, int *unavailablep
)
1229 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1230 gdb_byte in
[MAX_REGISTER_SIZE
];
1232 /* Convert to TYPE. */
1233 if (!get_frame_register_bytes (frame
, regnum
, 0,
1234 register_size (gdbarch
, regnum
),
1235 in
, optimizedp
, unavailablep
))
1238 convert_typed_floating (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1239 *optimizedp
= *unavailablep
= 0;
1244 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1245 struct type
*valtype
, const gdb_byte
*in
)
1247 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1248 gdb_byte out
[MAX_REGISTER_SIZE
];
1249 convert_typed_floating (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1250 put_frame_register (frame
, regnum
, out
);
1254 /* Limit the number of skipped non-prologue instructions since examining
1255 of the prologue is expensive. */
1256 static int max_skip_non_prologue_insns
= 40;
1258 /* Given PC representing the starting address of a function, and
1259 LIM_PC which is the (sloppy) limit to which to scan when looking
1260 for a prologue, attempt to further refine this limit by using
1261 the line data in the symbol table. If successful, a better guess
1262 on where the prologue ends is returned, otherwise the previous
1263 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1264 which will be set to indicate whether the returned limit may be
1265 used with no further scanning in the event that the function is
1268 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1269 superseded by skip_prologue_using_sal. */
1272 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1274 struct symtab_and_line prologue_sal
;
1275 CORE_ADDR start_pc
= pc
;
1278 /* The prologue can not possibly go past the function end itself,
1279 so we can already adjust LIM_PC accordingly. */
1280 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1283 /* Start off not trusting the limit. */
1286 prologue_sal
= find_pc_line (pc
, 0);
1287 if (prologue_sal
.line
!= 0)
1290 CORE_ADDR addr
= prologue_sal
.end
;
1292 /* Handle the case in which compiler's optimizer/scheduler
1293 has moved instructions into the prologue. We scan ahead
1294 in the function looking for address ranges whose corresponding
1295 line number is less than or equal to the first one that we
1296 found for the function. (It can be less than when the
1297 scheduler puts a body instruction before the first prologue
1299 for (i
= 2 * max_skip_non_prologue_insns
;
1300 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1303 struct symtab_and_line sal
;
1305 sal
= find_pc_line (addr
, 0);
1308 if (sal
.line
<= prologue_sal
.line
1309 && sal
.symtab
== prologue_sal
.symtab
)
1316 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1318 lim_pc
= prologue_sal
.end
;
1319 if (start_pc
== get_pc_function_start (lim_pc
))
1326 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1327 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1328 || (14 <= (_regnum_) && (_regnum_) <= 31))
1329 #define imm9(_instr_) \
1330 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1331 | (((_instr_) & 0x00008000000LL) >> 20) \
1332 | (((_instr_) & 0x00000001fc0LL) >> 6))
1334 /* Allocate and initialize a frame cache. */
1336 static struct ia64_frame_cache
*
1337 ia64_alloc_frame_cache (void)
1339 struct ia64_frame_cache
*cache
;
1342 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1348 cache
->prev_cfm
= 0;
1354 cache
->frameless
= 1;
1356 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1357 cache
->saved_regs
[i
] = 0;
1363 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1364 struct frame_info
*this_frame
,
1365 struct ia64_frame_cache
*cache
)
1368 CORE_ADDR last_prologue_pc
= pc
;
1369 instruction_type it
;
1374 int unat_save_reg
= 0;
1375 int pr_save_reg
= 0;
1376 int mem_stack_frame_size
= 0;
1378 CORE_ADDR spill_addr
= 0;
1381 char reg_contents
[256];
1387 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1389 memset (instores
, 0, sizeof instores
);
1390 memset (infpstores
, 0, sizeof infpstores
);
1391 memset (reg_contents
, 0, sizeof reg_contents
);
1393 if (cache
->after_prologue
!= 0
1394 && cache
->after_prologue
<= lim_pc
)
1395 return cache
->after_prologue
;
1397 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1398 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1400 /* We want to check if we have a recognizable function start before we
1401 look ahead for a prologue. */
1402 if (pc
< lim_pc
&& next_pc
1403 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1405 /* alloc - start of a regular function. */
1406 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1407 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1408 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1410 /* Verify that the current cfm matches what we think is the
1411 function start. If we have somehow jumped within a function,
1412 we do not want to interpret the prologue and calculate the
1413 addresses of various registers such as the return address.
1414 We will instead treat the frame as frameless. */
1416 (sof
== (cache
->cfm
& 0x7f) &&
1417 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1421 last_prologue_pc
= next_pc
;
1426 /* Look for a leaf routine. */
1427 if (pc
< lim_pc
&& next_pc
1428 && (it
== I
|| it
== M
)
1429 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1431 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1432 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1433 | ((instr
& 0x001f8000000LL
) >> 20)
1434 | ((instr
& 0x000000fe000LL
) >> 13));
1435 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1436 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1437 int qp
= (int) (instr
& 0x0000000003fLL
);
1438 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1440 /* mov r2, r12 - beginning of leaf routine. */
1442 last_prologue_pc
= next_pc
;
1446 /* If we don't recognize a regular function or leaf routine, we are
1452 last_prologue_pc
= lim_pc
;
1456 /* Loop, looking for prologue instructions, keeping track of
1457 where preserved registers were spilled. */
1460 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1464 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1466 /* Exit loop upon hitting a non-nop branch instruction. */
1471 else if (((instr
& 0x3fLL
) != 0LL) &&
1472 (frameless
|| ret_reg
!= 0))
1474 /* Exit loop upon hitting a predicated instruction if
1475 we already have the return register or if we are frameless. */
1480 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1483 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1484 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1485 int qp
= (int) (instr
& 0x0000000003f);
1487 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1490 last_prologue_pc
= next_pc
;
1493 else if ((it
== I
|| it
== M
)
1494 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1496 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1497 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1498 | ((instr
& 0x001f8000000LL
) >> 20)
1499 | ((instr
& 0x000000fe000LL
) >> 13));
1500 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1501 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1502 int qp
= (int) (instr
& 0x0000000003fLL
);
1504 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1508 last_prologue_pc
= next_pc
;
1510 else if (qp
== 0 && rN
== 12 && rM
== 12)
1512 /* adds r12, -mem_stack_frame_size, r12 */
1513 mem_stack_frame_size
-= imm
;
1514 last_prologue_pc
= next_pc
;
1516 else if (qp
== 0 && rN
== 2
1517 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1519 CORE_ADDR saved_sp
= 0;
1520 /* adds r2, spilloffset, rFramePointer
1522 adds r2, spilloffset, r12
1524 Get ready for stf.spill or st8.spill instructions.
1525 The address to start spilling at is loaded into r2.
1526 FIXME: Why r2? That's what gcc currently uses; it
1527 could well be different for other compilers. */
1529 /* Hmm... whether or not this will work will depend on
1530 where the pc is. If it's still early in the prologue
1531 this'll be wrong. FIXME */
1534 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1535 saved_sp
= get_frame_register_unsigned (this_frame
,
1538 spill_addr
= saved_sp
1539 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1542 last_prologue_pc
= next_pc
;
1544 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1545 rN
< 256 && imm
== 0)
1547 /* mov rN, rM where rM is an input register. */
1548 reg_contents
[rN
] = rM
;
1549 last_prologue_pc
= next_pc
;
1551 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1555 last_prologue_pc
= next_pc
;
1560 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1561 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1563 /* stf.spill [rN] = fM, imm9
1565 stf.spill [rN] = fM */
1567 int imm
= imm9(instr
);
1568 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1569 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1570 int qp
= (int) (instr
& 0x0000000003fLL
);
1571 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1572 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1574 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1576 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1579 spill_addr
= 0; /* last one; must be done. */
1580 last_prologue_pc
= next_pc
;
1583 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1584 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1590 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1591 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1592 int qp
= (int) (instr
& 0x0000000003fLL
);
1593 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1595 /* We have something like "mov.m r3 = ar.unat". Remember the
1596 r3 (or whatever) and watch for a store of this register... */
1598 last_prologue_pc
= next_pc
;
1601 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1604 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1605 int qp
= (int) (instr
& 0x0000000003fLL
);
1606 if (qp
== 0 && isScratch (rN
))
1609 last_prologue_pc
= next_pc
;
1613 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1614 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1618 st8 [rN] = rM, imm9 */
1619 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1620 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1621 int qp
= (int) (instr
& 0x0000000003fLL
);
1622 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1623 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1624 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1626 /* We've found a spill of either the UNAT register or the PR
1627 register. (Well, not exactly; what we've actually found is
1628 a spill of the register that UNAT or PR was moved to).
1629 Record that fact and move on... */
1630 if (rM
== unat_save_reg
)
1632 /* Track UNAT register. */
1633 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1638 /* Track PR register. */
1639 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1642 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1643 /* st8 [rN] = rM, imm9 */
1644 spill_addr
+= imm9(instr
);
1646 spill_addr
= 0; /* Must be done spilling. */
1647 last_prologue_pc
= next_pc
;
1649 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1651 /* Allow up to one store of each input register. */
1652 instores
[rM
-32] = 1;
1653 last_prologue_pc
= next_pc
;
1655 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1656 !instores
[indirect
-32])
1658 /* Allow an indirect store of an input register. */
1659 instores
[indirect
-32] = 1;
1660 last_prologue_pc
= next_pc
;
1663 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1670 Note that the st8 case is handled in the clause above.
1672 Advance over stores of input registers. One store per input
1673 register is permitted. */
1674 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1675 int qp
= (int) (instr
& 0x0000000003fLL
);
1676 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1677 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1679 instores
[rM
-32] = 1;
1680 last_prologue_pc
= next_pc
;
1682 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1683 !instores
[indirect
-32])
1685 /* Allow an indirect store of an input register. */
1686 instores
[indirect
-32] = 1;
1687 last_prologue_pc
= next_pc
;
1690 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1697 Advance over stores of floating point input registers. Again
1698 one store per register is permitted. */
1699 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1700 int qp
= (int) (instr
& 0x0000000003fLL
);
1701 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1703 infpstores
[fM
-8] = 1;
1704 last_prologue_pc
= next_pc
;
1708 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1709 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1711 /* st8.spill [rN] = rM
1713 st8.spill [rN] = rM, imm9 */
1714 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1715 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1716 int qp
= (int) (instr
& 0x0000000003fLL
);
1717 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1719 /* We've found a spill of one of the preserved general purpose
1720 regs. Record the spill address and advance the spill
1721 register if appropriate. */
1722 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1723 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1724 /* st8.spill [rN] = rM, imm9 */
1725 spill_addr
+= imm9(instr
);
1727 spill_addr
= 0; /* Done spilling. */
1728 last_prologue_pc
= next_pc
;
1735 /* If not frameless and we aren't called by skip_prologue, then we need
1736 to calculate registers for the previous frame which will be needed
1739 if (!frameless
&& this_frame
)
1741 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1742 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1744 /* Extract the size of the rotating portion of the stack
1745 frame and the register rename base from the current
1751 rrb_gr
= (cfm
>> 18) & 0x7f;
1753 /* Find the bof (beginning of frame). */
1754 bof
= rse_address_add (cache
->bsp
, -sof
);
1756 for (i
= 0, addr
= bof
;
1760 if (IS_NaT_COLLECTION_ADDR (addr
))
1764 if (i
+32 == cfm_reg
)
1765 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1766 if (i
+32 == ret_reg
)
1767 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1769 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1772 /* For the previous argument registers we require the previous bof.
1773 If we can't find the previous cfm, then we can do nothing. */
1775 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1777 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1780 else if (cfm_reg
!= 0)
1782 get_frame_register (this_frame
, cfm_reg
, buf
);
1783 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1785 cache
->prev_cfm
= cfm
;
1789 sor
= ((cfm
>> 14) & 0xf) * 8;
1791 sol
= (cfm
>> 7) & 0x7f;
1792 rrb_gr
= (cfm
>> 18) & 0x7f;
1794 /* The previous bof only requires subtraction of the sol (size of
1795 locals) due to the overlap between output and input of
1796 subsequent frames. */
1797 bof
= rse_address_add (bof
, -sol
);
1799 for (i
= 0, addr
= bof
;
1803 if (IS_NaT_COLLECTION_ADDR (addr
))
1808 cache
->saved_regs
[IA64_GR32_REGNUM
1809 + ((i
+ (sor
- rrb_gr
)) % sor
)]
1812 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1818 /* Try and trust the lim_pc value whenever possible. */
1819 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1820 last_prologue_pc
= lim_pc
;
1822 cache
->frameless
= frameless
;
1823 cache
->after_prologue
= last_prologue_pc
;
1824 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1825 cache
->fp_reg
= fp_reg
;
1827 return last_prologue_pc
;
1831 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1833 struct ia64_frame_cache cache
;
1835 cache
.after_prologue
= 0;
1839 /* Call examine_prologue with - as third argument since we don't
1840 have a next frame pointer to send. */
1841 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1845 /* Normal frames. */
1847 static struct ia64_frame_cache
*
1848 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1850 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1851 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1852 struct ia64_frame_cache
*cache
;
1857 return (struct ia64_frame_cache
*) *this_cache
;
1859 cache
= ia64_alloc_frame_cache ();
1860 *this_cache
= cache
;
1862 get_frame_register (this_frame
, sp_regnum
, buf
);
1863 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1865 /* We always want the bsp to point to the end of frame.
1866 This way, we can always get the beginning of frame (bof)
1867 by subtracting frame size. */
1868 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1869 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1871 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1873 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1874 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1876 cache
->sof
= (cfm
& 0x7f);
1877 cache
->sol
= (cfm
>> 7) & 0x7f;
1878 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1882 cache
->pc
= get_frame_func (this_frame
);
1885 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1887 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1893 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1894 struct frame_id
*this_id
)
1896 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1897 struct ia64_frame_cache
*cache
=
1898 ia64_frame_cache (this_frame
, this_cache
);
1900 /* If outermost frame, mark with null frame id. */
1901 if (cache
->base
!= 0)
1902 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1903 if (gdbarch_debug
>= 1)
1904 fprintf_unfiltered (gdb_stdlog
,
1905 "regular frame id: code %s, stack %s, "
1906 "special %s, this_frame %s\n",
1907 paddress (gdbarch
, this_id
->code_addr
),
1908 paddress (gdbarch
, this_id
->stack_addr
),
1909 paddress (gdbarch
, cache
->bsp
),
1910 host_address_to_string (this_frame
));
1913 static struct value
*
1914 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1917 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1918 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1919 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1922 gdb_assert (regnum
>= 0);
1924 if (!target_has_registers
)
1925 error (_("No registers."));
1927 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1928 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1930 else if (regnum
== IA64_BSP_REGNUM
)
1933 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1935 /* We want to calculate the previous bsp as the end of the previous
1936 register stack frame. This corresponds to what the hardware bsp
1937 register will be if we pop the frame back which is why we might
1938 have been called. We know the beginning of the current frame is
1939 cache->bsp - cache->sof. This value in the previous frame points
1940 to the start of the output registers. We can calculate the end of
1941 that frame by adding the size of output:
1942 (sof (size of frame) - sol (size of locals)). */
1943 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1944 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1946 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1948 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1950 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1953 else if (regnum
== IA64_CFM_REGNUM
)
1955 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1958 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1960 if (cache
->prev_cfm
)
1961 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1963 if (cache
->frameless
)
1964 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1966 return frame_unwind_got_register (this_frame
, regnum
, 0);
1969 else if (regnum
== IA64_VFP_REGNUM
)
1971 /* If the function in question uses an automatic register (r32-r127)
1972 for the frame pointer, it'll be found by ia64_find_saved_register()
1973 above. If the function lacks one of these frame pointers, we can
1974 still provide a value since we know the size of the frame. */
1975 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1978 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1980 struct value
*pr_val
;
1983 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1985 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1987 /* Fetch predicate register rename base from current frame
1988 marker for this frame. */
1989 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1991 /* Adjust the register number to account for register rotation. */
1992 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1994 prN
= extract_bit_field (value_contents_all (pr_val
),
1995 regnum
- VP0_REGNUM
, 1);
1996 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
1999 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
2001 struct value
*unat_val
;
2003 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2005 unatN
= extract_bit_field (value_contents_all (unat_val
),
2006 regnum
- IA64_NAT0_REGNUM
, 1);
2007 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
2010 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2013 /* Find address of general register corresponding to nat bit we're
2017 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
2021 /* Compute address of nat collection bits. */
2022 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
2024 CORE_ADDR nat_collection
;
2027 /* If our nat collection address is bigger than bsp, we have to get
2028 the nat collection from rnat. Otherwise, we fetch the nat
2029 collection from the computed address. */
2030 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2031 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2032 if (nat_addr
>= bsp
)
2034 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
2035 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
2038 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
2039 nat_bit
= (gr_addr
>> 3) & 0x3f;
2040 natval
= (nat_collection
>> nat_bit
) & 1;
2043 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
2046 else if (regnum
== IA64_IP_REGNUM
)
2049 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2053 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2054 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2056 else if (cache
->frameless
)
2058 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2059 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2062 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2065 else if (regnum
== IA64_PSR_REGNUM
)
2067 /* We don't know how to get the complete previous PSR, but we need it
2068 for the slot information when we unwind the pc (pc is formed of IP
2069 register plus slot information from PSR). To get the previous
2070 slot information, we mask it off the return address. */
2071 ULONGEST slot_num
= 0;
2074 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2076 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2077 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2081 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2082 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2084 else if (cache
->frameless
)
2086 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2087 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2089 psr
&= ~(3LL << 41);
2090 slot_num
= pc
& 0x3LL
;
2091 psr
|= (CORE_ADDR
)slot_num
<< 41;
2092 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2095 else if (regnum
== IA64_BR0_REGNUM
)
2097 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2100 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2102 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2105 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2106 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2110 if (regnum
>= V32_REGNUM
)
2111 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2112 addr
= cache
->saved_regs
[regnum
];
2114 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2116 if (cache
->frameless
)
2118 struct value
*reg_val
;
2119 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2121 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2122 with the same code above? */
2123 if (regnum
>= V32_REGNUM
)
2124 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2125 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2127 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2129 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2131 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2133 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2135 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2136 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2139 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2142 else /* All other registers. */
2146 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2148 /* Fetch floating point register rename base from current
2149 frame marker for this frame. */
2150 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2152 /* Adjust the floating point register number to account for
2153 register rotation. */
2154 regnum
= IA64_FR32_REGNUM
2155 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2158 /* If we have stored a memory address, access the register. */
2159 addr
= cache
->saved_regs
[regnum
];
2161 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2162 /* Otherwise, punt and get the current value of the register. */
2164 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2168 static const struct frame_unwind ia64_frame_unwind
=
2171 default_frame_unwind_stop_reason
,
2172 &ia64_frame_this_id
,
2173 &ia64_frame_prev_register
,
2175 default_frame_sniffer
2178 /* Signal trampolines. */
2181 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2182 struct ia64_frame_cache
*cache
)
2184 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2185 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2187 if (tdep
->sigcontext_register_address
)
2191 cache
->saved_regs
[IA64_VRAP_REGNUM
]
2192 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2194 cache
->saved_regs
[IA64_CFM_REGNUM
]
2195 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2197 cache
->saved_regs
[IA64_PSR_REGNUM
]
2198 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2200 cache
->saved_regs
[IA64_BSP_REGNUM
]
2201 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2203 cache
->saved_regs
[IA64_RNAT_REGNUM
]
2204 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2206 cache
->saved_regs
[IA64_CCV_REGNUM
]
2207 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2209 cache
->saved_regs
[IA64_UNAT_REGNUM
]
2210 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2212 cache
->saved_regs
[IA64_FPSR_REGNUM
]
2213 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2215 cache
->saved_regs
[IA64_PFS_REGNUM
]
2216 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2218 cache
->saved_regs
[IA64_LC_REGNUM
]
2219 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2222 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2223 cache
->saved_regs
[regno
] =
2224 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2225 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2226 cache
->saved_regs
[regno
] =
2227 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2228 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2229 cache
->saved_regs
[regno
] =
2230 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2234 static struct ia64_frame_cache
*
2235 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2237 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2238 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2239 struct ia64_frame_cache
*cache
;
2243 return (struct ia64_frame_cache
*) *this_cache
;
2245 cache
= ia64_alloc_frame_cache ();
2247 get_frame_register (this_frame
, sp_regnum
, buf
);
2248 /* Note that frame size is hard-coded below. We cannot calculate it
2249 via prologue examination. */
2250 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2252 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2253 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2255 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2256 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2257 cache
->sof
= cache
->cfm
& 0x7f;
2259 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2261 *this_cache
= cache
;
2266 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2267 void **this_cache
, struct frame_id
*this_id
)
2269 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2270 struct ia64_frame_cache
*cache
=
2271 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2273 (*this_id
) = frame_id_build_special (cache
->base
,
2274 get_frame_pc (this_frame
),
2276 if (gdbarch_debug
>= 1)
2277 fprintf_unfiltered (gdb_stdlog
,
2278 "sigtramp frame id: code %s, stack %s, "
2279 "special %s, this_frame %s\n",
2280 paddress (gdbarch
, this_id
->code_addr
),
2281 paddress (gdbarch
, this_id
->stack_addr
),
2282 paddress (gdbarch
, cache
->bsp
),
2283 host_address_to_string (this_frame
));
2286 static struct value
*
2287 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2288 void **this_cache
, int regnum
)
2290 struct ia64_frame_cache
*cache
=
2291 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2293 gdb_assert (regnum
>= 0);
2295 if (!target_has_registers
)
2296 error (_("No registers."));
2298 if (regnum
== IA64_IP_REGNUM
)
2301 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2305 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2306 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2307 pc
= read_memory_unsigned_integer (addr
, 8, byte_order
);
2310 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2313 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2314 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2318 if (regnum
>= V32_REGNUM
)
2319 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2320 addr
= cache
->saved_regs
[regnum
];
2322 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2324 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2327 else /* All other registers not listed above. */
2329 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2332 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2334 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2339 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2340 struct frame_info
*this_frame
,
2343 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2344 if (tdep
->pc_in_sigtramp
)
2346 CORE_ADDR pc
= get_frame_pc (this_frame
);
2348 if (tdep
->pc_in_sigtramp (pc
))
2355 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2358 default_frame_unwind_stop_reason
,
2359 ia64_sigtramp_frame_this_id
,
2360 ia64_sigtramp_frame_prev_register
,
2362 ia64_sigtramp_frame_sniffer
2368 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2370 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2375 static const struct frame_base ia64_frame_base
=
2378 ia64_frame_base_address
,
2379 ia64_frame_base_address
,
2380 ia64_frame_base_address
2383 #ifdef HAVE_LIBUNWIND_IA64_H
2385 struct ia64_unwind_table_entry
2387 unw_word_t start_offset
;
2388 unw_word_t end_offset
;
2389 unw_word_t info_offset
;
2392 static __inline__
uint64_t
2393 ia64_rse_slot_num (uint64_t addr
)
2395 return (addr
>> 3) & 0x3f;
2398 /* Skip over a designated number of registers in the backing
2399 store, remembering every 64th position is for NAT. */
2400 static __inline__
uint64_t
2401 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2403 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2407 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2410 /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
2411 register number to a libunwind register number. */
2413 ia64_gdb2uw_regnum (int regnum
)
2415 if (regnum
== sp_regnum
)
2417 else if (regnum
== IA64_BSP_REGNUM
)
2418 return UNW_IA64_BSP
;
2419 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2420 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2421 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2422 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2423 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2424 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2425 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2427 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2428 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2429 else if (regnum
== IA64_PR_REGNUM
)
2431 else if (regnum
== IA64_IP_REGNUM
)
2433 else if (regnum
== IA64_CFM_REGNUM
)
2434 return UNW_IA64_CFM
;
2435 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2436 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2437 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2438 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2443 /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
2444 register number to a ia64 gdb register number. */
2446 ia64_uw2gdb_regnum (int uw_regnum
)
2448 if (uw_regnum
== UNW_IA64_SP
)
2450 else if (uw_regnum
== UNW_IA64_BSP
)
2451 return IA64_BSP_REGNUM
;
2452 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2453 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2454 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2455 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2456 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2457 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2458 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2459 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2460 else if (uw_regnum
== UNW_IA64_PR
)
2461 return IA64_PR_REGNUM
;
2462 else if (uw_regnum
== UNW_REG_IP
)
2463 return IA64_IP_REGNUM
;
2464 else if (uw_regnum
== UNW_IA64_CFM
)
2465 return IA64_CFM_REGNUM
;
2466 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2467 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2468 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2469 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2474 /* Gdb ia64-libunwind-tdep callback function to reveal if register is
2475 a float register or not. */
2477 ia64_is_fpreg (int uw_regnum
)
2479 return unw_is_fpreg (uw_regnum
);
2482 /* Libunwind callback accessor function for general registers. */
2484 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2485 int write
, void *arg
)
2487 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2488 unw_word_t bsp
, sof
, cfm
, psr
, ip
;
2489 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2490 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2491 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2492 long new_sof
, old_sof
;
2494 /* We never call any libunwind routines that need to write registers. */
2495 gdb_assert (!write
);
2500 /* Libunwind expects to see the pc value which means the slot number
2501 from the psr must be merged with the ip word address. */
2502 ip
= get_frame_register_unsigned (this_frame
, IA64_IP_REGNUM
);
2503 psr
= get_frame_register_unsigned (this_frame
, IA64_PSR_REGNUM
);
2504 *val
= ip
| ((psr
>> 41) & 0x3);
2507 case UNW_IA64_AR_BSP
:
2508 /* Libunwind expects to see the beginning of the current
2509 register frame so we must account for the fact that
2510 ptrace() will return a value for bsp that points *after*
2511 the current register frame. */
2512 bsp
= get_frame_register_unsigned (this_frame
, IA64_BSP_REGNUM
);
2513 cfm
= get_frame_register_unsigned (this_frame
, IA64_CFM_REGNUM
);
2514 sof
= gdbarch_tdep (gdbarch
)->size_of_register_frame (this_frame
, cfm
);
2515 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2518 case UNW_IA64_AR_BSPSTORE
:
2519 /* Libunwind wants bspstore to be after the current register frame.
2520 This is what ptrace() and gdb treats as the regular bsp value. */
2521 *val
= get_frame_register_unsigned (this_frame
, IA64_BSP_REGNUM
);
2525 /* For all other registers, just unwind the value directly. */
2526 *val
= get_frame_register_unsigned (this_frame
, regnum
);
2530 if (gdbarch_debug
>= 1)
2531 fprintf_unfiltered (gdb_stdlog
,
2532 " access_reg: from cache: %4s=%s\n",
2533 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2534 ? ia64_register_names
[regnum
] : "r??"),
2535 paddress (gdbarch
, *val
));
2539 /* Libunwind callback accessor function for floating-point registers. */
2541 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2542 unw_fpreg_t
*val
, int write
, void *arg
)
2544 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2545 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2547 /* We never call any libunwind routines that need to write registers. */
2548 gdb_assert (!write
);
2550 get_frame_register (this_frame
, regnum
, (gdb_byte
*) val
);
2555 /* Libunwind callback accessor function for top-level rse registers. */
2557 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2558 unw_word_t
*val
, int write
, void *arg
)
2560 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2561 unw_word_t bsp
, sof
, cfm
, psr
, ip
;
2562 struct regcache
*regcache
= (struct regcache
*) arg
;
2563 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
2564 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2565 long new_sof
, old_sof
;
2567 /* We never call any libunwind routines that need to write registers. */
2568 gdb_assert (!write
);
2573 /* Libunwind expects to see the pc value which means the slot number
2574 from the psr must be merged with the ip word address. */
2575 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &ip
);
2576 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr
);
2577 *val
= ip
| ((psr
>> 41) & 0x3);
2580 case UNW_IA64_AR_BSP
:
2581 /* Libunwind expects to see the beginning of the current
2582 register frame so we must account for the fact that
2583 ptrace() will return a value for bsp that points *after*
2584 the current register frame. */
2585 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
2586 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
2588 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2591 case UNW_IA64_AR_BSPSTORE
:
2592 /* Libunwind wants bspstore to be after the current register frame.
2593 This is what ptrace() and gdb treats as the regular bsp value. */
2594 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, val
);
2598 /* For all other registers, just unwind the value directly. */
2599 regcache_cooked_read_unsigned (regcache
, regnum
, val
);
2603 if (gdbarch_debug
>= 1)
2604 fprintf_unfiltered (gdb_stdlog
,
2605 " access_rse_reg: from cache: %4s=%s\n",
2606 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2607 ? ia64_register_names
[regnum
] : "r??"),
2608 paddress (gdbarch
, *val
));
2613 /* Libunwind callback accessor function for top-level fp registers. */
2615 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2616 unw_fpreg_t
*val
, int write
, void *arg
)
2618 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2619 struct regcache
*regcache
= (struct regcache
*) arg
;
2621 /* We never call any libunwind routines that need to write registers. */
2622 gdb_assert (!write
);
2624 regcache_cooked_read (regcache
, regnum
, (gdb_byte
*) val
);
2629 /* Libunwind callback accessor function for accessing memory. */
2631 ia64_access_mem (unw_addr_space_t as
,
2632 unw_word_t addr
, unw_word_t
*val
,
2633 int write
, void *arg
)
2635 if (addr
- KERNEL_START
< ktab_size
)
2637 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2638 + (addr
- KERNEL_START
));
2647 /* XXX do we need to normalize byte-order here? */
2649 return target_write_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2651 return target_read_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2654 /* Call low-level function to access the kernel unwind table. */
2656 getunwind_table (gdb_byte
**buf_p
)
2660 /* FIXME drow/2005-09-10: This code used to call
2661 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2662 for the currently running ia64-linux kernel. That data should
2663 come from the core file and be accessed via the auxv vector; if
2664 we want to preserve fall back to the running kernel's table, then
2665 we should find a way to override the corefile layer's
2666 xfer_partial method. */
2668 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2674 /* Get the kernel unwind table. */
2676 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2678 static struct ia64_table_entry
*etab
;
2685 size
= getunwind_table (&ktab_buf
);
2687 return -UNW_ENOINFO
;
2689 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2692 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2693 etab
->info_offset
+= KERNEL_START
;
2696 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2697 return -UNW_ENOINFO
;
2699 di
->format
= UNW_INFO_FORMAT_TABLE
;
2701 di
->start_ip
= ktab
[0].start_offset
;
2702 di
->end_ip
= etab
[-1].end_offset
;
2703 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2704 di
->u
.ti
.segbase
= 0;
2705 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2706 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2708 if (gdbarch_debug
>= 1)
2709 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2710 "segbase=%s, length=%s, gp=%s\n",
2711 (char *) di
->u
.ti
.name_ptr
,
2712 hex_string (di
->u
.ti
.segbase
),
2713 pulongest (di
->u
.ti
.table_len
),
2714 hex_string (di
->gp
));
2718 /* Find the unwind table entry for a specified address. */
2720 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2721 unw_dyn_info_t
*dip
, void **buf
)
2723 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2724 Elf_Internal_Ehdr
*ehdr
;
2725 unw_word_t segbase
= 0;
2726 CORE_ADDR load_base
;
2730 bfd
= objfile
->obfd
;
2732 ehdr
= elf_tdata (bfd
)->elf_header
;
2733 phdr
= elf_tdata (bfd
)->phdr
;
2735 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2737 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2739 switch (phdr
[i
].p_type
)
2742 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2747 case PT_IA_64_UNWIND
:
2748 p_unwind
= phdr
+ i
;
2756 if (!p_text
|| !p_unwind
)
2757 return -UNW_ENOINFO
;
2759 /* Verify that the segment that contains the IP also contains
2760 the static unwind table. If not, we may be in the Linux kernel's
2761 DSO gate page in which case the unwind table is another segment.
2762 Otherwise, we are dealing with runtime-generated code, for which we
2763 have no info here. */
2764 segbase
= p_text
->p_vaddr
+ load_base
;
2766 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2769 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2771 if (phdr
[i
].p_type
== PT_LOAD
2772 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2775 /* Get the segbase from the section containing the
2777 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2781 return -UNW_ENOINFO
;
2784 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2785 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2786 dip
->gp
= ia64_find_global_pointer (get_objfile_arch (objfile
), ip
);
2787 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2788 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2789 dip
->u
.rti
.segbase
= segbase
;
2790 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2791 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2796 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2798 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2799 int need_unwind_info
, void *arg
)
2801 struct obj_section
*sec
= find_pc_section (ip
);
2808 /* XXX This only works if the host and the target architecture are
2809 both ia64 and if the have (more or less) the same kernel
2811 if (get_kernel_table (ip
, &di
) < 0)
2812 return -UNW_ENOINFO
;
2814 if (gdbarch_debug
>= 1)
2815 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2816 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2817 "length=%s,data=%s)\n",
2818 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2819 hex_string (di
.u
.ti
.segbase
),
2820 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2822 pulongest (di
.u
.ti
.table_len
),
2823 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2827 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2831 if (gdbarch_debug
>= 1)
2832 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2833 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2834 "length=%s,data=%s)\n",
2835 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2836 hex_string (di
.u
.rti
.segbase
),
2837 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2839 pulongest (di
.u
.rti
.table_len
),
2840 hex_string (di
.u
.rti
.table_data
));
2843 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2846 /* We no longer need the dyn info storage so free it. */
2852 /* Libunwind callback accessor function for cleanup. */
2854 ia64_put_unwind_info (unw_addr_space_t as
,
2855 unw_proc_info_t
*pip
, void *arg
)
2857 /* Nothing required for now. */
2860 /* Libunwind callback accessor function to get head of the dynamic
2861 unwind-info registration list. */
2863 ia64_get_dyn_info_list (unw_addr_space_t as
,
2864 unw_word_t
*dilap
, void *arg
)
2866 struct obj_section
*text_sec
;
2867 struct objfile
*objfile
;
2868 unw_word_t ip
, addr
;
2872 if (!libunwind_is_initialized ())
2873 return -UNW_ENOINFO
;
2875 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2879 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2880 ip
= obj_section_addr (text_sec
);
2881 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2884 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2885 /* We no longer need the dyn info storage so free it. */
2890 if (gdbarch_debug
>= 1)
2891 fprintf_unfiltered (gdb_stdlog
,
2892 "dynamic unwind table in objfile %s "
2894 bfd_get_filename (objfile
->obfd
),
2895 hex_string (addr
), hex_string (di
.gp
));
2901 return -UNW_ENOINFO
;
2905 /* Frame interface functions for libunwind. */
2908 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2909 struct frame_id
*this_id
)
2911 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2912 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2913 struct frame_id id
= outer_frame_id
;
2917 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2918 if (frame_id_eq (id
, outer_frame_id
))
2920 (*this_id
) = outer_frame_id
;
2924 /* We must add the bsp as the special address for frame comparison
2926 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2927 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2929 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2931 if (gdbarch_debug
>= 1)
2932 fprintf_unfiltered (gdb_stdlog
,
2933 "libunwind frame id: code %s, stack %s, "
2934 "special %s, this_frame %s\n",
2935 paddress (gdbarch
, id
.code_addr
),
2936 paddress (gdbarch
, id
.stack_addr
),
2937 paddress (gdbarch
, bsp
),
2938 host_address_to_string (this_frame
));
2941 static struct value
*
2942 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2943 void **this_cache
, int regnum
)
2946 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2947 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2950 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2951 reg
= IA64_PR_REGNUM
;
2952 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2953 reg
= IA64_UNAT_REGNUM
;
2955 /* Let libunwind do most of the work. */
2956 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2958 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2962 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2967 /* Fetch predicate register rename base from current frame
2968 marker for this frame. */
2969 cfm
= get_frame_register_unsigned (this_frame
, IA64_CFM_REGNUM
);
2970 rrb_pr
= (cfm
>> 32) & 0x3f;
2972 /* Adjust the register number to account for register rotation. */
2973 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2975 prN_val
= extract_bit_field (value_contents_all (val
),
2976 regnum
- VP0_REGNUM
, 1);
2977 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
2980 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2984 unatN_val
= extract_bit_field (value_contents_all (val
),
2985 regnum
- IA64_NAT0_REGNUM
, 1);
2986 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
2989 else if (regnum
== IA64_BSP_REGNUM
)
2991 struct value
*cfm_val
;
2992 CORE_ADDR prev_bsp
, prev_cfm
;
2994 /* We want to calculate the previous bsp as the end of the previous
2995 register stack frame. This corresponds to what the hardware bsp
2996 register will be if we pop the frame back which is why we might
2997 have been called. We know that libunwind will pass us back the
2998 beginning of the current frame so we should just add sof to it. */
2999 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
3001 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3003 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
3005 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
3007 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
3014 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
3015 struct frame_info
*this_frame
,
3018 if (libunwind_is_initialized ()
3019 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
3025 static const struct frame_unwind ia64_libunwind_frame_unwind
=
3028 default_frame_unwind_stop_reason
,
3029 ia64_libunwind_frame_this_id
,
3030 ia64_libunwind_frame_prev_register
,
3032 ia64_libunwind_frame_sniffer
,
3033 libunwind_frame_dealloc_cache
3037 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
3039 struct frame_id
*this_id
)
3041 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3042 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3045 struct frame_id id
= outer_frame_id
;
3048 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
3049 if (frame_id_eq (id
, outer_frame_id
))
3051 (*this_id
) = outer_frame_id
;
3055 /* We must add the bsp as the special address for frame comparison
3057 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3058 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3060 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3061 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
3063 if (gdbarch_debug
>= 1)
3064 fprintf_unfiltered (gdb_stdlog
,
3065 "libunwind sigtramp frame id: code %s, "
3066 "stack %s, special %s, this_frame %s\n",
3067 paddress (gdbarch
, id
.code_addr
),
3068 paddress (gdbarch
, id
.stack_addr
),
3069 paddress (gdbarch
, bsp
),
3070 host_address_to_string (this_frame
));
3073 static struct value
*
3074 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
3075 void **this_cache
, int regnum
)
3077 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3078 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3079 struct value
*prev_ip_val
;
3082 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3083 method of getting previous registers. */
3084 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3086 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3091 void *tmp_cache
= NULL
;
3092 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3096 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3100 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3101 struct frame_info
*this_frame
,
3104 if (libunwind_is_initialized ())
3106 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3111 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3114 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3117 default_frame_unwind_stop_reason
,
3118 ia64_libunwind_sigtramp_frame_this_id
,
3119 ia64_libunwind_sigtramp_frame_prev_register
,
3121 ia64_libunwind_sigtramp_frame_sniffer
3124 /* Set of libunwind callback acccessor functions. */
3125 unw_accessors_t ia64_unw_accessors
=
3127 ia64_find_proc_info_x
,
3128 ia64_put_unwind_info
,
3129 ia64_get_dyn_info_list
,
3137 /* Set of special libunwind callback acccessor functions specific for accessing
3138 the rse registers. At the top of the stack, we want libunwind to figure out
3139 how to read r32 - r127. Though usually they are found sequentially in
3140 memory starting from $bof, this is not always true. */
3141 unw_accessors_t ia64_unw_rse_accessors
=
3143 ia64_find_proc_info_x
,
3144 ia64_put_unwind_info
,
3145 ia64_get_dyn_info_list
,
3147 ia64_access_rse_reg
,
3148 ia64_access_rse_fpreg
,
3153 /* Set of ia64-libunwind-tdep gdb callbacks and data for generic
3154 ia64-libunwind-tdep code to use. */
3155 struct libunwind_descr ia64_libunwind_descr
=
3160 &ia64_unw_accessors
,
3161 &ia64_unw_rse_accessors
,
3164 #endif /* HAVE_LIBUNWIND_IA64_H */
3167 ia64_use_struct_convention (struct type
*type
)
3169 struct type
*float_elt_type
;
3171 /* Don't use the struct convention for anything but structure,
3172 union, or array types. */
3173 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
3174 || TYPE_CODE (type
) == TYPE_CODE_UNION
3175 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
3178 /* HFAs are structures (or arrays) consisting entirely of floating
3179 point values of the same length. Up to 8 of these are returned
3180 in registers. Don't use the struct convention when this is the
3182 float_elt_type
= is_float_or_hfa_type (type
);
3183 if (float_elt_type
!= NULL
3184 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3187 /* Other structs of length 32 or less are returned in r8-r11.
3188 Don't use the struct convention for those either. */
3189 return TYPE_LENGTH (type
) > 32;
3192 /* Return non-zero if TYPE is a structure or union type. */
3195 ia64_struct_type_p (const struct type
*type
)
3197 return (TYPE_CODE (type
) == TYPE_CODE_STRUCT
3198 || TYPE_CODE (type
) == TYPE_CODE_UNION
);
3202 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3205 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3206 struct type
*float_elt_type
;
3208 float_elt_type
= is_float_or_hfa_type (type
);
3209 if (float_elt_type
!= NULL
)
3211 gdb_byte from
[MAX_REGISTER_SIZE
];
3213 int regnum
= IA64_FR8_REGNUM
;
3214 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3218 regcache_cooked_read (regcache
, regnum
, from
);
3219 convert_typed_floating (from
, ia64_ext_type (gdbarch
),
3220 (char *)valbuf
+ offset
, float_elt_type
);
3221 offset
+= TYPE_LENGTH (float_elt_type
);
3225 else if (!ia64_struct_type_p (type
) && TYPE_LENGTH (type
) < 8)
3227 /* This is an integral value, and its size is less than 8 bytes.
3228 These values are LSB-aligned, so extract the relevant bytes,
3229 and copy them into VALBUF. */
3230 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3231 so I suppose we should also add handling here for integral values
3232 whose size is greater than 8. But I wasn't able to create such
3233 a type, neither in C nor in Ada, so not worrying about these yet. */
3234 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3237 regcache_cooked_read_unsigned (regcache
, IA64_GR8_REGNUM
, &val
);
3238 store_unsigned_integer (valbuf
, TYPE_LENGTH (type
), byte_order
, val
);
3244 int regnum
= IA64_GR8_REGNUM
;
3245 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3246 int n
= TYPE_LENGTH (type
) / reglen
;
3247 int m
= TYPE_LENGTH (type
) % reglen
;
3252 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3253 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3260 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3261 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3267 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3268 const gdb_byte
*valbuf
)
3270 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3271 struct type
*float_elt_type
;
3273 float_elt_type
= is_float_or_hfa_type (type
);
3274 if (float_elt_type
!= NULL
)
3276 gdb_byte to
[MAX_REGISTER_SIZE
];
3278 int regnum
= IA64_FR8_REGNUM
;
3279 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3283 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3284 to
, ia64_ext_type (gdbarch
));
3285 regcache_cooked_write (regcache
, regnum
, to
);
3286 offset
+= TYPE_LENGTH (float_elt_type
);
3294 int regnum
= IA64_GR8_REGNUM
;
3295 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3296 int n
= TYPE_LENGTH (type
) / reglen
;
3297 int m
= TYPE_LENGTH (type
) % reglen
;
3302 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3303 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3310 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3311 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3316 static enum return_value_convention
3317 ia64_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
3318 struct type
*valtype
, struct regcache
*regcache
,
3319 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3321 int struct_return
= ia64_use_struct_convention (valtype
);
3323 if (writebuf
!= NULL
)
3325 gdb_assert (!struct_return
);
3326 ia64_store_return_value (valtype
, regcache
, writebuf
);
3329 if (readbuf
!= NULL
)
3331 gdb_assert (!struct_return
);
3332 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3336 return RETURN_VALUE_STRUCT_CONVENTION
;
3338 return RETURN_VALUE_REGISTER_CONVENTION
;
3342 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3344 switch (TYPE_CODE (t
))
3348 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3355 case TYPE_CODE_ARRAY
:
3357 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3360 case TYPE_CODE_STRUCT
:
3364 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3365 if (!is_float_or_hfa_type_recurse
3366 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3377 /* Determine if the given type is one of the floating point types or
3378 and HFA (which is a struct, array, or combination thereof whose
3379 bottom-most elements are all of the same floating point type). */
3381 static struct type
*
3382 is_float_or_hfa_type (struct type
*t
)
3384 struct type
*et
= 0;
3386 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3390 /* Return 1 if the alignment of T is such that the next even slot
3391 should be used. Return 0, if the next available slot should
3392 be used. (See section 8.5.1 of the IA-64 Software Conventions
3393 and Runtime manual). */
3396 slot_alignment_is_next_even (struct type
*t
)
3398 switch (TYPE_CODE (t
))
3402 if (TYPE_LENGTH (t
) > 8)
3406 case TYPE_CODE_ARRAY
:
3408 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3409 case TYPE_CODE_STRUCT
:
3413 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3414 if (slot_alignment_is_next_even
3415 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3424 /* Attempt to find (and return) the global pointer for the given
3427 This is a rather nasty bit of code searchs for the .dynamic section
3428 in the objfile corresponding to the pc of the function we're trying
3429 to call. Once it finds the addresses at which the .dynamic section
3430 lives in the child process, it scans the Elf64_Dyn entries for a
3431 DT_PLTGOT tag. If it finds one of these, the corresponding
3432 d_un.d_ptr value is the global pointer. */
3435 ia64_find_global_pointer_from_dynamic_section (struct gdbarch
*gdbarch
,
3438 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3439 struct obj_section
*faddr_sect
;
3441 faddr_sect
= find_pc_section (faddr
);
3442 if (faddr_sect
!= NULL
)
3444 struct obj_section
*osect
;
3446 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3448 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3452 if (osect
< faddr_sect
->objfile
->sections_end
)
3454 CORE_ADDR addr
, endaddr
;
3456 addr
= obj_section_addr (osect
);
3457 endaddr
= obj_section_endaddr (osect
);
3459 while (addr
< endaddr
)
3465 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3468 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3470 if (tag
== DT_PLTGOT
)
3472 CORE_ADDR global_pointer
;
3474 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3477 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3481 return global_pointer
;
3494 /* Attempt to find (and return) the global pointer for the given
3495 function. We first try the find_global_pointer_from_solib routine
3496 from the gdbarch tdep vector, if provided. And if that does not
3497 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3500 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3502 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3505 if (tdep
->find_global_pointer_from_solib
)
3506 addr
= tdep
->find_global_pointer_from_solib (gdbarch
, faddr
);
3508 addr
= ia64_find_global_pointer_from_dynamic_section (gdbarch
, faddr
);
3512 /* Given a function's address, attempt to find (and return) the
3513 corresponding (canonical) function descriptor. Return 0 if
3516 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3518 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3519 struct obj_section
*faddr_sect
;
3521 /* Return early if faddr is already a function descriptor. */
3522 faddr_sect
= find_pc_section (faddr
);
3523 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3526 if (faddr_sect
!= NULL
)
3528 struct obj_section
*osect
;
3529 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3531 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3535 if (osect
< faddr_sect
->objfile
->sections_end
)
3537 CORE_ADDR addr
, endaddr
;
3539 addr
= obj_section_addr (osect
);
3540 endaddr
= obj_section_endaddr (osect
);
3542 while (addr
< endaddr
)
3548 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3551 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3553 if (faddr
== faddr2
)
3563 /* Attempt to find a function descriptor corresponding to the
3564 given address. If none is found, construct one on the
3565 stack using the address at fdaptr. */
3568 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3570 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3571 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3574 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3578 ULONGEST global_pointer
;
3584 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3586 if (global_pointer
== 0)
3587 regcache_cooked_read_unsigned (regcache
,
3588 IA64_GR1_REGNUM
, &global_pointer
);
3590 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3591 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3593 write_memory (fdesc
, buf
, 16);
3599 /* Use the following routine when printing out function pointers
3600 so the user can see the function address rather than just the
3601 function descriptor. */
3603 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3604 struct target_ops
*targ
)
3606 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3607 struct obj_section
*s
;
3610 s
= find_pc_section (addr
);
3612 /* check if ADDR points to a function descriptor. */
3613 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3614 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3616 /* Normally, functions live inside a section that is executable.
3617 So, if ADDR points to a non-executable section, then treat it
3618 as a function descriptor and return the target address iff
3619 the target address itself points to a section that is executable.
3620 Check first the memory of the whole length of 8 bytes is readable. */
3621 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0
3622 && target_read_memory (addr
, buf
, 8) == 0)
3624 CORE_ADDR pc
= extract_unsigned_integer (buf
, 8, byte_order
);
3625 struct obj_section
*pc_section
= find_pc_section (pc
);
3627 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3631 /* There are also descriptors embedded in vtables. */
3634 struct bound_minimal_symbol minsym
;
3636 minsym
= lookup_minimal_symbol_by_pc (addr
);
3639 && is_vtable_name (MSYMBOL_LINKAGE_NAME (minsym
.minsym
)))
3640 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3647 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3652 /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3655 ia64_allocate_new_rse_frame (struct regcache
*regcache
, ULONGEST bsp
, int sof
)
3657 ULONGEST cfm
, pfs
, new_bsp
;
3659 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3661 new_bsp
= rse_address_add (bsp
, sof
);
3662 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3664 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3665 pfs
&= 0xc000000000000000LL
;
3666 pfs
|= (cfm
& 0xffffffffffffLL
);
3667 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3669 cfm
&= 0xc000000000000000LL
;
3671 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3674 /* The default "store_argument_in_slot" ia64_infcall_ops routine for
3678 ia64_store_argument_in_slot (struct regcache
*regcache
, CORE_ADDR bsp
,
3679 int slotnum
, gdb_byte
*buf
)
3681 write_memory (rse_address_add (bsp
, slotnum
), buf
, 8);
3684 /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3687 ia64_set_function_addr (struct regcache
*regcache
, CORE_ADDR func_addr
)
3689 /* Nothing needed. */
3693 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3694 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3695 int nargs
, struct value
**args
, CORE_ADDR sp
,
3696 int struct_return
, CORE_ADDR struct_addr
)
3698 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3699 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3704 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3707 CORE_ADDR funcdescaddr
, global_pointer
;
3708 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3712 /* Count the number of slots needed for the arguments. */
3713 for (argno
= 0; argno
< nargs
; argno
++)
3716 type
= check_typedef (value_type (arg
));
3717 len
= TYPE_LENGTH (type
);
3719 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3722 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3725 nslots
+= (len
+ 7) / 8;
3728 /* Divvy up the slots between the RSE and the memory stack. */
3729 rseslots
= (nslots
> 8) ? 8 : nslots
;
3730 memslots
= nslots
- rseslots
;
3732 /* Allocate a new RSE frame. */
3733 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3734 tdep
->infcall_ops
.allocate_new_rse_frame (regcache
, bsp
, rseslots
);
3736 /* We will attempt to find function descriptors in the .opd segment,
3737 but if we can't we'll construct them ourselves. That being the
3738 case, we'll need to reserve space on the stack for them. */
3739 funcdescaddr
= sp
- nfuncargs
* 16;
3740 funcdescaddr
&= ~0xfLL
;
3742 /* Adjust the stack pointer to it's new value. The calling conventions
3743 require us to have 16 bytes of scratch, plus whatever space is
3744 necessary for the memory slots and our function descriptors. */
3745 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3746 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3748 /* Place the arguments where they belong. The arguments will be
3749 either placed in the RSE backing store or on the memory stack.
3750 In addition, floating point arguments or HFAs are placed in
3751 floating point registers. */
3753 floatreg
= IA64_FR8_REGNUM
;
3754 for (argno
= 0; argno
< nargs
; argno
++)
3756 struct type
*float_elt_type
;
3759 type
= check_typedef (value_type (arg
));
3760 len
= TYPE_LENGTH (type
);
3762 /* Special handling for function parameters. */
3764 && TYPE_CODE (type
) == TYPE_CODE_PTR
3765 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3767 gdb_byte val_buf
[8];
3768 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3770 store_unsigned_integer (val_buf
, 8, byte_order
,
3771 find_func_descr (regcache
, faddr
,
3773 if (slotnum
< rseslots
)
3774 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3777 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3784 /* Skip odd slot if necessary... */
3785 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3791 gdb_byte val_buf
[8];
3793 memset (val_buf
, 0, 8);
3794 if (!ia64_struct_type_p (type
) && len
< 8)
3796 /* Integral types are LSB-aligned, so we have to be careful
3797 to insert the argument on the correct side of the buffer.
3798 This is why we use store_unsigned_integer. */
3799 store_unsigned_integer
3800 (val_buf
, 8, byte_order
,
3801 extract_unsigned_integer (value_contents (arg
), len
,
3806 /* This is either an 8bit integral type, or an aggregate.
3807 For 8bit integral type, there is no problem, we just
3808 copy the value over.
3810 For aggregates, the only potentially tricky portion
3811 is to write the last one if it is less than 8 bytes.
3812 In this case, the data is Byte0-aligned. Happy news,
3813 this means that we don't need to differentiate the
3814 handling of 8byte blocks and less-than-8bytes blocks. */
3815 memcpy (val_buf
, value_contents (arg
) + argoffset
,
3816 (len
> 8) ? 8 : len
);
3819 if (slotnum
< rseslots
)
3820 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3823 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3830 /* Handle floating point types (including HFAs). */
3831 float_elt_type
= is_float_or_hfa_type (type
);
3832 if (float_elt_type
!= NULL
)
3835 len
= TYPE_LENGTH (type
);
3836 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3838 gdb_byte to
[MAX_REGISTER_SIZE
];
3839 convert_typed_floating (value_contents (arg
) + argoffset
,
3841 ia64_ext_type (gdbarch
));
3842 regcache_cooked_write (regcache
, floatreg
, to
);
3844 argoffset
+= TYPE_LENGTH (float_elt_type
);
3845 len
-= TYPE_LENGTH (float_elt_type
);
3850 /* Store the struct return value in r8 if necessary. */
3853 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
,
3854 (ULONGEST
) struct_addr
);
3857 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3859 if (global_pointer
!= 0)
3860 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3862 /* The following is not necessary on HP-UX, because we're using
3863 a dummy code sequence pushed on the stack to make the call, and
3864 this sequence doesn't need b0 to be set in order for our dummy
3865 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3866 it's needed for other OSes, so we do this unconditionaly. */
3867 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3869 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3871 tdep
->infcall_ops
.set_function_addr (regcache
, func_addr
);
3876 static const struct ia64_infcall_ops ia64_infcall_ops
=
3878 ia64_allocate_new_rse_frame
,
3879 ia64_store_argument_in_slot
,
3880 ia64_set_function_addr
3883 static struct frame_id
3884 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3886 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3890 get_frame_register (this_frame
, sp_regnum
, buf
);
3891 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3893 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3894 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3896 if (gdbarch_debug
>= 1)
3897 fprintf_unfiltered (gdb_stdlog
,
3898 "dummy frame id: code %s, stack %s, special %s\n",
3899 paddress (gdbarch
, get_frame_pc (this_frame
)),
3900 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3902 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3906 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3908 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3910 CORE_ADDR ip
, psr
, pc
;
3912 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3913 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3914 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3915 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3917 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3922 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3924 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3925 return print_insn_ia64 (memaddr
, info
);
3928 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3931 ia64_size_of_register_frame (struct frame_info
*this_frame
, ULONGEST cfm
)
3933 return (cfm
& 0x7f);
3936 static struct gdbarch
*
3937 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3939 struct gdbarch
*gdbarch
;
3940 struct gdbarch_tdep
*tdep
;
3942 /* If there is already a candidate, use it. */
3943 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3945 return arches
->gdbarch
;
3947 tdep
= XCNEW (struct gdbarch_tdep
);
3948 gdbarch
= gdbarch_alloc (&info
, tdep
);
3950 tdep
->size_of_register_frame
= ia64_size_of_register_frame
;
3952 /* According to the ia64 specs, instructions that store long double
3953 floats in memory use a long-double format different than that
3954 used in the floating registers. The memory format matches the
3955 x86 extended float format which is 80 bits. An OS may choose to
3956 use this format (e.g. GNU/Linux) or choose to use a different
3957 format for storing long doubles (e.g. HPUX). In the latter case,
3958 the setting of the format may be moved/overridden in an
3959 OS-specific tdep file. */
3960 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3962 set_gdbarch_short_bit (gdbarch
, 16);
3963 set_gdbarch_int_bit (gdbarch
, 32);
3964 set_gdbarch_long_bit (gdbarch
, 64);
3965 set_gdbarch_long_long_bit (gdbarch
, 64);
3966 set_gdbarch_float_bit (gdbarch
, 32);
3967 set_gdbarch_double_bit (gdbarch
, 64);
3968 set_gdbarch_long_double_bit (gdbarch
, 128);
3969 set_gdbarch_ptr_bit (gdbarch
, 64);
3971 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3972 set_gdbarch_num_pseudo_regs (gdbarch
,
3973 LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3974 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3975 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3977 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3978 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3980 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3981 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3982 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3983 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3984 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3985 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3986 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3988 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3990 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3992 set_gdbarch_memory_insert_breakpoint (gdbarch
,
3993 ia64_memory_insert_breakpoint
);
3994 set_gdbarch_memory_remove_breakpoint (gdbarch
,
3995 ia64_memory_remove_breakpoint
);
3996 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3997 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, ia64_breakpoint_kind_from_pc
);
3998 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3999 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
4001 /* Settings for calling functions in the inferior. */
4002 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
4003 tdep
->infcall_ops
= ia64_infcall_ops
;
4004 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
4005 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
4007 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
4008 #ifdef HAVE_LIBUNWIND_IA64_H
4009 frame_unwind_append_unwinder (gdbarch
,
4010 &ia64_libunwind_sigtramp_frame_unwind
);
4011 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
4012 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4013 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
4015 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4017 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
4018 frame_base_set_default (gdbarch
, &ia64_frame_base
);
4020 /* Settings that should be unnecessary. */
4021 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4023 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
4024 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
4025 ia64_convert_from_func_ptr_addr
);
4027 /* The virtual table contains 16-byte descriptors, not pointers to
4029 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
4031 /* Hook in ABI-specific overrides, if they have been registered. */
4032 gdbarch_init_osabi (info
, gdbarch
);
4037 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
4040 _initialize_ia64_tdep (void)
4042 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);