1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
278 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
279 struct reggroup
*group
)
284 if (group
== all_reggroup
)
286 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
287 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
288 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
289 if (group
== float_reggroup
)
291 if (group
== vector_reggroup
)
293 if (group
== general_reggroup
)
294 return (!vector_p
&& !float_p
);
295 if (group
== save_reggroup
|| group
== restore_reggroup
)
301 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
303 return ia64_register_names
[reg
];
307 ia64_register_type (struct gdbarch
*arch
, int reg
)
309 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
310 return builtin_type_ia64_ext
;
312 return builtin_type (arch
)->builtin_long
;
316 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
318 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
319 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
324 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
329 const struct floatformat floatformat_ia64_ext
=
331 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
332 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
, NULL
335 const struct floatformat
*floatformats_ia64_ext
[2] =
337 &floatformat_ia64_ext
,
338 &floatformat_ia64_ext
342 /* Extract ``len'' bits from an instruction bundle starting at
346 extract_bit_field (const char *bundle
, int from
, int len
)
348 long long result
= 0LL;
350 int from_byte
= from
/ 8;
351 int to_byte
= to
/ 8;
352 unsigned char *b
= (unsigned char *) bundle
;
358 if (from_byte
== to_byte
)
359 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
360 result
= c
>> (from
% 8);
361 lshift
= 8 - (from
% 8);
363 for (i
= from_byte
+1; i
< to_byte
; i
++)
365 result
|= ((long long) b
[i
]) << lshift
;
369 if (from_byte
< to_byte
&& (to
% 8 != 0))
372 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
373 result
|= ((long long) c
) << lshift
;
379 /* Replace the specified bits in an instruction bundle */
382 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
385 int from_byte
= from
/ 8;
386 int to_byte
= to
/ 8;
387 unsigned char *b
= (unsigned char *) bundle
;
390 if (from_byte
== to_byte
)
392 unsigned char left
, right
;
394 left
= (c
>> (to
% 8)) << (to
% 8);
395 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
396 c
= (unsigned char) (val
& 0xff);
397 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
405 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
406 c
= c
| (val
<< (from
% 8));
408 val
>>= 8 - from
% 8;
410 for (i
= from_byte
+1; i
< to_byte
; i
++)
419 unsigned char cv
= (unsigned char) val
;
421 c
= c
>> (to
% 8) << (to
% 8);
422 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
428 /* Return the contents of slot N (for N = 0, 1, or 2) in
429 and instruction bundle */
432 slotN_contents (char *bundle
, int slotnum
)
434 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
437 /* Store an instruction in an instruction bundle */
440 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
442 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
445 static enum instruction_type template_encoding_table
[32][3] =
447 { M
, I
, I
}, /* 00 */
448 { M
, I
, I
}, /* 01 */
449 { M
, I
, I
}, /* 02 */
450 { M
, I
, I
}, /* 03 */
451 { M
, L
, X
}, /* 04 */
452 { M
, L
, X
}, /* 05 */
453 { undefined
, undefined
, undefined
}, /* 06 */
454 { undefined
, undefined
, undefined
}, /* 07 */
455 { M
, M
, I
}, /* 08 */
456 { M
, M
, I
}, /* 09 */
457 { M
, M
, I
}, /* 0A */
458 { M
, M
, I
}, /* 0B */
459 { M
, F
, I
}, /* 0C */
460 { M
, F
, I
}, /* 0D */
461 { M
, M
, F
}, /* 0E */
462 { M
, M
, F
}, /* 0F */
463 { M
, I
, B
}, /* 10 */
464 { M
, I
, B
}, /* 11 */
465 { M
, B
, B
}, /* 12 */
466 { M
, B
, B
}, /* 13 */
467 { undefined
, undefined
, undefined
}, /* 14 */
468 { undefined
, undefined
, undefined
}, /* 15 */
469 { B
, B
, B
}, /* 16 */
470 { B
, B
, B
}, /* 17 */
471 { M
, M
, B
}, /* 18 */
472 { M
, M
, B
}, /* 19 */
473 { undefined
, undefined
, undefined
}, /* 1A */
474 { undefined
, undefined
, undefined
}, /* 1B */
475 { M
, F
, B
}, /* 1C */
476 { M
, F
, B
}, /* 1D */
477 { undefined
, undefined
, undefined
}, /* 1E */
478 { undefined
, undefined
, undefined
}, /* 1F */
481 /* Fetch and (partially) decode an instruction at ADDR and return the
482 address of the next instruction to fetch. */
485 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
487 char bundle
[BUNDLE_LEN
];
488 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
492 /* Warn about slot numbers greater than 2. We used to generate
493 an error here on the assumption that the user entered an invalid
494 address. But, sometimes GDB itself requests an invalid address.
495 This can (easily) happen when execution stops in a function for
496 which there are no symbols. The prologue scanner will attempt to
497 find the beginning of the function - if the nearest symbol
498 happens to not be aligned on a bundle boundary (16 bytes), the
499 resulting starting address will cause GDB to think that the slot
502 So we warn about it and set the slot number to zero. It is
503 not necessarily a fatal condition, particularly if debugging
504 at the assembly language level. */
507 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
508 "Using slot 0 instead"));
514 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
519 *instr
= slotN_contents (bundle
, slotnum
);
520 template = extract_bit_field (bundle
, 0, 5);
521 *it
= template_encoding_table
[(int)template][slotnum
];
523 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
526 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
531 /* There are 5 different break instructions (break.i, break.b,
532 break.m, break.f, and break.x), but they all have the same
533 encoding. (The five bit template in the low five bits of the
534 instruction bundle distinguishes one from another.)
536 The runtime architecture manual specifies that break instructions
537 used for debugging purposes must have the upper two bits of the 21
538 bit immediate set to a 0 and a 1 respectively. A breakpoint
539 instruction encodes the most significant bit of its 21 bit
540 immediate at bit 36 of the 41 bit instruction. The penultimate msb
541 is at bit 25 which leads to the pattern below.
543 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
544 it turns out that 0x80000 was used as the syscall break in the early
545 simulators. So I changed the pattern slightly to do "break.i 0x080001"
546 instead. But that didn't work either (I later found out that this
547 pattern was used by the simulator that I was using.) So I ended up
548 using the pattern seen below. */
550 #define IA64_BREAKPOINT 0x00003333300LL
553 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
554 struct bp_target_info
*bp_tgt
)
556 CORE_ADDR addr
= bp_tgt
->placed_address
;
557 char bundle
[BUNDLE_LEN
];
558 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
564 error (_("Can't insert breakpoint for slot numbers greater than 2."));
568 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
570 /* Check for L type instruction in 2nd slot, if present then
571 bump up the slot number to the 3rd slot */
572 template = extract_bit_field (bundle
, 0, 5);
573 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
578 instr
= slotN_contents (bundle
, slotnum
);
579 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
580 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
581 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
583 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
589 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
590 struct bp_target_info
*bp_tgt
)
592 CORE_ADDR addr
= bp_tgt
->placed_address
;
593 char bundle
[BUNDLE_LEN
];
594 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
598 struct cleanup
*cleanup
;
602 /* Disable the automatic memory restoration from breakpoints while
603 we read our instruction bundle. Otherwise, the general restoration
604 mechanism kicks in and ends up corrupting our bundle, because it
605 is not aware of the concept of instruction bundles. */
606 cleanup
= make_show_memory_breakpoints_cleanup (1);
607 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
609 /* Check for L type instruction in 2nd slot, if present then
610 bump up the slot number to the 3rd slot */
611 template = extract_bit_field (bundle
, 0, 5);
612 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
617 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
618 replace_slotN_contents (bundle
, instr
, slotnum
);
620 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
622 do_cleanups (cleanup
);
626 /* We don't really want to use this, but remote.c needs to call it in order
627 to figure out if Z-packets are supported or not. Oh, well. */
628 const unsigned char *
629 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
, int *lenptr
)
631 static unsigned char breakpoint
[] =
632 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
633 *lenptr
= sizeof (breakpoint
);
641 ia64_read_pc (struct regcache
*regcache
)
643 ULONGEST psr_value
, pc_value
;
646 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
647 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
648 slot_num
= (psr_value
>> 41) & 3;
650 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
654 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
656 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
659 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
660 psr_value
&= ~(3LL << 41);
661 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
665 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
666 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
669 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
671 /* Returns the address of the slot that's NSLOTS slots away from
672 the address ADDR. NSLOTS may be positive or negative. */
674 rse_address_add(CORE_ADDR addr
, int nslots
)
677 int mandatory_nat_slots
= nslots
/ 63;
678 int direction
= nslots
< 0 ? -1 : 1;
680 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
682 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
683 new_addr
+= 8 * direction
;
685 if (IS_NaT_COLLECTION_ADDR(new_addr
))
686 new_addr
+= 8 * direction
;
692 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
693 int regnum
, gdb_byte
*buf
)
695 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
697 #ifdef HAVE_LIBUNWIND_IA64_H
698 /* First try and use the libunwind special reg accessor, otherwise fallback to
700 if (!libunwind_is_initialized ()
701 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
704 /* The fallback position is to assume that r32-r127 are found sequentially
705 in memory starting at $bof. This isn't always true, but without libunwind,
706 this is the best we can do. */
710 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
711 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
713 /* The bsp points at the end of the register frame so we
714 subtract the size of frame from it to get start of register frame. */
715 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
717 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
719 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
720 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
721 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), reg
);
724 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), 0);
727 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
731 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
732 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
733 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), unatN_val
);
735 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
737 ULONGEST natN_val
= 0;
740 CORE_ADDR gr_addr
= 0;
741 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
742 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
744 /* The bsp points at the end of the register frame so we
745 subtract the size of frame from it to get start of register frame. */
746 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
748 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
749 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
753 /* Compute address of nat collection bits. */
754 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
755 CORE_ADDR nat_collection
;
757 /* If our nat collection address is bigger than bsp, we have to get
758 the nat collection from rnat. Otherwise, we fetch the nat
759 collection from the computed address. */
761 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
763 nat_collection
= read_memory_integer (nat_addr
, 8);
764 nat_bit
= (gr_addr
>> 3) & 0x3f;
765 natN_val
= (nat_collection
>> nat_bit
) & 1;
768 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), natN_val
);
770 else if (regnum
== VBOF_REGNUM
)
772 /* A virtual register frame start is provided for user convenience.
773 It can be calculated as the bsp - sof (sizeof frame). */
777 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
778 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
780 /* The bsp points at the end of the register frame so we
781 subtract the size of frame from it to get beginning of frame. */
782 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
783 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), vbsp
);
785 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
791 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
792 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
794 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
796 /* Fetch predicate register rename base from current frame
797 marker for this frame. */
798 int rrb_pr
= (cfm
>> 32) & 0x3f;
800 /* Adjust the register number to account for register rotation. */
802 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
804 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
805 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), prN_val
);
808 memset (buf
, 0, register_size (gdbarch
, regnum
));
812 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
813 int regnum
, const gdb_byte
*buf
)
815 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
820 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
821 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
823 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
825 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
827 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
828 write_memory (reg_addr
, (void *)buf
, 8);
831 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
833 ULONGEST unatN_val
, unat
, unatN_mask
;
834 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
835 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
836 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
839 else if (unatN_val
== 1)
841 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
843 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
848 CORE_ADDR gr_addr
= 0;
849 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
850 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
852 /* The bsp points at the end of the register frame so we
853 subtract the size of frame from it to get start of register frame. */
854 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
856 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
857 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
859 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
861 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
863 /* Compute address of nat collection bits. */
864 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
865 CORE_ADDR nat_collection
;
866 int natN_bit
= (gr_addr
>> 3) & 0x3f;
867 ULONGEST natN_mask
= (1LL << natN_bit
);
868 /* If our nat collection address is bigger than bsp, we have to get
869 the nat collection from rnat. Otherwise, we fetch the nat
870 collection from the computed address. */
873 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
875 nat_collection
|= natN_mask
;
877 nat_collection
&= ~natN_mask
;
878 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
883 nat_collection
= read_memory_integer (nat_addr
, 8);
885 nat_collection
|= natN_mask
;
887 nat_collection
&= ~natN_mask
;
888 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
), nat_collection
);
889 write_memory (nat_addr
, nat_buf
, 8);
893 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
900 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
901 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
903 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
905 /* Fetch predicate register rename base from current frame
906 marker for this frame. */
907 int rrb_pr
= (cfm
>> 32) & 0x3f;
909 /* Adjust the register number to account for register rotation. */
911 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
913 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
914 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
917 else if (prN_val
== 1)
919 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
923 /* The ia64 needs to convert between various ieee floating-point formats
924 and the special ia64 floating point register format. */
927 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
929 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
930 && type
!= builtin_type_ia64_ext
);
934 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
935 struct type
*valtype
, gdb_byte
*out
)
937 char in
[MAX_REGISTER_SIZE
];
938 frame_register_read (frame
, regnum
, in
);
939 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
943 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
944 struct type
*valtype
, const gdb_byte
*in
)
946 char out
[MAX_REGISTER_SIZE
];
947 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
948 put_frame_register (frame
, regnum
, out
);
952 /* Limit the number of skipped non-prologue instructions since examining
953 of the prologue is expensive. */
954 static int max_skip_non_prologue_insns
= 40;
956 /* Given PC representing the starting address of a function, and
957 LIM_PC which is the (sloppy) limit to which to scan when looking
958 for a prologue, attempt to further refine this limit by using
959 the line data in the symbol table. If successful, a better guess
960 on where the prologue ends is returned, otherwise the previous
961 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
962 which will be set to indicate whether the returned limit may be
963 used with no further scanning in the event that the function is
966 /* FIXME: cagney/2004-02-14: This function and logic have largely been
967 superseded by skip_prologue_using_sal. */
970 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
972 struct symtab_and_line prologue_sal
;
973 CORE_ADDR start_pc
= pc
;
976 /* The prologue can not possibly go past the function end itself,
977 so we can already adjust LIM_PC accordingly. */
978 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
981 /* Start off not trusting the limit. */
984 prologue_sal
= find_pc_line (pc
, 0);
985 if (prologue_sal
.line
!= 0)
988 CORE_ADDR addr
= prologue_sal
.end
;
990 /* Handle the case in which compiler's optimizer/scheduler
991 has moved instructions into the prologue. We scan ahead
992 in the function looking for address ranges whose corresponding
993 line number is less than or equal to the first one that we
994 found for the function. (It can be less than when the
995 scheduler puts a body instruction before the first prologue
997 for (i
= 2 * max_skip_non_prologue_insns
;
998 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1001 struct symtab_and_line sal
;
1003 sal
= find_pc_line (addr
, 0);
1006 if (sal
.line
<= prologue_sal
.line
1007 && sal
.symtab
== prologue_sal
.symtab
)
1014 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1016 lim_pc
= prologue_sal
.end
;
1017 if (start_pc
== get_pc_function_start (lim_pc
))
1024 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1025 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1026 || (14 <= (_regnum_) && (_regnum_) <= 31))
1027 #define imm9(_instr_) \
1028 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1029 | (((_instr_) & 0x00008000000LL) >> 20) \
1030 | (((_instr_) & 0x00000001fc0LL) >> 6))
1032 /* Allocate and initialize a frame cache. */
1034 static struct ia64_frame_cache
*
1035 ia64_alloc_frame_cache (void)
1037 struct ia64_frame_cache
*cache
;
1040 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1046 cache
->prev_cfm
= 0;
1052 cache
->frameless
= 1;
1054 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1055 cache
->saved_regs
[i
] = 0;
1061 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1062 struct frame_info
*this_frame
,
1063 struct ia64_frame_cache
*cache
)
1066 CORE_ADDR last_prologue_pc
= pc
;
1067 instruction_type it
;
1072 int unat_save_reg
= 0;
1073 int pr_save_reg
= 0;
1074 int mem_stack_frame_size
= 0;
1076 CORE_ADDR spill_addr
= 0;
1079 char reg_contents
[256];
1085 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1087 memset (instores
, 0, sizeof instores
);
1088 memset (infpstores
, 0, sizeof infpstores
);
1089 memset (reg_contents
, 0, sizeof reg_contents
);
1091 if (cache
->after_prologue
!= 0
1092 && cache
->after_prologue
<= lim_pc
)
1093 return cache
->after_prologue
;
1095 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1096 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1098 /* We want to check if we have a recognizable function start before we
1099 look ahead for a prologue. */
1100 if (pc
< lim_pc
&& next_pc
1101 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1103 /* alloc - start of a regular function. */
1104 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1105 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1106 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1107 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1109 /* Verify that the current cfm matches what we think is the
1110 function start. If we have somehow jumped within a function,
1111 we do not want to interpret the prologue and calculate the
1112 addresses of various registers such as the return address.
1113 We will instead treat the frame as frameless. */
1115 (sof
== (cache
->cfm
& 0x7f) &&
1116 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1120 last_prologue_pc
= next_pc
;
1125 /* Look for a leaf routine. */
1126 if (pc
< lim_pc
&& next_pc
1127 && (it
== I
|| it
== M
)
1128 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1130 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1131 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1132 | ((instr
& 0x001f8000000LL
) >> 20)
1133 | ((instr
& 0x000000fe000LL
) >> 13));
1134 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1135 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1136 int qp
= (int) (instr
& 0x0000000003fLL
);
1137 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1139 /* mov r2, r12 - beginning of leaf routine */
1141 last_prologue_pc
= next_pc
;
1145 /* If we don't recognize a regular function or leaf routine, we are
1151 last_prologue_pc
= lim_pc
;
1155 /* Loop, looking for prologue instructions, keeping track of
1156 where preserved registers were spilled. */
1159 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1163 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1165 /* Exit loop upon hitting a non-nop branch instruction. */
1170 else if (((instr
& 0x3fLL
) != 0LL) &&
1171 (frameless
|| ret_reg
!= 0))
1173 /* Exit loop upon hitting a predicated instruction if
1174 we already have the return register or if we are frameless. */
1179 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1182 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1183 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1184 int qp
= (int) (instr
& 0x0000000003f);
1186 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1189 last_prologue_pc
= next_pc
;
1192 else if ((it
== I
|| it
== M
)
1193 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1195 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1196 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1197 | ((instr
& 0x001f8000000LL
) >> 20)
1198 | ((instr
& 0x000000fe000LL
) >> 13));
1199 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1200 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1201 int qp
= (int) (instr
& 0x0000000003fLL
);
1203 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1207 last_prologue_pc
= next_pc
;
1209 else if (qp
== 0 && rN
== 12 && rM
== 12)
1211 /* adds r12, -mem_stack_frame_size, r12 */
1212 mem_stack_frame_size
-= imm
;
1213 last_prologue_pc
= next_pc
;
1215 else if (qp
== 0 && rN
== 2
1216 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1218 char buf
[MAX_REGISTER_SIZE
];
1219 CORE_ADDR saved_sp
= 0;
1220 /* adds r2, spilloffset, rFramePointer
1222 adds r2, spilloffset, r12
1224 Get ready for stf.spill or st8.spill instructions.
1225 The address to start spilling at is loaded into r2.
1226 FIXME: Why r2? That's what gcc currently uses; it
1227 could well be different for other compilers. */
1229 /* Hmm... whether or not this will work will depend on
1230 where the pc is. If it's still early in the prologue
1231 this'll be wrong. FIXME */
1234 get_frame_register (this_frame
, sp_regnum
, buf
);
1235 saved_sp
= extract_unsigned_integer (buf
, 8);
1237 spill_addr
= saved_sp
1238 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1241 last_prologue_pc
= next_pc
;
1243 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1244 rN
< 256 && imm
== 0)
1246 /* mov rN, rM where rM is an input register */
1247 reg_contents
[rN
] = rM
;
1248 last_prologue_pc
= next_pc
;
1250 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1254 last_prologue_pc
= next_pc
;
1259 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1260 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1262 /* stf.spill [rN] = fM, imm9
1264 stf.spill [rN] = fM */
1266 int imm
= imm9(instr
);
1267 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1268 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1269 int qp
= (int) (instr
& 0x0000000003fLL
);
1270 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1271 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1273 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1275 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1278 spill_addr
= 0; /* last one; must be done */
1279 last_prologue_pc
= next_pc
;
1282 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1283 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1289 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1290 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1291 int qp
= (int) (instr
& 0x0000000003fLL
);
1292 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1294 /* We have something like "mov.m r3 = ar.unat". Remember the
1295 r3 (or whatever) and watch for a store of this register... */
1297 last_prologue_pc
= next_pc
;
1300 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1303 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1304 int qp
= (int) (instr
& 0x0000000003fLL
);
1305 if (qp
== 0 && isScratch (rN
))
1308 last_prologue_pc
= next_pc
;
1312 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1313 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1317 st8 [rN] = rM, imm9 */
1318 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1319 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1320 int qp
= (int) (instr
& 0x0000000003fLL
);
1321 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1322 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1323 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1325 /* We've found a spill of either the UNAT register or the PR
1326 register. (Well, not exactly; what we've actually found is
1327 a spill of the register that UNAT or PR was moved to).
1328 Record that fact and move on... */
1329 if (rM
== unat_save_reg
)
1331 /* Track UNAT register */
1332 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1337 /* Track PR register */
1338 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1341 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1342 /* st8 [rN] = rM, imm9 */
1343 spill_addr
+= imm9(instr
);
1345 spill_addr
= 0; /* must be done spilling */
1346 last_prologue_pc
= next_pc
;
1348 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1350 /* Allow up to one store of each input register. */
1351 instores
[rM
-32] = 1;
1352 last_prologue_pc
= next_pc
;
1354 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1355 !instores
[indirect
-32])
1357 /* Allow an indirect store of an input register. */
1358 instores
[indirect
-32] = 1;
1359 last_prologue_pc
= next_pc
;
1362 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1369 Note that the st8 case is handled in the clause above.
1371 Advance over stores of input registers. One store per input
1372 register is permitted. */
1373 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1374 int qp
= (int) (instr
& 0x0000000003fLL
);
1375 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1376 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1378 instores
[rM
-32] = 1;
1379 last_prologue_pc
= next_pc
;
1381 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1382 !instores
[indirect
-32])
1384 /* Allow an indirect store of an input register. */
1385 instores
[indirect
-32] = 1;
1386 last_prologue_pc
= next_pc
;
1389 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1396 Advance over stores of floating point input registers. Again
1397 one store per register is permitted */
1398 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1399 int qp
= (int) (instr
& 0x0000000003fLL
);
1400 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1402 infpstores
[fM
-8] = 1;
1403 last_prologue_pc
= next_pc
;
1407 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1408 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1410 /* st8.spill [rN] = rM
1412 st8.spill [rN] = rM, imm9 */
1413 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1414 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1415 int qp
= (int) (instr
& 0x0000000003fLL
);
1416 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1418 /* We've found a spill of one of the preserved general purpose
1419 regs. Record the spill address and advance the spill
1420 register if appropriate. */
1421 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1422 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1423 /* st8.spill [rN] = rM, imm9 */
1424 spill_addr
+= imm9(instr
);
1426 spill_addr
= 0; /* Done spilling */
1427 last_prologue_pc
= next_pc
;
1434 /* If not frameless and we aren't called by skip_prologue, then we need
1435 to calculate registers for the previous frame which will be needed
1438 if (!frameless
&& this_frame
)
1440 /* Extract the size of the rotating portion of the stack
1441 frame and the register rename base from the current
1447 rrb_gr
= (cfm
>> 18) & 0x7f;
1449 /* Find the bof (beginning of frame). */
1450 bof
= rse_address_add (cache
->bsp
, -sof
);
1452 for (i
= 0, addr
= bof
;
1456 if (IS_NaT_COLLECTION_ADDR (addr
))
1460 if (i
+32 == cfm_reg
)
1461 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1462 if (i
+32 == ret_reg
)
1463 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1465 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1468 /* For the previous argument registers we require the previous bof.
1469 If we can't find the previous cfm, then we can do nothing. */
1471 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1473 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1475 else if (cfm_reg
!= 0)
1477 get_frame_register (this_frame
, cfm_reg
, buf
);
1478 cfm
= extract_unsigned_integer (buf
, 8);
1480 cache
->prev_cfm
= cfm
;
1484 sor
= ((cfm
>> 14) & 0xf) * 8;
1486 sol
= (cfm
>> 7) & 0x7f;
1487 rrb_gr
= (cfm
>> 18) & 0x7f;
1489 /* The previous bof only requires subtraction of the sol (size of
1490 locals) due to the overlap between output and input of
1491 subsequent frames. */
1492 bof
= rse_address_add (bof
, -sol
);
1494 for (i
= 0, addr
= bof
;
1498 if (IS_NaT_COLLECTION_ADDR (addr
))
1503 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1506 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1512 /* Try and trust the lim_pc value whenever possible. */
1513 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1514 last_prologue_pc
= lim_pc
;
1516 cache
->frameless
= frameless
;
1517 cache
->after_prologue
= last_prologue_pc
;
1518 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1519 cache
->fp_reg
= fp_reg
;
1521 return last_prologue_pc
;
1525 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1527 struct ia64_frame_cache cache
;
1529 cache
.after_prologue
= 0;
1533 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1534 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1538 /* Normal frames. */
1540 static struct ia64_frame_cache
*
1541 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1543 struct ia64_frame_cache
*cache
;
1545 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1551 cache
= ia64_alloc_frame_cache ();
1552 *this_cache
= cache
;
1554 get_frame_register (this_frame
, sp_regnum
, buf
);
1555 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1557 /* We always want the bsp to point to the end of frame.
1558 This way, we can always get the beginning of frame (bof)
1559 by subtracting frame size. */
1560 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1561 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1563 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1564 psr
= extract_unsigned_integer (buf
, 8);
1566 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1567 cfm
= extract_unsigned_integer (buf
, 8);
1569 cache
->sof
= (cfm
& 0x7f);
1570 cache
->sol
= (cfm
>> 7) & 0x7f;
1571 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1575 cache
->pc
= get_frame_func (this_frame
);
1578 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1580 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1586 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1587 struct frame_id
*this_id
)
1589 struct ia64_frame_cache
*cache
=
1590 ia64_frame_cache (this_frame
, this_cache
);
1592 /* If outermost frame, mark with null frame id. */
1593 if (cache
->base
== 0)
1594 (*this_id
) = null_frame_id
;
1596 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1597 if (gdbarch_debug
>= 1)
1598 fprintf_unfiltered (gdb_stdlog
,
1599 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
1600 paddr_nz (this_id
->code_addr
),
1601 paddr_nz (this_id
->stack_addr
),
1602 paddr_nz (cache
->bsp
), this_frame
);
1605 static struct value
*
1606 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1609 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1610 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1613 gdb_assert (regnum
>= 0);
1615 if (!target_has_registers
)
1616 error (_("No registers."));
1618 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1619 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1621 else if (regnum
== IA64_BSP_REGNUM
)
1624 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1626 /* We want to calculate the previous bsp as the end of the previous
1627 register stack frame. This corresponds to what the hardware bsp
1628 register will be if we pop the frame back which is why we might
1629 have been called. We know the beginning of the current frame is
1630 cache->bsp - cache->sof. This value in the previous frame points
1631 to the start of the output registers. We can calculate the end of
1632 that frame by adding the size of output:
1633 (sof (size of frame) - sol (size of locals)). */
1634 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1635 prev_cfm
= extract_unsigned_integer (value_contents_all (val
), 8);
1636 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1638 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1640 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1643 else if (regnum
== IA64_CFM_REGNUM
)
1645 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1648 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1650 if (cache
->prev_cfm
)
1651 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1653 if (cache
->frameless
)
1654 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1656 return frame_unwind_got_register (this_frame
, regnum
, 0);
1659 else if (regnum
== IA64_VFP_REGNUM
)
1661 /* If the function in question uses an automatic register (r32-r127)
1662 for the frame pointer, it'll be found by ia64_find_saved_register()
1663 above. If the function lacks one of these frame pointers, we can
1664 still provide a value since we know the size of the frame. */
1665 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1668 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1670 struct value
*pr_val
;
1673 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1675 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1677 /* Fetch predicate register rename base from current frame
1678 marker for this frame. */
1679 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1681 /* Adjust the register number to account for register rotation. */
1682 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1684 prN
= extract_bit_field (value_contents_all (pr_val
),
1685 regnum
- VP0_REGNUM
, 1);
1686 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
1689 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1691 struct value
*unat_val
;
1693 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1695 unatN
= extract_bit_field (value_contents_all (unat_val
),
1696 regnum
- IA64_NAT0_REGNUM
, 1);
1697 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
1700 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1703 /* Find address of general register corresponding to nat bit we're
1707 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
1711 /* Compute address of nat collection bits. */
1712 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1714 CORE_ADDR nat_collection
;
1717 /* If our nat collection address is bigger than bsp, we have to get
1718 the nat collection from rnat. Otherwise, we fetch the nat
1719 collection from the computed address. */
1720 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1721 bsp
= extract_unsigned_integer (buf
, 8);
1722 if (nat_addr
>= bsp
)
1724 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
1725 nat_collection
= extract_unsigned_integer (buf
, 8);
1728 nat_collection
= read_memory_integer (nat_addr
, 8);
1729 nat_bit
= (gr_addr
>> 3) & 0x3f;
1730 natval
= (nat_collection
>> nat_bit
) & 1;
1733 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
1736 else if (regnum
== IA64_IP_REGNUM
)
1739 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1743 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1744 pc
= extract_unsigned_integer (buf
, 8);
1746 else if (cache
->frameless
)
1748 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
1749 pc
= extract_unsigned_integer (buf
, 8);
1752 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
1755 else if (regnum
== IA64_PSR_REGNUM
)
1757 /* We don't know how to get the complete previous PSR, but we need it
1758 for the slot information when we unwind the pc (pc is formed of IP
1759 register plus slot information from PSR). To get the previous
1760 slot information, we mask it off the return address. */
1761 ULONGEST slot_num
= 0;
1764 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1766 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1767 psr
= extract_unsigned_integer (buf
, 8);
1771 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1772 pc
= extract_unsigned_integer (buf
, 8);
1774 else if (cache
->frameless
)
1776 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
1777 pc
= extract_unsigned_integer (buf
, 8);
1779 psr
&= ~(3LL << 41);
1780 slot_num
= pc
& 0x3LL
;
1781 psr
|= (CORE_ADDR
)slot_num
<< 41;
1782 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
1785 else if (regnum
== IA64_BR0_REGNUM
)
1787 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1790 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1792 return frame_unwind_got_constant (this_frame
, regnum
, 0);
1795 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
1796 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1800 if (regnum
>= V32_REGNUM
)
1801 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1802 addr
= cache
->saved_regs
[regnum
];
1804 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1806 if (cache
->frameless
)
1808 struct value
*reg_val
;
1809 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1811 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
1812 with the same code above? */
1813 if (regnum
>= V32_REGNUM
)
1814 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1815 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1817 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
1819 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1821 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
1823 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1825 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1826 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1829 return frame_unwind_got_constant (this_frame
, regnum
, 0);
1832 else /* All other registers. */
1836 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1838 /* Fetch floating point register rename base from current
1839 frame marker for this frame. */
1840 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1842 /* Adjust the floating point register number to account for
1843 register rotation. */
1844 regnum
= IA64_FR32_REGNUM
1845 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1848 /* If we have stored a memory address, access the register. */
1849 addr
= cache
->saved_regs
[regnum
];
1851 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1852 /* Otherwise, punt and get the current value of the register. */
1854 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1858 static const struct frame_unwind ia64_frame_unwind
=
1861 &ia64_frame_this_id
,
1862 &ia64_frame_prev_register
,
1864 default_frame_sniffer
1867 /* Signal trampolines. */
1870 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
1871 struct ia64_frame_cache
*cache
)
1873 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1875 if (tdep
->sigcontext_register_address
)
1879 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1880 tdep
->sigcontext_register_address (cache
->base
, IA64_IP_REGNUM
);
1881 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1882 tdep
->sigcontext_register_address (cache
->base
, IA64_CFM_REGNUM
);
1883 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1884 tdep
->sigcontext_register_address (cache
->base
, IA64_PSR_REGNUM
);
1885 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1886 tdep
->sigcontext_register_address (cache
->base
, IA64_BSP_REGNUM
);
1887 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1888 tdep
->sigcontext_register_address (cache
->base
, IA64_RNAT_REGNUM
);
1889 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1890 tdep
->sigcontext_register_address (cache
->base
, IA64_CCV_REGNUM
);
1891 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1892 tdep
->sigcontext_register_address (cache
->base
, IA64_UNAT_REGNUM
);
1893 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1894 tdep
->sigcontext_register_address (cache
->base
, IA64_FPSR_REGNUM
);
1895 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1896 tdep
->sigcontext_register_address (cache
->base
, IA64_PFS_REGNUM
);
1897 cache
->saved_regs
[IA64_LC_REGNUM
] =
1898 tdep
->sigcontext_register_address (cache
->base
, IA64_LC_REGNUM
);
1899 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1900 cache
->saved_regs
[regno
] =
1901 tdep
->sigcontext_register_address (cache
->base
, regno
);
1902 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1903 cache
->saved_regs
[regno
] =
1904 tdep
->sigcontext_register_address (cache
->base
, regno
);
1905 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1906 cache
->saved_regs
[regno
] =
1907 tdep
->sigcontext_register_address (cache
->base
, regno
);
1911 static struct ia64_frame_cache
*
1912 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1914 struct ia64_frame_cache
*cache
;
1922 cache
= ia64_alloc_frame_cache ();
1924 get_frame_register (this_frame
, sp_regnum
, buf
);
1925 /* Note that frame size is hard-coded below. We cannot calculate it
1926 via prologue examination. */
1927 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1929 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1930 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1932 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1933 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1934 cache
->sof
= cache
->cfm
& 0x7f;
1936 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
1938 *this_cache
= cache
;
1943 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
1944 void **this_cache
, struct frame_id
*this_id
)
1946 struct ia64_frame_cache
*cache
=
1947 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
1949 (*this_id
) = frame_id_build_special (cache
->base
,
1950 get_frame_pc (this_frame
),
1952 if (gdbarch_debug
>= 1)
1953 fprintf_unfiltered (gdb_stdlog
,
1954 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
1955 paddr_nz (this_id
->code_addr
),
1956 paddr_nz (this_id
->stack_addr
),
1957 paddr_nz (cache
->bsp
), this_frame
);
1960 static struct value
*
1961 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
1962 void **this_cache
, int regnum
)
1964 char buf
[MAX_REGISTER_SIZE
];
1966 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1967 struct ia64_frame_cache
*cache
=
1968 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
1970 gdb_assert (regnum
>= 0);
1972 if (!target_has_registers
)
1973 error (_("No registers."));
1975 if (regnum
== IA64_IP_REGNUM
)
1978 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1982 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1983 pc
= extract_unsigned_integer (buf
, 8);
1986 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
1989 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
1990 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1994 if (regnum
>= V32_REGNUM
)
1995 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1996 addr
= cache
->saved_regs
[regnum
];
1998 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2000 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2003 else /* All other registers not listed above. */
2005 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2008 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2010 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2015 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2016 struct frame_info
*this_frame
,
2019 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2020 if (tdep
->pc_in_sigtramp
)
2022 CORE_ADDR pc
= get_frame_pc (this_frame
);
2024 if (tdep
->pc_in_sigtramp (pc
))
2031 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2034 ia64_sigtramp_frame_this_id
,
2035 ia64_sigtramp_frame_prev_register
,
2037 ia64_sigtramp_frame_sniffer
2043 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2045 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2050 static const struct frame_base ia64_frame_base
=
2053 ia64_frame_base_address
,
2054 ia64_frame_base_address
,
2055 ia64_frame_base_address
2058 #ifdef HAVE_LIBUNWIND_IA64_H
2060 struct ia64_unwind_table_entry
2062 unw_word_t start_offset
;
2063 unw_word_t end_offset
;
2064 unw_word_t info_offset
;
2067 static __inline__
uint64_t
2068 ia64_rse_slot_num (uint64_t addr
)
2070 return (addr
>> 3) & 0x3f;
2073 /* Skip over a designated number of registers in the backing
2074 store, remembering every 64th position is for NAT. */
2075 static __inline__
uint64_t
2076 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2078 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2082 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2085 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2086 number to a libunwind register number. */
2088 ia64_gdb2uw_regnum (int regnum
)
2090 if (regnum
== sp_regnum
)
2092 else if (regnum
== IA64_BSP_REGNUM
)
2093 return UNW_IA64_BSP
;
2094 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2095 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2096 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2097 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2098 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2099 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2100 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2102 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2103 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2104 else if (regnum
== IA64_PR_REGNUM
)
2106 else if (regnum
== IA64_IP_REGNUM
)
2108 else if (regnum
== IA64_CFM_REGNUM
)
2109 return UNW_IA64_CFM
;
2110 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2111 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2112 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2113 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2118 /* Gdb libunwind-frame callback function to convert from a libunwind register
2119 number to a ia64 gdb register number. */
2121 ia64_uw2gdb_regnum (int uw_regnum
)
2123 if (uw_regnum
== UNW_IA64_SP
)
2125 else if (uw_regnum
== UNW_IA64_BSP
)
2126 return IA64_BSP_REGNUM
;
2127 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2128 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2129 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2130 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2131 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2132 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2133 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2134 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2135 else if (uw_regnum
== UNW_IA64_PR
)
2136 return IA64_PR_REGNUM
;
2137 else if (uw_regnum
== UNW_REG_IP
)
2138 return IA64_IP_REGNUM
;
2139 else if (uw_regnum
== UNW_IA64_CFM
)
2140 return IA64_CFM_REGNUM
;
2141 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2142 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2143 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2144 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2149 /* Gdb libunwind-frame callback function to reveal if register is a float
2152 ia64_is_fpreg (int uw_regnum
)
2154 return unw_is_fpreg (uw_regnum
);
2157 /* Libunwind callback accessor function for general registers. */
2159 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2160 int write
, void *arg
)
2162 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2163 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2164 struct frame_info
*this_frame
= arg
;
2165 long new_sof
, old_sof
;
2166 char buf
[MAX_REGISTER_SIZE
];
2168 /* We never call any libunwind routines that need to write registers. */
2169 gdb_assert (!write
);
2174 /* Libunwind expects to see the pc value which means the slot number
2175 from the psr must be merged with the ip word address. */
2176 get_frame_register (this_frame
, IA64_IP_REGNUM
, buf
);
2177 ip
= extract_unsigned_integer (buf
, 8);
2178 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2179 psr
= extract_unsigned_integer (buf
, 8);
2180 *val
= ip
| ((psr
>> 41) & 0x3);
2183 case UNW_IA64_AR_BSP
:
2184 /* Libunwind expects to see the beginning of the current register
2185 frame so we must account for the fact that ptrace() will return a value
2186 for bsp that points *after* the current register frame. */
2187 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2188 bsp
= extract_unsigned_integer (buf
, 8);
2189 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2190 cfm
= extract_unsigned_integer (buf
, 8);
2192 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2195 case UNW_IA64_AR_BSPSTORE
:
2196 /* Libunwind wants bspstore to be after the current register frame.
2197 This is what ptrace() and gdb treats as the regular bsp value. */
2198 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2199 *val
= extract_unsigned_integer (buf
, 8);
2203 /* For all other registers, just unwind the value directly. */
2204 get_frame_register (this_frame
, regnum
, buf
);
2205 *val
= extract_unsigned_integer (buf
, 8);
2209 if (gdbarch_debug
>= 1)
2210 fprintf_unfiltered (gdb_stdlog
,
2211 " access_reg: from cache: %4s=0x%s\n",
2212 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2213 ? ia64_register_names
[regnum
] : "r??"),
2218 /* Libunwind callback accessor function for floating-point registers. */
2220 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2221 int write
, void *arg
)
2223 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2224 struct frame_info
*this_frame
= arg
;
2226 /* We never call any libunwind routines that need to write registers. */
2227 gdb_assert (!write
);
2229 get_frame_register (this_frame
, regnum
, (char *) val
);
2234 /* Libunwind callback accessor function for top-level rse registers. */
2236 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2237 int write
, void *arg
)
2239 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2240 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2241 struct regcache
*regcache
= arg
;
2242 long new_sof
, old_sof
;
2243 char buf
[MAX_REGISTER_SIZE
];
2245 /* We never call any libunwind routines that need to write registers. */
2246 gdb_assert (!write
);
2251 /* Libunwind expects to see the pc value which means the slot number
2252 from the psr must be merged with the ip word address. */
2253 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2254 ip
= extract_unsigned_integer (buf
, 8);
2255 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2256 psr
= extract_unsigned_integer (buf
, 8);
2257 *val
= ip
| ((psr
>> 41) & 0x3);
2260 case UNW_IA64_AR_BSP
:
2261 /* Libunwind expects to see the beginning of the current register
2262 frame so we must account for the fact that ptrace() will return a value
2263 for bsp that points *after* the current register frame. */
2264 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2265 bsp
= extract_unsigned_integer (buf
, 8);
2266 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2267 cfm
= extract_unsigned_integer (buf
, 8);
2269 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2272 case UNW_IA64_AR_BSPSTORE
:
2273 /* Libunwind wants bspstore to be after the current register frame.
2274 This is what ptrace() and gdb treats as the regular bsp value. */
2275 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2276 *val
= extract_unsigned_integer (buf
, 8);
2280 /* For all other registers, just unwind the value directly. */
2281 regcache_cooked_read (regcache
, regnum
, buf
);
2282 *val
= extract_unsigned_integer (buf
, 8);
2286 if (gdbarch_debug
>= 1)
2287 fprintf_unfiltered (gdb_stdlog
,
2288 " access_rse_reg: from cache: %4s=0x%s\n",
2289 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2290 ? ia64_register_names
[regnum
] : "r??"),
2296 /* Libunwind callback accessor function for top-level fp registers. */
2298 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2299 unw_fpreg_t
*val
, int write
, void *arg
)
2301 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2302 struct regcache
*regcache
= arg
;
2304 /* We never call any libunwind routines that need to write registers. */
2305 gdb_assert (!write
);
2307 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2312 /* Libunwind callback accessor function for accessing memory. */
2314 ia64_access_mem (unw_addr_space_t as
,
2315 unw_word_t addr
, unw_word_t
*val
,
2316 int write
, void *arg
)
2318 if (addr
- KERNEL_START
< ktab_size
)
2320 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2321 + (addr
- KERNEL_START
));
2330 /* XXX do we need to normalize byte-order here? */
2332 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2334 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2337 /* Call low-level function to access the kernel unwind table. */
2339 getunwind_table (gdb_byte
**buf_p
)
2343 /* FIXME drow/2005-09-10: This code used to call
2344 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2345 for the currently running ia64-linux kernel. That data should
2346 come from the core file and be accessed via the auxv vector; if
2347 we want to preserve fall back to the running kernel's table, then
2348 we should find a way to override the corefile layer's
2349 xfer_partial method. */
2351 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2357 /* Get the kernel unwind table. */
2359 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2361 static struct ia64_table_entry
*etab
;
2368 size
= getunwind_table (&ktab_buf
);
2370 return -UNW_ENOINFO
;
2372 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2375 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2376 etab
->info_offset
+= KERNEL_START
;
2379 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2380 return -UNW_ENOINFO
;
2382 di
->format
= UNW_INFO_FORMAT_TABLE
;
2384 di
->start_ip
= ktab
[0].start_offset
;
2385 di
->end_ip
= etab
[-1].end_offset
;
2386 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2387 di
->u
.ti
.segbase
= 0;
2388 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2389 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2391 if (gdbarch_debug
>= 1)
2392 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2393 "segbase=0x%s, length=%s, gp=0x%s\n",
2394 (char *) di
->u
.ti
.name_ptr
,
2395 paddr_nz (di
->u
.ti
.segbase
),
2396 pulongest (di
->u
.ti
.table_len
),
2401 /* Find the unwind table entry for a specified address. */
2403 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2404 unw_dyn_info_t
*dip
, void **buf
)
2406 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2407 Elf_Internal_Ehdr
*ehdr
;
2408 unw_word_t segbase
= 0;
2409 CORE_ADDR load_base
;
2413 bfd
= objfile
->obfd
;
2415 ehdr
= elf_tdata (bfd
)->elf_header
;
2416 phdr
= elf_tdata (bfd
)->phdr
;
2418 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2420 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2422 switch (phdr
[i
].p_type
)
2425 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2430 case PT_IA_64_UNWIND
:
2431 p_unwind
= phdr
+ i
;
2439 if (!p_text
|| !p_unwind
)
2440 return -UNW_ENOINFO
;
2442 /* Verify that the segment that contains the IP also contains
2443 the static unwind table. If not, we may be in the Linux kernel's
2444 DSO gate page in which case the unwind table is another segment.
2445 Otherwise, we are dealing with runtime-generated code, for which we
2446 have no info here. */
2447 segbase
= p_text
->p_vaddr
+ load_base
;
2449 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2452 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2454 if (phdr
[i
].p_type
== PT_LOAD
2455 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2458 /* Get the segbase from the section containing the
2460 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2464 return -UNW_ENOINFO
;
2467 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2468 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2469 dip
->gp
= ia64_find_global_pointer (ip
);
2470 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2471 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2472 dip
->u
.rti
.segbase
= segbase
;
2473 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2474 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2479 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2481 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2482 int need_unwind_info
, void *arg
)
2484 struct obj_section
*sec
= find_pc_section (ip
);
2491 /* XXX This only works if the host and the target architecture are
2492 both ia64 and if the have (more or less) the same kernel
2494 if (get_kernel_table (ip
, &di
) < 0)
2495 return -UNW_ENOINFO
;
2497 if (gdbarch_debug
>= 1)
2498 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2499 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2500 "length=%s,data=0x%s)\n",
2501 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2502 paddr_nz (di
.u
.ti
.segbase
),
2503 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2505 pulongest (di
.u
.ti
.table_len
),
2506 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2510 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2514 if (gdbarch_debug
>= 1)
2515 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2516 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2517 "length=%s,data=0x%s)\n",
2518 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2519 paddr_nz (di
.u
.rti
.segbase
),
2520 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2522 pulongest (di
.u
.rti
.table_len
),
2523 paddr_nz (di
.u
.rti
.table_data
));
2526 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2529 /* We no longer need the dyn info storage so free it. */
2535 /* Libunwind callback accessor function for cleanup. */
2537 ia64_put_unwind_info (unw_addr_space_t as
,
2538 unw_proc_info_t
*pip
, void *arg
)
2540 /* Nothing required for now. */
2543 /* Libunwind callback accessor function to get head of the dynamic
2544 unwind-info registration list. */
2546 ia64_get_dyn_info_list (unw_addr_space_t as
,
2547 unw_word_t
*dilap
, void *arg
)
2549 struct obj_section
*text_sec
;
2550 struct objfile
*objfile
;
2551 unw_word_t ip
, addr
;
2555 if (!libunwind_is_initialized ())
2556 return -UNW_ENOINFO
;
2558 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2562 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2563 ip
= obj_section_addr (text_sec
);
2564 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2567 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2568 /* We no longer need the dyn info storage so free it. */
2573 if (gdbarch_debug
>= 1)
2574 fprintf_unfiltered (gdb_stdlog
,
2575 "dynamic unwind table in objfile %s "
2576 "at 0x%s (gp=0x%s)\n",
2577 bfd_get_filename (objfile
->obfd
),
2578 paddr_nz (addr
), paddr_nz (di
.gp
));
2584 return -UNW_ENOINFO
;
2588 /* Frame interface functions for libunwind. */
2591 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2592 struct frame_id
*this_id
)
2599 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2600 if (frame_id_eq (id
, null_frame_id
))
2602 (*this_id
) = null_frame_id
;
2606 /* We must add the bsp as the special address for frame comparison
2608 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2609 bsp
= extract_unsigned_integer (buf
, 8);
2611 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2613 if (gdbarch_debug
>= 1)
2614 fprintf_unfiltered (gdb_stdlog
,
2615 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
2616 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2617 paddr_nz (bsp
), this_frame
);
2620 static struct value
*
2621 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2622 void **this_cache
, int regnum
)
2625 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2628 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2629 reg
= IA64_PR_REGNUM
;
2630 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2631 reg
= IA64_UNAT_REGNUM
;
2633 /* Let libunwind do most of the work. */
2634 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2636 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2640 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2644 unsigned char buf
[MAX_REGISTER_SIZE
];
2646 /* Fetch predicate register rename base from current frame
2647 marker for this frame. */
2648 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2649 cfm
= extract_unsigned_integer (buf
, 8);
2650 rrb_pr
= (cfm
>> 32) & 0x3f;
2652 /* Adjust the register number to account for register rotation. */
2653 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2655 prN_val
= extract_bit_field (value_contents_all (val
),
2656 regnum
- VP0_REGNUM
, 1);
2657 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
2660 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2664 unatN_val
= extract_bit_field (value_contents_all (val
),
2665 regnum
- IA64_NAT0_REGNUM
, 1);
2666 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
2669 else if (regnum
== IA64_BSP_REGNUM
)
2671 struct value
*cfm_val
;
2672 CORE_ADDR prev_bsp
, prev_cfm
;
2674 /* We want to calculate the previous bsp as the end of the previous
2675 register stack frame. This corresponds to what the hardware bsp
2676 register will be if we pop the frame back which is why we might
2677 have been called. We know that libunwind will pass us back the
2678 beginning of the current frame so we should just add sof to it. */
2679 prev_bsp
= extract_unsigned_integer (value_contents_all (val
), 8);
2680 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
2682 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
), 8);
2683 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2685 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
2692 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
2693 struct frame_info
*this_frame
,
2696 if (libunwind_is_initialized ()
2697 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
2703 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2706 ia64_libunwind_frame_this_id
,
2707 ia64_libunwind_frame_prev_register
,
2709 ia64_libunwind_frame_sniffer
,
2710 libunwind_frame_dealloc_cache
2714 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2716 struct frame_id
*this_id
)
2723 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2724 if (frame_id_eq (id
, null_frame_id
))
2726 (*this_id
) = null_frame_id
;
2730 /* We must add the bsp as the special address for frame comparison
2732 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2733 bsp
= extract_unsigned_integer (buf
, 8);
2735 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2736 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2738 if (gdbarch_debug
>= 1)
2739 fprintf_unfiltered (gdb_stdlog
,
2740 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %p\n",
2741 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2742 paddr_nz (bsp
), this_frame
);
2745 static struct value
*
2746 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2747 void **this_cache
, int regnum
)
2749 struct value
*prev_ip_val
;
2752 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2753 method of getting previous registers. */
2754 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
2756 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
), 8);
2760 void *tmp_cache
= NULL
;
2761 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
2765 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
2769 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2770 struct frame_info
*this_frame
,
2773 if (libunwind_is_initialized ())
2775 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
2780 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
2783 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2786 ia64_libunwind_sigtramp_frame_this_id
,
2787 ia64_libunwind_sigtramp_frame_prev_register
,
2789 ia64_libunwind_sigtramp_frame_sniffer
2792 /* Set of libunwind callback acccessor functions. */
2793 static unw_accessors_t ia64_unw_accessors
=
2795 ia64_find_proc_info_x
,
2796 ia64_put_unwind_info
,
2797 ia64_get_dyn_info_list
,
2805 /* Set of special libunwind callback acccessor functions specific for accessing
2806 the rse registers. At the top of the stack, we want libunwind to figure out
2807 how to read r32 - r127. Though usually they are found sequentially in memory
2808 starting from $bof, this is not always true. */
2809 static unw_accessors_t ia64_unw_rse_accessors
=
2811 ia64_find_proc_info_x
,
2812 ia64_put_unwind_info
,
2813 ia64_get_dyn_info_list
,
2815 ia64_access_rse_reg
,
2816 ia64_access_rse_fpreg
,
2821 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2822 static struct libunwind_descr ia64_libunwind_descr
=
2827 &ia64_unw_accessors
,
2828 &ia64_unw_rse_accessors
,
2831 #endif /* HAVE_LIBUNWIND_IA64_H */
2834 ia64_use_struct_convention (struct type
*type
)
2836 struct type
*float_elt_type
;
2838 /* Don't use the struct convention for anything but structure,
2839 union, or array types. */
2840 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
2841 || TYPE_CODE (type
) == TYPE_CODE_UNION
2842 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
2845 /* HFAs are structures (or arrays) consisting entirely of floating
2846 point values of the same length. Up to 8 of these are returned
2847 in registers. Don't use the struct convention when this is the
2849 float_elt_type
= is_float_or_hfa_type (type
);
2850 if (float_elt_type
!= NULL
2851 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2854 /* Other structs of length 32 or less are returned in r8-r11.
2855 Don't use the struct convention for those either. */
2856 return TYPE_LENGTH (type
) > 32;
2860 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2863 struct type
*float_elt_type
;
2865 float_elt_type
= is_float_or_hfa_type (type
);
2866 if (float_elt_type
!= NULL
)
2868 char from
[MAX_REGISTER_SIZE
];
2870 int regnum
= IA64_FR8_REGNUM
;
2871 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2875 regcache_cooked_read (regcache
, regnum
, from
);
2876 convert_typed_floating (from
, builtin_type_ia64_ext
,
2877 (char *)valbuf
+ offset
, float_elt_type
);
2878 offset
+= TYPE_LENGTH (float_elt_type
);
2886 int regnum
= IA64_GR8_REGNUM
;
2887 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2889 int n
= TYPE_LENGTH (type
) / reglen
;
2890 int m
= TYPE_LENGTH (type
) % reglen
;
2895 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2896 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2903 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2904 memcpy ((char *)valbuf
+ offset
, &val
, m
);
2910 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
2911 const gdb_byte
*valbuf
)
2913 struct type
*float_elt_type
;
2915 float_elt_type
= is_float_or_hfa_type (type
);
2916 if (float_elt_type
!= NULL
)
2918 char to
[MAX_REGISTER_SIZE
];
2920 int regnum
= IA64_FR8_REGNUM
;
2921 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2925 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
2926 to
, builtin_type_ia64_ext
);
2927 regcache_cooked_write (regcache
, regnum
, to
);
2928 offset
+= TYPE_LENGTH (float_elt_type
);
2936 int regnum
= IA64_GR8_REGNUM
;
2937 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2939 int n
= TYPE_LENGTH (type
) / reglen
;
2940 int m
= TYPE_LENGTH (type
) % reglen
;
2945 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
2946 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
2953 memcpy (&val
, (char *)valbuf
+ offset
, m
);
2954 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
2959 static enum return_value_convention
2960 ia64_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
2961 struct type
*valtype
, struct regcache
*regcache
,
2962 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
2964 int struct_return
= ia64_use_struct_convention (valtype
);
2966 if (writebuf
!= NULL
)
2968 gdb_assert (!struct_return
);
2969 ia64_store_return_value (valtype
, regcache
, writebuf
);
2972 if (readbuf
!= NULL
)
2974 gdb_assert (!struct_return
);
2975 ia64_extract_return_value (valtype
, regcache
, readbuf
);
2979 return RETURN_VALUE_STRUCT_CONVENTION
;
2981 return RETURN_VALUE_REGISTER_CONVENTION
;
2985 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
2987 switch (TYPE_CODE (t
))
2991 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
2998 case TYPE_CODE_ARRAY
:
3000 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3003 case TYPE_CODE_STRUCT
:
3007 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3008 if (!is_float_or_hfa_type_recurse
3009 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3020 /* Determine if the given type is one of the floating point types or
3021 and HFA (which is a struct, array, or combination thereof whose
3022 bottom-most elements are all of the same floating point type). */
3024 static struct type
*
3025 is_float_or_hfa_type (struct type
*t
)
3027 struct type
*et
= 0;
3029 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3033 /* Return 1 if the alignment of T is such that the next even slot
3034 should be used. Return 0, if the next available slot should
3035 be used. (See section 8.5.1 of the IA-64 Software Conventions
3036 and Runtime manual). */
3039 slot_alignment_is_next_even (struct type
*t
)
3041 switch (TYPE_CODE (t
))
3045 if (TYPE_LENGTH (t
) > 8)
3049 case TYPE_CODE_ARRAY
:
3051 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3052 case TYPE_CODE_STRUCT
:
3056 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3057 if (slot_alignment_is_next_even
3058 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3067 /* Attempt to find (and return) the global pointer for the given
3070 This is a rather nasty bit of code searchs for the .dynamic section
3071 in the objfile corresponding to the pc of the function we're trying
3072 to call. Once it finds the addresses at which the .dynamic section
3073 lives in the child process, it scans the Elf64_Dyn entries for a
3074 DT_PLTGOT tag. If it finds one of these, the corresponding
3075 d_un.d_ptr value is the global pointer. */
3078 ia64_find_global_pointer (CORE_ADDR faddr
)
3080 struct obj_section
*faddr_sect
;
3082 faddr_sect
= find_pc_section (faddr
);
3083 if (faddr_sect
!= NULL
)
3085 struct obj_section
*osect
;
3087 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3089 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3093 if (osect
< faddr_sect
->objfile
->sections_end
)
3095 CORE_ADDR addr
, endaddr
;
3097 addr
= obj_section_addr (osect
);
3098 endaddr
= obj_section_endaddr (osect
);
3100 while (addr
< endaddr
)
3106 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3109 tag
= extract_signed_integer (buf
, sizeof (buf
));
3111 if (tag
== DT_PLTGOT
)
3113 CORE_ADDR global_pointer
;
3115 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3118 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3121 return global_pointer
;
3134 /* Given a function's address, attempt to find (and return) the
3135 corresponding (canonical) function descriptor. Return 0 if
3138 find_extant_func_descr (CORE_ADDR faddr
)
3140 struct obj_section
*faddr_sect
;
3142 /* Return early if faddr is already a function descriptor. */
3143 faddr_sect
= find_pc_section (faddr
);
3144 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3147 if (faddr_sect
!= NULL
)
3149 struct obj_section
*osect
;
3150 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3152 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3156 if (osect
< faddr_sect
->objfile
->sections_end
)
3158 CORE_ADDR addr
, endaddr
;
3160 addr
= obj_section_addr (osect
);
3161 endaddr
= obj_section_endaddr (osect
);
3163 while (addr
< endaddr
)
3169 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3172 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3174 if (faddr
== faddr2
)
3184 /* Attempt to find a function descriptor corresponding to the
3185 given address. If none is found, construct one on the
3186 stack using the address at fdaptr. */
3189 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3193 fdesc
= find_extant_func_descr (faddr
);
3197 ULONGEST global_pointer
;
3203 global_pointer
= ia64_find_global_pointer (faddr
);
3205 if (global_pointer
== 0)
3206 regcache_cooked_read_unsigned (regcache
,
3207 IA64_GR1_REGNUM
, &global_pointer
);
3209 store_unsigned_integer (buf
, 8, faddr
);
3210 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3212 write_memory (fdesc
, buf
, 16);
3218 /* Use the following routine when printing out function pointers
3219 so the user can see the function address rather than just the
3220 function descriptor. */
3222 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3223 struct target_ops
*targ
)
3225 struct obj_section
*s
;
3227 s
= find_pc_section (addr
);
3229 /* check if ADDR points to a function descriptor. */
3230 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3231 return read_memory_unsigned_integer (addr
, 8);
3233 /* Normally, functions live inside a section that is executable.
3234 So, if ADDR points to a non-executable section, then treat it
3235 as a function descriptor and return the target address iff
3236 the target address itself points to a section that is executable. */
3237 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0)
3239 CORE_ADDR pc
= read_memory_unsigned_integer (addr
, 8);
3240 struct obj_section
*pc_section
= find_pc_section (pc
);
3242 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3246 /* There are also descriptors embedded in vtables. */
3249 struct minimal_symbol
*minsym
;
3251 minsym
= lookup_minimal_symbol_by_pc (addr
);
3253 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3254 return read_memory_unsigned_integer (addr
, 8);
3261 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3267 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3268 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3269 int nargs
, struct value
**args
, CORE_ADDR sp
,
3270 int struct_return
, CORE_ADDR struct_addr
)
3276 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3278 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3279 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3280 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3284 /* Count the number of slots needed for the arguments. */
3285 for (argno
= 0; argno
< nargs
; argno
++)
3288 type
= check_typedef (value_type (arg
));
3289 len
= TYPE_LENGTH (type
);
3291 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3294 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3297 nslots
+= (len
+ 7) / 8;
3300 /* Divvy up the slots between the RSE and the memory stack. */
3301 rseslots
= (nslots
> 8) ? 8 : nslots
;
3302 memslots
= nslots
- rseslots
;
3304 /* Allocate a new RSE frame. */
3305 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3307 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3308 new_bsp
= rse_address_add (bsp
, rseslots
);
3309 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3311 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3312 pfs
&= 0xc000000000000000LL
;
3313 pfs
|= (cfm
& 0xffffffffffffLL
);
3314 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3316 cfm
&= 0xc000000000000000LL
;
3318 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3320 /* We will attempt to find function descriptors in the .opd segment,
3321 but if we can't we'll construct them ourselves. That being the
3322 case, we'll need to reserve space on the stack for them. */
3323 funcdescaddr
= sp
- nfuncargs
* 16;
3324 funcdescaddr
&= ~0xfLL
;
3326 /* Adjust the stack pointer to it's new value. The calling conventions
3327 require us to have 16 bytes of scratch, plus whatever space is
3328 necessary for the memory slots and our function descriptors. */
3329 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3330 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3332 /* Place the arguments where they belong. The arguments will be
3333 either placed in the RSE backing store or on the memory stack.
3334 In addition, floating point arguments or HFAs are placed in
3335 floating point registers. */
3337 floatreg
= IA64_FR8_REGNUM
;
3338 for (argno
= 0; argno
< nargs
; argno
++)
3340 struct type
*float_elt_type
;
3343 type
= check_typedef (value_type (arg
));
3344 len
= TYPE_LENGTH (type
);
3346 /* Special handling for function parameters. */
3348 && TYPE_CODE (type
) == TYPE_CODE_PTR
3349 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3352 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
), 8);
3353 store_unsigned_integer (val_buf
, 8,
3354 find_func_descr (regcache
, faddr
,
3356 if (slotnum
< rseslots
)
3357 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3359 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3366 /* Skip odd slot if necessary... */
3367 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3375 memset (val_buf
, 0, 8);
3376 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3378 if (slotnum
< rseslots
)
3379 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3381 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3388 /* Handle floating point types (including HFAs). */
3389 float_elt_type
= is_float_or_hfa_type (type
);
3390 if (float_elt_type
!= NULL
)
3393 len
= TYPE_LENGTH (type
);
3394 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3396 char to
[MAX_REGISTER_SIZE
];
3397 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3398 to
, builtin_type_ia64_ext
);
3399 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3401 argoffset
+= TYPE_LENGTH (float_elt_type
);
3402 len
-= TYPE_LENGTH (float_elt_type
);
3407 /* Store the struct return value in r8 if necessary. */
3410 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3413 global_pointer
= ia64_find_global_pointer (func_addr
);
3415 if (global_pointer
!= 0)
3416 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3418 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3420 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3425 static struct frame_id
3426 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3431 get_frame_register (this_frame
, sp_regnum
, buf
);
3432 sp
= extract_unsigned_integer (buf
, 8);
3434 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3435 bsp
= extract_unsigned_integer (buf
, 8);
3437 if (gdbarch_debug
>= 1)
3438 fprintf_unfiltered (gdb_stdlog
,
3439 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3440 paddr_nz (get_frame_pc (this_frame
)),
3441 paddr_nz (sp
), paddr_nz (bsp
));
3443 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3447 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3450 CORE_ADDR ip
, psr
, pc
;
3452 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3453 ip
= extract_unsigned_integer (buf
, 8);
3454 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3455 psr
= extract_unsigned_integer (buf
, 8);
3457 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3462 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3464 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3465 return print_insn_ia64 (memaddr
, info
);
3468 static struct gdbarch
*
3469 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3471 struct gdbarch
*gdbarch
;
3472 struct gdbarch_tdep
*tdep
;
3474 /* If there is already a candidate, use it. */
3475 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3477 return arches
->gdbarch
;
3479 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3480 gdbarch
= gdbarch_alloc (&info
, tdep
);
3482 tdep
->sigcontext_register_address
= 0;
3483 tdep
->pc_in_sigtramp
= 0;
3485 /* According to the ia64 specs, instructions that store long double
3486 floats in memory use a long-double format different than that
3487 used in the floating registers. The memory format matches the
3488 x86 extended float format which is 80 bits. An OS may choose to
3489 use this format (e.g. GNU/Linux) or choose to use a different
3490 format for storing long doubles (e.g. HPUX). In the latter case,
3491 the setting of the format may be moved/overridden in an
3492 OS-specific tdep file. */
3493 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3495 set_gdbarch_short_bit (gdbarch
, 16);
3496 set_gdbarch_int_bit (gdbarch
, 32);
3497 set_gdbarch_long_bit (gdbarch
, 64);
3498 set_gdbarch_long_long_bit (gdbarch
, 64);
3499 set_gdbarch_float_bit (gdbarch
, 32);
3500 set_gdbarch_double_bit (gdbarch
, 64);
3501 set_gdbarch_long_double_bit (gdbarch
, 128);
3502 set_gdbarch_ptr_bit (gdbarch
, 64);
3504 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3505 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3506 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3507 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3509 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3510 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3512 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3513 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3514 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3515 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3516 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3517 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3518 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3520 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3522 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3524 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3525 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3526 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3527 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3528 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3530 /* Settings for calling functions in the inferior. */
3531 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3532 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3533 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
3535 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3536 #ifdef HAVE_LIBUNWIND_IA64_H
3537 frame_unwind_append_unwinder (gdbarch
,
3538 &ia64_libunwind_sigtramp_frame_unwind
);
3539 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
3540 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3541 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3543 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3545 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
3546 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3548 /* Settings that should be unnecessary. */
3549 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3551 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3552 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3554 /* The virtual table contains 16-byte descriptors, not pointers to
3556 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3558 /* Hook in ABI-specific overrides, if they have been registered. */
3559 gdbarch_init_osabi (info
, gdbarch
);
3564 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3567 _initialize_ia64_tdep (void)
3569 /* Define the ia64 floating-point format to gdb. */
3570 builtin_type_ia64_ext
=
3571 init_type (TYPE_CODE_FLT
, 128 / 8,
3572 0, "builtin_type_ia64_ext", NULL
);
3573 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3575 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);