1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
27 #include "reggroups.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
31 #include "target-float.h"
34 #include "elf/common.h" /* for DT_PLTGOT value */
39 #include "ia64-tdep.h"
42 #ifdef HAVE_LIBUNWIND_IA64_H
43 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
44 #include "ia64-libunwind-tdep.h"
46 /* Note: KERNEL_START is supposed to be an address which is not going
47 to ever contain any valid unwind info. For ia64 linux, the choice
48 of 0xc000000000000000 is fairly safe since that's uncached space.
50 We use KERNEL_START as follows: after obtaining the kernel's
51 unwind table via getunwind(), we project its unwind data into
52 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
53 when ia64_access_mem() sees a memory access to this
54 address-range, we redirect it to ktab instead.
56 None of this hackery is needed with a modern kernel/libcs
57 which uses the kernel virtual DSO to provide access to the
58 kernel's unwind info. In that case, ktab_size remains 0 and
59 hence the value of KERNEL_START doesn't matter. */
61 #define KERNEL_START 0xc000000000000000ULL
63 static size_t ktab_size
= 0;
64 struct ia64_table_entry
66 uint64_t start_offset
;
71 static struct ia64_table_entry
*ktab
= NULL
;
72 static gdb::optional
<gdb::byte_vector
> ktab_buf
;
76 /* An enumeration of the different IA-64 instruction types. */
78 typedef enum instruction_type
80 A
, /* Integer ALU ; I-unit or M-unit */
81 I
, /* Non-ALU integer; I-unit */
82 M
, /* Memory ; M-unit */
83 F
, /* Floating-point ; F-unit */
84 B
, /* Branch ; B-unit */
85 L
, /* Extended (L+X) ; I-unit */
86 X
, /* Extended (L+X) ; I-unit */
87 undefined
/* undefined or reserved */
90 /* We represent IA-64 PC addresses as the value of the instruction
91 pointer or'd with some bit combination in the low nibble which
92 represents the slot number in the bundle addressed by the
93 instruction pointer. The problem is that the Linux kernel
94 multiplies its slot numbers (for exceptions) by one while the
95 disassembler multiplies its slot numbers by 6. In addition, I've
96 heard it said that the simulator uses 1 as the multiplier.
98 I've fixed the disassembler so that the bytes_per_line field will
99 be the slot multiplier. If bytes_per_line comes in as zero, it
100 is set to six (which is how it was set up initially). -- objdump
101 displays pretty disassembly dumps with this value. For our purposes,
102 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
103 never want to also display the raw bytes the way objdump does. */
105 #define SLOT_MULTIPLIER 1
107 /* Length in bytes of an instruction bundle. */
109 #define BUNDLE_LEN 16
111 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
113 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
114 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
117 static gdbarch_init_ftype ia64_gdbarch_init
;
119 static gdbarch_register_name_ftype ia64_register_name
;
120 static gdbarch_register_type_ftype ia64_register_type
;
121 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
122 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
123 static struct type
*is_float_or_hfa_type (struct type
*t
);
124 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
127 #define NUM_IA64_RAW_REGS 462
129 /* Big enough to hold a FP register in bytes. */
130 #define IA64_FP_REGISTER_SIZE 16
132 static int sp_regnum
= IA64_GR12_REGNUM
;
134 /* NOTE: we treat the register stack registers r32-r127 as
135 pseudo-registers because they may not be accessible via the ptrace
136 register get/set interfaces. */
138 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
,
139 VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
140 V127_REGNUM
= V32_REGNUM
+ 95,
141 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16,
142 VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
144 /* Array of register names; There should be ia64_num_regs strings in
147 static const char *ia64_register_names
[] =
148 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
149 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
150 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
151 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
165 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
166 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
167 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
168 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
169 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
170 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
171 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
172 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
173 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
174 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
175 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
176 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
177 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
178 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
179 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
180 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "",
191 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
195 "pr", "ip", "psr", "cfm",
197 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
198 "", "", "", "", "", "", "", "",
199 "rsc", "bsp", "bspstore", "rnat",
201 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
202 "ccv", "", "", "", "unat", "", "", "",
203 "fpsr", "", "", "", "itc",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
210 "", "", "", "", "", "", "", "", "", "",
211 "", "", "", "", "", "", "", "", "", "",
212 "", "", "", "", "", "", "", "", "", "",
214 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
215 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
216 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
217 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
218 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
219 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
220 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
221 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
222 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
223 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
224 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
225 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
226 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
227 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
228 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
229 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
233 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
234 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
235 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
236 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
237 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
238 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
239 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
240 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
241 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
242 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
243 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
244 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
246 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
247 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
248 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
249 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
250 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
251 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
252 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
253 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
256 struct ia64_frame_cache
258 CORE_ADDR base
; /* frame pointer base for frame */
259 CORE_ADDR pc
; /* function start pc for frame */
260 CORE_ADDR saved_sp
; /* stack pointer for frame */
261 CORE_ADDR bsp
; /* points at r32 for the current frame */
262 CORE_ADDR cfm
; /* cfm value for current frame */
263 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
265 int sof
; /* Size of frame (decoded from cfm value). */
266 int sol
; /* Size of locals (decoded from cfm value). */
267 int sor
; /* Number of rotating registers (decoded from
269 CORE_ADDR after_prologue
;
270 /* Address of first instruction after the last
271 prologue instruction; Note that there may
272 be instructions from the function's body
273 intermingled with the prologue. */
274 int mem_stack_frame_size
;
275 /* Size of the memory stack frame (may be zero),
276 or -1 if it has not been determined yet. */
277 int fp_reg
; /* Register number (if any) used a frame pointer
278 for this frame. 0 if no register is being used
279 as the frame pointer. */
281 /* Saved registers. */
282 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
287 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
292 static const struct floatformat floatformat_ia64_ext_little
=
294 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
295 floatformat_intbit_yes
, "floatformat_ia64_ext_little", floatformat_valid
, NULL
298 static const struct floatformat floatformat_ia64_ext_big
=
300 floatformat_big
, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
301 floatformat_intbit_yes
, "floatformat_ia64_ext_big", floatformat_valid
304 static const struct floatformat
*floatformats_ia64_ext
[2] =
306 &floatformat_ia64_ext_big
,
307 &floatformat_ia64_ext_little
311 ia64_ext_type (struct gdbarch
*gdbarch
)
313 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
315 if (!tdep
->ia64_ext_type
)
317 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
318 floatformats_ia64_ext
);
320 return tdep
->ia64_ext_type
;
324 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
325 struct reggroup
*group
)
330 if (group
== all_reggroup
)
332 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
333 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
334 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
335 if (group
== float_reggroup
)
337 if (group
== vector_reggroup
)
339 if (group
== general_reggroup
)
340 return (!vector_p
&& !float_p
);
341 if (group
== save_reggroup
|| group
== restore_reggroup
)
347 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
349 return ia64_register_names
[reg
];
353 ia64_register_type (struct gdbarch
*arch
, int reg
)
355 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
356 return ia64_ext_type (arch
);
358 return builtin_type (arch
)->builtin_long
;
362 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
364 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
365 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
370 /* Extract ``len'' bits from an instruction bundle starting at
374 extract_bit_field (const gdb_byte
*bundle
, int from
, int len
)
376 long long result
= 0LL;
378 int from_byte
= from
/ 8;
379 int to_byte
= to
/ 8;
380 unsigned char *b
= (unsigned char *) bundle
;
386 if (from_byte
== to_byte
)
387 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
388 result
= c
>> (from
% 8);
389 lshift
= 8 - (from
% 8);
391 for (i
= from_byte
+1; i
< to_byte
; i
++)
393 result
|= ((long long) b
[i
]) << lshift
;
397 if (from_byte
< to_byte
&& (to
% 8 != 0))
400 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
401 result
|= ((long long) c
) << lshift
;
407 /* Replace the specified bits in an instruction bundle. */
410 replace_bit_field (gdb_byte
*bundle
, long long val
, int from
, int len
)
413 int from_byte
= from
/ 8;
414 int to_byte
= to
/ 8;
415 unsigned char *b
= (unsigned char *) bundle
;
418 if (from_byte
== to_byte
)
420 unsigned char left
, right
;
422 left
= (c
>> (to
% 8)) << (to
% 8);
423 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
424 c
= (unsigned char) (val
& 0xff);
425 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
433 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
434 c
= c
| (val
<< (from
% 8));
436 val
>>= 8 - from
% 8;
438 for (i
= from_byte
+1; i
< to_byte
; i
++)
447 unsigned char cv
= (unsigned char) val
;
449 c
= c
>> (to
% 8) << (to
% 8);
450 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
456 /* Return the contents of slot N (for N = 0, 1, or 2) in
457 and instruction bundle. */
460 slotN_contents (gdb_byte
*bundle
, int slotnum
)
462 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
465 /* Store an instruction in an instruction bundle. */
468 replace_slotN_contents (gdb_byte
*bundle
, long long instr
, int slotnum
)
470 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
473 static const enum instruction_type template_encoding_table
[32][3] =
475 { M
, I
, I
}, /* 00 */
476 { M
, I
, I
}, /* 01 */
477 { M
, I
, I
}, /* 02 */
478 { M
, I
, I
}, /* 03 */
479 { M
, L
, X
}, /* 04 */
480 { M
, L
, X
}, /* 05 */
481 { undefined
, undefined
, undefined
}, /* 06 */
482 { undefined
, undefined
, undefined
}, /* 07 */
483 { M
, M
, I
}, /* 08 */
484 { M
, M
, I
}, /* 09 */
485 { M
, M
, I
}, /* 0A */
486 { M
, M
, I
}, /* 0B */
487 { M
, F
, I
}, /* 0C */
488 { M
, F
, I
}, /* 0D */
489 { M
, M
, F
}, /* 0E */
490 { M
, M
, F
}, /* 0F */
491 { M
, I
, B
}, /* 10 */
492 { M
, I
, B
}, /* 11 */
493 { M
, B
, B
}, /* 12 */
494 { M
, B
, B
}, /* 13 */
495 { undefined
, undefined
, undefined
}, /* 14 */
496 { undefined
, undefined
, undefined
}, /* 15 */
497 { B
, B
, B
}, /* 16 */
498 { B
, B
, B
}, /* 17 */
499 { M
, M
, B
}, /* 18 */
500 { M
, M
, B
}, /* 19 */
501 { undefined
, undefined
, undefined
}, /* 1A */
502 { undefined
, undefined
, undefined
}, /* 1B */
503 { M
, F
, B
}, /* 1C */
504 { M
, F
, B
}, /* 1D */
505 { undefined
, undefined
, undefined
}, /* 1E */
506 { undefined
, undefined
, undefined
}, /* 1F */
509 /* Fetch and (partially) decode an instruction at ADDR and return the
510 address of the next instruction to fetch. */
513 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
515 gdb_byte bundle
[BUNDLE_LEN
];
516 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
520 /* Warn about slot numbers greater than 2. We used to generate
521 an error here on the assumption that the user entered an invalid
522 address. But, sometimes GDB itself requests an invalid address.
523 This can (easily) happen when execution stops in a function for
524 which there are no symbols. The prologue scanner will attempt to
525 find the beginning of the function - if the nearest symbol
526 happens to not be aligned on a bundle boundary (16 bytes), the
527 resulting starting address will cause GDB to think that the slot
530 So we warn about it and set the slot number to zero. It is
531 not necessarily a fatal condition, particularly if debugging
532 at the assembly language level. */
535 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
536 "Using slot 0 instead"));
542 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
547 *instr
= slotN_contents (bundle
, slotnum
);
548 templ
= extract_bit_field (bundle
, 0, 5);
549 *it
= template_encoding_table
[(int)templ
][slotnum
];
551 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
554 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
559 /* There are 5 different break instructions (break.i, break.b,
560 break.m, break.f, and break.x), but they all have the same
561 encoding. (The five bit template in the low five bits of the
562 instruction bundle distinguishes one from another.)
564 The runtime architecture manual specifies that break instructions
565 used for debugging purposes must have the upper two bits of the 21
566 bit immediate set to a 0 and a 1 respectively. A breakpoint
567 instruction encodes the most significant bit of its 21 bit
568 immediate at bit 36 of the 41 bit instruction. The penultimate msb
569 is at bit 25 which leads to the pattern below.
571 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
572 it turns out that 0x80000 was used as the syscall break in the early
573 simulators. So I changed the pattern slightly to do "break.i 0x080001"
574 instead. But that didn't work either (I later found out that this
575 pattern was used by the simulator that I was using.) So I ended up
576 using the pattern seen below.
578 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
579 while we need bit-based addressing as the instructions length is 41 bits and
580 we must not modify/corrupt the adjacent slots in the same bundle.
581 Fortunately we may store larger memory incl. the adjacent bits with the
582 original memory content (not the possibly already stored breakpoints there).
583 We need to be careful in ia64_memory_remove_breakpoint to always restore
584 only the specific bits of this instruction ignoring any adjacent stored
587 We use the original addressing with the low nibble in the range <0..2> which
588 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
589 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
590 bytes just without these two possibly skipped bytes to not to exceed to the
593 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
594 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
595 In such case there is no other place where to store
596 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
597 SLOTNUM in ia64_memory_remove_breakpoint.
599 There is one special case where we need to be extra careful:
600 L-X instructions, which are instructions that occupy 2 slots
601 (The L part is always in slot 1, and the X part is always in
602 slot 2). We must refuse to insert breakpoints for an address
603 that points at slot 2 of a bundle where an L-X instruction is
604 present, since there is logically no instruction at that address.
605 However, to make things more interesting, the opcode of L-X
606 instructions is located in slot 2. This means that, to insert
607 a breakpoint at an address that points to slot 1, we actually
608 need to write the breakpoint in slot 2! Slot 1 is actually
609 the extended operand, so writing the breakpoint there would not
610 have the desired effect. Another side-effect of this issue
611 is that we need to make sure that the shadow contents buffer
612 does save byte 15 of our instruction bundle (this is the tail
613 end of slot 2, which wouldn't be saved if we were to insert
614 the breakpoint in slot 1).
616 ia64 16-byte bundle layout:
617 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
619 The current addressing used by the code below:
620 original PC placed_address placed_size required covered
621 == bp_tgt->shadow_len reqd \subset covered
622 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
623 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
624 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
626 L-X instructions are treated a little specially, as explained above:
627 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
629 `objdump -d' and some other tools show a bit unjustified offsets:
630 original PC byte where starts the instruction objdump offset
631 0xABCDE0 0xABCDE0 0xABCDE0
632 0xABCDE1 0xABCDE5 0xABCDE6
633 0xABCDE2 0xABCDEA 0xABCDEC
636 #define IA64_BREAKPOINT 0x00003333300LL
639 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
640 struct bp_target_info
*bp_tgt
)
642 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
643 gdb_byte bundle
[BUNDLE_LEN
];
644 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
645 long long instr_breakpoint
;
650 error (_("Can't insert breakpoint for slot numbers greater than 2."));
654 /* Enable the automatic memory restoration from breakpoints while
655 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
656 Otherwise, we could possibly store into the shadow parts of the adjacent
657 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
658 breakpoint instruction bits region. */
659 scoped_restore restore_memory_0
660 = make_scoped_restore_show_memory_breakpoints (0);
661 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
665 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
666 for addressing the SHADOW_CONTENTS placement. */
667 shadow_slotnum
= slotnum
;
669 /* Always cover the last byte of the bundle in case we are inserting
670 a breakpoint on an L-X instruction. */
671 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
673 templ
= extract_bit_field (bundle
, 0, 5);
674 if (template_encoding_table
[templ
][slotnum
] == X
)
676 /* X unit types can only be used in slot 2, and are actually
677 part of a 2-slot L-X instruction. We cannot break at this
678 address, as this is the second half of an instruction that
679 lives in slot 1 of that bundle. */
680 gdb_assert (slotnum
== 2);
681 error (_("Can't insert breakpoint for non-existing slot X"));
683 if (template_encoding_table
[templ
][slotnum
] == L
)
685 /* L unit types can only be used in slot 1. But the associated
686 opcode for that instruction is in slot 2, so bump the slot number
688 gdb_assert (slotnum
== 1);
692 /* Store the whole bundle, except for the initial skipped bytes by the slot
693 number interpreted as bytes offset in PLACED_ADDRESS. */
694 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
,
697 /* Re-read the same bundle as above except that, this time, read it in order
698 to compute the new bundle inside which we will be inserting the
699 breakpoint. Therefore, disable the automatic memory restoration from
700 breakpoints while we read our instruction bundle. Otherwise, the general
701 restoration mechanism kicks in and we would possibly remove parts of the
702 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
703 the real breakpoint instruction bits region. */
704 scoped_restore restore_memory_1
705 = make_scoped_restore_show_memory_breakpoints (1);
706 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
710 /* Breakpoints already present in the code will get deteacted and not get
711 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
712 location cannot induce the internal error as they are optimized into
713 a single instance by update_global_location_list. */
714 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
715 if (instr_breakpoint
== IA64_BREAKPOINT
)
716 internal_error (__FILE__
, __LINE__
,
717 _("Address %s already contains a breakpoint."),
718 paddress (gdbarch
, bp_tgt
->placed_address
));
719 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
721 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
728 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
729 struct bp_target_info
*bp_tgt
)
731 CORE_ADDR addr
= bp_tgt
->placed_address
;
732 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
733 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
734 long long instr_breakpoint
, instr_saved
;
740 /* Disable the automatic memory restoration from breakpoints while
741 we read our instruction bundle. Otherwise, the general restoration
742 mechanism kicks in and we would possibly remove parts of the adjacent
743 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
744 breakpoint instruction bits region. */
745 scoped_restore restore_memory_1
746 = make_scoped_restore_show_memory_breakpoints (1);
747 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
751 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
752 for addressing the SHADOW_CONTENTS placement. */
753 shadow_slotnum
= slotnum
;
755 templ
= extract_bit_field (bundle_mem
, 0, 5);
756 if (template_encoding_table
[templ
][slotnum
] == X
)
758 /* X unit types can only be used in slot 2, and are actually
759 part of a 2-slot L-X instruction. We refuse to insert
760 breakpoints at this address, so there should be no reason
761 for us attempting to remove one there, except if the program's
762 code somehow got modified in memory. */
763 gdb_assert (slotnum
== 2);
764 warning (_("Cannot remove breakpoint at address %s from non-existing "
765 "X-type slot, memory has changed underneath"),
766 paddress (gdbarch
, bp_tgt
->placed_address
));
769 if (template_encoding_table
[templ
][slotnum
] == L
)
771 /* L unit types can only be used in slot 1. But the breakpoint
772 was actually saved using slot 2, so update the slot number
774 gdb_assert (slotnum
== 1);
778 gdb_assert (bp_tgt
->shadow_len
== BUNDLE_LEN
- shadow_slotnum
);
780 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
781 if (instr_breakpoint
!= IA64_BREAKPOINT
)
783 warning (_("Cannot remove breakpoint at address %s, "
784 "no break instruction at such address."),
785 paddress (gdbarch
, bp_tgt
->placed_address
));
789 /* Extract the original saved instruction from SLOTNUM normalizing its
790 bit-shift for INSTR_SAVED. */
791 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
792 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
794 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
796 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
797 and not any of the other ones that are stored in SHADOW_CONTENTS. */
798 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
799 val
= target_write_raw_memory (addr
, bundle_mem
, BUNDLE_LEN
);
804 /* Implement the breakpoint_kind_from_pc gdbarch method. */
807 ia64_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
809 /* A place holder of gdbarch method breakpoint_kind_from_pc. */
813 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
814 instruction slots ranges are bit-granular (41 bits) we have to provide an
815 extended range as described for ia64_memory_insert_breakpoint. We also take
816 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
817 make a match for permanent breakpoints. */
819 static const gdb_byte
*
820 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
,
821 CORE_ADDR
*pcptr
, int *lenptr
)
823 CORE_ADDR addr
= *pcptr
;
824 static gdb_byte bundle
[BUNDLE_LEN
];
825 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
826 long long instr_fetched
;
831 error (_("Can't insert breakpoint for slot numbers greater than 2."));
835 /* Enable the automatic memory restoration from breakpoints while
836 we read our instruction bundle to match bp_loc_is_permanent. */
838 scoped_restore restore_memory_0
839 = make_scoped_restore_show_memory_breakpoints (0);
840 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
843 /* The memory might be unreachable. This can happen, for instance,
844 when the user inserts a breakpoint at an invalid address. */
848 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
849 for addressing the SHADOW_CONTENTS placement. */
850 shadow_slotnum
= slotnum
;
852 /* Cover always the last byte of the bundle for the L-X slot case. */
853 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
855 /* Check for L type instruction in slot 1, if present then bump up the slot
856 number to the slot 2. */
857 templ
= extract_bit_field (bundle
, 0, 5);
858 if (template_encoding_table
[templ
][slotnum
] == X
)
860 gdb_assert (slotnum
== 2);
861 error (_("Can't insert breakpoint for non-existing slot X"));
863 if (template_encoding_table
[templ
][slotnum
] == L
)
865 gdb_assert (slotnum
== 1);
869 /* A break instruction has its all its opcode bits cleared except for
870 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
871 we should not touch the L slot - the upper 41 bits of the parameter. */
872 instr_fetched
= slotN_contents (bundle
, slotnum
);
873 instr_fetched
&= 0x1003ffffc0LL
;
874 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
876 return bundle
+ shadow_slotnum
;
880 ia64_read_pc (readable_regcache
*regcache
)
882 ULONGEST psr_value
, pc_value
;
885 regcache
->cooked_read (IA64_PSR_REGNUM
, &psr_value
);
886 regcache
->cooked_read (IA64_IP_REGNUM
, &pc_value
);
887 slot_num
= (psr_value
>> 41) & 3;
889 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
893 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
895 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
898 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
899 psr_value
&= ~(3LL << 41);
900 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
904 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
905 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
908 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
910 /* Returns the address of the slot that's NSLOTS slots away from
911 the address ADDR. NSLOTS may be positive or negative. */
913 rse_address_add(CORE_ADDR addr
, int nslots
)
916 int mandatory_nat_slots
= nslots
/ 63;
917 int direction
= nslots
< 0 ? -1 : 1;
919 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
921 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
922 new_addr
+= 8 * direction
;
924 if (IS_NaT_COLLECTION_ADDR(new_addr
))
925 new_addr
+= 8 * direction
;
930 static enum register_status
931 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, readable_regcache
*regcache
,
932 int regnum
, gdb_byte
*buf
)
934 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
935 enum register_status status
;
937 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
939 #ifdef HAVE_LIBUNWIND_IA64_H
940 /* First try and use the libunwind special reg accessor,
941 otherwise fallback to standard logic. */
942 if (!libunwind_is_initialized ()
943 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
946 /* The fallback position is to assume that r32-r127 are
947 found sequentially in memory starting at $bof. This
948 isn't always true, but without libunwind, this is the
950 enum register_status status
;
955 status
= regcache
->cooked_read (IA64_BSP_REGNUM
, &bsp
);
956 if (status
!= REG_VALID
)
959 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
960 if (status
!= REG_VALID
)
963 /* The bsp points at the end of the register frame so we
964 subtract the size of frame from it to get start of
966 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
968 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
970 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
971 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
972 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
976 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
980 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
985 status
= regcache
->cooked_read (IA64_UNAT_REGNUM
, &unat
);
986 if (status
!= REG_VALID
)
988 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
989 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
990 byte_order
, unatN_val
);
992 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
994 ULONGEST natN_val
= 0;
997 CORE_ADDR gr_addr
= 0;
999 status
= regcache
->cooked_read (IA64_BSP_REGNUM
, &bsp
);
1000 if (status
!= REG_VALID
)
1003 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
1004 if (status
!= REG_VALID
)
1007 /* The bsp points at the end of the register frame so we
1008 subtract the size of frame from it to get start of register frame. */
1009 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1011 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1012 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1016 /* Compute address of nat collection bits. */
1017 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1018 ULONGEST nat_collection
;
1020 /* If our nat collection address is bigger than bsp, we have to get
1021 the nat collection from rnat. Otherwise, we fetch the nat
1022 collection from the computed address. */
1023 if (nat_addr
>= bsp
)
1024 regcache
->cooked_read (IA64_RNAT_REGNUM
, &nat_collection
);
1026 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1027 nat_bit
= (gr_addr
>> 3) & 0x3f;
1028 natN_val
= (nat_collection
>> nat_bit
) & 1;
1031 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1032 byte_order
, natN_val
);
1034 else if (regnum
== VBOF_REGNUM
)
1036 /* A virtual register frame start is provided for user convenience.
1037 It can be calculated as the bsp - sof (sizeof frame). */
1041 status
= regcache
->cooked_read (IA64_BSP_REGNUM
, &bsp
);
1042 if (status
!= REG_VALID
)
1044 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
1045 if (status
!= REG_VALID
)
1048 /* The bsp points at the end of the register frame so we
1049 subtract the size of frame from it to get beginning of frame. */
1050 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1051 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1054 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1060 status
= regcache
->cooked_read (IA64_PR_REGNUM
, &pr
);
1061 if (status
!= REG_VALID
)
1063 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
1064 if (status
!= REG_VALID
)
1067 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1069 /* Fetch predicate register rename base from current frame
1070 marker for this frame. */
1071 int rrb_pr
= (cfm
>> 32) & 0x3f;
1073 /* Adjust the register number to account for register rotation. */
1074 regnum
= VP16_REGNUM
1075 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1077 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1078 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1079 byte_order
, prN_val
);
1082 memset (buf
, 0, register_size (gdbarch
, regnum
));
1088 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1089 int regnum
, const gdb_byte
*buf
)
1091 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1093 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1097 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1098 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1100 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1102 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1104 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1105 write_memory (reg_addr
, buf
, 8);
1108 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1110 ULONGEST unatN_val
, unat
, unatN_mask
;
1111 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1112 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1115 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1117 unat
&= ~unatN_mask
;
1118 else if (unatN_val
== 1)
1120 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1122 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1127 CORE_ADDR gr_addr
= 0;
1128 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1129 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1131 /* The bsp points at the end of the register frame so we
1132 subtract the size of frame from it to get start of register frame. */
1133 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1135 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1136 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1138 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1142 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1144 /* Compute address of nat collection bits. */
1145 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1146 CORE_ADDR nat_collection
;
1147 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1148 ULONGEST natN_mask
= (1LL << natN_bit
);
1149 /* If our nat collection address is bigger than bsp, we have to get
1150 the nat collection from rnat. Otherwise, we fetch the nat
1151 collection from the computed address. */
1152 if (nat_addr
>= bsp
)
1154 regcache_cooked_read_unsigned (regcache
,
1158 nat_collection
|= natN_mask
;
1160 nat_collection
&= ~natN_mask
;
1161 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
,
1166 gdb_byte nat_buf
[8];
1167 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1169 nat_collection
|= natN_mask
;
1171 nat_collection
&= ~natN_mask
;
1172 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1173 byte_order
, nat_collection
);
1174 write_memory (nat_addr
, nat_buf
, 8);
1178 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1185 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1186 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1188 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1190 /* Fetch predicate register rename base from current frame
1191 marker for this frame. */
1192 int rrb_pr
= (cfm
>> 32) & 0x3f;
1194 /* Adjust the register number to account for register rotation. */
1195 regnum
= VP16_REGNUM
1196 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1198 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1200 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1203 else if (prN_val
== 1)
1205 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1209 /* The ia64 needs to convert between various ieee floating-point formats
1210 and the special ia64 floating point register format. */
1213 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1215 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1216 && TYPE_CODE (type
) == TYPE_CODE_FLT
1217 && type
!= ia64_ext_type (gdbarch
));
1221 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1222 struct type
*valtype
, gdb_byte
*out
,
1223 int *optimizedp
, int *unavailablep
)
1225 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1226 gdb_byte in
[IA64_FP_REGISTER_SIZE
];
1228 /* Convert to TYPE. */
1229 if (!get_frame_register_bytes (frame
, regnum
, 0,
1230 register_size (gdbarch
, regnum
),
1231 in
, optimizedp
, unavailablep
))
1234 target_float_convert (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1235 *optimizedp
= *unavailablep
= 0;
1240 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1241 struct type
*valtype
, const gdb_byte
*in
)
1243 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1244 gdb_byte out
[IA64_FP_REGISTER_SIZE
];
1245 target_float_convert (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1246 put_frame_register (frame
, regnum
, out
);
1250 /* Limit the number of skipped non-prologue instructions since examining
1251 of the prologue is expensive. */
1252 static int max_skip_non_prologue_insns
= 40;
1254 /* Given PC representing the starting address of a function, and
1255 LIM_PC which is the (sloppy) limit to which to scan when looking
1256 for a prologue, attempt to further refine this limit by using
1257 the line data in the symbol table. If successful, a better guess
1258 on where the prologue ends is returned, otherwise the previous
1259 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1260 which will be set to indicate whether the returned limit may be
1261 used with no further scanning in the event that the function is
1264 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1265 superseded by skip_prologue_using_sal. */
1268 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1270 struct symtab_and_line prologue_sal
;
1271 CORE_ADDR start_pc
= pc
;
1274 /* The prologue can not possibly go past the function end itself,
1275 so we can already adjust LIM_PC accordingly. */
1276 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1279 /* Start off not trusting the limit. */
1282 prologue_sal
= find_pc_line (pc
, 0);
1283 if (prologue_sal
.line
!= 0)
1286 CORE_ADDR addr
= prologue_sal
.end
;
1288 /* Handle the case in which compiler's optimizer/scheduler
1289 has moved instructions into the prologue. We scan ahead
1290 in the function looking for address ranges whose corresponding
1291 line number is less than or equal to the first one that we
1292 found for the function. (It can be less than when the
1293 scheduler puts a body instruction before the first prologue
1295 for (i
= 2 * max_skip_non_prologue_insns
;
1296 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1299 struct symtab_and_line sal
;
1301 sal
= find_pc_line (addr
, 0);
1304 if (sal
.line
<= prologue_sal
.line
1305 && sal
.symtab
== prologue_sal
.symtab
)
1312 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1314 lim_pc
= prologue_sal
.end
;
1315 if (start_pc
== get_pc_function_start (lim_pc
))
1322 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1323 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1324 || (14 <= (_regnum_) && (_regnum_) <= 31))
1325 #define imm9(_instr_) \
1326 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1327 | (((_instr_) & 0x00008000000LL) >> 20) \
1328 | (((_instr_) & 0x00000001fc0LL) >> 6))
1330 /* Allocate and initialize a frame cache. */
1332 static struct ia64_frame_cache
*
1333 ia64_alloc_frame_cache (void)
1335 struct ia64_frame_cache
*cache
;
1338 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1344 cache
->prev_cfm
= 0;
1350 cache
->frameless
= 1;
1352 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1353 cache
->saved_regs
[i
] = 0;
1359 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1360 struct frame_info
*this_frame
,
1361 struct ia64_frame_cache
*cache
)
1364 CORE_ADDR last_prologue_pc
= pc
;
1365 instruction_type it
;
1370 int unat_save_reg
= 0;
1371 int pr_save_reg
= 0;
1372 int mem_stack_frame_size
= 0;
1374 CORE_ADDR spill_addr
= 0;
1377 char reg_contents
[256];
1383 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1385 memset (instores
, 0, sizeof instores
);
1386 memset (infpstores
, 0, sizeof infpstores
);
1387 memset (reg_contents
, 0, sizeof reg_contents
);
1389 if (cache
->after_prologue
!= 0
1390 && cache
->after_prologue
<= lim_pc
)
1391 return cache
->after_prologue
;
1393 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1394 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1396 /* We want to check if we have a recognizable function start before we
1397 look ahead for a prologue. */
1398 if (pc
< lim_pc
&& next_pc
1399 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1401 /* alloc - start of a regular function. */
1402 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1403 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1404 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1406 /* Verify that the current cfm matches what we think is the
1407 function start. If we have somehow jumped within a function,
1408 we do not want to interpret the prologue and calculate the
1409 addresses of various registers such as the return address.
1410 We will instead treat the frame as frameless. */
1412 (sof
== (cache
->cfm
& 0x7f) &&
1413 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1417 last_prologue_pc
= next_pc
;
1422 /* Look for a leaf routine. */
1423 if (pc
< lim_pc
&& next_pc
1424 && (it
== I
|| it
== M
)
1425 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1427 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1428 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1429 | ((instr
& 0x001f8000000LL
) >> 20)
1430 | ((instr
& 0x000000fe000LL
) >> 13));
1431 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1432 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1433 int qp
= (int) (instr
& 0x0000000003fLL
);
1434 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1436 /* mov r2, r12 - beginning of leaf routine. */
1438 last_prologue_pc
= next_pc
;
1442 /* If we don't recognize a regular function or leaf routine, we are
1448 last_prologue_pc
= lim_pc
;
1452 /* Loop, looking for prologue instructions, keeping track of
1453 where preserved registers were spilled. */
1456 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1460 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1462 /* Exit loop upon hitting a non-nop branch instruction. */
1467 else if (((instr
& 0x3fLL
) != 0LL) &&
1468 (frameless
|| ret_reg
!= 0))
1470 /* Exit loop upon hitting a predicated instruction if
1471 we already have the return register or if we are frameless. */
1476 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1479 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1480 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1481 int qp
= (int) (instr
& 0x0000000003f);
1483 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1486 last_prologue_pc
= next_pc
;
1489 else if ((it
== I
|| it
== M
)
1490 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1492 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1493 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1494 | ((instr
& 0x001f8000000LL
) >> 20)
1495 | ((instr
& 0x000000fe000LL
) >> 13));
1496 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1497 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1498 int qp
= (int) (instr
& 0x0000000003fLL
);
1500 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1504 last_prologue_pc
= next_pc
;
1506 else if (qp
== 0 && rN
== 12 && rM
== 12)
1508 /* adds r12, -mem_stack_frame_size, r12 */
1509 mem_stack_frame_size
-= imm
;
1510 last_prologue_pc
= next_pc
;
1512 else if (qp
== 0 && rN
== 2
1513 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1515 CORE_ADDR saved_sp
= 0;
1516 /* adds r2, spilloffset, rFramePointer
1518 adds r2, spilloffset, r12
1520 Get ready for stf.spill or st8.spill instructions.
1521 The address to start spilling at is loaded into r2.
1522 FIXME: Why r2? That's what gcc currently uses; it
1523 could well be different for other compilers. */
1525 /* Hmm... whether or not this will work will depend on
1526 where the pc is. If it's still early in the prologue
1527 this'll be wrong. FIXME */
1530 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1531 saved_sp
= get_frame_register_unsigned (this_frame
,
1534 spill_addr
= saved_sp
1535 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1538 last_prologue_pc
= next_pc
;
1540 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1541 rN
< 256 && imm
== 0)
1543 /* mov rN, rM where rM is an input register. */
1544 reg_contents
[rN
] = rM
;
1545 last_prologue_pc
= next_pc
;
1547 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1551 last_prologue_pc
= next_pc
;
1556 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1557 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1559 /* stf.spill [rN] = fM, imm9
1561 stf.spill [rN] = fM */
1563 int imm
= imm9(instr
);
1564 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1565 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1566 int qp
= (int) (instr
& 0x0000000003fLL
);
1567 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1568 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1570 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1572 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1575 spill_addr
= 0; /* last one; must be done. */
1576 last_prologue_pc
= next_pc
;
1579 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1580 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1586 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1587 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1588 int qp
= (int) (instr
& 0x0000000003fLL
);
1589 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1591 /* We have something like "mov.m r3 = ar.unat". Remember the
1592 r3 (or whatever) and watch for a store of this register... */
1594 last_prologue_pc
= next_pc
;
1597 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1600 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1601 int qp
= (int) (instr
& 0x0000000003fLL
);
1602 if (qp
== 0 && isScratch (rN
))
1605 last_prologue_pc
= next_pc
;
1609 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1610 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1614 st8 [rN] = rM, imm9 */
1615 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1616 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1617 int qp
= (int) (instr
& 0x0000000003fLL
);
1618 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1619 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1620 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1622 /* We've found a spill of either the UNAT register or the PR
1623 register. (Well, not exactly; what we've actually found is
1624 a spill of the register that UNAT or PR was moved to).
1625 Record that fact and move on... */
1626 if (rM
== unat_save_reg
)
1628 /* Track UNAT register. */
1629 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1634 /* Track PR register. */
1635 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1638 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1639 /* st8 [rN] = rM, imm9 */
1640 spill_addr
+= imm9(instr
);
1642 spill_addr
= 0; /* Must be done spilling. */
1643 last_prologue_pc
= next_pc
;
1645 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1647 /* Allow up to one store of each input register. */
1648 instores
[rM
-32] = 1;
1649 last_prologue_pc
= next_pc
;
1651 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1652 !instores
[indirect
-32])
1654 /* Allow an indirect store of an input register. */
1655 instores
[indirect
-32] = 1;
1656 last_prologue_pc
= next_pc
;
1659 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1666 Note that the st8 case is handled in the clause above.
1668 Advance over stores of input registers. One store per input
1669 register is permitted. */
1670 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1671 int qp
= (int) (instr
& 0x0000000003fLL
);
1672 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1673 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1675 instores
[rM
-32] = 1;
1676 last_prologue_pc
= next_pc
;
1678 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1679 !instores
[indirect
-32])
1681 /* Allow an indirect store of an input register. */
1682 instores
[indirect
-32] = 1;
1683 last_prologue_pc
= next_pc
;
1686 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1693 Advance over stores of floating point input registers. Again
1694 one store per register is permitted. */
1695 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1696 int qp
= (int) (instr
& 0x0000000003fLL
);
1697 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1699 infpstores
[fM
-8] = 1;
1700 last_prologue_pc
= next_pc
;
1704 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1705 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1707 /* st8.spill [rN] = rM
1709 st8.spill [rN] = rM, imm9 */
1710 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1711 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1712 int qp
= (int) (instr
& 0x0000000003fLL
);
1713 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1715 /* We've found a spill of one of the preserved general purpose
1716 regs. Record the spill address and advance the spill
1717 register if appropriate. */
1718 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1719 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1720 /* st8.spill [rN] = rM, imm9 */
1721 spill_addr
+= imm9(instr
);
1723 spill_addr
= 0; /* Done spilling. */
1724 last_prologue_pc
= next_pc
;
1731 /* If not frameless and we aren't called by skip_prologue, then we need
1732 to calculate registers for the previous frame which will be needed
1735 if (!frameless
&& this_frame
)
1737 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1738 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1740 /* Extract the size of the rotating portion of the stack
1741 frame and the register rename base from the current
1747 rrb_gr
= (cfm
>> 18) & 0x7f;
1749 /* Find the bof (beginning of frame). */
1750 bof
= rse_address_add (cache
->bsp
, -sof
);
1752 for (i
= 0, addr
= bof
;
1756 if (IS_NaT_COLLECTION_ADDR (addr
))
1760 if (i
+32 == cfm_reg
)
1761 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1762 if (i
+32 == ret_reg
)
1763 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1765 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1768 /* For the previous argument registers we require the previous bof.
1769 If we can't find the previous cfm, then we can do nothing. */
1771 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1773 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1776 else if (cfm_reg
!= 0)
1778 get_frame_register (this_frame
, cfm_reg
, buf
);
1779 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1781 cache
->prev_cfm
= cfm
;
1785 sor
= ((cfm
>> 14) & 0xf) * 8;
1787 sol
= (cfm
>> 7) & 0x7f;
1788 rrb_gr
= (cfm
>> 18) & 0x7f;
1790 /* The previous bof only requires subtraction of the sol (size of
1791 locals) due to the overlap between output and input of
1792 subsequent frames. */
1793 bof
= rse_address_add (bof
, -sol
);
1795 for (i
= 0, addr
= bof
;
1799 if (IS_NaT_COLLECTION_ADDR (addr
))
1804 cache
->saved_regs
[IA64_GR32_REGNUM
1805 + ((i
+ (sor
- rrb_gr
)) % sor
)]
1808 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1814 /* Try and trust the lim_pc value whenever possible. */
1815 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1816 last_prologue_pc
= lim_pc
;
1818 cache
->frameless
= frameless
;
1819 cache
->after_prologue
= last_prologue_pc
;
1820 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1821 cache
->fp_reg
= fp_reg
;
1823 return last_prologue_pc
;
1827 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1829 struct ia64_frame_cache cache
;
1831 cache
.after_prologue
= 0;
1835 /* Call examine_prologue with - as third argument since we don't
1836 have a next frame pointer to send. */
1837 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1841 /* Normal frames. */
1843 static struct ia64_frame_cache
*
1844 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1846 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1847 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1848 struct ia64_frame_cache
*cache
;
1853 return (struct ia64_frame_cache
*) *this_cache
;
1855 cache
= ia64_alloc_frame_cache ();
1856 *this_cache
= cache
;
1858 get_frame_register (this_frame
, sp_regnum
, buf
);
1859 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1861 /* We always want the bsp to point to the end of frame.
1862 This way, we can always get the beginning of frame (bof)
1863 by subtracting frame size. */
1864 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1865 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1867 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1869 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1870 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1872 cache
->sof
= (cfm
& 0x7f);
1873 cache
->sol
= (cfm
>> 7) & 0x7f;
1874 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1878 cache
->pc
= get_frame_func (this_frame
);
1881 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1883 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1889 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1890 struct frame_id
*this_id
)
1892 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1893 struct ia64_frame_cache
*cache
=
1894 ia64_frame_cache (this_frame
, this_cache
);
1896 /* If outermost frame, mark with null frame id. */
1897 if (cache
->base
!= 0)
1898 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1899 if (gdbarch_debug
>= 1)
1900 fprintf_unfiltered (gdb_stdlog
,
1901 "regular frame id: code %s, stack %s, "
1902 "special %s, this_frame %s\n",
1903 paddress (gdbarch
, this_id
->code_addr
),
1904 paddress (gdbarch
, this_id
->stack_addr
),
1905 paddress (gdbarch
, cache
->bsp
),
1906 host_address_to_string (this_frame
));
1909 static struct value
*
1910 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1913 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1914 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1915 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1918 gdb_assert (regnum
>= 0);
1920 if (!target_has_registers
)
1921 error (_("No registers."));
1923 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1924 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1926 else if (regnum
== IA64_BSP_REGNUM
)
1929 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1931 /* We want to calculate the previous bsp as the end of the previous
1932 register stack frame. This corresponds to what the hardware bsp
1933 register will be if we pop the frame back which is why we might
1934 have been called. We know the beginning of the current frame is
1935 cache->bsp - cache->sof. This value in the previous frame points
1936 to the start of the output registers. We can calculate the end of
1937 that frame by adding the size of output:
1938 (sof (size of frame) - sol (size of locals)). */
1939 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1940 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1942 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1944 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1946 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1949 else if (regnum
== IA64_CFM_REGNUM
)
1951 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1954 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1956 if (cache
->prev_cfm
)
1957 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1959 if (cache
->frameless
)
1960 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1962 return frame_unwind_got_register (this_frame
, regnum
, 0);
1965 else if (regnum
== IA64_VFP_REGNUM
)
1967 /* If the function in question uses an automatic register (r32-r127)
1968 for the frame pointer, it'll be found by ia64_find_saved_register()
1969 above. If the function lacks one of these frame pointers, we can
1970 still provide a value since we know the size of the frame. */
1971 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1974 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1976 struct value
*pr_val
;
1979 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1981 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1983 /* Fetch predicate register rename base from current frame
1984 marker for this frame. */
1985 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1987 /* Adjust the register number to account for register rotation. */
1988 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1990 prN
= extract_bit_field (value_contents_all (pr_val
),
1991 regnum
- VP0_REGNUM
, 1);
1992 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
1995 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1997 struct value
*unat_val
;
1999 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2001 unatN
= extract_bit_field (value_contents_all (unat_val
),
2002 regnum
- IA64_NAT0_REGNUM
, 1);
2003 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
2006 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2009 /* Find address of general register corresponding to nat bit we're
2013 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
2017 /* Compute address of nat collection bits. */
2018 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
2020 CORE_ADDR nat_collection
;
2023 /* If our nat collection address is bigger than bsp, we have to get
2024 the nat collection from rnat. Otherwise, we fetch the nat
2025 collection from the computed address. */
2026 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2027 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2028 if (nat_addr
>= bsp
)
2030 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
2031 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
2034 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
2035 nat_bit
= (gr_addr
>> 3) & 0x3f;
2036 natval
= (nat_collection
>> nat_bit
) & 1;
2039 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
2042 else if (regnum
== IA64_IP_REGNUM
)
2045 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2049 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2050 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2052 else if (cache
->frameless
)
2054 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2055 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2058 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2061 else if (regnum
== IA64_PSR_REGNUM
)
2063 /* We don't know how to get the complete previous PSR, but we need it
2064 for the slot information when we unwind the pc (pc is formed of IP
2065 register plus slot information from PSR). To get the previous
2066 slot information, we mask it off the return address. */
2067 ULONGEST slot_num
= 0;
2070 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2072 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2073 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2077 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2078 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2080 else if (cache
->frameless
)
2082 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2083 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2085 psr
&= ~(3LL << 41);
2086 slot_num
= pc
& 0x3LL
;
2087 psr
|= (CORE_ADDR
)slot_num
<< 41;
2088 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2091 else if (regnum
== IA64_BR0_REGNUM
)
2093 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2096 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2098 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2101 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2102 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2106 if (regnum
>= V32_REGNUM
)
2107 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2108 addr
= cache
->saved_regs
[regnum
];
2110 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2112 if (cache
->frameless
)
2114 struct value
*reg_val
;
2115 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2117 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2118 with the same code above? */
2119 if (regnum
>= V32_REGNUM
)
2120 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2121 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2123 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2125 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2127 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2129 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2131 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2132 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2135 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2138 else /* All other registers. */
2142 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2144 /* Fetch floating point register rename base from current
2145 frame marker for this frame. */
2146 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2148 /* Adjust the floating point register number to account for
2149 register rotation. */
2150 regnum
= IA64_FR32_REGNUM
2151 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2154 /* If we have stored a memory address, access the register. */
2155 addr
= cache
->saved_regs
[regnum
];
2157 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2158 /* Otherwise, punt and get the current value of the register. */
2160 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2164 static const struct frame_unwind ia64_frame_unwind
=
2167 default_frame_unwind_stop_reason
,
2168 &ia64_frame_this_id
,
2169 &ia64_frame_prev_register
,
2171 default_frame_sniffer
2174 /* Signal trampolines. */
2177 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2178 struct ia64_frame_cache
*cache
)
2180 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2181 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2183 if (tdep
->sigcontext_register_address
)
2187 cache
->saved_regs
[IA64_VRAP_REGNUM
]
2188 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2190 cache
->saved_regs
[IA64_CFM_REGNUM
]
2191 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2193 cache
->saved_regs
[IA64_PSR_REGNUM
]
2194 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2196 cache
->saved_regs
[IA64_BSP_REGNUM
]
2197 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2199 cache
->saved_regs
[IA64_RNAT_REGNUM
]
2200 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2202 cache
->saved_regs
[IA64_CCV_REGNUM
]
2203 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2205 cache
->saved_regs
[IA64_UNAT_REGNUM
]
2206 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2208 cache
->saved_regs
[IA64_FPSR_REGNUM
]
2209 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2211 cache
->saved_regs
[IA64_PFS_REGNUM
]
2212 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2214 cache
->saved_regs
[IA64_LC_REGNUM
]
2215 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2218 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2219 cache
->saved_regs
[regno
] =
2220 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2221 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2222 cache
->saved_regs
[regno
] =
2223 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2224 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2225 cache
->saved_regs
[regno
] =
2226 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2230 static struct ia64_frame_cache
*
2231 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2233 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2234 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2235 struct ia64_frame_cache
*cache
;
2239 return (struct ia64_frame_cache
*) *this_cache
;
2241 cache
= ia64_alloc_frame_cache ();
2243 get_frame_register (this_frame
, sp_regnum
, buf
);
2244 /* Note that frame size is hard-coded below. We cannot calculate it
2245 via prologue examination. */
2246 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2248 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2249 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2251 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2252 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2253 cache
->sof
= cache
->cfm
& 0x7f;
2255 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2257 *this_cache
= cache
;
2262 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2263 void **this_cache
, struct frame_id
*this_id
)
2265 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2266 struct ia64_frame_cache
*cache
=
2267 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2269 (*this_id
) = frame_id_build_special (cache
->base
,
2270 get_frame_pc (this_frame
),
2272 if (gdbarch_debug
>= 1)
2273 fprintf_unfiltered (gdb_stdlog
,
2274 "sigtramp frame id: code %s, stack %s, "
2275 "special %s, this_frame %s\n",
2276 paddress (gdbarch
, this_id
->code_addr
),
2277 paddress (gdbarch
, this_id
->stack_addr
),
2278 paddress (gdbarch
, cache
->bsp
),
2279 host_address_to_string (this_frame
));
2282 static struct value
*
2283 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2284 void **this_cache
, int regnum
)
2286 struct ia64_frame_cache
*cache
=
2287 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2289 gdb_assert (regnum
>= 0);
2291 if (!target_has_registers
)
2292 error (_("No registers."));
2294 if (regnum
== IA64_IP_REGNUM
)
2297 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2301 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2302 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2303 pc
= read_memory_unsigned_integer (addr
, 8, byte_order
);
2306 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2309 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2310 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2314 if (regnum
>= V32_REGNUM
)
2315 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2316 addr
= cache
->saved_regs
[regnum
];
2318 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2320 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2323 else /* All other registers not listed above. */
2325 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2328 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2330 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2335 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2336 struct frame_info
*this_frame
,
2339 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2340 if (tdep
->pc_in_sigtramp
)
2342 CORE_ADDR pc
= get_frame_pc (this_frame
);
2344 if (tdep
->pc_in_sigtramp (pc
))
2351 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2354 default_frame_unwind_stop_reason
,
2355 ia64_sigtramp_frame_this_id
,
2356 ia64_sigtramp_frame_prev_register
,
2358 ia64_sigtramp_frame_sniffer
2364 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2366 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2371 static const struct frame_base ia64_frame_base
=
2374 ia64_frame_base_address
,
2375 ia64_frame_base_address
,
2376 ia64_frame_base_address
2379 #ifdef HAVE_LIBUNWIND_IA64_H
2381 struct ia64_unwind_table_entry
2383 unw_word_t start_offset
;
2384 unw_word_t end_offset
;
2385 unw_word_t info_offset
;
2388 static __inline__
uint64_t
2389 ia64_rse_slot_num (uint64_t addr
)
2391 return (addr
>> 3) & 0x3f;
2394 /* Skip over a designated number of registers in the backing
2395 store, remembering every 64th position is for NAT. */
2396 static __inline__
uint64_t
2397 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2399 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2403 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2406 /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
2407 register number to a libunwind register number. */
2409 ia64_gdb2uw_regnum (int regnum
)
2411 if (regnum
== sp_regnum
)
2413 else if (regnum
== IA64_BSP_REGNUM
)
2414 return UNW_IA64_BSP
;
2415 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2416 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2417 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2418 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2419 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2420 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2421 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2423 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2424 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2425 else if (regnum
== IA64_PR_REGNUM
)
2427 else if (regnum
== IA64_IP_REGNUM
)
2429 else if (regnum
== IA64_CFM_REGNUM
)
2430 return UNW_IA64_CFM
;
2431 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2432 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2433 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2434 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2439 /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
2440 register number to a ia64 gdb register number. */
2442 ia64_uw2gdb_regnum (int uw_regnum
)
2444 if (uw_regnum
== UNW_IA64_SP
)
2446 else if (uw_regnum
== UNW_IA64_BSP
)
2447 return IA64_BSP_REGNUM
;
2448 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2449 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2450 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2451 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2452 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2453 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2454 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2455 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2456 else if (uw_regnum
== UNW_IA64_PR
)
2457 return IA64_PR_REGNUM
;
2458 else if (uw_regnum
== UNW_REG_IP
)
2459 return IA64_IP_REGNUM
;
2460 else if (uw_regnum
== UNW_IA64_CFM
)
2461 return IA64_CFM_REGNUM
;
2462 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2463 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2464 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2465 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2470 /* Gdb ia64-libunwind-tdep callback function to reveal if register is
2471 a float register or not. */
2473 ia64_is_fpreg (int uw_regnum
)
2475 return unw_is_fpreg (uw_regnum
);
2478 /* Libunwind callback accessor function for general registers. */
2480 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2481 int write
, void *arg
)
2483 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2484 unw_word_t bsp
, sof
, cfm
, psr
, ip
;
2485 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2486 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2488 /* We never call any libunwind routines that need to write registers. */
2489 gdb_assert (!write
);
2494 /* Libunwind expects to see the pc value which means the slot number
2495 from the psr must be merged with the ip word address. */
2496 ip
= get_frame_register_unsigned (this_frame
, IA64_IP_REGNUM
);
2497 psr
= get_frame_register_unsigned (this_frame
, IA64_PSR_REGNUM
);
2498 *val
= ip
| ((psr
>> 41) & 0x3);
2501 case UNW_IA64_AR_BSP
:
2502 /* Libunwind expects to see the beginning of the current
2503 register frame so we must account for the fact that
2504 ptrace() will return a value for bsp that points *after*
2505 the current register frame. */
2506 bsp
= get_frame_register_unsigned (this_frame
, IA64_BSP_REGNUM
);
2507 cfm
= get_frame_register_unsigned (this_frame
, IA64_CFM_REGNUM
);
2508 sof
= gdbarch_tdep (gdbarch
)->size_of_register_frame (this_frame
, cfm
);
2509 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2512 case UNW_IA64_AR_BSPSTORE
:
2513 /* Libunwind wants bspstore to be after the current register frame.
2514 This is what ptrace() and gdb treats as the regular bsp value. */
2515 *val
= get_frame_register_unsigned (this_frame
, IA64_BSP_REGNUM
);
2519 /* For all other registers, just unwind the value directly. */
2520 *val
= get_frame_register_unsigned (this_frame
, regnum
);
2524 if (gdbarch_debug
>= 1)
2525 fprintf_unfiltered (gdb_stdlog
,
2526 " access_reg: from cache: %4s=%s\n",
2527 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2528 ? ia64_register_names
[regnum
] : "r??"),
2529 paddress (gdbarch
, *val
));
2533 /* Libunwind callback accessor function for floating-point registers. */
2535 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2536 unw_fpreg_t
*val
, int write
, void *arg
)
2538 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2539 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2541 /* We never call any libunwind routines that need to write registers. */
2542 gdb_assert (!write
);
2544 get_frame_register (this_frame
, regnum
, (gdb_byte
*) val
);
2549 /* Libunwind callback accessor function for top-level rse registers. */
2551 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2552 unw_word_t
*val
, int write
, void *arg
)
2554 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2555 unw_word_t bsp
, sof
, cfm
, psr
, ip
;
2556 struct regcache
*regcache
= (struct regcache
*) arg
;
2557 struct gdbarch
*gdbarch
= regcache
->arch ();
2559 /* We never call any libunwind routines that need to write registers. */
2560 gdb_assert (!write
);
2565 /* Libunwind expects to see the pc value which means the slot number
2566 from the psr must be merged with the ip word address. */
2567 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &ip
);
2568 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr
);
2569 *val
= ip
| ((psr
>> 41) & 0x3);
2572 case UNW_IA64_AR_BSP
:
2573 /* Libunwind expects to see the beginning of the current
2574 register frame so we must account for the fact that
2575 ptrace() will return a value for bsp that points *after*
2576 the current register frame. */
2577 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
2578 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
2580 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2583 case UNW_IA64_AR_BSPSTORE
:
2584 /* Libunwind wants bspstore to be after the current register frame.
2585 This is what ptrace() and gdb treats as the regular bsp value. */
2586 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, val
);
2590 /* For all other registers, just unwind the value directly. */
2591 regcache_cooked_read_unsigned (regcache
, regnum
, val
);
2595 if (gdbarch_debug
>= 1)
2596 fprintf_unfiltered (gdb_stdlog
,
2597 " access_rse_reg: from cache: %4s=%s\n",
2598 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2599 ? ia64_register_names
[regnum
] : "r??"),
2600 paddress (gdbarch
, *val
));
2605 /* Libunwind callback accessor function for top-level fp registers. */
2607 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2608 unw_fpreg_t
*val
, int write
, void *arg
)
2610 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2611 struct regcache
*regcache
= (struct regcache
*) arg
;
2613 /* We never call any libunwind routines that need to write registers. */
2614 gdb_assert (!write
);
2616 regcache
->cooked_read (regnum
, (gdb_byte
*) val
);
2621 /* Libunwind callback accessor function for accessing memory. */
2623 ia64_access_mem (unw_addr_space_t as
,
2624 unw_word_t addr
, unw_word_t
*val
,
2625 int write
, void *arg
)
2627 if (addr
- KERNEL_START
< ktab_size
)
2629 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2630 + (addr
- KERNEL_START
));
2639 /* XXX do we need to normalize byte-order here? */
2641 return target_write_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2643 return target_read_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2646 /* Call low-level function to access the kernel unwind table. */
2647 static gdb::optional
<gdb::byte_vector
>
2650 /* FIXME drow/2005-09-10: This code used to call
2651 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2652 for the currently running ia64-linux kernel. That data should
2653 come from the core file and be accessed via the auxv vector; if
2654 we want to preserve fall back to the running kernel's table, then
2655 we should find a way to override the corefile layer's
2656 xfer_partial method. */
2658 return target_read_alloc (current_top_target (), TARGET_OBJECT_UNWIND_TABLE
,
2662 /* Get the kernel unwind table. */
2664 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2666 static struct ia64_table_entry
*etab
;
2670 ktab_buf
= getunwind_table ();
2672 return -UNW_ENOINFO
;
2674 ktab
= (struct ia64_table_entry
*) ktab_buf
->data ();
2675 ktab_size
= ktab_buf
->size ();
2677 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2678 etab
->info_offset
+= KERNEL_START
;
2681 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2682 return -UNW_ENOINFO
;
2684 di
->format
= UNW_INFO_FORMAT_TABLE
;
2686 di
->start_ip
= ktab
[0].start_offset
;
2687 di
->end_ip
= etab
[-1].end_offset
;
2688 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2689 di
->u
.ti
.segbase
= 0;
2690 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2691 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2693 if (gdbarch_debug
>= 1)
2694 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2695 "segbase=%s, length=%s, gp=%s\n",
2696 (char *) di
->u
.ti
.name_ptr
,
2697 hex_string (di
->u
.ti
.segbase
),
2698 pulongest (di
->u
.ti
.table_len
),
2699 hex_string (di
->gp
));
2703 /* Find the unwind table entry for a specified address. */
2705 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2706 unw_dyn_info_t
*dip
, void **buf
)
2708 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2709 Elf_Internal_Ehdr
*ehdr
;
2710 unw_word_t segbase
= 0;
2711 CORE_ADDR load_base
;
2715 bfd
= objfile
->obfd
;
2717 ehdr
= elf_tdata (bfd
)->elf_header
;
2718 phdr
= elf_tdata (bfd
)->phdr
;
2720 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2722 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2724 switch (phdr
[i
].p_type
)
2727 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2732 case PT_IA_64_UNWIND
:
2733 p_unwind
= phdr
+ i
;
2741 if (!p_text
|| !p_unwind
)
2742 return -UNW_ENOINFO
;
2744 /* Verify that the segment that contains the IP also contains
2745 the static unwind table. If not, we may be in the Linux kernel's
2746 DSO gate page in which case the unwind table is another segment.
2747 Otherwise, we are dealing with runtime-generated code, for which we
2748 have no info here. */
2749 segbase
= p_text
->p_vaddr
+ load_base
;
2751 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2754 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2756 if (phdr
[i
].p_type
== PT_LOAD
2757 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2760 /* Get the segbase from the section containing the
2762 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2766 return -UNW_ENOINFO
;
2769 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2770 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2771 dip
->gp
= ia64_find_global_pointer (get_objfile_arch (objfile
), ip
);
2772 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2773 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2774 dip
->u
.rti
.segbase
= segbase
;
2775 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2776 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2781 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2783 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2784 int need_unwind_info
, void *arg
)
2786 struct obj_section
*sec
= find_pc_section (ip
);
2793 /* XXX This only works if the host and the target architecture are
2794 both ia64 and if the have (more or less) the same kernel
2796 if (get_kernel_table (ip
, &di
) < 0)
2797 return -UNW_ENOINFO
;
2799 if (gdbarch_debug
>= 1)
2800 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2801 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2802 "length=%s,data=%s)\n",
2803 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2804 hex_string (di
.u
.ti
.segbase
),
2805 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2807 pulongest (di
.u
.ti
.table_len
),
2808 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2812 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2816 if (gdbarch_debug
>= 1)
2817 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2818 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2819 "length=%s,data=%s)\n",
2820 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2821 hex_string (di
.u
.rti
.segbase
),
2822 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2824 pulongest (di
.u
.rti
.table_len
),
2825 hex_string (di
.u
.rti
.table_data
));
2828 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2831 /* We no longer need the dyn info storage so free it. */
2837 /* Libunwind callback accessor function for cleanup. */
2839 ia64_put_unwind_info (unw_addr_space_t as
,
2840 unw_proc_info_t
*pip
, void *arg
)
2842 /* Nothing required for now. */
2845 /* Libunwind callback accessor function to get head of the dynamic
2846 unwind-info registration list. */
2848 ia64_get_dyn_info_list (unw_addr_space_t as
,
2849 unw_word_t
*dilap
, void *arg
)
2851 struct obj_section
*text_sec
;
2852 struct objfile
*objfile
;
2853 unw_word_t ip
, addr
;
2857 if (!libunwind_is_initialized ())
2858 return -UNW_ENOINFO
;
2860 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2864 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2865 ip
= obj_section_addr (text_sec
);
2866 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2869 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2870 /* We no longer need the dyn info storage so free it. */
2875 if (gdbarch_debug
>= 1)
2876 fprintf_unfiltered (gdb_stdlog
,
2877 "dynamic unwind table in objfile %s "
2879 bfd_get_filename (objfile
->obfd
),
2880 hex_string (addr
), hex_string (di
.gp
));
2886 return -UNW_ENOINFO
;
2890 /* Frame interface functions for libunwind. */
2893 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2894 struct frame_id
*this_id
)
2896 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2897 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2898 struct frame_id id
= outer_frame_id
;
2902 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2903 if (frame_id_eq (id
, outer_frame_id
))
2905 (*this_id
) = outer_frame_id
;
2909 /* We must add the bsp as the special address for frame comparison
2911 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2912 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2914 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2916 if (gdbarch_debug
>= 1)
2917 fprintf_unfiltered (gdb_stdlog
,
2918 "libunwind frame id: code %s, stack %s, "
2919 "special %s, this_frame %s\n",
2920 paddress (gdbarch
, id
.code_addr
),
2921 paddress (gdbarch
, id
.stack_addr
),
2922 paddress (gdbarch
, bsp
),
2923 host_address_to_string (this_frame
));
2926 static struct value
*
2927 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2928 void **this_cache
, int regnum
)
2931 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2932 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2935 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2936 reg
= IA64_PR_REGNUM
;
2937 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2938 reg
= IA64_UNAT_REGNUM
;
2940 /* Let libunwind do most of the work. */
2941 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2943 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2947 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2952 /* Fetch predicate register rename base from current frame
2953 marker for this frame. */
2954 cfm
= get_frame_register_unsigned (this_frame
, IA64_CFM_REGNUM
);
2955 rrb_pr
= (cfm
>> 32) & 0x3f;
2957 /* Adjust the register number to account for register rotation. */
2958 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2960 prN_val
= extract_bit_field (value_contents_all (val
),
2961 regnum
- VP0_REGNUM
, 1);
2962 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
2965 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2969 unatN_val
= extract_bit_field (value_contents_all (val
),
2970 regnum
- IA64_NAT0_REGNUM
, 1);
2971 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
2974 else if (regnum
== IA64_BSP_REGNUM
)
2976 struct value
*cfm_val
;
2977 CORE_ADDR prev_bsp
, prev_cfm
;
2979 /* We want to calculate the previous bsp as the end of the previous
2980 register stack frame. This corresponds to what the hardware bsp
2981 register will be if we pop the frame back which is why we might
2982 have been called. We know that libunwind will pass us back the
2983 beginning of the current frame so we should just add sof to it. */
2984 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
2986 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
2988 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
2990 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2992 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
2999 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
3000 struct frame_info
*this_frame
,
3003 if (libunwind_is_initialized ()
3004 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
3010 static const struct frame_unwind ia64_libunwind_frame_unwind
=
3013 default_frame_unwind_stop_reason
,
3014 ia64_libunwind_frame_this_id
,
3015 ia64_libunwind_frame_prev_register
,
3017 ia64_libunwind_frame_sniffer
,
3018 libunwind_frame_dealloc_cache
3022 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
3024 struct frame_id
*this_id
)
3026 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3027 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3030 struct frame_id id
= outer_frame_id
;
3032 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
3033 if (frame_id_eq (id
, outer_frame_id
))
3035 (*this_id
) = outer_frame_id
;
3039 /* We must add the bsp as the special address for frame comparison
3041 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3042 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3044 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3045 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
3047 if (gdbarch_debug
>= 1)
3048 fprintf_unfiltered (gdb_stdlog
,
3049 "libunwind sigtramp frame id: code %s, "
3050 "stack %s, special %s, this_frame %s\n",
3051 paddress (gdbarch
, id
.code_addr
),
3052 paddress (gdbarch
, id
.stack_addr
),
3053 paddress (gdbarch
, bsp
),
3054 host_address_to_string (this_frame
));
3057 static struct value
*
3058 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
3059 void **this_cache
, int regnum
)
3061 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3062 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3063 struct value
*prev_ip_val
;
3066 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3067 method of getting previous registers. */
3068 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3070 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3075 void *tmp_cache
= NULL
;
3076 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3080 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3084 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3085 struct frame_info
*this_frame
,
3088 if (libunwind_is_initialized ())
3090 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3095 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3098 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3101 default_frame_unwind_stop_reason
,
3102 ia64_libunwind_sigtramp_frame_this_id
,
3103 ia64_libunwind_sigtramp_frame_prev_register
,
3105 ia64_libunwind_sigtramp_frame_sniffer
3108 /* Set of libunwind callback acccessor functions. */
3109 unw_accessors_t ia64_unw_accessors
=
3111 ia64_find_proc_info_x
,
3112 ia64_put_unwind_info
,
3113 ia64_get_dyn_info_list
,
3121 /* Set of special libunwind callback acccessor functions specific for accessing
3122 the rse registers. At the top of the stack, we want libunwind to figure out
3123 how to read r32 - r127. Though usually they are found sequentially in
3124 memory starting from $bof, this is not always true. */
3125 unw_accessors_t ia64_unw_rse_accessors
=
3127 ia64_find_proc_info_x
,
3128 ia64_put_unwind_info
,
3129 ia64_get_dyn_info_list
,
3131 ia64_access_rse_reg
,
3132 ia64_access_rse_fpreg
,
3137 /* Set of ia64-libunwind-tdep gdb callbacks and data for generic
3138 ia64-libunwind-tdep code to use. */
3139 struct libunwind_descr ia64_libunwind_descr
=
3144 &ia64_unw_accessors
,
3145 &ia64_unw_rse_accessors
,
3148 #endif /* HAVE_LIBUNWIND_IA64_H */
3151 ia64_use_struct_convention (struct type
*type
)
3153 struct type
*float_elt_type
;
3155 /* Don't use the struct convention for anything but structure,
3156 union, or array types. */
3157 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
3158 || TYPE_CODE (type
) == TYPE_CODE_UNION
3159 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
3162 /* HFAs are structures (or arrays) consisting entirely of floating
3163 point values of the same length. Up to 8 of these are returned
3164 in registers. Don't use the struct convention when this is the
3166 float_elt_type
= is_float_or_hfa_type (type
);
3167 if (float_elt_type
!= NULL
3168 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3171 /* Other structs of length 32 or less are returned in r8-r11.
3172 Don't use the struct convention for those either. */
3173 return TYPE_LENGTH (type
) > 32;
3176 /* Return non-zero if TYPE is a structure or union type. */
3179 ia64_struct_type_p (const struct type
*type
)
3181 return (TYPE_CODE (type
) == TYPE_CODE_STRUCT
3182 || TYPE_CODE (type
) == TYPE_CODE_UNION
);
3186 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3189 struct gdbarch
*gdbarch
= regcache
->arch ();
3190 struct type
*float_elt_type
;
3192 float_elt_type
= is_float_or_hfa_type (type
);
3193 if (float_elt_type
!= NULL
)
3195 gdb_byte from
[IA64_FP_REGISTER_SIZE
];
3197 int regnum
= IA64_FR8_REGNUM
;
3198 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3202 regcache
->cooked_read (regnum
, from
);
3203 target_float_convert (from
, ia64_ext_type (gdbarch
),
3204 valbuf
+ offset
, float_elt_type
);
3205 offset
+= TYPE_LENGTH (float_elt_type
);
3209 else if (!ia64_struct_type_p (type
) && TYPE_LENGTH (type
) < 8)
3211 /* This is an integral value, and its size is less than 8 bytes.
3212 These values are LSB-aligned, so extract the relevant bytes,
3213 and copy them into VALBUF. */
3214 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3215 so I suppose we should also add handling here for integral values
3216 whose size is greater than 8. But I wasn't able to create such
3217 a type, neither in C nor in Ada, so not worrying about these yet. */
3218 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3221 regcache_cooked_read_unsigned (regcache
, IA64_GR8_REGNUM
, &val
);
3222 store_unsigned_integer (valbuf
, TYPE_LENGTH (type
), byte_order
, val
);
3228 int regnum
= IA64_GR8_REGNUM
;
3229 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3230 int n
= TYPE_LENGTH (type
) / reglen
;
3231 int m
= TYPE_LENGTH (type
) % reglen
;
3236 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3237 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3244 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3245 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3251 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3252 const gdb_byte
*valbuf
)
3254 struct gdbarch
*gdbarch
= regcache
->arch ();
3255 struct type
*float_elt_type
;
3257 float_elt_type
= is_float_or_hfa_type (type
);
3258 if (float_elt_type
!= NULL
)
3260 gdb_byte to
[IA64_FP_REGISTER_SIZE
];
3262 int regnum
= IA64_FR8_REGNUM
;
3263 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3267 target_float_convert (valbuf
+ offset
, float_elt_type
,
3268 to
, ia64_ext_type (gdbarch
));
3269 regcache
->cooked_write (regnum
, to
);
3270 offset
+= TYPE_LENGTH (float_elt_type
);
3278 int regnum
= IA64_GR8_REGNUM
;
3279 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3280 int n
= TYPE_LENGTH (type
) / reglen
;
3281 int m
= TYPE_LENGTH (type
) % reglen
;
3286 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3287 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3294 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3295 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3300 static enum return_value_convention
3301 ia64_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
3302 struct type
*valtype
, struct regcache
*regcache
,
3303 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3305 int struct_return
= ia64_use_struct_convention (valtype
);
3307 if (writebuf
!= NULL
)
3309 gdb_assert (!struct_return
);
3310 ia64_store_return_value (valtype
, regcache
, writebuf
);
3313 if (readbuf
!= NULL
)
3315 gdb_assert (!struct_return
);
3316 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3320 return RETURN_VALUE_STRUCT_CONVENTION
;
3322 return RETURN_VALUE_REGISTER_CONVENTION
;
3326 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3328 switch (TYPE_CODE (t
))
3332 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3339 case TYPE_CODE_ARRAY
:
3341 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3344 case TYPE_CODE_STRUCT
:
3348 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3349 if (!is_float_or_hfa_type_recurse
3350 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3361 /* Determine if the given type is one of the floating point types or
3362 and HFA (which is a struct, array, or combination thereof whose
3363 bottom-most elements are all of the same floating point type). */
3365 static struct type
*
3366 is_float_or_hfa_type (struct type
*t
)
3368 struct type
*et
= 0;
3370 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3374 /* Return 1 if the alignment of T is such that the next even slot
3375 should be used. Return 0, if the next available slot should
3376 be used. (See section 8.5.1 of the IA-64 Software Conventions
3377 and Runtime manual). */
3380 slot_alignment_is_next_even (struct type
*t
)
3382 switch (TYPE_CODE (t
))
3386 if (TYPE_LENGTH (t
) > 8)
3390 case TYPE_CODE_ARRAY
:
3392 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3393 case TYPE_CODE_STRUCT
:
3397 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3398 if (slot_alignment_is_next_even
3399 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3408 /* Attempt to find (and return) the global pointer for the given
3411 This is a rather nasty bit of code searchs for the .dynamic section
3412 in the objfile corresponding to the pc of the function we're trying
3413 to call. Once it finds the addresses at which the .dynamic section
3414 lives in the child process, it scans the Elf64_Dyn entries for a
3415 DT_PLTGOT tag. If it finds one of these, the corresponding
3416 d_un.d_ptr value is the global pointer. */
3419 ia64_find_global_pointer_from_dynamic_section (struct gdbarch
*gdbarch
,
3422 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3423 struct obj_section
*faddr_sect
;
3425 faddr_sect
= find_pc_section (faddr
);
3426 if (faddr_sect
!= NULL
)
3428 struct obj_section
*osect
;
3430 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3432 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3436 if (osect
< faddr_sect
->objfile
->sections_end
)
3438 CORE_ADDR addr
, endaddr
;
3440 addr
= obj_section_addr (osect
);
3441 endaddr
= obj_section_endaddr (osect
);
3443 while (addr
< endaddr
)
3449 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3452 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3454 if (tag
== DT_PLTGOT
)
3456 CORE_ADDR global_pointer
;
3458 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3461 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3465 return global_pointer
;
3478 /* Attempt to find (and return) the global pointer for the given
3479 function. We first try the find_global_pointer_from_solib routine
3480 from the gdbarch tdep vector, if provided. And if that does not
3481 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3484 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3489 if (tdep
->find_global_pointer_from_solib
)
3490 addr
= tdep
->find_global_pointer_from_solib (gdbarch
, faddr
);
3492 addr
= ia64_find_global_pointer_from_dynamic_section (gdbarch
, faddr
);
3496 /* Given a function's address, attempt to find (and return) the
3497 corresponding (canonical) function descriptor. Return 0 if
3500 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3502 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3503 struct obj_section
*faddr_sect
;
3505 /* Return early if faddr is already a function descriptor. */
3506 faddr_sect
= find_pc_section (faddr
);
3507 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3510 if (faddr_sect
!= NULL
)
3512 struct obj_section
*osect
;
3513 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3515 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3519 if (osect
< faddr_sect
->objfile
->sections_end
)
3521 CORE_ADDR addr
, endaddr
;
3523 addr
= obj_section_addr (osect
);
3524 endaddr
= obj_section_endaddr (osect
);
3526 while (addr
< endaddr
)
3532 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3535 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3537 if (faddr
== faddr2
)
3547 /* Attempt to find a function descriptor corresponding to the
3548 given address. If none is found, construct one on the
3549 stack using the address at fdaptr. */
3552 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3554 struct gdbarch
*gdbarch
= regcache
->arch ();
3555 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3558 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3562 ULONGEST global_pointer
;
3568 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3570 if (global_pointer
== 0)
3571 regcache_cooked_read_unsigned (regcache
,
3572 IA64_GR1_REGNUM
, &global_pointer
);
3574 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3575 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3577 write_memory (fdesc
, buf
, 16);
3583 /* Use the following routine when printing out function pointers
3584 so the user can see the function address rather than just the
3585 function descriptor. */
3587 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3588 struct target_ops
*targ
)
3590 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3591 struct obj_section
*s
;
3594 s
= find_pc_section (addr
);
3596 /* check if ADDR points to a function descriptor. */
3597 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3598 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3600 /* Normally, functions live inside a section that is executable.
3601 So, if ADDR points to a non-executable section, then treat it
3602 as a function descriptor and return the target address iff
3603 the target address itself points to a section that is executable.
3604 Check first the memory of the whole length of 8 bytes is readable. */
3605 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0
3606 && target_read_memory (addr
, buf
, 8) == 0)
3608 CORE_ADDR pc
= extract_unsigned_integer (buf
, 8, byte_order
);
3609 struct obj_section
*pc_section
= find_pc_section (pc
);
3611 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3615 /* There are also descriptors embedded in vtables. */
3618 struct bound_minimal_symbol minsym
;
3620 minsym
= lookup_minimal_symbol_by_pc (addr
);
3623 && is_vtable_name (MSYMBOL_LINKAGE_NAME (minsym
.minsym
)))
3624 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3631 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3636 /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3639 ia64_allocate_new_rse_frame (struct regcache
*regcache
, ULONGEST bsp
, int sof
)
3641 ULONGEST cfm
, pfs
, new_bsp
;
3643 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3645 new_bsp
= rse_address_add (bsp
, sof
);
3646 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3648 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3649 pfs
&= 0xc000000000000000LL
;
3650 pfs
|= (cfm
& 0xffffffffffffLL
);
3651 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3653 cfm
&= 0xc000000000000000LL
;
3655 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3658 /* The default "store_argument_in_slot" ia64_infcall_ops routine for
3662 ia64_store_argument_in_slot (struct regcache
*regcache
, CORE_ADDR bsp
,
3663 int slotnum
, gdb_byte
*buf
)
3665 write_memory (rse_address_add (bsp
, slotnum
), buf
, 8);
3668 /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3671 ia64_set_function_addr (struct regcache
*regcache
, CORE_ADDR func_addr
)
3673 /* Nothing needed. */
3677 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3678 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3679 int nargs
, struct value
**args
, CORE_ADDR sp
,
3680 int struct_return
, CORE_ADDR struct_addr
)
3682 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3683 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3688 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3691 CORE_ADDR funcdescaddr
, global_pointer
;
3692 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3696 /* Count the number of slots needed for the arguments. */
3697 for (argno
= 0; argno
< nargs
; argno
++)
3700 type
= check_typedef (value_type (arg
));
3701 len
= TYPE_LENGTH (type
);
3703 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3706 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3709 nslots
+= (len
+ 7) / 8;
3712 /* Divvy up the slots between the RSE and the memory stack. */
3713 rseslots
= (nslots
> 8) ? 8 : nslots
;
3714 memslots
= nslots
- rseslots
;
3716 /* Allocate a new RSE frame. */
3717 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3718 tdep
->infcall_ops
.allocate_new_rse_frame (regcache
, bsp
, rseslots
);
3720 /* We will attempt to find function descriptors in the .opd segment,
3721 but if we can't we'll construct them ourselves. That being the
3722 case, we'll need to reserve space on the stack for them. */
3723 funcdescaddr
= sp
- nfuncargs
* 16;
3724 funcdescaddr
&= ~0xfLL
;
3726 /* Adjust the stack pointer to it's new value. The calling conventions
3727 require us to have 16 bytes of scratch, plus whatever space is
3728 necessary for the memory slots and our function descriptors. */
3729 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3730 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3732 /* Place the arguments where they belong. The arguments will be
3733 either placed in the RSE backing store or on the memory stack.
3734 In addition, floating point arguments or HFAs are placed in
3735 floating point registers. */
3737 floatreg
= IA64_FR8_REGNUM
;
3738 for (argno
= 0; argno
< nargs
; argno
++)
3740 struct type
*float_elt_type
;
3743 type
= check_typedef (value_type (arg
));
3744 len
= TYPE_LENGTH (type
);
3746 /* Special handling for function parameters. */
3748 && TYPE_CODE (type
) == TYPE_CODE_PTR
3749 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3751 gdb_byte val_buf
[8];
3752 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3754 store_unsigned_integer (val_buf
, 8, byte_order
,
3755 find_func_descr (regcache
, faddr
,
3757 if (slotnum
< rseslots
)
3758 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3761 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3768 /* Skip odd slot if necessary... */
3769 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3775 gdb_byte val_buf
[8];
3777 memset (val_buf
, 0, 8);
3778 if (!ia64_struct_type_p (type
) && len
< 8)
3780 /* Integral types are LSB-aligned, so we have to be careful
3781 to insert the argument on the correct side of the buffer.
3782 This is why we use store_unsigned_integer. */
3783 store_unsigned_integer
3784 (val_buf
, 8, byte_order
,
3785 extract_unsigned_integer (value_contents (arg
), len
,
3790 /* This is either an 8bit integral type, or an aggregate.
3791 For 8bit integral type, there is no problem, we just
3792 copy the value over.
3794 For aggregates, the only potentially tricky portion
3795 is to write the last one if it is less than 8 bytes.
3796 In this case, the data is Byte0-aligned. Happy news,
3797 this means that we don't need to differentiate the
3798 handling of 8byte blocks and less-than-8bytes blocks. */
3799 memcpy (val_buf
, value_contents (arg
) + argoffset
,
3800 (len
> 8) ? 8 : len
);
3803 if (slotnum
< rseslots
)
3804 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3807 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3814 /* Handle floating point types (including HFAs). */
3815 float_elt_type
= is_float_or_hfa_type (type
);
3816 if (float_elt_type
!= NULL
)
3819 len
= TYPE_LENGTH (type
);
3820 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3822 gdb_byte to
[IA64_FP_REGISTER_SIZE
];
3823 target_float_convert (value_contents (arg
) + argoffset
,
3825 ia64_ext_type (gdbarch
));
3826 regcache
->cooked_write (floatreg
, to
);
3828 argoffset
+= TYPE_LENGTH (float_elt_type
);
3829 len
-= TYPE_LENGTH (float_elt_type
);
3834 /* Store the struct return value in r8 if necessary. */
3837 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
,
3838 (ULONGEST
) struct_addr
);
3841 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3843 if (global_pointer
!= 0)
3844 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3846 /* The following is not necessary on HP-UX, because we're using
3847 a dummy code sequence pushed on the stack to make the call, and
3848 this sequence doesn't need b0 to be set in order for our dummy
3849 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3850 it's needed for other OSes, so we do this unconditionaly. */
3851 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3853 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3855 tdep
->infcall_ops
.set_function_addr (regcache
, func_addr
);
3860 static const struct ia64_infcall_ops ia64_infcall_ops
=
3862 ia64_allocate_new_rse_frame
,
3863 ia64_store_argument_in_slot
,
3864 ia64_set_function_addr
3867 static struct frame_id
3868 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3870 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3874 get_frame_register (this_frame
, sp_regnum
, buf
);
3875 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3877 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3878 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3880 if (gdbarch_debug
>= 1)
3881 fprintf_unfiltered (gdb_stdlog
,
3882 "dummy frame id: code %s, stack %s, special %s\n",
3883 paddress (gdbarch
, get_frame_pc (this_frame
)),
3884 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3886 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3890 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3892 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3894 CORE_ADDR ip
, psr
, pc
;
3896 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3897 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3898 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3899 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3901 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3906 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3908 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3909 return default_print_insn (memaddr
, info
);
3912 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3915 ia64_size_of_register_frame (struct frame_info
*this_frame
, ULONGEST cfm
)
3917 return (cfm
& 0x7f);
3920 static struct gdbarch
*
3921 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3923 struct gdbarch
*gdbarch
;
3924 struct gdbarch_tdep
*tdep
;
3926 /* If there is already a candidate, use it. */
3927 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3929 return arches
->gdbarch
;
3931 tdep
= XCNEW (struct gdbarch_tdep
);
3932 gdbarch
= gdbarch_alloc (&info
, tdep
);
3934 tdep
->size_of_register_frame
= ia64_size_of_register_frame
;
3936 /* According to the ia64 specs, instructions that store long double
3937 floats in memory use a long-double format different than that
3938 used in the floating registers. The memory format matches the
3939 x86 extended float format which is 80 bits. An OS may choose to
3940 use this format (e.g. GNU/Linux) or choose to use a different
3941 format for storing long doubles (e.g. HPUX). In the latter case,
3942 the setting of the format may be moved/overridden in an
3943 OS-specific tdep file. */
3944 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3946 set_gdbarch_short_bit (gdbarch
, 16);
3947 set_gdbarch_int_bit (gdbarch
, 32);
3948 set_gdbarch_long_bit (gdbarch
, 64);
3949 set_gdbarch_long_long_bit (gdbarch
, 64);
3950 set_gdbarch_float_bit (gdbarch
, 32);
3951 set_gdbarch_double_bit (gdbarch
, 64);
3952 set_gdbarch_long_double_bit (gdbarch
, 128);
3953 set_gdbarch_ptr_bit (gdbarch
, 64);
3955 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3956 set_gdbarch_num_pseudo_regs (gdbarch
,
3957 LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3958 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3959 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3961 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3962 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3964 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3965 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3966 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3967 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3968 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3969 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3970 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3972 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3974 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3976 set_gdbarch_memory_insert_breakpoint (gdbarch
,
3977 ia64_memory_insert_breakpoint
);
3978 set_gdbarch_memory_remove_breakpoint (gdbarch
,
3979 ia64_memory_remove_breakpoint
);
3980 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3981 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, ia64_breakpoint_kind_from_pc
);
3982 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3983 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3985 /* Settings for calling functions in the inferior. */
3986 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3987 tdep
->infcall_ops
= ia64_infcall_ops
;
3988 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3989 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
3991 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3992 #ifdef HAVE_LIBUNWIND_IA64_H
3993 frame_unwind_append_unwinder (gdbarch
,
3994 &ia64_libunwind_sigtramp_frame_unwind
);
3995 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
3996 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3997 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3999 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
4001 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
4002 frame_base_set_default (gdbarch
, &ia64_frame_base
);
4004 /* Settings that should be unnecessary. */
4005 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4007 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
4008 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
4009 ia64_convert_from_func_ptr_addr
);
4011 /* The virtual table contains 16-byte descriptors, not pointers to
4013 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
4015 /* Hook in ABI-specific overrides, if they have been registered. */
4016 gdbarch_init_osabi (info
, gdbarch
);
4022 _initialize_ia64_tdep (void)
4024 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);