1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2 Copyright 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
27 #include "floatformat.h"
31 #include "elf/common.h" /* for DT_PLTGOT value */
34 /* Hook for determining the global pointer when calling functions in
35 the inferior under AIX. The initialization code in ia64-aix-nat.c
36 sets this hook to the address of a function which will find the
37 global pointer for a given address.
39 The generic code which uses the dynamic section in the inferior for
40 finding the global pointer is not of much use on AIX since the
41 values obtained from the inferior have not been relocated. */
43 CORE_ADDR (*native_find_global_pointer
) (CORE_ADDR
) = 0;
45 /* An enumeration of the different IA-64 instruction types. */
47 typedef enum instruction_type
49 A
, /* Integer ALU ; I-unit or M-unit */
50 I
, /* Non-ALU integer; I-unit */
51 M
, /* Memory ; M-unit */
52 F
, /* Floating-point ; F-unit */
53 B
, /* Branch ; B-unit */
54 L
, /* Extended (L+X) ; I-unit */
55 X
, /* Extended (L+X) ; I-unit */
56 undefined
/* undefined or reserved */
59 /* We represent IA-64 PC addresses as the value of the instruction
60 pointer or'd with some bit combination in the low nibble which
61 represents the slot number in the bundle addressed by the
62 instruction pointer. The problem is that the Linux kernel
63 multiplies its slot numbers (for exceptions) by one while the
64 disassembler multiplies its slot numbers by 6. In addition, I've
65 heard it said that the simulator uses 1 as the multiplier.
67 I've fixed the disassembler so that the bytes_per_line field will
68 be the slot multiplier. If bytes_per_line comes in as zero, it
69 is set to six (which is how it was set up initially). -- objdump
70 displays pretty disassembly dumps with this value. For our purposes,
71 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
72 never want to also display the raw bytes the way objdump does. */
74 #define SLOT_MULTIPLIER 1
76 /* Length in bytes of an instruction bundle */
80 /* FIXME: These extern declarations should go in ia64-tdep.h. */
81 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
82 extern CORE_ADDR
ia64_aix_sigcontext_register_address (CORE_ADDR
, int);
84 static gdbarch_init_ftype ia64_gdbarch_init
;
86 static gdbarch_register_name_ftype ia64_register_name
;
87 static gdbarch_register_raw_size_ftype ia64_register_raw_size
;
88 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size
;
89 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type
;
90 static gdbarch_register_byte_ftype ia64_register_byte
;
91 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
92 static gdbarch_frame_chain_ftype ia64_frame_chain
;
93 static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc
;
94 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
95 static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs
;
96 static gdbarch_get_saved_register_ftype ia64_get_saved_register
;
97 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
98 static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address
;
99 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
100 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation
;
101 static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info
;
102 static gdbarch_store_return_value_ftype ia64_store_return_value
;
103 static gdbarch_store_struct_return_ftype ia64_store_struct_return
;
104 static gdbarch_push_arguments_ftype ia64_push_arguments
;
105 static gdbarch_push_return_address_ftype ia64_push_return_address
;
106 static gdbarch_pop_frame_ftype ia64_pop_frame
;
107 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call
;
108 static void ia64_pop_frame_regular (struct frame_info
*frame
);
109 static struct type
*is_float_or_hfa_type (struct type
*t
);
111 static int ia64_num_regs
= 590;
113 static int pc_regnum
= IA64_IP_REGNUM
;
114 static int sp_regnum
= IA64_GR12_REGNUM
;
115 static int fp_regnum
= IA64_VFP_REGNUM
;
116 static int lr_regnum
= IA64_VRAP_REGNUM
;
118 static LONGEST ia64_call_dummy_words
[] = {0};
120 /* Array of register names; There should be ia64_num_regs strings in
123 static char *ia64_register_names
[] =
124 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
125 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
126 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
127 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
128 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
129 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
130 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
131 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
132 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
133 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
134 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
135 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
136 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
137 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
138 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
139 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
141 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
142 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
143 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
144 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
145 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
146 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
147 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
148 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
149 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
150 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
151 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
152 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
153 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
154 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
155 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
156 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
158 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
159 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
160 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
161 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
162 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
163 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
164 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
165 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
167 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
171 "pr", "ip", "psr", "cfm",
173 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
174 "", "", "", "", "", "", "", "",
175 "rsc", "bsp", "bspstore", "rnat",
177 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
178 "ccv", "", "", "", "unat", "", "", "",
179 "fpsr", "", "", "", "itc",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
190 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
191 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
192 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
193 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
194 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
195 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
196 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
197 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
198 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
199 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
200 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
201 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
202 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
203 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
204 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
205 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
208 struct frame_extra_info
210 CORE_ADDR bsp
; /* points at r32 for the current frame */
211 CORE_ADDR cfm
; /* cfm value for current frame */
212 int sof
; /* Size of frame (decoded from cfm value) */
213 int sol
; /* Size of locals (decoded from cfm value) */
214 CORE_ADDR after_prologue
;
215 /* Address of first instruction after the last
216 prologue instruction; Note that there may
217 be instructions from the function's body
218 intermingled with the prologue. */
219 int mem_stack_frame_size
;
220 /* Size of the memory stack frame (may be zero),
221 or -1 if it has not been determined yet. */
222 int fp_reg
; /* Register number (if any) used a frame pointer
223 for this frame. 0 if no register is being used
224 as the frame pointer. */
229 int os_ident
; /* From the ELF header, one of the ELFOSABI_
230 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
232 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
233 /* OS specific function which, given a frame address
234 and register number, returns the offset to the
235 given register from the start of the frame. */
236 CORE_ADDR (*find_global_pointer
) (CORE_ADDR
);
239 #define SIGCONTEXT_REGISTER_ADDRESS \
240 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
241 #define FIND_GLOBAL_POINTER \
242 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
245 ia64_register_name (int reg
)
247 return ia64_register_names
[reg
];
251 ia64_register_raw_size (int reg
)
253 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
257 ia64_register_virtual_size (int reg
)
259 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
262 /* Return true iff register N's virtual format is different from
265 ia64_register_convertible (int nr
)
267 return (IA64_FR0_REGNUM
<= nr
&& nr
<= IA64_FR127_REGNUM
);
270 const struct floatformat floatformat_ia64_ext
=
272 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
273 floatformat_intbit_yes
277 ia64_register_convert_to_virtual (int regnum
, struct type
*type
,
278 char *from
, char *to
)
280 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
283 floatformat_to_doublest (&floatformat_ia64_ext
, from
, &val
);
284 store_floating(to
, TYPE_LENGTH(type
), val
);
287 error("ia64_register_convert_to_virtual called with non floating point register number");
291 ia64_register_convert_to_raw (struct type
*type
, int regnum
,
292 char *from
, char *to
)
294 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
296 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
297 floatformat_from_doublest (&floatformat_ia64_ext
, &val
, to
);
300 error("ia64_register_convert_to_raw called with non floating point register number");
304 ia64_register_virtual_type (int reg
)
306 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
307 return builtin_type_long_double
;
309 return builtin_type_long
;
313 ia64_register_byte (int reg
)
316 (reg
<= IA64_FR0_REGNUM
? 0 : 8 * ((reg
> IA64_FR127_REGNUM
) ? 128 : reg
- IA64_FR0_REGNUM
));
319 /* Read the given register from a sigcontext structure in the
323 read_sigcontext_register (struct frame_info
*frame
, int regnum
)
328 internal_error (__FILE__
, __LINE__
,
329 "read_sigcontext_register: NULL frame");
330 if (!frame
->signal_handler_caller
)
331 internal_error (__FILE__
, __LINE__
,
332 "read_sigcontext_register: frame not a signal_handler_caller");
333 if (SIGCONTEXT_REGISTER_ADDRESS
== 0)
334 internal_error (__FILE__
, __LINE__
,
335 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
337 regaddr
= SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regnum
);
339 return read_memory_integer (regaddr
, REGISTER_RAW_SIZE (regnum
));
341 internal_error (__FILE__
, __LINE__
,
342 "read_sigcontext_register: Register %d not in struct sigcontext", regnum
);
345 /* Extract ``len'' bits from an instruction bundle starting at
349 extract_bit_field (char *bundle
, int from
, int len
)
351 long long result
= 0LL;
353 int from_byte
= from
/ 8;
354 int to_byte
= to
/ 8;
355 unsigned char *b
= (unsigned char *) bundle
;
361 if (from_byte
== to_byte
)
362 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
363 result
= c
>> (from
% 8);
364 lshift
= 8 - (from
% 8);
366 for (i
= from_byte
+1; i
< to_byte
; i
++)
368 result
|= ((long long) b
[i
]) << lshift
;
372 if (from_byte
< to_byte
&& (to
% 8 != 0))
375 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
376 result
|= ((long long) c
) << lshift
;
382 /* Replace the specified bits in an instruction bundle */
385 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
388 int from_byte
= from
/ 8;
389 int to_byte
= to
/ 8;
390 unsigned char *b
= (unsigned char *) bundle
;
393 if (from_byte
== to_byte
)
395 unsigned char left
, right
;
397 left
= (c
>> (to
% 8)) << (to
% 8);
398 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
399 c
= (unsigned char) (val
& 0xff);
400 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
408 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
409 c
= c
| (val
<< (from
% 8));
411 val
>>= 8 - from
% 8;
413 for (i
= from_byte
+1; i
< to_byte
; i
++)
422 unsigned char cv
= (unsigned char) val
;
424 c
= c
>> (to
% 8) << (to
% 8);
425 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
431 /* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
435 slotN_contents (char *bundle
, int slotnum
)
437 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
440 /* Store an instruction in an instruction bundle */
443 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
445 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
448 static enum instruction_type template_encoding_table
[32][3] =
450 { M
, I
, I
}, /* 00 */
451 { M
, I
, I
}, /* 01 */
452 { M
, I
, I
}, /* 02 */
453 { M
, I
, I
}, /* 03 */
454 { M
, L
, X
}, /* 04 */
455 { M
, L
, X
}, /* 05 */
456 { undefined
, undefined
, undefined
}, /* 06 */
457 { undefined
, undefined
, undefined
}, /* 07 */
458 { M
, M
, I
}, /* 08 */
459 { M
, M
, I
}, /* 09 */
460 { M
, M
, I
}, /* 0A */
461 { M
, M
, I
}, /* 0B */
462 { M
, F
, I
}, /* 0C */
463 { M
, F
, I
}, /* 0D */
464 { M
, M
, F
}, /* 0E */
465 { M
, M
, F
}, /* 0F */
466 { M
, I
, B
}, /* 10 */
467 { M
, I
, B
}, /* 11 */
468 { M
, B
, B
}, /* 12 */
469 { M
, B
, B
}, /* 13 */
470 { undefined
, undefined
, undefined
}, /* 14 */
471 { undefined
, undefined
, undefined
}, /* 15 */
472 { B
, B
, B
}, /* 16 */
473 { B
, B
, B
}, /* 17 */
474 { M
, M
, B
}, /* 18 */
475 { M
, M
, B
}, /* 19 */
476 { undefined
, undefined
, undefined
}, /* 1A */
477 { undefined
, undefined
, undefined
}, /* 1B */
478 { M
, F
, B
}, /* 1C */
479 { M
, F
, B
}, /* 1D */
480 { undefined
, undefined
, undefined
}, /* 1E */
481 { undefined
, undefined
, undefined
}, /* 1F */
484 /* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
488 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
490 char bundle
[BUNDLE_LEN
];
491 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
495 /* Warn about slot numbers greater than 2. We used to generate
496 an error here on the assumption that the user entered an invalid
497 address. But, sometimes GDB itself requests an invalid address.
498 This can (easily) happen when execution stops in a function for
499 which there are no symbols. The prologue scanner will attempt to
500 find the beginning of the function - if the nearest symbol
501 happens to not be aligned on a bundle boundary (16 bytes), the
502 resulting starting address will cause GDB to think that the slot
505 So we warn about it and set the slot number to zero. It is
506 not necessarily a fatal condition, particularly if debugging
507 at the assembly language level. */
510 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
511 "Using slot 0 instead");
517 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
522 *instr
= slotN_contents (bundle
, slotnum
);
523 template = extract_bit_field (bundle
, 0, 5);
524 *it
= template_encoding_table
[(int)template][slotnum
];
526 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
529 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
534 /* There are 5 different break instructions (break.i, break.b,
535 break.m, break.f, and break.x), but they all have the same
536 encoding. (The five bit template in the low five bits of the
537 instruction bundle distinguishes one from another.)
539 The runtime architecture manual specifies that break instructions
540 used for debugging purposes must have the upper two bits of the 21
541 bit immediate set to a 0 and a 1 respectively. A breakpoint
542 instruction encodes the most significant bit of its 21 bit
543 immediate at bit 36 of the 41 bit instruction. The penultimate msb
544 is at bit 25 which leads to the pattern below.
546 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
547 it turns out that 0x80000 was used as the syscall break in the early
548 simulators. So I changed the pattern slightly to do "break.i 0x080001"
549 instead. But that didn't work either (I later found out that this
550 pattern was used by the simulator that I was using.) So I ended up
551 using the pattern seen below. */
554 #define BREAKPOINT 0x00002000040LL
556 #define BREAKPOINT 0x00003333300LL
559 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
561 char bundle
[BUNDLE_LEN
];
562 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
567 error("Can't insert breakpoint for slot numbers greater than 2.");
571 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
572 instr
= slotN_contents (bundle
, slotnum
);
573 memcpy(contents_cache
, &instr
, sizeof(instr
));
574 replace_slotN_contents (bundle
, BREAKPOINT
, slotnum
);
576 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
582 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
584 char bundle
[BUNDLE_LEN
];
585 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
591 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
592 memcpy (&instr
, contents_cache
, sizeof instr
);
593 replace_slotN_contents (bundle
, instr
, slotnum
);
595 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
600 /* We don't really want to use this, but remote.c needs to call it in order
601 to figure out if Z-packets are supported or not. Oh, well. */
603 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
605 static unsigned char breakpoint
[] =
606 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
607 *lenptr
= sizeof (breakpoint
);
615 ia64_read_pc (ptid_t ptid
)
617 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
618 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
619 int slot_num
= (psr_value
>> 41) & 3;
621 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
625 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
627 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
628 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
629 psr_value
&= ~(3LL << 41);
630 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
634 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
635 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
638 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
640 /* Returns the address of the slot that's NSLOTS slots away from
641 the address ADDR. NSLOTS may be positive or negative. */
643 rse_address_add(CORE_ADDR addr
, int nslots
)
646 int mandatory_nat_slots
= nslots
/ 63;
647 int direction
= nslots
< 0 ? -1 : 1;
649 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
651 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
652 new_addr
+= 8 * direction
;
654 if (IS_NaT_COLLECTION_ADDR(new_addr
))
655 new_addr
+= 8 * direction
;
660 /* The IA-64 frame chain is a bit odd. We won't always have a frame
661 pointer, so we use the SP value as the FP for the purpose of
662 creating a frame. There is sometimes a register (not fixed) which
663 is used as a frame pointer. When this register exists, it is not
664 especially hard to determine which one is being used. It isn't
665 even really hard to compute the frame chain, but it can be
666 computationally expensive. So, instead of making life difficult
667 (and slow), we pick a more convenient representation of the frame
668 chain, knowing that we'll have to make some small adjustments
669 in other places. (E.g, note that read_fp() and write_fp() are
670 actually read_sp() and write_sp() below in ia64_gdbarch_init()
673 Okay, so what is the frame chain exactly? It'll be the SP value
674 at the time that the function in question was entered.
676 Note that this *should* actually the frame pointer for the current
677 function! But as I note above, if we were to attempt to find the
678 address of the beginning of the previous frame, we'd waste a lot
679 of cycles for no good reason. So instead, we simply choose to
680 represent the frame chain as the end of the previous frame instead
684 ia64_frame_chain (struct frame_info
*frame
)
686 if (frame
->signal_handler_caller
)
687 return read_sigcontext_register (frame
, sp_regnum
);
688 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
692 FRAME_INIT_SAVED_REGS (frame
);
693 if (frame
->saved_regs
[IA64_VFP_REGNUM
])
694 return read_memory_integer (frame
->saved_regs
[IA64_VFP_REGNUM
], 8);
696 return frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
701 ia64_frame_saved_pc (struct frame_info
*frame
)
703 if (frame
->signal_handler_caller
)
704 return read_sigcontext_register (frame
, pc_regnum
);
705 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
706 return generic_read_register_dummy (frame
->pc
, frame
->frame
, pc_regnum
);
709 FRAME_INIT_SAVED_REGS (frame
);
711 if (frame
->saved_regs
[IA64_VRAP_REGNUM
])
712 return read_memory_integer (frame
->saved_regs
[IA64_VRAP_REGNUM
], 8);
713 else if (frame
->next
&& frame
->next
->signal_handler_caller
)
714 return read_sigcontext_register (frame
->next
, IA64_BR0_REGNUM
);
715 else /* either frameless, or not far enough along in the prologue... */
716 return ia64_saved_pc_after_call (frame
);
720 /* Limit the number of skipped non-prologue instructions since examining
721 of the prologue is expensive. */
722 static int max_skip_non_prologue_insns
= 10;
724 /* Given PC representing the starting address of a function, and
725 LIM_PC which is the (sloppy) limit to which to scan when looking
726 for a prologue, attempt to further refine this limit by using
727 the line data in the symbol table. If successful, a better guess
728 on where the prologue ends is returned, otherwise the previous
729 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
730 which will be set to indicate whether the returned limit may be
731 used with no further scanning in the event that the function is
735 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
737 struct symtab_and_line prologue_sal
;
738 CORE_ADDR start_pc
= pc
;
740 /* Start off not trusting the limit. */
743 prologue_sal
= find_pc_line (pc
, 0);
744 if (prologue_sal
.line
!= 0)
747 CORE_ADDR addr
= prologue_sal
.end
;
749 /* Handle the case in which compiler's optimizer/scheduler
750 has moved instructions into the prologue. We scan ahead
751 in the function looking for address ranges whose corresponding
752 line number is less than or equal to the first one that we
753 found for the function. (It can be less than when the
754 scheduler puts a body instruction before the first prologue
756 for (i
= 2 * max_skip_non_prologue_insns
;
757 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
760 struct symtab_and_line sal
;
762 sal
= find_pc_line (addr
, 0);
765 if (sal
.line
<= prologue_sal
.line
766 && sal
.symtab
== prologue_sal
.symtab
)
773 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
775 lim_pc
= prologue_sal
.end
;
776 if (start_pc
== get_pc_function_start (lim_pc
))
783 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
784 || (8 <= (_regnum_) && (_regnum_) <= 11) \
785 || (14 <= (_regnum_) && (_regnum_) <= 31))
786 #define imm9(_instr_) \
787 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
788 | (((_instr_) & 0x00008000000LL) >> 20) \
789 | (((_instr_) & 0x00000001fc0LL) >> 6))
792 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*frame
)
795 CORE_ADDR last_prologue_pc
= pc
;
798 int do_fsr_stuff
= 0;
803 int unat_save_reg
= 0;
805 int mem_stack_frame_size
= 0;
807 CORE_ADDR spill_addr
= 0;
812 memset (instores
, 0, sizeof instores
);
813 memset (infpstores
, 0, sizeof infpstores
);
815 if (frame
&& !frame
->saved_regs
)
817 frame_saved_regs_zalloc (frame
);
823 && frame
->extra_info
->after_prologue
!= 0
824 && frame
->extra_info
->after_prologue
<= lim_pc
)
825 return frame
->extra_info
->after_prologue
;
827 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
829 /* Must start with an alloc instruction */
830 next_pc
= fetch_instruction (pc
, &it
, &instr
);
831 if (pc
< lim_pc
&& next_pc
832 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
835 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
836 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
837 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
838 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
839 we could compare against the size given to us via the cfm as
840 either a sanity check or possibly to see if the frame has been
841 changed by a later alloc instruction... */
842 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
844 last_prologue_pc
= next_pc
;
849 pc
= lim_pc
; /* Frameless: We're done early. */
851 last_prologue_pc
= lim_pc
;
854 /* Loop, looking for prologue instructions, keeping track of
855 where preserved registers were spilled. */
858 next_pc
= fetch_instruction (pc
, &it
, &instr
);
862 if (it
== B
|| ((instr
& 0x3fLL
) != 0LL))
864 /* Exit loop upon hitting a branch instruction or a predicated
868 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
871 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
872 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
873 int qp
= (int) (instr
& 0x0000000003f);
875 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
878 last_prologue_pc
= next_pc
;
881 else if ((it
== I
|| it
== M
)
882 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
884 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
885 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
886 | ((instr
& 0x001f8000000LL
) >> 20)
887 | ((instr
& 0x000000fe000LL
) >> 13));
888 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
889 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
890 int qp
= (int) (instr
& 0x0000000003fLL
);
892 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
896 last_prologue_pc
= next_pc
;
898 else if (qp
== 0 && rN
== 12 && rM
== 12)
900 /* adds r12, -mem_stack_frame_size, r12 */
901 mem_stack_frame_size
-= imm
;
902 last_prologue_pc
= next_pc
;
904 else if (qp
== 0 && rN
== 2
905 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
907 /* adds r2, spilloffset, rFramePointer
909 adds r2, spilloffset, r12
911 Get ready for stf.spill or st8.spill instructions.
912 The address to start spilling at is loaded into r2.
913 FIXME: Why r2? That's what gcc currently uses; it
914 could well be different for other compilers. */
916 /* Hmm... whether or not this will work will depend on
917 where the pc is. If it's still early in the prologue
918 this'll be wrong. FIXME */
919 spill_addr
= (frame
? frame
->frame
: 0)
920 + (rM
== 12 ? 0 : mem_stack_frame_size
)
923 last_prologue_pc
= next_pc
;
927 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
928 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
930 /* stf.spill [rN] = fM, imm9
932 stf.spill [rN] = fM */
934 int imm
= imm9(instr
);
935 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
936 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
937 int qp
= (int) (instr
& 0x0000000003fLL
);
938 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
939 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
942 frame
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
944 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
947 spill_addr
= 0; /* last one; must be done */
948 last_prologue_pc
= next_pc
;
951 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
952 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
958 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
959 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
960 int qp
= (int) (instr
& 0x0000000003fLL
);
961 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
963 /* We have something like "mov.m r3 = ar.unat". Remember the
964 r3 (or whatever) and watch for a store of this register... */
966 last_prologue_pc
= next_pc
;
969 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
972 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
973 int qp
= (int) (instr
& 0x0000000003fLL
);
974 if (qp
== 0 && isScratch (rN
))
977 last_prologue_pc
= next_pc
;
981 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
982 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
986 st8 [rN] = rM, imm9 */
987 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
988 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
989 int qp
= (int) (instr
& 0x0000000003fLL
);
990 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
991 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
993 /* We've found a spill of either the UNAT register or the PR
994 register. (Well, not exactly; what we've actually found is
995 a spill of the register that UNAT or PR was moved to).
996 Record that fact and move on... */
997 if (rM
== unat_save_reg
)
999 /* Track UNAT register */
1001 frame
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1006 /* Track PR register */
1008 frame
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1011 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1012 /* st8 [rN] = rM, imm9 */
1013 spill_addr
+= imm9(instr
);
1015 spill_addr
= 0; /* must be done spilling */
1016 last_prologue_pc
= next_pc
;
1018 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1020 /* Allow up to one store of each input register. */
1021 instores
[rM
-32] = 1;
1022 last_prologue_pc
= next_pc
;
1025 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1032 Note that the st8 case is handled in the clause above.
1034 Advance over stores of input registers. One store per input
1035 register is permitted. */
1036 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1037 int qp
= (int) (instr
& 0x0000000003fLL
);
1038 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1040 instores
[rM
-32] = 1;
1041 last_prologue_pc
= next_pc
;
1044 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1051 Advance over stores of floating point input registers. Again
1052 one store per register is permitted */
1053 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1054 int qp
= (int) (instr
& 0x0000000003fLL
);
1055 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1057 infpstores
[fM
-8] = 1;
1058 last_prologue_pc
= next_pc
;
1062 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1063 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1065 /* st8.spill [rN] = rM
1067 st8.spill [rN] = rM, imm9 */
1068 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1069 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1070 int qp
= (int) (instr
& 0x0000000003fLL
);
1071 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1073 /* We've found a spill of one of the preserved general purpose
1074 regs. Record the spill address and advance the spill
1075 register if appropriate. */
1077 frame
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1078 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1079 /* st8.spill [rN] = rM, imm9 */
1080 spill_addr
+= imm9(instr
);
1082 spill_addr
= 0; /* Done spilling */
1083 last_prologue_pc
= next_pc
;
1095 /* Extract the size of the rotating portion of the stack
1096 frame and the register rename base from the current
1098 sor
= ((frame
->extra_info
->cfm
>> 14) & 0xf) * 8;
1099 rrb_gr
= (frame
->extra_info
->cfm
>> 18) & 0x7f;
1101 for (i
= 0, addr
= frame
->extra_info
->bsp
;
1102 i
< frame
->extra_info
->sof
;
1105 if (IS_NaT_COLLECTION_ADDR (addr
))
1110 frame
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1113 frame
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1115 if (i
+32 == cfm_reg
)
1116 frame
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1117 if (i
+32 == ret_reg
)
1118 frame
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1120 frame
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1124 if (frame
&& frame
->extra_info
) {
1125 frame
->extra_info
->after_prologue
= last_prologue_pc
;
1126 frame
->extra_info
->mem_stack_frame_size
= mem_stack_frame_size
;
1127 frame
->extra_info
->fp_reg
= fp_reg
;
1130 return last_prologue_pc
;
1134 ia64_skip_prologue (CORE_ADDR pc
)
1136 return examine_prologue (pc
, pc
+1024, 0);
1140 ia64_frame_init_saved_regs (struct frame_info
*frame
)
1142 if (frame
->saved_regs
)
1145 if (frame
->signal_handler_caller
&& SIGCONTEXT_REGISTER_ADDRESS
)
1149 frame_saved_regs_zalloc (frame
);
1151 frame
->saved_regs
[IA64_VRAP_REGNUM
] =
1152 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_IP_REGNUM
);
1153 frame
->saved_regs
[IA64_CFM_REGNUM
] =
1154 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CFM_REGNUM
);
1155 frame
->saved_regs
[IA64_PSR_REGNUM
] =
1156 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PSR_REGNUM
);
1158 frame
->saved_regs
[IA64_BSP_REGNUM
] =
1159 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_BSP_REGNUM
);
1161 frame
->saved_regs
[IA64_RNAT_REGNUM
] =
1162 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_RNAT_REGNUM
);
1163 frame
->saved_regs
[IA64_CCV_REGNUM
] =
1164 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CCV_REGNUM
);
1165 frame
->saved_regs
[IA64_UNAT_REGNUM
] =
1166 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_UNAT_REGNUM
);
1167 frame
->saved_regs
[IA64_FPSR_REGNUM
] =
1168 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_FPSR_REGNUM
);
1169 frame
->saved_regs
[IA64_PFS_REGNUM
] =
1170 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PFS_REGNUM
);
1171 frame
->saved_regs
[IA64_LC_REGNUM
] =
1172 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_LC_REGNUM
);
1173 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1174 if (regno
!= sp_regnum
)
1175 frame
->saved_regs
[regno
] =
1176 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1177 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1178 frame
->saved_regs
[regno
] =
1179 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1180 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1181 frame
->saved_regs
[regno
] =
1182 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1186 CORE_ADDR func_start
;
1188 func_start
= get_pc_function_start (frame
->pc
);
1189 examine_prologue (func_start
, frame
->pc
, frame
);
1194 ia64_get_saved_register (char *raw_buffer
,
1197 struct frame_info
*frame
,
1199 enum lval_type
*lval
)
1203 if (!target_has_registers
)
1204 error ("No registers.");
1206 if (optimized
!= NULL
)
1215 is_dummy_frame
= PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
);
1217 if (regnum
== SP_REGNUM
&& frame
->next
)
1219 /* Handle SP values for all frames but the topmost. */
1220 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), frame
->frame
);
1222 else if (regnum
== IA64_BSP_REGNUM
)
1224 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1225 frame
->extra_info
->bsp
);
1227 else if (regnum
== IA64_VFP_REGNUM
)
1229 /* If the function in question uses an automatic register (r32-r127)
1230 for the frame pointer, it'll be found by ia64_find_saved_register()
1231 above. If the function lacks one of these frame pointers, we can
1232 still provide a value since we know the size of the frame */
1233 CORE_ADDR vfp
= frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
1234 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_VFP_REGNUM
), vfp
);
1236 else if (IA64_PR0_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1238 char *pr_raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
1240 enum lval_type pr_lval
;
1243 ia64_get_saved_register (pr_raw_buffer
, &pr_optim
, &pr_addr
,
1244 frame
, IA64_PR_REGNUM
, &pr_lval
);
1245 if (IA64_PR16_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1247 /* Fetch predicate register rename base from current frame
1248 marker for this frame. */
1249 int rrb_pr
= (frame
->extra_info
->cfm
>> 32) & 0x3f;
1251 /* Adjust the register number to account for register rotation. */
1252 regnum
= IA64_PR16_REGNUM
1253 + ((regnum
- IA64_PR16_REGNUM
) + rrb_pr
) % 48;
1255 prN_val
= extract_bit_field ((unsigned char *) pr_raw_buffer
,
1256 regnum
- IA64_PR0_REGNUM
, 1);
1257 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), prN_val
);
1259 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1261 char *unat_raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
1263 enum lval_type unat_lval
;
1264 CORE_ADDR unat_addr
;
1266 ia64_get_saved_register (unat_raw_buffer
, &unat_optim
, &unat_addr
,
1267 frame
, IA64_UNAT_REGNUM
, &unat_lval
);
1268 unatN_val
= extract_bit_field ((unsigned char *) unat_raw_buffer
,
1269 regnum
- IA64_NAT0_REGNUM
, 1);
1270 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1273 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1276 /* Find address of general register corresponding to nat bit we're
1278 CORE_ADDR gr_addr
= 0;
1280 if (!is_dummy_frame
)
1282 FRAME_INIT_SAVED_REGS (frame
);
1283 gr_addr
= frame
->saved_regs
[ regnum
- IA64_NAT0_REGNUM
1288 /* Compute address of nat collection bits */
1289 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1290 CORE_ADDR bsp
= read_register (IA64_BSP_REGNUM
);
1291 CORE_ADDR nat_collection
;
1293 /* If our nat collection address is bigger than bsp, we have to get
1294 the nat collection from rnat. Otherwise, we fetch the nat
1295 collection from the computed address. */
1296 if (nat_addr
>= bsp
)
1297 nat_collection
= read_register (IA64_RNAT_REGNUM
);
1299 nat_collection
= read_memory_integer (nat_addr
, 8);
1300 nat_bit
= (gr_addr
>> 3) & 0x3f;
1301 natval
= (nat_collection
>> nat_bit
) & 1;
1303 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), natval
);
1305 else if (regnum
== IA64_IP_REGNUM
)
1310 /* FIXME: Set *addrp, *lval when possible. */
1311 pc
= ia64_frame_saved_pc (frame
->next
);
1317 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_IP_REGNUM
), pc
);
1319 else if (IA64_GR32_REGNUM
<= regnum
&& regnum
<= IA64_GR127_REGNUM
)
1322 if (!is_dummy_frame
)
1324 FRAME_INIT_SAVED_REGS (frame
);
1325 addr
= frame
->saved_regs
[regnum
];
1331 *lval
= lval_memory
;
1334 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
1338 /* r32 - r127 must be fetchable via memory. If they aren't,
1339 then the register is unavailable */
1340 memset (raw_buffer
, 0, REGISTER_RAW_SIZE (regnum
));
1345 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1347 /* Fetch floating point register rename base from current
1348 frame marker for this frame. */
1349 int rrb_fr
= (frame
->extra_info
->cfm
>> 25) & 0x7f;
1351 /* Adjust the floating point register number to account for
1352 register rotation. */
1353 regnum
= IA64_FR32_REGNUM
1354 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1357 generic_get_saved_register (raw_buffer
, optimized
, addrp
, frame
,
1362 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1363 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1364 and TYPE is the type (which is known to be struct, union or array). */
1366 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
1368 struct type
*float_elt_type
;
1370 /* HFAs are structures (or arrays) consisting entirely of floating
1371 point values of the same length. Up to 8 of these are returned
1372 in registers. Don't use the struct convention when this is the
1374 float_elt_type
= is_float_or_hfa_type (type
);
1375 if (float_elt_type
!= NULL
1376 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
1379 /* Other structs of length 32 or less are returned in r8-r11.
1380 Don't use the struct convention for those either. */
1381 return TYPE_LENGTH (type
) > 32;
1385 ia64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
1387 struct type
*float_elt_type
;
1389 float_elt_type
= is_float_or_hfa_type (type
);
1390 if (float_elt_type
!= NULL
)
1393 int regnum
= IA64_FR8_REGNUM
;
1394 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
1398 ia64_register_convert_to_virtual (regnum
, float_elt_type
,
1399 ®buf
[REGISTER_BYTE (regnum
)], valbuf
+ offset
);
1400 offset
+= TYPE_LENGTH (float_elt_type
);
1405 memcpy (valbuf
, ®buf
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1406 TYPE_LENGTH (type
));
1409 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1410 like this is necessary though since the IA-64 calling conventions specify
1411 that r8 is not preserved. */
1412 static CORE_ADDR struct_return_address
;
1415 ia64_extract_struct_value_address (char *regbuf
)
1417 /* FIXME: See above. */
1418 return struct_return_address
;
1422 ia64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1424 /* FIXME: See above. */
1425 /* Note that most of the work was done in ia64_push_arguments() */
1426 struct_return_address
= addr
;
1430 ia64_frameless_function_invocation (struct frame_info
*frame
)
1432 FRAME_INIT_SAVED_REGS (frame
);
1433 return (frame
->extra_info
->mem_stack_frame_size
== 0);
1437 ia64_saved_pc_after_call (struct frame_info
*frame
)
1439 return read_register (IA64_BR0_REGNUM
);
1443 ia64_frame_args_address (struct frame_info
*frame
)
1445 /* frame->frame points at the SP for this frame; But we want the start
1446 of the frame, not the end. Calling frame chain will get his for us. */
1447 return ia64_frame_chain (frame
);
1451 ia64_frame_locals_address (struct frame_info
*frame
)
1453 /* frame->frame points at the SP for this frame; But we want the start
1454 of the frame, not the end. Calling frame chain will get his for us. */
1455 return ia64_frame_chain (frame
);
1459 ia64_init_extra_frame_info (int fromleaf
, struct frame_info
*frame
)
1462 int next_frame_is_call_dummy
= ((frame
->next
!= NULL
)
1463 && PC_IN_CALL_DUMMY (frame
->next
->pc
, frame
->next
->frame
,
1464 frame
->next
->frame
));
1466 frame
->extra_info
= (struct frame_extra_info
*)
1467 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1469 if (frame
->next
== 0)
1471 bsp
= read_register (IA64_BSP_REGNUM
);
1472 cfm
= read_register (IA64_CFM_REGNUM
);
1475 else if (frame
->next
->signal_handler_caller
)
1477 bsp
= read_sigcontext_register (frame
->next
, IA64_BSP_REGNUM
);
1478 cfm
= read_sigcontext_register (frame
->next
, IA64_CFM_REGNUM
);
1480 else if (next_frame_is_call_dummy
)
1482 bsp
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1484 cfm
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1489 struct frame_info
*frn
= frame
->next
;
1491 FRAME_INIT_SAVED_REGS (frn
);
1493 if (frn
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1494 cfm
= read_memory_integer (frn
->saved_regs
[IA64_CFM_REGNUM
], 8);
1495 else if (frn
->next
&& frn
->next
->signal_handler_caller
)
1496 cfm
= read_sigcontext_register (frn
->next
, IA64_PFS_REGNUM
);
1498 && PC_IN_CALL_DUMMY (frn
->next
->pc
, frn
->next
->frame
,
1500 cfm
= generic_read_register_dummy (frn
->next
->pc
, frn
->next
->frame
,
1503 cfm
= read_register (IA64_PFS_REGNUM
);
1505 bsp
= frn
->extra_info
->bsp
;
1507 frame
->extra_info
->cfm
= cfm
;
1508 frame
->extra_info
->sof
= cfm
& 0x7f;
1509 frame
->extra_info
->sol
= (cfm
>> 7) & 0x7f;
1510 if (frame
->next
== 0
1511 || frame
->next
->signal_handler_caller
1512 || next_frame_is_call_dummy
)
1513 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sof
);
1515 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sol
);
1517 frame
->extra_info
->after_prologue
= 0;
1518 frame
->extra_info
->mem_stack_frame_size
= -1; /* Not yet determined */
1519 frame
->extra_info
->fp_reg
= 0;
1523 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
1525 switch (TYPE_CODE (t
))
1529 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
1536 case TYPE_CODE_ARRAY
:
1538 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
1541 case TYPE_CODE_STRUCT
:
1545 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
1546 if (!is_float_or_hfa_type_recurse
1547 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
1558 /* Determine if the given type is one of the floating point types or
1559 and HFA (which is a struct, array, or combination thereof whose
1560 bottom-most elements are all of the same floating point type.) */
1562 static struct type
*
1563 is_float_or_hfa_type (struct type
*t
)
1565 struct type
*et
= 0;
1567 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
1571 /* Return 1 if the alignment of T is such that the next even slot
1572 should be used. Return 0, if the next available slot should
1573 be used. (See section 8.5.1 of the IA-64 Software Conventions
1574 and Runtime manual.) */
1577 slot_alignment_is_next_even (struct type
*t
)
1579 switch (TYPE_CODE (t
))
1583 if (TYPE_LENGTH (t
) > 8)
1587 case TYPE_CODE_ARRAY
:
1589 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
1590 case TYPE_CODE_STRUCT
:
1594 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
1595 if (slot_alignment_is_next_even
1596 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
1605 /* Attempt to find (and return) the global pointer for the given
1608 This is a rather nasty bit of code searchs for the .dynamic section
1609 in the objfile corresponding to the pc of the function we're trying
1610 to call. Once it finds the addresses at which the .dynamic section
1611 lives in the child process, it scans the Elf64_Dyn entries for a
1612 DT_PLTGOT tag. If it finds one of these, the corresponding
1613 d_un.d_ptr value is the global pointer. */
1616 generic_elf_find_global_pointer (CORE_ADDR faddr
)
1618 struct obj_section
*faddr_sect
;
1620 faddr_sect
= find_pc_section (faddr
);
1621 if (faddr_sect
!= NULL
)
1623 struct obj_section
*osect
;
1625 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1627 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
1631 if (osect
< faddr_sect
->objfile
->sections_end
)
1636 while (addr
< osect
->endaddr
)
1642 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1645 tag
= extract_signed_integer (buf
, sizeof (buf
));
1647 if (tag
== DT_PLTGOT
)
1649 CORE_ADDR global_pointer
;
1651 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
1654 global_pointer
= extract_address (buf
, sizeof (buf
));
1657 return global_pointer
;
1670 /* Given a function's address, attempt to find (and return) the
1671 corresponding (canonical) function descriptor. Return 0 if
1674 find_extant_func_descr (CORE_ADDR faddr
)
1676 struct obj_section
*faddr_sect
;
1678 /* Return early if faddr is already a function descriptor */
1679 faddr_sect
= find_pc_section (faddr
);
1680 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
1683 if (faddr_sect
!= NULL
)
1685 struct obj_section
*osect
;
1686 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1688 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
1692 if (osect
< faddr_sect
->objfile
->sections_end
)
1697 while (addr
< osect
->endaddr
)
1703 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1706 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
1708 if (faddr
== faddr2
)
1718 /* Attempt to find a function descriptor corresponding to the
1719 given address. If none is found, construct one on the
1720 stack using the address at fdaptr */
1723 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
1727 fdesc
= find_extant_func_descr (faddr
);
1731 CORE_ADDR global_pointer
;
1737 global_pointer
= FIND_GLOBAL_POINTER (faddr
);
1739 if (global_pointer
== 0)
1740 global_pointer
= read_register (IA64_GR1_REGNUM
);
1742 store_address (buf
, 8, faddr
);
1743 store_address (buf
+ 8, 8, global_pointer
);
1745 write_memory (fdesc
, buf
, 16);
1752 ia64_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
1753 int struct_return
, CORE_ADDR struct_addr
)
1759 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
1761 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
;
1765 /* Count the number of slots needed for the arguments */
1766 for (argno
= 0; argno
< nargs
; argno
++)
1769 type
= check_typedef (VALUE_TYPE (arg
));
1770 len
= TYPE_LENGTH (type
);
1772 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
1775 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
1778 nslots
+= (len
+ 7) / 8;
1781 /* Divvy up the slots between the RSE and the memory stack */
1782 rseslots
= (nslots
> 8) ? 8 : nslots
;
1783 memslots
= nslots
- rseslots
;
1785 /* Allocate a new RSE frame */
1786 cfm
= read_register (IA64_CFM_REGNUM
);
1788 bsp
= read_register (IA64_BSP_REGNUM
);
1789 bsp
= rse_address_add (bsp
, cfm
& 0x7f);
1790 new_bsp
= rse_address_add (bsp
, rseslots
);
1791 write_register (IA64_BSP_REGNUM
, new_bsp
);
1793 pfs
= read_register (IA64_PFS_REGNUM
);
1794 pfs
&= 0xc000000000000000LL
;
1795 pfs
|= (cfm
& 0xffffffffffffLL
);
1796 write_register (IA64_PFS_REGNUM
, pfs
);
1798 cfm
&= 0xc000000000000000LL
;
1800 write_register (IA64_CFM_REGNUM
, cfm
);
1802 /* We will attempt to find function descriptors in the .opd segment,
1803 but if we can't we'll construct them ourselves. That being the
1804 case, we'll need to reserve space on the stack for them. */
1805 funcdescaddr
= sp
- nfuncargs
* 16;
1806 funcdescaddr
&= ~0xfLL
;
1808 /* Adjust the stack pointer to it's new value. The calling conventions
1809 require us to have 16 bytes of scratch, plus whatever space is
1810 necessary for the memory slots and our function descriptors */
1811 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
1812 sp
&= ~0xfLL
; /* Maintain 16 byte alignment */
1814 /* Place the arguments where they belong. The arguments will be
1815 either placed in the RSE backing store or on the memory stack.
1816 In addition, floating point arguments or HFAs are placed in
1817 floating point registers. */
1819 floatreg
= IA64_FR8_REGNUM
;
1820 for (argno
= 0; argno
< nargs
; argno
++)
1822 struct type
*float_elt_type
;
1825 type
= check_typedef (VALUE_TYPE (arg
));
1826 len
= TYPE_LENGTH (type
);
1828 /* Special handling for function parameters */
1830 && TYPE_CODE (type
) == TYPE_CODE_PTR
1831 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
1835 store_address (val_buf
, 8,
1836 find_func_descr (extract_address (VALUE_CONTENTS (arg
), 8),
1838 if (slotnum
< rseslots
)
1839 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1841 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1848 /* Skip odd slot if necessary... */
1849 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
1857 memset (val_buf
, 0, 8);
1858 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
1860 if (slotnum
< rseslots
)
1861 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1863 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1870 /* Handle floating point types (including HFAs) */
1871 float_elt_type
= is_float_or_hfa_type (type
);
1872 if (float_elt_type
!= NULL
)
1875 len
= TYPE_LENGTH (type
);
1876 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
1878 ia64_register_convert_to_raw (
1881 VALUE_CONTENTS (arg
) + argoffset
,
1882 ®isters
[REGISTER_BYTE (floatreg
)]);
1884 argoffset
+= TYPE_LENGTH (float_elt_type
);
1885 len
-= TYPE_LENGTH (float_elt_type
);
1890 /* Store the struct return value in r8 if necessary. */
1893 store_address (®isters
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1894 REGISTER_RAW_SIZE (IA64_GR8_REGNUM
),
1898 /* Sync gdb's idea of what the registers are with the target. */
1899 target_store_registers (-1);
1901 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1902 to be defined to call generic_save_dummy_frame_tos(). But at the
1903 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1904 I chose to put this call here instead of using the old mechanisms.
1905 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1908 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1910 to ia64_gdbarch_init() and remove the line below. */
1911 generic_save_dummy_frame_tos (sp
);
1917 ia64_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1919 CORE_ADDR global_pointer
= FIND_GLOBAL_POINTER (pc
);
1921 if (global_pointer
!= 0)
1922 write_register (IA64_GR1_REGNUM
, global_pointer
);
1924 write_register (IA64_BR0_REGNUM
, CALL_DUMMY_ADDRESS ());
1929 ia64_store_return_value (struct type
*type
, char *valbuf
)
1931 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1933 ia64_register_convert_to_raw (type
, IA64_FR8_REGNUM
, valbuf
,
1934 ®isters
[REGISTER_BYTE (IA64_FR8_REGNUM
)]);
1935 target_store_registers (IA64_FR8_REGNUM
);
1938 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM
),
1939 valbuf
, TYPE_LENGTH (type
));
1943 ia64_pop_frame (void)
1945 generic_pop_current_frame (ia64_pop_frame_regular
);
1949 ia64_pop_frame_regular (struct frame_info
*frame
)
1952 CORE_ADDR bsp
, cfm
, pfs
;
1954 FRAME_INIT_SAVED_REGS (frame
);
1956 for (regno
= 0; regno
< ia64_num_regs
; regno
++)
1958 if (frame
->saved_regs
[regno
]
1959 && (!(IA64_GR32_REGNUM
<= regno
&& regno
<= IA64_GR127_REGNUM
))
1960 && regno
!= pc_regnum
1961 && regno
!= sp_regnum
1962 && regno
!= IA64_PFS_REGNUM
1963 && regno
!= IA64_CFM_REGNUM
1964 && regno
!= IA64_BSP_REGNUM
1965 && regno
!= IA64_BSPSTORE_REGNUM
)
1967 write_register (regno
,
1968 read_memory_integer (frame
->saved_regs
[regno
],
1969 REGISTER_RAW_SIZE (regno
)));
1973 write_register (sp_regnum
, FRAME_CHAIN (frame
));
1974 write_pc (FRAME_SAVED_PC (frame
));
1976 cfm
= read_register (IA64_CFM_REGNUM
);
1978 if (frame
->saved_regs
[IA64_PFS_REGNUM
])
1980 pfs
= read_memory_integer (frame
->saved_regs
[IA64_PFS_REGNUM
],
1981 REGISTER_RAW_SIZE (IA64_PFS_REGNUM
));
1984 pfs
= read_register (IA64_PFS_REGNUM
);
1986 /* Compute the new bsp by *adding* the difference between the
1987 size of the frame and the size of the locals (both wrt the
1988 frame that we're going back to). This seems kind of strange,
1989 especially since it seems like we ought to be subtracting the
1990 size of the locals... and we should; but the linux kernel
1991 wants bsp to be set at the end of all used registers. It's
1992 likely that this code will need to be revised to accomodate
1993 other operating systems. */
1994 bsp
= rse_address_add (frame
->extra_info
->bsp
,
1995 (pfs
& 0x7f) - ((pfs
>> 7) & 0x7f));
1996 write_register (IA64_BSP_REGNUM
, bsp
);
1998 /* FIXME: What becomes of the epilog count in the PFS? */
1999 cfm
= (cfm
& ~0xffffffffffffLL
) | (pfs
& 0xffffffffffffLL
);
2000 write_register (IA64_CFM_REGNUM
, cfm
);
2002 flush_cached_frames ();
2006 ia64_remote_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
2007 CORE_ADDR
*targ_addr
, int *targ_len
)
2009 *targ_addr
= memaddr
;
2010 *targ_len
= nr_bytes
;
2014 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
2016 int *os_ident_ptr
= obj
;
2018 unsigned int sectsize
;
2020 name
= bfd_get_section_name (abfd
, sect
);
2021 sectsize
= bfd_section_size (abfd
, sect
);
2022 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
2024 unsigned int name_length
, data_length
, note_type
;
2025 char *note
= alloca (sectsize
);
2027 bfd_get_section_contents (abfd
, sect
, note
,
2028 (file_ptr
) 0, (bfd_size_type
) sectsize
);
2030 name_length
= bfd_h_get_32 (abfd
, note
);
2031 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
2032 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
2034 if (name_length
== 4 && data_length
== 16 && note_type
== 1
2035 && strcmp (note
+ 12, "GNU") == 0)
2037 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
2039 /* The case numbers are from abi-tags in glibc */
2043 *os_ident_ptr
= ELFOSABI_LINUX
;
2046 *os_ident_ptr
= ELFOSABI_HURD
;
2049 *os_ident_ptr
= ELFOSABI_SOLARIS
;
2052 internal_error (__FILE__
, __LINE__
,
2053 "process_note_abi_sections: unknown OS number %d", os_number
);
2060 static struct gdbarch
*
2061 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2063 struct gdbarch
*gdbarch
;
2064 struct gdbarch_tdep
*tdep
;
2067 if (info
.abfd
!= NULL
2068 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
2070 os_ident
= elf_elfheader (info
.abfd
)->e_ident
[EI_OSABI
];
2072 /* If os_ident is 0, it is not necessarily the case that we're on a
2073 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
2074 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
2075 zero. So we have to check for note sections too. */
2078 bfd_map_over_sections (info
.abfd
,
2079 process_note_abi_tag_sections
,
2086 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2088 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2090 if (gdbarch_tdep (current_gdbarch
)->os_ident
!= os_ident
)
2092 return arches
->gdbarch
;
2095 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2096 gdbarch
= gdbarch_alloc (&info
, tdep
);
2097 tdep
->os_ident
= os_ident
;
2100 /* Set the method of obtaining the sigcontext addresses at which
2101 registers are saved. The method of checking to see if
2102 native_find_global_pointer is nonzero to indicate that we're
2103 on AIX is kind of hokey, but I can't think of a better way
2105 if (os_ident
== ELFOSABI_LINUX
)
2106 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
2107 else if (native_find_global_pointer
!= 0)
2108 tdep
->sigcontext_register_address
= ia64_aix_sigcontext_register_address
;
2110 tdep
->sigcontext_register_address
= 0;
2112 /* We know that Linux won't have to resort to the native_find_global_pointer
2113 hackery. But that's the only one we know about so far, so if
2114 native_find_global_pointer is set to something non-zero, then use
2115 it. Otherwise fall back to using generic_elf_find_global_pointer.
2116 This arrangement should (in theory) allow us to cross debug Linux
2117 binaries from an AIX machine. */
2118 if (os_ident
== ELFOSABI_LINUX
)
2119 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
2120 else if (native_find_global_pointer
!= 0)
2121 tdep
->find_global_pointer
= native_find_global_pointer
;
2123 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
2125 set_gdbarch_short_bit (gdbarch
, 16);
2126 set_gdbarch_int_bit (gdbarch
, 32);
2127 set_gdbarch_long_bit (gdbarch
, 64);
2128 set_gdbarch_long_long_bit (gdbarch
, 64);
2129 set_gdbarch_float_bit (gdbarch
, 32);
2130 set_gdbarch_double_bit (gdbarch
, 64);
2131 set_gdbarch_long_double_bit (gdbarch
, 64);
2132 set_gdbarch_ptr_bit (gdbarch
, 64);
2134 set_gdbarch_num_regs (gdbarch
, ia64_num_regs
);
2135 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
2136 set_gdbarch_fp_regnum (gdbarch
, fp_regnum
);
2137 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
2138 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
2140 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
2141 set_gdbarch_register_size (gdbarch
, 8);
2142 set_gdbarch_register_bytes (gdbarch
, ia64_num_regs
* 8 + 128*8);
2143 set_gdbarch_register_byte (gdbarch
, ia64_register_byte
);
2144 set_gdbarch_register_raw_size (gdbarch
, ia64_register_raw_size
);
2145 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2146 set_gdbarch_register_virtual_size (gdbarch
, ia64_register_virtual_size
);
2147 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2148 set_gdbarch_register_virtual_type (gdbarch
, ia64_register_virtual_type
);
2150 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
2152 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2153 set_gdbarch_frameless_function_invocation (gdbarch
, ia64_frameless_function_invocation
);
2155 set_gdbarch_saved_pc_after_call (gdbarch
, ia64_saved_pc_after_call
);
2157 set_gdbarch_frame_chain (gdbarch
, ia64_frame_chain
);
2158 set_gdbarch_frame_chain_valid (gdbarch
, generic_func_frame_chain_valid
);
2159 set_gdbarch_frame_saved_pc (gdbarch
, ia64_frame_saved_pc
);
2161 set_gdbarch_frame_init_saved_regs (gdbarch
, ia64_frame_init_saved_regs
);
2162 set_gdbarch_get_saved_register (gdbarch
, ia64_get_saved_register
);
2164 set_gdbarch_register_convertible (gdbarch
, ia64_register_convertible
);
2165 set_gdbarch_register_convert_to_virtual (gdbarch
, ia64_register_convert_to_virtual
);
2166 set_gdbarch_register_convert_to_raw (gdbarch
, ia64_register_convert_to_raw
);
2168 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
2169 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
2171 set_gdbarch_store_struct_return (gdbarch
, ia64_store_struct_return
);
2172 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
2173 set_gdbarch_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
2175 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
2176 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
2177 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
2178 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
2179 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
2181 /* Settings for calling functions in the inferior. */
2182 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2183 set_gdbarch_call_dummy_length (gdbarch
, 0);
2184 set_gdbarch_push_arguments (gdbarch
, ia64_push_arguments
);
2185 set_gdbarch_push_return_address (gdbarch
, ia64_push_return_address
);
2186 set_gdbarch_pop_frame (gdbarch
, ia64_pop_frame
);
2188 set_gdbarch_call_dummy_p (gdbarch
, 1);
2189 set_gdbarch_call_dummy_words (gdbarch
, ia64_call_dummy_words
);
2190 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (ia64_call_dummy_words
));
2191 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2192 set_gdbarch_init_extra_frame_info (gdbarch
, ia64_init_extra_frame_info
);
2193 set_gdbarch_frame_args_address (gdbarch
, ia64_frame_args_address
);
2194 set_gdbarch_frame_locals_address (gdbarch
, ia64_frame_locals_address
);
2196 /* We won't necessarily have a frame pointer and even if we do,
2197 it winds up being extraordinarly messy when attempting to find
2198 the frame chain. So for the purposes of creating frames (which
2199 is all read_fp() is used for), simply use the stack pointer value
2201 set_gdbarch_read_fp (gdbarch
, generic_target_read_sp
);
2202 set_gdbarch_write_fp (gdbarch
, generic_target_write_sp
);
2204 /* Settings that should be unnecessary. */
2205 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2207 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2208 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2210 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2211 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2212 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2213 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2214 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2215 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2216 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2217 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
2219 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2220 set_gdbarch_function_start_offset (gdbarch
, 0);
2222 set_gdbarch_remote_translate_xfer_address (
2223 gdbarch
, ia64_remote_translate_xfer_address
);
2229 _initialize_ia64_tdep (void)
2231 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);
2233 tm_print_insn
= print_insn_ia64
;
2234 tm_print_insn_info
.bytes_per_line
= SLOT_MULTIPLIER
;