1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
278 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
279 struct reggroup
*group
)
284 if (group
== all_reggroup
)
286 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
287 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
288 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
289 if (group
== float_reggroup
)
291 if (group
== vector_reggroup
)
293 if (group
== general_reggroup
)
294 return (!vector_p
&& !float_p
);
295 if (group
== save_reggroup
|| group
== restore_reggroup
)
301 ia64_register_name (int reg
)
303 return ia64_register_names
[reg
];
307 ia64_register_type (struct gdbarch
*arch
, int reg
)
309 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
310 return builtin_type_ia64_ext
;
312 return builtin_type_long
;
316 ia64_dwarf_reg_to_regnum (int reg
)
318 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
319 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
324 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
329 const struct floatformat floatformat_ia64_ext
=
331 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
332 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
335 const struct floatformat
*floatformats_ia64_ext
[2] =
337 &floatformat_ia64_ext
,
338 &floatformat_ia64_ext
342 /* Extract ``len'' bits from an instruction bundle starting at
346 extract_bit_field (char *bundle
, int from
, int len
)
348 long long result
= 0LL;
350 int from_byte
= from
/ 8;
351 int to_byte
= to
/ 8;
352 unsigned char *b
= (unsigned char *) bundle
;
358 if (from_byte
== to_byte
)
359 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
360 result
= c
>> (from
% 8);
361 lshift
= 8 - (from
% 8);
363 for (i
= from_byte
+1; i
< to_byte
; i
++)
365 result
|= ((long long) b
[i
]) << lshift
;
369 if (from_byte
< to_byte
&& (to
% 8 != 0))
372 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
373 result
|= ((long long) c
) << lshift
;
379 /* Replace the specified bits in an instruction bundle */
382 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
385 int from_byte
= from
/ 8;
386 int to_byte
= to
/ 8;
387 unsigned char *b
= (unsigned char *) bundle
;
390 if (from_byte
== to_byte
)
392 unsigned char left
, right
;
394 left
= (c
>> (to
% 8)) << (to
% 8);
395 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
396 c
= (unsigned char) (val
& 0xff);
397 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
405 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
406 c
= c
| (val
<< (from
% 8));
408 val
>>= 8 - from
% 8;
410 for (i
= from_byte
+1; i
< to_byte
; i
++)
419 unsigned char cv
= (unsigned char) val
;
421 c
= c
>> (to
% 8) << (to
% 8);
422 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
428 /* Return the contents of slot N (for N = 0, 1, or 2) in
429 and instruction bundle */
432 slotN_contents (char *bundle
, int slotnum
)
434 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
437 /* Store an instruction in an instruction bundle */
440 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
442 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
445 static enum instruction_type template_encoding_table
[32][3] =
447 { M
, I
, I
}, /* 00 */
448 { M
, I
, I
}, /* 01 */
449 { M
, I
, I
}, /* 02 */
450 { M
, I
, I
}, /* 03 */
451 { M
, L
, X
}, /* 04 */
452 { M
, L
, X
}, /* 05 */
453 { undefined
, undefined
, undefined
}, /* 06 */
454 { undefined
, undefined
, undefined
}, /* 07 */
455 { M
, M
, I
}, /* 08 */
456 { M
, M
, I
}, /* 09 */
457 { M
, M
, I
}, /* 0A */
458 { M
, M
, I
}, /* 0B */
459 { M
, F
, I
}, /* 0C */
460 { M
, F
, I
}, /* 0D */
461 { M
, M
, F
}, /* 0E */
462 { M
, M
, F
}, /* 0F */
463 { M
, I
, B
}, /* 10 */
464 { M
, I
, B
}, /* 11 */
465 { M
, B
, B
}, /* 12 */
466 { M
, B
, B
}, /* 13 */
467 { undefined
, undefined
, undefined
}, /* 14 */
468 { undefined
, undefined
, undefined
}, /* 15 */
469 { B
, B
, B
}, /* 16 */
470 { B
, B
, B
}, /* 17 */
471 { M
, M
, B
}, /* 18 */
472 { M
, M
, B
}, /* 19 */
473 { undefined
, undefined
, undefined
}, /* 1A */
474 { undefined
, undefined
, undefined
}, /* 1B */
475 { M
, F
, B
}, /* 1C */
476 { M
, F
, B
}, /* 1D */
477 { undefined
, undefined
, undefined
}, /* 1E */
478 { undefined
, undefined
, undefined
}, /* 1F */
481 /* Fetch and (partially) decode an instruction at ADDR and return the
482 address of the next instruction to fetch. */
485 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
487 char bundle
[BUNDLE_LEN
];
488 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
492 /* Warn about slot numbers greater than 2. We used to generate
493 an error here on the assumption that the user entered an invalid
494 address. But, sometimes GDB itself requests an invalid address.
495 This can (easily) happen when execution stops in a function for
496 which there are no symbols. The prologue scanner will attempt to
497 find the beginning of the function - if the nearest symbol
498 happens to not be aligned on a bundle boundary (16 bytes), the
499 resulting starting address will cause GDB to think that the slot
502 So we warn about it and set the slot number to zero. It is
503 not necessarily a fatal condition, particularly if debugging
504 at the assembly language level. */
507 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
508 "Using slot 0 instead"));
514 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
519 *instr
= slotN_contents (bundle
, slotnum
);
520 template = extract_bit_field (bundle
, 0, 5);
521 *it
= template_encoding_table
[(int)template][slotnum
];
523 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
526 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
531 /* There are 5 different break instructions (break.i, break.b,
532 break.m, break.f, and break.x), but they all have the same
533 encoding. (The five bit template in the low five bits of the
534 instruction bundle distinguishes one from another.)
536 The runtime architecture manual specifies that break instructions
537 used for debugging purposes must have the upper two bits of the 21
538 bit immediate set to a 0 and a 1 respectively. A breakpoint
539 instruction encodes the most significant bit of its 21 bit
540 immediate at bit 36 of the 41 bit instruction. The penultimate msb
541 is at bit 25 which leads to the pattern below.
543 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
544 it turns out that 0x80000 was used as the syscall break in the early
545 simulators. So I changed the pattern slightly to do "break.i 0x080001"
546 instead. But that didn't work either (I later found out that this
547 pattern was used by the simulator that I was using.) So I ended up
548 using the pattern seen below. */
551 #define IA64_BREAKPOINT 0x00002000040LL
553 #define IA64_BREAKPOINT 0x00003333300LL
556 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
558 CORE_ADDR addr
= bp_tgt
->placed_address
;
559 char bundle
[BUNDLE_LEN
];
560 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
566 error (_("Can't insert breakpoint for slot numbers greater than 2."));
570 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
572 /* Check for L type instruction in 2nd slot, if present then
573 bump up the slot number to the 3rd slot */
574 template = extract_bit_field (bundle
, 0, 5);
575 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
580 instr
= slotN_contents (bundle
, slotnum
);
581 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
582 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
583 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
585 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
591 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
593 CORE_ADDR addr
= bp_tgt
->placed_address
;
594 char bundle
[BUNDLE_LEN
];
595 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
602 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
604 /* Check for L type instruction in 2nd slot, if present then
605 bump up the slot number to the 3rd slot */
606 template = extract_bit_field (bundle
, 0, 5);
607 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
612 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
613 replace_slotN_contents (bundle
, instr
, slotnum
);
615 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
620 /* We don't really want to use this, but remote.c needs to call it in order
621 to figure out if Z-packets are supported or not. Oh, well. */
622 const unsigned char *
623 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
625 static unsigned char breakpoint
[] =
626 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
627 *lenptr
= sizeof (breakpoint
);
635 ia64_read_pc (struct regcache
*regcache
)
637 ULONGEST psr_value
, pc_value
;
640 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
641 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
642 slot_num
= (psr_value
>> 41) & 3;
644 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
648 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
650 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
653 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
654 psr_value
&= ~(3LL << 41);
655 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
659 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
660 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
663 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
665 /* Returns the address of the slot that's NSLOTS slots away from
666 the address ADDR. NSLOTS may be positive or negative. */
668 rse_address_add(CORE_ADDR addr
, int nslots
)
671 int mandatory_nat_slots
= nslots
/ 63;
672 int direction
= nslots
< 0 ? -1 : 1;
674 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
676 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
677 new_addr
+= 8 * direction
;
679 if (IS_NaT_COLLECTION_ADDR(new_addr
))
680 new_addr
+= 8 * direction
;
686 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
687 int regnum
, gdb_byte
*buf
)
689 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
691 #ifdef HAVE_LIBUNWIND_IA64_H
692 /* First try and use the libunwind special reg accessor, otherwise fallback to
694 if (!libunwind_is_initialized ()
695 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
698 /* The fallback position is to assume that r32-r127 are found sequentially
699 in memory starting at $bof. This isn't always true, but without libunwind,
700 this is the best we can do. */
704 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
705 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
707 /* The bsp points at the end of the register frame so we
708 subtract the size of frame from it to get start of register frame. */
709 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
711 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
713 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
714 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
715 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), reg
);
718 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), 0);
721 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
725 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
726 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
727 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), unatN_val
);
729 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
731 ULONGEST natN_val
= 0;
734 CORE_ADDR gr_addr
= 0;
735 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
736 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
738 /* The bsp points at the end of the register frame so we
739 subtract the size of frame from it to get start of register frame. */
740 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
742 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
743 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
747 /* Compute address of nat collection bits. */
748 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
749 CORE_ADDR nat_collection
;
751 /* If our nat collection address is bigger than bsp, we have to get
752 the nat collection from rnat. Otherwise, we fetch the nat
753 collection from the computed address. */
755 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
757 nat_collection
= read_memory_integer (nat_addr
, 8);
758 nat_bit
= (gr_addr
>> 3) & 0x3f;
759 natN_val
= (nat_collection
>> nat_bit
) & 1;
762 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), natN_val
);
764 else if (regnum
== VBOF_REGNUM
)
766 /* A virtual register frame start is provided for user convenience.
767 It can be calculated as the bsp - sof (sizeof frame). */
771 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
772 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
774 /* The bsp points at the end of the register frame so we
775 subtract the size of frame from it to get beginning of frame. */
776 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
777 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), vbsp
);
779 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
785 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
786 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
788 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
790 /* Fetch predicate register rename base from current frame
791 marker for this frame. */
792 int rrb_pr
= (cfm
>> 32) & 0x3f;
794 /* Adjust the register number to account for register rotation. */
796 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
798 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
799 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), prN_val
);
802 memset (buf
, 0, register_size (gdbarch
, regnum
));
806 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
807 int regnum
, const gdb_byte
*buf
)
809 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
814 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
815 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
817 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
819 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
821 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
822 write_memory (reg_addr
, (void *)buf
, 8);
825 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
827 ULONGEST unatN_val
, unat
, unatN_mask
;
828 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
829 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
830 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
833 else if (unatN_val
== 1)
835 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
837 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
842 CORE_ADDR gr_addr
= 0;
843 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
844 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
846 /* The bsp points at the end of the register frame so we
847 subtract the size of frame from it to get start of register frame. */
848 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
850 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
851 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
853 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
855 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
857 /* Compute address of nat collection bits. */
858 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
859 CORE_ADDR nat_collection
;
860 int natN_bit
= (gr_addr
>> 3) & 0x3f;
861 ULONGEST natN_mask
= (1LL << natN_bit
);
862 /* If our nat collection address is bigger than bsp, we have to get
863 the nat collection from rnat. Otherwise, we fetch the nat
864 collection from the computed address. */
867 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
869 nat_collection
|= natN_mask
;
871 nat_collection
&= ~natN_mask
;
872 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
877 nat_collection
= read_memory_integer (nat_addr
, 8);
879 nat_collection
|= natN_mask
;
881 nat_collection
&= ~natN_mask
;
882 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
), nat_collection
);
883 write_memory (nat_addr
, nat_buf
, 8);
887 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
894 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
895 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
897 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
899 /* Fetch predicate register rename base from current frame
900 marker for this frame. */
901 int rrb_pr
= (cfm
>> 32) & 0x3f;
903 /* Adjust the register number to account for register rotation. */
905 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
907 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
908 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
911 else if (prN_val
== 1)
913 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
917 /* The ia64 needs to convert between various ieee floating-point formats
918 and the special ia64 floating point register format. */
921 ia64_convert_register_p (int regno
, struct type
*type
)
923 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
924 && type
!= builtin_type_ia64_ext
);
928 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
929 struct type
*valtype
, gdb_byte
*out
)
931 char in
[MAX_REGISTER_SIZE
];
932 frame_register_read (frame
, regnum
, in
);
933 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
937 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
938 struct type
*valtype
, const gdb_byte
*in
)
940 char out
[MAX_REGISTER_SIZE
];
941 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
942 put_frame_register (frame
, regnum
, out
);
946 /* Limit the number of skipped non-prologue instructions since examining
947 of the prologue is expensive. */
948 static int max_skip_non_prologue_insns
= 40;
950 /* Given PC representing the starting address of a function, and
951 LIM_PC which is the (sloppy) limit to which to scan when looking
952 for a prologue, attempt to further refine this limit by using
953 the line data in the symbol table. If successful, a better guess
954 on where the prologue ends is returned, otherwise the previous
955 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
956 which will be set to indicate whether the returned limit may be
957 used with no further scanning in the event that the function is
960 /* FIXME: cagney/2004-02-14: This function and logic have largely been
961 superseded by skip_prologue_using_sal. */
964 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
966 struct symtab_and_line prologue_sal
;
967 CORE_ADDR start_pc
= pc
;
970 /* The prologue can not possibly go past the function end itself,
971 so we can already adjust LIM_PC accordingly. */
972 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
975 /* Start off not trusting the limit. */
978 prologue_sal
= find_pc_line (pc
, 0);
979 if (prologue_sal
.line
!= 0)
982 CORE_ADDR addr
= prologue_sal
.end
;
984 /* Handle the case in which compiler's optimizer/scheduler
985 has moved instructions into the prologue. We scan ahead
986 in the function looking for address ranges whose corresponding
987 line number is less than or equal to the first one that we
988 found for the function. (It can be less than when the
989 scheduler puts a body instruction before the first prologue
991 for (i
= 2 * max_skip_non_prologue_insns
;
992 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
995 struct symtab_and_line sal
;
997 sal
= find_pc_line (addr
, 0);
1000 if (sal
.line
<= prologue_sal
.line
1001 && sal
.symtab
== prologue_sal
.symtab
)
1008 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1010 lim_pc
= prologue_sal
.end
;
1011 if (start_pc
== get_pc_function_start (lim_pc
))
1018 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1019 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1020 || (14 <= (_regnum_) && (_regnum_) <= 31))
1021 #define imm9(_instr_) \
1022 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1023 | (((_instr_) & 0x00008000000LL) >> 20) \
1024 | (((_instr_) & 0x00000001fc0LL) >> 6))
1026 /* Allocate and initialize a frame cache. */
1028 static struct ia64_frame_cache
*
1029 ia64_alloc_frame_cache (void)
1031 struct ia64_frame_cache
*cache
;
1034 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1040 cache
->prev_cfm
= 0;
1046 cache
->frameless
= 1;
1048 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1049 cache
->saved_regs
[i
] = 0;
1055 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1058 CORE_ADDR last_prologue_pc
= pc
;
1059 instruction_type it
;
1064 int unat_save_reg
= 0;
1065 int pr_save_reg
= 0;
1066 int mem_stack_frame_size
= 0;
1068 CORE_ADDR spill_addr
= 0;
1071 char reg_contents
[256];
1077 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1079 memset (instores
, 0, sizeof instores
);
1080 memset (infpstores
, 0, sizeof infpstores
);
1081 memset (reg_contents
, 0, sizeof reg_contents
);
1083 if (cache
->after_prologue
!= 0
1084 && cache
->after_prologue
<= lim_pc
)
1085 return cache
->after_prologue
;
1087 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1088 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1090 /* We want to check if we have a recognizable function start before we
1091 look ahead for a prologue. */
1092 if (pc
< lim_pc
&& next_pc
1093 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1095 /* alloc - start of a regular function. */
1096 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1097 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1098 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1099 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1101 /* Verify that the current cfm matches what we think is the
1102 function start. If we have somehow jumped within a function,
1103 we do not want to interpret the prologue and calculate the
1104 addresses of various registers such as the return address.
1105 We will instead treat the frame as frameless. */
1107 (sof
== (cache
->cfm
& 0x7f) &&
1108 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1112 last_prologue_pc
= next_pc
;
1117 /* Look for a leaf routine. */
1118 if (pc
< lim_pc
&& next_pc
1119 && (it
== I
|| it
== M
)
1120 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1122 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1123 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1124 | ((instr
& 0x001f8000000LL
) >> 20)
1125 | ((instr
& 0x000000fe000LL
) >> 13));
1126 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1127 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1128 int qp
= (int) (instr
& 0x0000000003fLL
);
1129 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1131 /* mov r2, r12 - beginning of leaf routine */
1133 last_prologue_pc
= next_pc
;
1137 /* If we don't recognize a regular function or leaf routine, we are
1143 last_prologue_pc
= lim_pc
;
1147 /* Loop, looking for prologue instructions, keeping track of
1148 where preserved registers were spilled. */
1151 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1155 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1157 /* Exit loop upon hitting a non-nop branch instruction. */
1162 else if (((instr
& 0x3fLL
) != 0LL) &&
1163 (frameless
|| ret_reg
!= 0))
1165 /* Exit loop upon hitting a predicated instruction if
1166 we already have the return register or if we are frameless. */
1171 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1174 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1175 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1176 int qp
= (int) (instr
& 0x0000000003f);
1178 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1181 last_prologue_pc
= next_pc
;
1184 else if ((it
== I
|| it
== M
)
1185 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1187 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1188 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1189 | ((instr
& 0x001f8000000LL
) >> 20)
1190 | ((instr
& 0x000000fe000LL
) >> 13));
1191 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1192 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1193 int qp
= (int) (instr
& 0x0000000003fLL
);
1195 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1199 last_prologue_pc
= next_pc
;
1201 else if (qp
== 0 && rN
== 12 && rM
== 12)
1203 /* adds r12, -mem_stack_frame_size, r12 */
1204 mem_stack_frame_size
-= imm
;
1205 last_prologue_pc
= next_pc
;
1207 else if (qp
== 0 && rN
== 2
1208 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1210 char buf
[MAX_REGISTER_SIZE
];
1211 CORE_ADDR saved_sp
= 0;
1212 /* adds r2, spilloffset, rFramePointer
1214 adds r2, spilloffset, r12
1216 Get ready for stf.spill or st8.spill instructions.
1217 The address to start spilling at is loaded into r2.
1218 FIXME: Why r2? That's what gcc currently uses; it
1219 could well be different for other compilers. */
1221 /* Hmm... whether or not this will work will depend on
1222 where the pc is. If it's still early in the prologue
1223 this'll be wrong. FIXME */
1226 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1227 saved_sp
= extract_unsigned_integer (buf
, 8);
1229 spill_addr
= saved_sp
1230 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1233 last_prologue_pc
= next_pc
;
1235 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1236 rN
< 256 && imm
== 0)
1238 /* mov rN, rM where rM is an input register */
1239 reg_contents
[rN
] = rM
;
1240 last_prologue_pc
= next_pc
;
1242 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1246 last_prologue_pc
= next_pc
;
1251 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1252 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1254 /* stf.spill [rN] = fM, imm9
1256 stf.spill [rN] = fM */
1258 int imm
= imm9(instr
);
1259 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1260 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1261 int qp
= (int) (instr
& 0x0000000003fLL
);
1262 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1263 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1265 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1267 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1270 spill_addr
= 0; /* last one; must be done */
1271 last_prologue_pc
= next_pc
;
1274 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1275 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1281 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1282 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1283 int qp
= (int) (instr
& 0x0000000003fLL
);
1284 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1286 /* We have something like "mov.m r3 = ar.unat". Remember the
1287 r3 (or whatever) and watch for a store of this register... */
1289 last_prologue_pc
= next_pc
;
1292 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1295 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1296 int qp
= (int) (instr
& 0x0000000003fLL
);
1297 if (qp
== 0 && isScratch (rN
))
1300 last_prologue_pc
= next_pc
;
1304 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1305 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1309 st8 [rN] = rM, imm9 */
1310 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1311 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1312 int qp
= (int) (instr
& 0x0000000003fLL
);
1313 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1314 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1315 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1317 /* We've found a spill of either the UNAT register or the PR
1318 register. (Well, not exactly; what we've actually found is
1319 a spill of the register that UNAT or PR was moved to).
1320 Record that fact and move on... */
1321 if (rM
== unat_save_reg
)
1323 /* Track UNAT register */
1324 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1329 /* Track PR register */
1330 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1333 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1334 /* st8 [rN] = rM, imm9 */
1335 spill_addr
+= imm9(instr
);
1337 spill_addr
= 0; /* must be done spilling */
1338 last_prologue_pc
= next_pc
;
1340 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1342 /* Allow up to one store of each input register. */
1343 instores
[rM
-32] = 1;
1344 last_prologue_pc
= next_pc
;
1346 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1347 !instores
[indirect
-32])
1349 /* Allow an indirect store of an input register. */
1350 instores
[indirect
-32] = 1;
1351 last_prologue_pc
= next_pc
;
1354 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1361 Note that the st8 case is handled in the clause above.
1363 Advance over stores of input registers. One store per input
1364 register is permitted. */
1365 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1366 int qp
= (int) (instr
& 0x0000000003fLL
);
1367 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1368 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1370 instores
[rM
-32] = 1;
1371 last_prologue_pc
= next_pc
;
1373 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1374 !instores
[indirect
-32])
1376 /* Allow an indirect store of an input register. */
1377 instores
[indirect
-32] = 1;
1378 last_prologue_pc
= next_pc
;
1381 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1388 Advance over stores of floating point input registers. Again
1389 one store per register is permitted */
1390 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1391 int qp
= (int) (instr
& 0x0000000003fLL
);
1392 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1394 infpstores
[fM
-8] = 1;
1395 last_prologue_pc
= next_pc
;
1399 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1400 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1402 /* st8.spill [rN] = rM
1404 st8.spill [rN] = rM, imm9 */
1405 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1406 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1407 int qp
= (int) (instr
& 0x0000000003fLL
);
1408 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1410 /* We've found a spill of one of the preserved general purpose
1411 regs. Record the spill address and advance the spill
1412 register if appropriate. */
1413 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1414 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1415 /* st8.spill [rN] = rM, imm9 */
1416 spill_addr
+= imm9(instr
);
1418 spill_addr
= 0; /* Done spilling */
1419 last_prologue_pc
= next_pc
;
1426 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1427 registers for the previous frame which will be needed later. */
1429 if (!frameless
&& next_frame
)
1431 /* Extract the size of the rotating portion of the stack
1432 frame and the register rename base from the current
1438 rrb_gr
= (cfm
>> 18) & 0x7f;
1440 /* Find the bof (beginning of frame). */
1441 bof
= rse_address_add (cache
->bsp
, -sof
);
1443 for (i
= 0, addr
= bof
;
1447 if (IS_NaT_COLLECTION_ADDR (addr
))
1451 if (i
+32 == cfm_reg
)
1452 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1453 if (i
+32 == ret_reg
)
1454 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1456 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1459 /* For the previous argument registers we require the previous bof.
1460 If we can't find the previous cfm, then we can do nothing. */
1462 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1464 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1466 else if (cfm_reg
!= 0)
1468 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1469 cfm
= extract_unsigned_integer (buf
, 8);
1471 cache
->prev_cfm
= cfm
;
1475 sor
= ((cfm
>> 14) & 0xf) * 8;
1477 sol
= (cfm
>> 7) & 0x7f;
1478 rrb_gr
= (cfm
>> 18) & 0x7f;
1480 /* The previous bof only requires subtraction of the sol (size of locals)
1481 due to the overlap between output and input of subsequent frames. */
1482 bof
= rse_address_add (bof
, -sol
);
1484 for (i
= 0, addr
= bof
;
1488 if (IS_NaT_COLLECTION_ADDR (addr
))
1493 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1496 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1502 /* Try and trust the lim_pc value whenever possible. */
1503 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1504 last_prologue_pc
= lim_pc
;
1506 cache
->frameless
= frameless
;
1507 cache
->after_prologue
= last_prologue_pc
;
1508 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1509 cache
->fp_reg
= fp_reg
;
1511 return last_prologue_pc
;
1515 ia64_skip_prologue (CORE_ADDR pc
)
1517 struct ia64_frame_cache cache
;
1519 cache
.after_prologue
= 0;
1523 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1524 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1528 /* Normal frames. */
1530 static struct ia64_frame_cache
*
1531 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1533 struct ia64_frame_cache
*cache
;
1535 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1541 cache
= ia64_alloc_frame_cache ();
1542 *this_cache
= cache
;
1544 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1545 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1547 /* We always want the bsp to point to the end of frame.
1548 This way, we can always get the beginning of frame (bof)
1549 by subtracting frame size. */
1550 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1551 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1553 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1554 psr
= extract_unsigned_integer (buf
, 8);
1556 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1557 cfm
= extract_unsigned_integer (buf
, 8);
1559 cache
->sof
= (cfm
& 0x7f);
1560 cache
->sol
= (cfm
>> 7) & 0x7f;
1561 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1565 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1568 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1570 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1576 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1577 struct frame_id
*this_id
)
1579 struct ia64_frame_cache
*cache
=
1580 ia64_frame_cache (next_frame
, this_cache
);
1582 /* If outermost frame, mark with null frame id. */
1583 if (cache
->base
== 0)
1584 (*this_id
) = null_frame_id
;
1586 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1587 if (gdbarch_debug
>= 1)
1588 fprintf_unfiltered (gdb_stdlog
,
1589 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1590 paddr_nz (this_id
->code_addr
),
1591 paddr_nz (this_id
->stack_addr
),
1592 paddr_nz (cache
->bsp
), next_frame
);
1596 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1597 int regnum
, int *optimizedp
,
1598 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1599 int *realnump
, gdb_byte
*valuep
)
1601 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
1602 struct ia64_frame_cache
*cache
=
1603 ia64_frame_cache (next_frame
, this_cache
);
1604 char dummy_valp
[MAX_REGISTER_SIZE
];
1607 gdb_assert (regnum
>= 0);
1609 if (!target_has_registers
)
1610 error (_("No registers."));
1617 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1618 when valuep is not supplied. */
1620 valuep
= dummy_valp
;
1622 memset (valuep
, 0, register_size (gdbarch
, regnum
));
1624 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1626 /* Handle SP values for all frames but the topmost. */
1627 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
1630 else if (regnum
== IA64_BSP_REGNUM
)
1632 char cfm_valuep
[MAX_REGISTER_SIZE
];
1635 enum lval_type cfm_lval
;
1637 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1639 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1640 This corresponds to what the hardware bsp register will be if we pop the frame
1641 back which is why we might have been called. We know the beginning of the current
1642 frame is cache->bsp - cache->sof. This value in the previous frame points to
1643 the start of the output registers. We can calculate the end of that frame by adding
1644 the size of output (sof (size of frame) - sol (size of locals)). */
1645 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1646 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1647 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1649 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1650 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1652 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
1655 else if (regnum
== IA64_CFM_REGNUM
)
1657 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1661 *lvalp
= lval_memory
;
1663 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1665 else if (cache
->prev_cfm
)
1666 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), cache
->prev_cfm
);
1667 else if (cache
->frameless
)
1670 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1673 else if (regnum
== IA64_VFP_REGNUM
)
1675 /* If the function in question uses an automatic register (r32-r127)
1676 for the frame pointer, it'll be found by ia64_find_saved_register()
1677 above. If the function lacks one of these frame pointers, we can
1678 still provide a value since we know the size of the frame. */
1679 CORE_ADDR vfp
= cache
->base
;
1680 store_unsigned_integer (valuep
, register_size (gdbarch
, IA64_VFP_REGNUM
), vfp
);
1682 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1684 char pr_valuep
[MAX_REGISTER_SIZE
];
1687 enum lval_type pr_lval
;
1690 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1691 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1692 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1694 /* Fetch predicate register rename base from current frame
1695 marker for this frame. */
1696 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1698 /* Adjust the register number to account for register rotation. */
1699 regnum
= VP16_REGNUM
1700 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1702 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1703 regnum
- VP0_REGNUM
, 1);
1704 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), prN_val
);
1706 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1708 char unat_valuep
[MAX_REGISTER_SIZE
];
1711 enum lval_type unat_lval
;
1712 CORE_ADDR unat_addr
;
1714 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1715 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1716 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1717 regnum
- IA64_NAT0_REGNUM
, 1);
1718 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
1721 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1724 /* Find address of general register corresponding to nat bit we're
1728 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1732 /* Compute address of nat collection bits. */
1733 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1735 CORE_ADDR nat_collection
;
1737 /* If our nat collection address is bigger than bsp, we have to get
1738 the nat collection from rnat. Otherwise, we fetch the nat
1739 collection from the computed address. */
1740 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1741 bsp
= extract_unsigned_integer (buf
, 8);
1742 if (nat_addr
>= bsp
)
1744 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1745 nat_collection
= extract_unsigned_integer (buf
, 8);
1748 nat_collection
= read_memory_integer (nat_addr
, 8);
1749 nat_bit
= (gr_addr
>> 3) & 0x3f;
1750 natval
= (nat_collection
>> nat_bit
) & 1;
1753 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), natval
);
1755 else if (regnum
== IA64_IP_REGNUM
)
1758 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1762 *lvalp
= lval_memory
;
1764 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1765 pc
= extract_unsigned_integer (buf
, 8);
1767 else if (cache
->frameless
)
1769 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1770 pc
= extract_unsigned_integer (buf
, 8);
1773 store_unsigned_integer (valuep
, 8, pc
);
1775 else if (regnum
== IA64_PSR_REGNUM
)
1777 /* We don't know how to get the complete previous PSR, but we need it for
1778 the slot information when we unwind the pc (pc is formed of IP register
1779 plus slot information from PSR). To get the previous slot information,
1780 we mask it off the return address. */
1781 ULONGEST slot_num
= 0;
1784 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1786 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1787 psr
= extract_unsigned_integer (buf
, 8);
1791 *lvalp
= lval_memory
;
1793 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1794 pc
= extract_unsigned_integer (buf
, 8);
1796 else if (cache
->frameless
)
1799 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1800 pc
= extract_unsigned_integer (buf
, 8);
1802 psr
&= ~(3LL << 41);
1803 slot_num
= pc
& 0x3LL
;
1804 psr
|= (CORE_ADDR
)slot_num
<< 41;
1805 store_unsigned_integer (valuep
, 8, psr
);
1807 else if (regnum
== IA64_BR0_REGNUM
)
1810 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1813 *lvalp
= lval_memory
;
1815 read_memory (addr
, buf
, register_size (gdbarch
, IA64_BR0_REGNUM
));
1816 br0
= extract_unsigned_integer (buf
, 8);
1818 store_unsigned_integer (valuep
, 8, br0
);
1820 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1821 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1824 if (regnum
>= V32_REGNUM
)
1825 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1826 addr
= cache
->saved_regs
[regnum
];
1829 *lvalp
= lval_memory
;
1831 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1833 else if (cache
->frameless
)
1835 char r_valuep
[MAX_REGISTER_SIZE
];
1838 enum lval_type r_lval
;
1840 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1842 if (regnum
>= V32_REGNUM
)
1843 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1844 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1845 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1846 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1847 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1848 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1849 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1850 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1852 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1853 *lvalp
= lval_memory
;
1855 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1861 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1863 /* Fetch floating point register rename base from current
1864 frame marker for this frame. */
1865 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1867 /* Adjust the floating point register number to account for
1868 register rotation. */
1869 regnum
= IA64_FR32_REGNUM
1870 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1873 /* If we have stored a memory address, access the register. */
1874 addr
= cache
->saved_regs
[regnum
];
1877 *lvalp
= lval_memory
;
1879 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1881 /* Otherwise, punt and get the current value of the register. */
1883 frame_unwind_register (next_frame
, regnum
, valuep
);
1886 if (gdbarch_debug
>= 1)
1887 fprintf_unfiltered (gdb_stdlog
,
1888 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1889 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1890 ? ia64_register_names
[regnum
] : "r??"),
1891 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1894 static const struct frame_unwind ia64_frame_unwind
=
1897 &ia64_frame_this_id
,
1898 &ia64_frame_prev_register
1901 static const struct frame_unwind
*
1902 ia64_frame_sniffer (struct frame_info
*next_frame
)
1904 return &ia64_frame_unwind
;
1907 /* Signal trampolines. */
1910 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*next_frame
,
1911 struct ia64_frame_cache
*cache
)
1913 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1915 if (tdep
->sigcontext_register_address
)
1919 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1920 tdep
->sigcontext_register_address (cache
->base
, IA64_IP_REGNUM
);
1921 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1922 tdep
->sigcontext_register_address (cache
->base
, IA64_CFM_REGNUM
);
1923 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1924 tdep
->sigcontext_register_address (cache
->base
, IA64_PSR_REGNUM
);
1925 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1926 tdep
->sigcontext_register_address (cache
->base
, IA64_BSP_REGNUM
);
1927 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1928 tdep
->sigcontext_register_address (cache
->base
, IA64_RNAT_REGNUM
);
1929 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1930 tdep
->sigcontext_register_address (cache
->base
, IA64_CCV_REGNUM
);
1931 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1932 tdep
->sigcontext_register_address (cache
->base
, IA64_UNAT_REGNUM
);
1933 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1934 tdep
->sigcontext_register_address (cache
->base
, IA64_FPSR_REGNUM
);
1935 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1936 tdep
->sigcontext_register_address (cache
->base
, IA64_PFS_REGNUM
);
1937 cache
->saved_regs
[IA64_LC_REGNUM
] =
1938 tdep
->sigcontext_register_address (cache
->base
, IA64_LC_REGNUM
);
1939 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1940 cache
->saved_regs
[regno
] =
1941 tdep
->sigcontext_register_address (cache
->base
, regno
);
1942 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1943 cache
->saved_regs
[regno
] =
1944 tdep
->sigcontext_register_address (cache
->base
, regno
);
1945 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1946 cache
->saved_regs
[regno
] =
1947 tdep
->sigcontext_register_address (cache
->base
, regno
);
1951 static struct ia64_frame_cache
*
1952 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1954 struct ia64_frame_cache
*cache
;
1962 cache
= ia64_alloc_frame_cache ();
1964 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1965 /* Note that frame size is hard-coded below. We cannot calculate it
1966 via prologue examination. */
1967 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1969 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1970 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1972 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1973 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1974 cache
->sof
= cache
->cfm
& 0x7f;
1976 ia64_sigtramp_frame_init_saved_regs (next_frame
, cache
);
1978 *this_cache
= cache
;
1983 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1984 void **this_cache
, struct frame_id
*this_id
)
1986 struct ia64_frame_cache
*cache
=
1987 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1989 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1990 if (gdbarch_debug
>= 1)
1991 fprintf_unfiltered (gdb_stdlog
,
1992 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1993 paddr_nz (this_id
->code_addr
),
1994 paddr_nz (this_id
->stack_addr
),
1995 paddr_nz (cache
->bsp
), next_frame
);
1999 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2001 int regnum
, int *optimizedp
,
2002 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2003 int *realnump
, gdb_byte
*valuep
)
2005 char dummy_valp
[MAX_REGISTER_SIZE
];
2006 char buf
[MAX_REGISTER_SIZE
];
2008 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
2009 struct ia64_frame_cache
*cache
=
2010 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2012 gdb_assert (regnum
>= 0);
2014 if (!target_has_registers
)
2015 error (_("No registers."));
2022 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2023 when valuep is not supplied. */
2025 valuep
= dummy_valp
;
2027 memset (valuep
, 0, register_size (gdbarch
, regnum
));
2029 if (regnum
== IA64_IP_REGNUM
)
2032 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2036 *lvalp
= lval_memory
;
2038 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2039 pc
= extract_unsigned_integer (buf
, 8);
2042 store_unsigned_integer (valuep
, 8, pc
);
2044 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2045 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2048 if (regnum
>= V32_REGNUM
)
2049 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2050 addr
= cache
->saved_regs
[regnum
];
2053 *lvalp
= lval_memory
;
2055 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
2060 /* All other registers not listed above. */
2061 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2064 *lvalp
= lval_memory
;
2066 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
2070 if (gdbarch_debug
>= 1)
2071 fprintf_unfiltered (gdb_stdlog
,
2072 "sigtramp prev register <%s> is 0x%s\n",
2073 (regnum
< IA64_GR32_REGNUM
2074 || (regnum
> IA64_GR127_REGNUM
2075 && regnum
< LAST_PSEUDO_REGNUM
))
2076 ? ia64_register_names
[regnum
]
2077 : (regnum
< LAST_PSEUDO_REGNUM
2078 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2080 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2083 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2086 ia64_sigtramp_frame_this_id
,
2087 ia64_sigtramp_frame_prev_register
2090 static const struct frame_unwind
*
2091 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2093 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
2094 if (tdep
->pc_in_sigtramp
)
2096 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2098 if (tdep
->pc_in_sigtramp (pc
))
2099 return &ia64_sigtramp_frame_unwind
;
2107 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2109 struct ia64_frame_cache
*cache
=
2110 ia64_frame_cache (next_frame
, this_cache
);
2115 static const struct frame_base ia64_frame_base
=
2118 ia64_frame_base_address
,
2119 ia64_frame_base_address
,
2120 ia64_frame_base_address
2123 #ifdef HAVE_LIBUNWIND_IA64_H
2125 struct ia64_unwind_table_entry
2127 unw_word_t start_offset
;
2128 unw_word_t end_offset
;
2129 unw_word_t info_offset
;
2132 static __inline__
uint64_t
2133 ia64_rse_slot_num (uint64_t addr
)
2135 return (addr
>> 3) & 0x3f;
2138 /* Skip over a designated number of registers in the backing
2139 store, remembering every 64th position is for NAT. */
2140 static __inline__
uint64_t
2141 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2143 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2147 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2150 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2151 number to a libunwind register number. */
2153 ia64_gdb2uw_regnum (int regnum
)
2155 if (regnum
== sp_regnum
)
2157 else if (regnum
== IA64_BSP_REGNUM
)
2158 return UNW_IA64_BSP
;
2159 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2160 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2161 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2162 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2163 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2164 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2165 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2167 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2168 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2169 else if (regnum
== IA64_PR_REGNUM
)
2171 else if (regnum
== IA64_IP_REGNUM
)
2173 else if (regnum
== IA64_CFM_REGNUM
)
2174 return UNW_IA64_CFM
;
2175 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2176 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2177 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2178 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2183 /* Gdb libunwind-frame callback function to convert from a libunwind register
2184 number to a ia64 gdb register number. */
2186 ia64_uw2gdb_regnum (int uw_regnum
)
2188 if (uw_regnum
== UNW_IA64_SP
)
2190 else if (uw_regnum
== UNW_IA64_BSP
)
2191 return IA64_BSP_REGNUM
;
2192 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2193 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2194 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2195 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2196 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2197 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2198 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2199 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2200 else if (uw_regnum
== UNW_IA64_PR
)
2201 return IA64_PR_REGNUM
;
2202 else if (uw_regnum
== UNW_REG_IP
)
2203 return IA64_IP_REGNUM
;
2204 else if (uw_regnum
== UNW_IA64_CFM
)
2205 return IA64_CFM_REGNUM
;
2206 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2207 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2208 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2209 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2214 /* Gdb libunwind-frame callback function to reveal if register is a float
2217 ia64_is_fpreg (int uw_regnum
)
2219 return unw_is_fpreg (uw_regnum
);
2222 /* Libunwind callback accessor function for general registers. */
2224 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2225 int write
, void *arg
)
2227 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2228 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2229 struct frame_info
*next_frame
= arg
;
2230 long new_sof
, old_sof
;
2231 char buf
[MAX_REGISTER_SIZE
];
2233 /* We never call any libunwind routines that need to write registers. */
2234 gdb_assert (!write
);
2239 /* Libunwind expects to see the pc value which means the slot number
2240 from the psr must be merged with the ip word address. */
2241 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2242 ip
= extract_unsigned_integer (buf
, 8);
2243 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2244 psr
= extract_unsigned_integer (buf
, 8);
2245 *val
= ip
| ((psr
>> 41) & 0x3);
2248 case UNW_IA64_AR_BSP
:
2249 /* Libunwind expects to see the beginning of the current register
2250 frame so we must account for the fact that ptrace() will return a value
2251 for bsp that points *after* the current register frame. */
2252 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2253 bsp
= extract_unsigned_integer (buf
, 8);
2254 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2255 cfm
= extract_unsigned_integer (buf
, 8);
2257 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2260 case UNW_IA64_AR_BSPSTORE
:
2261 /* Libunwind wants bspstore to be after the current register frame.
2262 This is what ptrace() and gdb treats as the regular bsp value. */
2263 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2264 *val
= extract_unsigned_integer (buf
, 8);
2268 /* For all other registers, just unwind the value directly. */
2269 frame_unwind_register (next_frame
, regnum
, buf
);
2270 *val
= extract_unsigned_integer (buf
, 8);
2274 if (gdbarch_debug
>= 1)
2275 fprintf_unfiltered (gdb_stdlog
,
2276 " access_reg: from cache: %4s=0x%s\n",
2277 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2278 ? ia64_register_names
[regnum
] : "r??"),
2283 /* Libunwind callback accessor function for floating-point registers. */
2285 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2286 int write
, void *arg
)
2288 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2289 struct frame_info
*next_frame
= arg
;
2291 /* We never call any libunwind routines that need to write registers. */
2292 gdb_assert (!write
);
2294 frame_unwind_register (next_frame
, regnum
, (char *) val
);
2299 /* Libunwind callback accessor function for top-level rse registers. */
2301 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2302 int write
, void *arg
)
2304 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2305 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2306 struct regcache
*regcache
= arg
;
2307 long new_sof
, old_sof
;
2308 char buf
[MAX_REGISTER_SIZE
];
2310 /* We never call any libunwind routines that need to write registers. */
2311 gdb_assert (!write
);
2316 /* Libunwind expects to see the pc value which means the slot number
2317 from the psr must be merged with the ip word address. */
2318 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2319 ip
= extract_unsigned_integer (buf
, 8);
2320 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2321 psr
= extract_unsigned_integer (buf
, 8);
2322 *val
= ip
| ((psr
>> 41) & 0x3);
2325 case UNW_IA64_AR_BSP
:
2326 /* Libunwind expects to see the beginning of the current register
2327 frame so we must account for the fact that ptrace() will return a value
2328 for bsp that points *after* the current register frame. */
2329 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2330 bsp
= extract_unsigned_integer (buf
, 8);
2331 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2332 cfm
= extract_unsigned_integer (buf
, 8);
2334 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2337 case UNW_IA64_AR_BSPSTORE
:
2338 /* Libunwind wants bspstore to be after the current register frame.
2339 This is what ptrace() and gdb treats as the regular bsp value. */
2340 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2341 *val
= extract_unsigned_integer (buf
, 8);
2345 /* For all other registers, just unwind the value directly. */
2346 regcache_cooked_read (regcache
, regnum
, buf
);
2347 *val
= extract_unsigned_integer (buf
, 8);
2351 if (gdbarch_debug
>= 1)
2352 fprintf_unfiltered (gdb_stdlog
,
2353 " access_rse_reg: from cache: %4s=0x%s\n",
2354 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2355 ? ia64_register_names
[regnum
] : "r??"),
2361 /* Libunwind callback accessor function for top-level fp registers. */
2363 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2364 unw_fpreg_t
*val
, int write
, void *arg
)
2366 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2367 struct regcache
*regcache
= arg
;
2369 /* We never call any libunwind routines that need to write registers. */
2370 gdb_assert (!write
);
2372 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2377 /* Libunwind callback accessor function for accessing memory. */
2379 ia64_access_mem (unw_addr_space_t as
,
2380 unw_word_t addr
, unw_word_t
*val
,
2381 int write
, void *arg
)
2383 if (addr
- KERNEL_START
< ktab_size
)
2385 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2386 + (addr
- KERNEL_START
));
2395 /* XXX do we need to normalize byte-order here? */
2397 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2399 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2402 /* Call low-level function to access the kernel unwind table. */
2404 getunwind_table (gdb_byte
**buf_p
)
2408 /* FIXME drow/2005-09-10: This code used to call
2409 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2410 for the currently running ia64-linux kernel. That data should
2411 come from the core file and be accessed via the auxv vector; if
2412 we want to preserve fall back to the running kernel's table, then
2413 we should find a way to override the corefile layer's
2414 xfer_partial method. */
2416 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2422 /* Get the kernel unwind table. */
2424 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2426 static struct ia64_table_entry
*etab
;
2433 size
= getunwind_table (&ktab_buf
);
2435 return -UNW_ENOINFO
;
2437 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2440 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2441 etab
->info_offset
+= KERNEL_START
;
2444 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2445 return -UNW_ENOINFO
;
2447 di
->format
= UNW_INFO_FORMAT_TABLE
;
2449 di
->start_ip
= ktab
[0].start_offset
;
2450 di
->end_ip
= etab
[-1].end_offset
;
2451 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2452 di
->u
.ti
.segbase
= 0;
2453 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2454 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2456 if (gdbarch_debug
>= 1)
2457 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2458 "segbase=0x%s, length=%s, gp=0x%s\n",
2459 (char *) di
->u
.ti
.name_ptr
,
2460 paddr_nz (di
->u
.ti
.segbase
),
2461 paddr_u (di
->u
.ti
.table_len
),
2466 /* Find the unwind table entry for a specified address. */
2468 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2469 unw_dyn_info_t
*dip
, void **buf
)
2471 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2472 Elf_Internal_Ehdr
*ehdr
;
2473 unw_word_t segbase
= 0;
2474 CORE_ADDR load_base
;
2478 bfd
= objfile
->obfd
;
2480 ehdr
= elf_tdata (bfd
)->elf_header
;
2481 phdr
= elf_tdata (bfd
)->phdr
;
2483 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2485 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2487 switch (phdr
[i
].p_type
)
2490 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2495 case PT_IA_64_UNWIND
:
2496 p_unwind
= phdr
+ i
;
2504 if (!p_text
|| !p_unwind
)
2505 return -UNW_ENOINFO
;
2507 /* Verify that the segment that contains the IP also contains
2508 the static unwind table. If not, we may be in the Linux kernel's
2509 DSO gate page in which case the unwind table is another segment.
2510 Otherwise, we are dealing with runtime-generated code, for which we
2511 have no info here. */
2512 segbase
= p_text
->p_vaddr
+ load_base
;
2514 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2517 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2519 if (phdr
[i
].p_type
== PT_LOAD
2520 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2523 /* Get the segbase from the section containing the
2525 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2529 return -UNW_ENOINFO
;
2532 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2533 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2534 dip
->gp
= ia64_find_global_pointer (ip
);
2535 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2536 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2537 dip
->u
.rti
.segbase
= segbase
;
2538 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2539 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2544 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2546 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2547 int need_unwind_info
, void *arg
)
2549 struct obj_section
*sec
= find_pc_section (ip
);
2556 /* XXX This only works if the host and the target architecture are
2557 both ia64 and if the have (more or less) the same kernel
2559 if (get_kernel_table (ip
, &di
) < 0)
2560 return -UNW_ENOINFO
;
2562 if (gdbarch_debug
>= 1)
2563 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2564 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2565 "length=%s,data=0x%s)\n",
2566 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2567 paddr_nz (di
.u
.ti
.segbase
),
2568 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2570 paddr_u (di
.u
.ti
.table_len
),
2571 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2575 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2579 if (gdbarch_debug
>= 1)
2580 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2581 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2582 "length=%s,data=0x%s)\n",
2583 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2584 paddr_nz (di
.u
.rti
.segbase
),
2585 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2587 paddr_u (di
.u
.rti
.table_len
),
2588 paddr_nz (di
.u
.rti
.table_data
));
2591 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2594 /* We no longer need the dyn info storage so free it. */
2600 /* Libunwind callback accessor function for cleanup. */
2602 ia64_put_unwind_info (unw_addr_space_t as
,
2603 unw_proc_info_t
*pip
, void *arg
)
2605 /* Nothing required for now. */
2608 /* Libunwind callback accessor function to get head of the dynamic
2609 unwind-info registration list. */
2611 ia64_get_dyn_info_list (unw_addr_space_t as
,
2612 unw_word_t
*dilap
, void *arg
)
2614 struct obj_section
*text_sec
;
2615 struct objfile
*objfile
;
2616 unw_word_t ip
, addr
;
2620 if (!libunwind_is_initialized ())
2621 return -UNW_ENOINFO
;
2623 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2627 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2628 ip
= text_sec
->addr
;
2629 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2632 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2633 /* We no longer need the dyn info storage so free it. */
2638 if (gdbarch_debug
>= 1)
2639 fprintf_unfiltered (gdb_stdlog
,
2640 "dynamic unwind table in objfile %s "
2641 "at 0x%s (gp=0x%s)\n",
2642 bfd_get_filename (objfile
->obfd
),
2643 paddr_nz (addr
), paddr_nz (di
.gp
));
2649 return -UNW_ENOINFO
;
2653 /* Frame interface functions for libunwind. */
2656 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2657 struct frame_id
*this_id
)
2662 CORE_ADDR prev_ip
, addr
;
2663 int realnum
, optimized
;
2664 enum lval_type lval
;
2667 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2668 if (frame_id_eq (id
, null_frame_id
))
2670 (*this_id
) = null_frame_id
;
2674 /* We must add the bsp as the special address for frame comparison
2676 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2677 bsp
= extract_unsigned_integer (buf
, 8);
2679 /* If the previous frame pc value is 0, then we are at the end of the stack
2680 and don't want to unwind past this frame. We return a null frame_id to
2682 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2683 &optimized
, &lval
, &addr
, &realnum
, buf
);
2684 prev_ip
= extract_unsigned_integer (buf
, 8);
2687 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2689 (*this_id
) = null_frame_id
;
2691 if (gdbarch_debug
>= 1)
2692 fprintf_unfiltered (gdb_stdlog
,
2693 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2694 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2695 paddr_nz (bsp
), next_frame
);
2699 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2701 int regnum
, int *optimizedp
,
2702 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2703 int *realnump
, gdb_byte
*valuep
)
2707 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
2708 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2709 reg
= IA64_PR_REGNUM
;
2710 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2711 reg
= IA64_UNAT_REGNUM
;
2713 /* Let libunwind do most of the work. */
2714 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2715 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2717 /* No more to do if the value is not supposed to be supplied. */
2721 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2725 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2729 unsigned char buf
[MAX_REGISTER_SIZE
];
2731 /* Fetch predicate register rename base from current frame
2732 marker for this frame. */
2733 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2734 cfm
= extract_unsigned_integer (buf
, 8);
2735 rrb_pr
= (cfm
>> 32) & 0x3f;
2737 /* Adjust the register number to account for register rotation. */
2738 regnum
= VP16_REGNUM
2739 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2741 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2742 regnum
- VP0_REGNUM
, 1);
2743 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), prN_val
);
2745 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2749 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2750 regnum
- IA64_NAT0_REGNUM
, 1);
2751 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
2754 else if (regnum
== IA64_BSP_REGNUM
)
2756 char cfm_valuep
[MAX_REGISTER_SIZE
];
2759 enum lval_type cfm_lval
;
2761 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2763 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2764 This corresponds to what the hardware bsp register will be if we pop the frame
2765 back which is why we might have been called. We know that libunwind will pass us back
2766 the beginning of the current frame so we should just add sof to it. */
2767 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2768 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2769 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2770 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2771 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2773 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
2777 if (gdbarch_debug
>= 1)
2778 fprintf_unfiltered (gdb_stdlog
,
2779 "libunwind prev register <%s> is 0x%s\n",
2780 (regnum
< IA64_GR32_REGNUM
2781 || (regnum
> IA64_GR127_REGNUM
2782 && regnum
< LAST_PSEUDO_REGNUM
))
2783 ? ia64_register_names
[regnum
]
2784 : (regnum
< LAST_PSEUDO_REGNUM
2785 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2787 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2790 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2793 ia64_libunwind_frame_this_id
,
2794 ia64_libunwind_frame_prev_register
,
2798 libunwind_frame_dealloc_cache
2801 static const struct frame_unwind
*
2802 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2804 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2805 return &ia64_libunwind_frame_unwind
;
2811 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2812 struct frame_id
*this_id
)
2819 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2820 if (frame_id_eq (id
, null_frame_id
))
2822 (*this_id
) = null_frame_id
;
2826 /* We must add the bsp as the special address for frame comparison
2828 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2829 bsp
= extract_unsigned_integer (buf
, 8);
2831 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2832 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2834 if (gdbarch_debug
>= 1)
2835 fprintf_unfiltered (gdb_stdlog
,
2836 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2837 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2838 paddr_nz (bsp
), next_frame
);
2842 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2844 int regnum
, int *optimizedp
,
2845 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2846 int *realnump
, gdb_byte
*valuep
)
2850 CORE_ADDR prev_ip
, addr
;
2851 int realnum
, optimized
;
2852 enum lval_type lval
;
2855 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2856 method of getting previous registers. */
2857 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2858 &optimized
, &lval
, &addr
, &realnum
, buf
);
2859 prev_ip
= extract_unsigned_integer (buf
, 8);
2863 void *tmp_cache
= NULL
;
2864 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2865 addrp
, realnump
, valuep
);
2868 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2869 addrp
, realnump
, valuep
);
2872 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2875 ia64_libunwind_sigtramp_frame_this_id
,
2876 ia64_libunwind_sigtramp_frame_prev_register
2879 static const struct frame_unwind
*
2880 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2882 if (libunwind_is_initialized ())
2884 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2885 return &ia64_libunwind_sigtramp_frame_unwind
;
2889 return ia64_sigtramp_frame_sniffer (next_frame
);
2892 /* Set of libunwind callback acccessor functions. */
2893 static unw_accessors_t ia64_unw_accessors
=
2895 ia64_find_proc_info_x
,
2896 ia64_put_unwind_info
,
2897 ia64_get_dyn_info_list
,
2905 /* Set of special libunwind callback acccessor functions specific for accessing
2906 the rse registers. At the top of the stack, we want libunwind to figure out
2907 how to read r32 - r127. Though usually they are found sequentially in memory
2908 starting from $bof, this is not always true. */
2909 static unw_accessors_t ia64_unw_rse_accessors
=
2911 ia64_find_proc_info_x
,
2912 ia64_put_unwind_info
,
2913 ia64_get_dyn_info_list
,
2915 ia64_access_rse_reg
,
2916 ia64_access_rse_fpreg
,
2921 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2922 static struct libunwind_descr ia64_libunwind_descr
=
2927 &ia64_unw_accessors
,
2928 &ia64_unw_rse_accessors
,
2931 #endif /* HAVE_LIBUNWIND_IA64_H */
2934 ia64_use_struct_convention (struct type
*type
)
2936 struct type
*float_elt_type
;
2938 /* Don't use the struct convention for anything but structure,
2939 union, or array types. */
2940 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
2941 || TYPE_CODE (type
) == TYPE_CODE_UNION
2942 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
2945 /* HFAs are structures (or arrays) consisting entirely of floating
2946 point values of the same length. Up to 8 of these are returned
2947 in registers. Don't use the struct convention when this is the
2949 float_elt_type
= is_float_or_hfa_type (type
);
2950 if (float_elt_type
!= NULL
2951 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2954 /* Other structs of length 32 or less are returned in r8-r11.
2955 Don't use the struct convention for those either. */
2956 return TYPE_LENGTH (type
) > 32;
2960 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2963 struct type
*float_elt_type
;
2965 float_elt_type
= is_float_or_hfa_type (type
);
2966 if (float_elt_type
!= NULL
)
2968 char from
[MAX_REGISTER_SIZE
];
2970 int regnum
= IA64_FR8_REGNUM
;
2971 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2975 regcache_cooked_read (regcache
, regnum
, from
);
2976 convert_typed_floating (from
, builtin_type_ia64_ext
,
2977 (char *)valbuf
+ offset
, float_elt_type
);
2978 offset
+= TYPE_LENGTH (float_elt_type
);
2986 int regnum
= IA64_GR8_REGNUM
;
2987 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2989 int n
= TYPE_LENGTH (type
) / reglen
;
2990 int m
= TYPE_LENGTH (type
) % reglen
;
2995 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2996 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3003 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3004 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3010 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3011 const gdb_byte
*valbuf
)
3013 struct type
*float_elt_type
;
3015 float_elt_type
= is_float_or_hfa_type (type
);
3016 if (float_elt_type
!= NULL
)
3018 char to
[MAX_REGISTER_SIZE
];
3020 int regnum
= IA64_FR8_REGNUM
;
3021 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3025 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3026 to
, builtin_type_ia64_ext
);
3027 regcache_cooked_write (regcache
, regnum
, to
);
3028 offset
+= TYPE_LENGTH (float_elt_type
);
3036 int regnum
= IA64_GR8_REGNUM
;
3037 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
3039 int n
= TYPE_LENGTH (type
) / reglen
;
3040 int m
= TYPE_LENGTH (type
) % reglen
;
3045 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3046 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3053 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3054 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3059 static enum return_value_convention
3060 ia64_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
3061 struct regcache
*regcache
, gdb_byte
*readbuf
,
3062 const gdb_byte
*writebuf
)
3064 int struct_return
= ia64_use_struct_convention (valtype
);
3066 if (writebuf
!= NULL
)
3068 gdb_assert (!struct_return
);
3069 ia64_store_return_value (valtype
, regcache
, writebuf
);
3072 if (readbuf
!= NULL
)
3074 gdb_assert (!struct_return
);
3075 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3079 return RETURN_VALUE_STRUCT_CONVENTION
;
3081 return RETURN_VALUE_REGISTER_CONVENTION
;
3085 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3087 switch (TYPE_CODE (t
))
3091 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3098 case TYPE_CODE_ARRAY
:
3100 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3103 case TYPE_CODE_STRUCT
:
3107 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3108 if (!is_float_or_hfa_type_recurse
3109 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3120 /* Determine if the given type is one of the floating point types or
3121 and HFA (which is a struct, array, or combination thereof whose
3122 bottom-most elements are all of the same floating point type). */
3124 static struct type
*
3125 is_float_or_hfa_type (struct type
*t
)
3127 struct type
*et
= 0;
3129 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3133 /* Return 1 if the alignment of T is such that the next even slot
3134 should be used. Return 0, if the next available slot should
3135 be used. (See section 8.5.1 of the IA-64 Software Conventions
3136 and Runtime manual). */
3139 slot_alignment_is_next_even (struct type
*t
)
3141 switch (TYPE_CODE (t
))
3145 if (TYPE_LENGTH (t
) > 8)
3149 case TYPE_CODE_ARRAY
:
3151 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3152 case TYPE_CODE_STRUCT
:
3156 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3157 if (slot_alignment_is_next_even
3158 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3167 /* Attempt to find (and return) the global pointer for the given
3170 This is a rather nasty bit of code searchs for the .dynamic section
3171 in the objfile corresponding to the pc of the function we're trying
3172 to call. Once it finds the addresses at which the .dynamic section
3173 lives in the child process, it scans the Elf64_Dyn entries for a
3174 DT_PLTGOT tag. If it finds one of these, the corresponding
3175 d_un.d_ptr value is the global pointer. */
3178 ia64_find_global_pointer (CORE_ADDR faddr
)
3180 struct obj_section
*faddr_sect
;
3182 faddr_sect
= find_pc_section (faddr
);
3183 if (faddr_sect
!= NULL
)
3185 struct obj_section
*osect
;
3187 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3189 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3193 if (osect
< faddr_sect
->objfile
->sections_end
)
3198 while (addr
< osect
->endaddr
)
3204 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3207 tag
= extract_signed_integer (buf
, sizeof (buf
));
3209 if (tag
== DT_PLTGOT
)
3211 CORE_ADDR global_pointer
;
3213 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3216 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3219 return global_pointer
;
3232 /* Given a function's address, attempt to find (and return) the
3233 corresponding (canonical) function descriptor. Return 0 if
3236 find_extant_func_descr (CORE_ADDR faddr
)
3238 struct obj_section
*faddr_sect
;
3240 /* Return early if faddr is already a function descriptor. */
3241 faddr_sect
= find_pc_section (faddr
);
3242 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3245 if (faddr_sect
!= NULL
)
3247 struct obj_section
*osect
;
3248 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3250 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3254 if (osect
< faddr_sect
->objfile
->sections_end
)
3259 while (addr
< osect
->endaddr
)
3265 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3268 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3270 if (faddr
== faddr2
)
3280 /* Attempt to find a function descriptor corresponding to the
3281 given address. If none is found, construct one on the
3282 stack using the address at fdaptr. */
3285 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3289 fdesc
= find_extant_func_descr (faddr
);
3293 ULONGEST global_pointer
;
3299 global_pointer
= ia64_find_global_pointer (faddr
);
3301 if (global_pointer
== 0)
3302 regcache_cooked_read_unsigned (regcache
,
3303 IA64_GR1_REGNUM
, &global_pointer
);
3305 store_unsigned_integer (buf
, 8, faddr
);
3306 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3308 write_memory (fdesc
, buf
, 16);
3314 /* Use the following routine when printing out function pointers
3315 so the user can see the function address rather than just the
3316 function descriptor. */
3318 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3319 struct target_ops
*targ
)
3321 struct obj_section
*s
;
3323 s
= find_pc_section (addr
);
3325 /* check if ADDR points to a function descriptor. */
3326 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3327 return read_memory_unsigned_integer (addr
, 8);
3329 /* There are also descriptors embedded in vtables. */
3332 struct minimal_symbol
*minsym
;
3334 minsym
= lookup_minimal_symbol_by_pc (addr
);
3336 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3337 return read_memory_unsigned_integer (addr
, 8);
3344 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3350 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3351 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3352 int nargs
, struct value
**args
, CORE_ADDR sp
,
3353 int struct_return
, CORE_ADDR struct_addr
)
3359 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3361 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3362 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3363 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3367 /* Count the number of slots needed for the arguments. */
3368 for (argno
= 0; argno
< nargs
; argno
++)
3371 type
= check_typedef (value_type (arg
));
3372 len
= TYPE_LENGTH (type
);
3374 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3377 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3380 nslots
+= (len
+ 7) / 8;
3383 /* Divvy up the slots between the RSE and the memory stack. */
3384 rseslots
= (nslots
> 8) ? 8 : nslots
;
3385 memslots
= nslots
- rseslots
;
3387 /* Allocate a new RSE frame. */
3388 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3390 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3391 new_bsp
= rse_address_add (bsp
, rseslots
);
3392 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3394 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3395 pfs
&= 0xc000000000000000LL
;
3396 pfs
|= (cfm
& 0xffffffffffffLL
);
3397 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3399 cfm
&= 0xc000000000000000LL
;
3401 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3403 /* We will attempt to find function descriptors in the .opd segment,
3404 but if we can't we'll construct them ourselves. That being the
3405 case, we'll need to reserve space on the stack for them. */
3406 funcdescaddr
= sp
- nfuncargs
* 16;
3407 funcdescaddr
&= ~0xfLL
;
3409 /* Adjust the stack pointer to it's new value. The calling conventions
3410 require us to have 16 bytes of scratch, plus whatever space is
3411 necessary for the memory slots and our function descriptors. */
3412 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3413 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3415 /* Place the arguments where they belong. The arguments will be
3416 either placed in the RSE backing store or on the memory stack.
3417 In addition, floating point arguments or HFAs are placed in
3418 floating point registers. */
3420 floatreg
= IA64_FR8_REGNUM
;
3421 for (argno
= 0; argno
< nargs
; argno
++)
3423 struct type
*float_elt_type
;
3426 type
= check_typedef (value_type (arg
));
3427 len
= TYPE_LENGTH (type
);
3429 /* Special handling for function parameters. */
3431 && TYPE_CODE (type
) == TYPE_CODE_PTR
3432 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3435 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
), 8);
3436 store_unsigned_integer (val_buf
, 8,
3437 find_func_descr (regcache
, faddr
,
3439 if (slotnum
< rseslots
)
3440 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3442 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3449 /* Skip odd slot if necessary... */
3450 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3458 memset (val_buf
, 0, 8);
3459 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3461 if (slotnum
< rseslots
)
3462 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3464 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3471 /* Handle floating point types (including HFAs). */
3472 float_elt_type
= is_float_or_hfa_type (type
);
3473 if (float_elt_type
!= NULL
)
3476 len
= TYPE_LENGTH (type
);
3477 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3479 char to
[MAX_REGISTER_SIZE
];
3480 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3481 to
, builtin_type_ia64_ext
);
3482 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3484 argoffset
+= TYPE_LENGTH (float_elt_type
);
3485 len
-= TYPE_LENGTH (float_elt_type
);
3490 /* Store the struct return value in r8 if necessary. */
3493 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3496 global_pointer
= ia64_find_global_pointer (func_addr
);
3498 if (global_pointer
!= 0)
3499 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3501 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3503 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3508 static struct frame_id
3509 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3514 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3515 sp
= extract_unsigned_integer (buf
, 8);
3517 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3518 bsp
= extract_unsigned_integer (buf
, 8);
3520 if (gdbarch_debug
>= 1)
3521 fprintf_unfiltered (gdb_stdlog
,
3522 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3523 paddr_nz (frame_pc_unwind (next_frame
)),
3524 paddr_nz (sp
), paddr_nz (bsp
));
3526 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3530 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3533 CORE_ADDR ip
, psr
, pc
;
3535 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3536 ip
= extract_unsigned_integer (buf
, 8);
3537 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3538 psr
= extract_unsigned_integer (buf
, 8);
3540 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3545 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3547 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3548 return print_insn_ia64 (memaddr
, info
);
3551 static struct gdbarch
*
3552 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3554 struct gdbarch
*gdbarch
;
3555 struct gdbarch_tdep
*tdep
;
3557 /* If there is already a candidate, use it. */
3558 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3560 return arches
->gdbarch
;
3562 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3563 gdbarch
= gdbarch_alloc (&info
, tdep
);
3565 tdep
->sigcontext_register_address
= 0;
3566 tdep
->pc_in_sigtramp
= 0;
3568 /* According to the ia64 specs, instructions that store long double
3569 floats in memory use a long-double format different than that
3570 used in the floating registers. The memory format matches the
3571 x86 extended float format which is 80 bits. An OS may choose to
3572 use this format (e.g. GNU/Linux) or choose to use a different
3573 format for storing long doubles (e.g. HPUX). In the latter case,
3574 the setting of the format may be moved/overridden in an
3575 OS-specific tdep file. */
3576 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3578 set_gdbarch_short_bit (gdbarch
, 16);
3579 set_gdbarch_int_bit (gdbarch
, 32);
3580 set_gdbarch_long_bit (gdbarch
, 64);
3581 set_gdbarch_long_long_bit (gdbarch
, 64);
3582 set_gdbarch_float_bit (gdbarch
, 32);
3583 set_gdbarch_double_bit (gdbarch
, 64);
3584 set_gdbarch_long_double_bit (gdbarch
, 128);
3585 set_gdbarch_ptr_bit (gdbarch
, 64);
3587 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3588 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3589 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3590 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3592 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3593 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3595 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3596 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3597 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3598 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3599 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3600 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3601 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3603 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3605 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3607 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3608 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3609 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3610 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3611 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3613 /* Settings for calling functions in the inferior. */
3614 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3615 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3616 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3618 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3619 #ifdef HAVE_LIBUNWIND_IA64_H
3620 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3621 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3622 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3624 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3626 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3627 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3629 /* Settings that should be unnecessary. */
3630 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3632 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3633 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3635 /* The virtual table contains 16-byte descriptors, not pointers to
3637 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3639 /* Hook in ABI-specific overrides, if they have been registered. */
3640 gdbarch_init_osabi (info
, gdbarch
);
3645 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3648 _initialize_ia64_tdep (void)
3650 /* Define the ia64 floating-point format to gdb. */
3651 builtin_type_ia64_ext
=
3652 init_type (TYPE_CODE_FLT
, 128 / 8,
3653 0, "builtin_type_ia64_ext", NULL
);
3654 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3656 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);