1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
42 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
277 #define SIGCONTEXT_REGISTER_ADDRESS \
278 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
281 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
282 struct reggroup
*group
)
287 if (group
== all_reggroup
)
289 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
290 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
291 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
292 if (group
== float_reggroup
)
294 if (group
== vector_reggroup
)
296 if (group
== general_reggroup
)
297 return (!vector_p
&& !float_p
);
298 if (group
== save_reggroup
|| group
== restore_reggroup
)
304 ia64_register_name (int reg
)
306 return ia64_register_names
[reg
];
310 ia64_register_type (struct gdbarch
*arch
, int reg
)
312 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
313 return builtin_type_ia64_ext
;
315 return builtin_type_long
;
319 ia64_dwarf_reg_to_regnum (int reg
)
321 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
322 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
327 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
332 const struct floatformat floatformat_ia64_ext
=
334 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
335 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
339 /* Extract ``len'' bits from an instruction bundle starting at
343 extract_bit_field (char *bundle
, int from
, int len
)
345 long long result
= 0LL;
347 int from_byte
= from
/ 8;
348 int to_byte
= to
/ 8;
349 unsigned char *b
= (unsigned char *) bundle
;
355 if (from_byte
== to_byte
)
356 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
357 result
= c
>> (from
% 8);
358 lshift
= 8 - (from
% 8);
360 for (i
= from_byte
+1; i
< to_byte
; i
++)
362 result
|= ((long long) b
[i
]) << lshift
;
366 if (from_byte
< to_byte
&& (to
% 8 != 0))
369 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
370 result
|= ((long long) c
) << lshift
;
376 /* Replace the specified bits in an instruction bundle */
379 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
382 int from_byte
= from
/ 8;
383 int to_byte
= to
/ 8;
384 unsigned char *b
= (unsigned char *) bundle
;
387 if (from_byte
== to_byte
)
389 unsigned char left
, right
;
391 left
= (c
>> (to
% 8)) << (to
% 8);
392 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
393 c
= (unsigned char) (val
& 0xff);
394 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
402 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
403 c
= c
| (val
<< (from
% 8));
405 val
>>= 8 - from
% 8;
407 for (i
= from_byte
+1; i
< to_byte
; i
++)
416 unsigned char cv
= (unsigned char) val
;
418 c
= c
>> (to
% 8) << (to
% 8);
419 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
425 /* Return the contents of slot N (for N = 0, 1, or 2) in
426 and instruction bundle */
429 slotN_contents (char *bundle
, int slotnum
)
431 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
434 /* Store an instruction in an instruction bundle */
437 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
439 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
442 static enum instruction_type template_encoding_table
[32][3] =
444 { M
, I
, I
}, /* 00 */
445 { M
, I
, I
}, /* 01 */
446 { M
, I
, I
}, /* 02 */
447 { M
, I
, I
}, /* 03 */
448 { M
, L
, X
}, /* 04 */
449 { M
, L
, X
}, /* 05 */
450 { undefined
, undefined
, undefined
}, /* 06 */
451 { undefined
, undefined
, undefined
}, /* 07 */
452 { M
, M
, I
}, /* 08 */
453 { M
, M
, I
}, /* 09 */
454 { M
, M
, I
}, /* 0A */
455 { M
, M
, I
}, /* 0B */
456 { M
, F
, I
}, /* 0C */
457 { M
, F
, I
}, /* 0D */
458 { M
, M
, F
}, /* 0E */
459 { M
, M
, F
}, /* 0F */
460 { M
, I
, B
}, /* 10 */
461 { M
, I
, B
}, /* 11 */
462 { M
, B
, B
}, /* 12 */
463 { M
, B
, B
}, /* 13 */
464 { undefined
, undefined
, undefined
}, /* 14 */
465 { undefined
, undefined
, undefined
}, /* 15 */
466 { B
, B
, B
}, /* 16 */
467 { B
, B
, B
}, /* 17 */
468 { M
, M
, B
}, /* 18 */
469 { M
, M
, B
}, /* 19 */
470 { undefined
, undefined
, undefined
}, /* 1A */
471 { undefined
, undefined
, undefined
}, /* 1B */
472 { M
, F
, B
}, /* 1C */
473 { M
, F
, B
}, /* 1D */
474 { undefined
, undefined
, undefined
}, /* 1E */
475 { undefined
, undefined
, undefined
}, /* 1F */
478 /* Fetch and (partially) decode an instruction at ADDR and return the
479 address of the next instruction to fetch. */
482 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
484 char bundle
[BUNDLE_LEN
];
485 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
489 /* Warn about slot numbers greater than 2. We used to generate
490 an error here on the assumption that the user entered an invalid
491 address. But, sometimes GDB itself requests an invalid address.
492 This can (easily) happen when execution stops in a function for
493 which there are no symbols. The prologue scanner will attempt to
494 find the beginning of the function - if the nearest symbol
495 happens to not be aligned on a bundle boundary (16 bytes), the
496 resulting starting address will cause GDB to think that the slot
499 So we warn about it and set the slot number to zero. It is
500 not necessarily a fatal condition, particularly if debugging
501 at the assembly language level. */
504 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
505 "Using slot 0 instead"));
511 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
516 *instr
= slotN_contents (bundle
, slotnum
);
517 template = extract_bit_field (bundle
, 0, 5);
518 *it
= template_encoding_table
[(int)template][slotnum
];
520 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
523 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
528 /* There are 5 different break instructions (break.i, break.b,
529 break.m, break.f, and break.x), but they all have the same
530 encoding. (The five bit template in the low five bits of the
531 instruction bundle distinguishes one from another.)
533 The runtime architecture manual specifies that break instructions
534 used for debugging purposes must have the upper two bits of the 21
535 bit immediate set to a 0 and a 1 respectively. A breakpoint
536 instruction encodes the most significant bit of its 21 bit
537 immediate at bit 36 of the 41 bit instruction. The penultimate msb
538 is at bit 25 which leads to the pattern below.
540 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
541 it turns out that 0x80000 was used as the syscall break in the early
542 simulators. So I changed the pattern slightly to do "break.i 0x080001"
543 instead. But that didn't work either (I later found out that this
544 pattern was used by the simulator that I was using.) So I ended up
545 using the pattern seen below. */
548 #define IA64_BREAKPOINT 0x00002000040LL
550 #define IA64_BREAKPOINT 0x00003333300LL
553 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
555 CORE_ADDR addr
= bp_tgt
->placed_address
;
556 char bundle
[BUNDLE_LEN
];
557 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
563 error (_("Can't insert breakpoint for slot numbers greater than 2."));
567 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
569 /* Check for L type instruction in 2nd slot, if present then
570 bump up the slot number to the 3rd slot */
571 template = extract_bit_field (bundle
, 0, 5);
572 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
577 instr
= slotN_contents (bundle
, slotnum
);
578 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
579 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
580 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
582 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
588 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
590 CORE_ADDR addr
= bp_tgt
->placed_address
;
591 char bundle
[BUNDLE_LEN
];
592 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
599 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
601 /* Check for L type instruction in 2nd slot, if present then
602 bump up the slot number to the 3rd slot */
603 template = extract_bit_field (bundle
, 0, 5);
604 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
609 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
610 replace_slotN_contents (bundle
, instr
, slotnum
);
612 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
617 /* We don't really want to use this, but remote.c needs to call it in order
618 to figure out if Z-packets are supported or not. Oh, well. */
619 const unsigned char *
620 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
622 static unsigned char breakpoint
[] =
623 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
624 *lenptr
= sizeof (breakpoint
);
632 ia64_read_pc (ptid_t ptid
)
634 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
635 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
636 int slot_num
= (psr_value
>> 41) & 3;
638 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
642 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
644 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
645 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
646 psr_value
&= ~(3LL << 41);
647 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
651 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
652 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
655 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
657 /* Returns the address of the slot that's NSLOTS slots away from
658 the address ADDR. NSLOTS may be positive or negative. */
660 rse_address_add(CORE_ADDR addr
, int nslots
)
663 int mandatory_nat_slots
= nslots
/ 63;
664 int direction
= nslots
< 0 ? -1 : 1;
666 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
668 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
669 new_addr
+= 8 * direction
;
671 if (IS_NaT_COLLECTION_ADDR(new_addr
))
672 new_addr
+= 8 * direction
;
678 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
679 int regnum
, gdb_byte
*buf
)
681 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
683 #ifdef HAVE_LIBUNWIND_IA64_H
684 /* First try and use the libunwind special reg accessor, otherwise fallback to
686 if (!libunwind_is_initialized ()
687 || libunwind_get_reg_special (gdbarch
, regnum
, buf
) != 0)
690 /* The fallback position is to assume that r32-r127 are found sequentially
691 in memory starting at $bof. This isn't always true, but without libunwind,
692 this is the best we can do. */
696 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
697 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
699 /* The bsp points at the end of the register frame so we
700 subtract the size of frame from it to get start of register frame. */
701 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
703 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
705 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
706 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
707 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
710 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
713 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
717 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
718 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
719 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
721 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
723 ULONGEST natN_val
= 0;
726 CORE_ADDR gr_addr
= 0;
727 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
728 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
730 /* The bsp points at the end of the register frame so we
731 subtract the size of frame from it to get start of register frame. */
732 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
734 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
735 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
739 /* Compute address of nat collection bits. */
740 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
741 CORE_ADDR nat_collection
;
743 /* If our nat collection address is bigger than bsp, we have to get
744 the nat collection from rnat. Otherwise, we fetch the nat
745 collection from the computed address. */
747 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
749 nat_collection
= read_memory_integer (nat_addr
, 8);
750 nat_bit
= (gr_addr
>> 3) & 0x3f;
751 natN_val
= (nat_collection
>> nat_bit
) & 1;
754 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
756 else if (regnum
== VBOF_REGNUM
)
758 /* A virtual register frame start is provided for user convenience.
759 It can be calculated as the bsp - sof (sizeof frame). */
763 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
764 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
766 /* The bsp points at the end of the register frame so we
767 subtract the size of frame from it to get beginning of frame. */
768 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
769 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
771 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
777 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
778 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
780 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
782 /* Fetch predicate register rename base from current frame
783 marker for this frame. */
784 int rrb_pr
= (cfm
>> 32) & 0x3f;
786 /* Adjust the register number to account for register rotation. */
788 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
790 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
791 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
794 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
798 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
799 int regnum
, const gdb_byte
*buf
)
801 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
806 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
807 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
809 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
811 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
813 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
814 write_memory (reg_addr
, (void *)buf
, 8);
817 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
819 ULONGEST unatN_val
, unat
, unatN_mask
;
820 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
821 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
822 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
825 else if (unatN_val
== 1)
827 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
829 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
834 CORE_ADDR gr_addr
= 0;
835 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
836 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
838 /* The bsp points at the end of the register frame so we
839 subtract the size of frame from it to get start of register frame. */
840 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
842 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
843 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
845 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
847 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
849 /* Compute address of nat collection bits. */
850 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
851 CORE_ADDR nat_collection
;
852 int natN_bit
= (gr_addr
>> 3) & 0x3f;
853 ULONGEST natN_mask
= (1LL << natN_bit
);
854 /* If our nat collection address is bigger than bsp, we have to get
855 the nat collection from rnat. Otherwise, we fetch the nat
856 collection from the computed address. */
859 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
861 nat_collection
|= natN_mask
;
863 nat_collection
&= ~natN_mask
;
864 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
869 nat_collection
= read_memory_integer (nat_addr
, 8);
871 nat_collection
|= natN_mask
;
873 nat_collection
&= ~natN_mask
;
874 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
875 write_memory (nat_addr
, nat_buf
, 8);
879 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
886 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
887 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
889 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
891 /* Fetch predicate register rename base from current frame
892 marker for this frame. */
893 int rrb_pr
= (cfm
>> 32) & 0x3f;
895 /* Adjust the register number to account for register rotation. */
897 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
899 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
900 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
903 else if (prN_val
== 1)
905 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
909 /* The ia64 needs to convert between various ieee floating-point formats
910 and the special ia64 floating point register format. */
913 ia64_convert_register_p (int regno
, struct type
*type
)
915 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
919 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
920 struct type
*valtype
, gdb_byte
*out
)
922 char in
[MAX_REGISTER_SIZE
];
923 frame_register_read (frame
, regnum
, in
);
924 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
928 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
929 struct type
*valtype
, const gdb_byte
*in
)
931 char out
[MAX_REGISTER_SIZE
];
932 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
933 put_frame_register (frame
, regnum
, out
);
937 /* Limit the number of skipped non-prologue instructions since examining
938 of the prologue is expensive. */
939 static int max_skip_non_prologue_insns
= 40;
941 /* Given PC representing the starting address of a function, and
942 LIM_PC which is the (sloppy) limit to which to scan when looking
943 for a prologue, attempt to further refine this limit by using
944 the line data in the symbol table. If successful, a better guess
945 on where the prologue ends is returned, otherwise the previous
946 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
947 which will be set to indicate whether the returned limit may be
948 used with no further scanning in the event that the function is
951 /* FIXME: cagney/2004-02-14: This function and logic have largely been
952 superseded by skip_prologue_using_sal. */
955 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
957 struct symtab_and_line prologue_sal
;
958 CORE_ADDR start_pc
= pc
;
960 /* Start off not trusting the limit. */
963 prologue_sal
= find_pc_line (pc
, 0);
964 if (prologue_sal
.line
!= 0)
967 CORE_ADDR addr
= prologue_sal
.end
;
969 /* Handle the case in which compiler's optimizer/scheduler
970 has moved instructions into the prologue. We scan ahead
971 in the function looking for address ranges whose corresponding
972 line number is less than or equal to the first one that we
973 found for the function. (It can be less than when the
974 scheduler puts a body instruction before the first prologue
976 for (i
= 2 * max_skip_non_prologue_insns
;
977 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
980 struct symtab_and_line sal
;
982 sal
= find_pc_line (addr
, 0);
985 if (sal
.line
<= prologue_sal
.line
986 && sal
.symtab
== prologue_sal
.symtab
)
993 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
995 lim_pc
= prologue_sal
.end
;
996 if (start_pc
== get_pc_function_start (lim_pc
))
1003 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1004 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1005 || (14 <= (_regnum_) && (_regnum_) <= 31))
1006 #define imm9(_instr_) \
1007 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1008 | (((_instr_) & 0x00008000000LL) >> 20) \
1009 | (((_instr_) & 0x00000001fc0LL) >> 6))
1011 /* Allocate and initialize a frame cache. */
1013 static struct ia64_frame_cache
*
1014 ia64_alloc_frame_cache (void)
1016 struct ia64_frame_cache
*cache
;
1019 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1025 cache
->prev_cfm
= 0;
1031 cache
->frameless
= 1;
1033 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1034 cache
->saved_regs
[i
] = 0;
1040 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1043 CORE_ADDR last_prologue_pc
= pc
;
1044 instruction_type it
;
1049 int unat_save_reg
= 0;
1050 int pr_save_reg
= 0;
1051 int mem_stack_frame_size
= 0;
1053 CORE_ADDR spill_addr
= 0;
1056 char reg_contents
[256];
1062 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1064 memset (instores
, 0, sizeof instores
);
1065 memset (infpstores
, 0, sizeof infpstores
);
1066 memset (reg_contents
, 0, sizeof reg_contents
);
1068 if (cache
->after_prologue
!= 0
1069 && cache
->after_prologue
<= lim_pc
)
1070 return cache
->after_prologue
;
1072 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1073 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1075 /* We want to check if we have a recognizable function start before we
1076 look ahead for a prologue. */
1077 if (pc
< lim_pc
&& next_pc
1078 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1080 /* alloc - start of a regular function. */
1081 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1082 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1083 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1084 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1086 /* Verify that the current cfm matches what we think is the
1087 function start. If we have somehow jumped within a function,
1088 we do not want to interpret the prologue and calculate the
1089 addresses of various registers such as the return address.
1090 We will instead treat the frame as frameless. */
1092 (sof
== (cache
->cfm
& 0x7f) &&
1093 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1097 last_prologue_pc
= next_pc
;
1102 /* Look for a leaf routine. */
1103 if (pc
< lim_pc
&& next_pc
1104 && (it
== I
|| it
== M
)
1105 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1107 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1108 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1109 | ((instr
& 0x001f8000000LL
) >> 20)
1110 | ((instr
& 0x000000fe000LL
) >> 13));
1111 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1112 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1113 int qp
= (int) (instr
& 0x0000000003fLL
);
1114 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1116 /* mov r2, r12 - beginning of leaf routine */
1118 last_prologue_pc
= next_pc
;
1122 /* If we don't recognize a regular function or leaf routine, we are
1128 last_prologue_pc
= lim_pc
;
1132 /* Loop, looking for prologue instructions, keeping track of
1133 where preserved registers were spilled. */
1136 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1140 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1142 /* Exit loop upon hitting a non-nop branch instruction. */
1147 else if (((instr
& 0x3fLL
) != 0LL) &&
1148 (frameless
|| ret_reg
!= 0))
1150 /* Exit loop upon hitting a predicated instruction if
1151 we already have the return register or if we are frameless. */
1156 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1159 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1160 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1161 int qp
= (int) (instr
& 0x0000000003f);
1163 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1166 last_prologue_pc
= next_pc
;
1169 else if ((it
== I
|| it
== M
)
1170 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1172 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1173 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1174 | ((instr
& 0x001f8000000LL
) >> 20)
1175 | ((instr
& 0x000000fe000LL
) >> 13));
1176 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1177 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1178 int qp
= (int) (instr
& 0x0000000003fLL
);
1180 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1184 last_prologue_pc
= next_pc
;
1186 else if (qp
== 0 && rN
== 12 && rM
== 12)
1188 /* adds r12, -mem_stack_frame_size, r12 */
1189 mem_stack_frame_size
-= imm
;
1190 last_prologue_pc
= next_pc
;
1192 else if (qp
== 0 && rN
== 2
1193 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1195 char buf
[MAX_REGISTER_SIZE
];
1196 CORE_ADDR saved_sp
= 0;
1197 /* adds r2, spilloffset, rFramePointer
1199 adds r2, spilloffset, r12
1201 Get ready for stf.spill or st8.spill instructions.
1202 The address to start spilling at is loaded into r2.
1203 FIXME: Why r2? That's what gcc currently uses; it
1204 could well be different for other compilers. */
1206 /* Hmm... whether or not this will work will depend on
1207 where the pc is. If it's still early in the prologue
1208 this'll be wrong. FIXME */
1211 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1212 saved_sp
= extract_unsigned_integer (buf
, 8);
1214 spill_addr
= saved_sp
1215 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1218 last_prologue_pc
= next_pc
;
1220 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1221 rN
< 256 && imm
== 0)
1223 /* mov rN, rM where rM is an input register */
1224 reg_contents
[rN
] = rM
;
1225 last_prologue_pc
= next_pc
;
1227 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1231 last_prologue_pc
= next_pc
;
1236 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1237 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1239 /* stf.spill [rN] = fM, imm9
1241 stf.spill [rN] = fM */
1243 int imm
= imm9(instr
);
1244 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1245 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1246 int qp
= (int) (instr
& 0x0000000003fLL
);
1247 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1248 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1250 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1252 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1255 spill_addr
= 0; /* last one; must be done */
1256 last_prologue_pc
= next_pc
;
1259 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1260 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1266 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1267 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1268 int qp
= (int) (instr
& 0x0000000003fLL
);
1269 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1271 /* We have something like "mov.m r3 = ar.unat". Remember the
1272 r3 (or whatever) and watch for a store of this register... */
1274 last_prologue_pc
= next_pc
;
1277 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1280 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1281 int qp
= (int) (instr
& 0x0000000003fLL
);
1282 if (qp
== 0 && isScratch (rN
))
1285 last_prologue_pc
= next_pc
;
1289 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1290 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1294 st8 [rN] = rM, imm9 */
1295 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1296 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1297 int qp
= (int) (instr
& 0x0000000003fLL
);
1298 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1299 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1300 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1302 /* We've found a spill of either the UNAT register or the PR
1303 register. (Well, not exactly; what we've actually found is
1304 a spill of the register that UNAT or PR was moved to).
1305 Record that fact and move on... */
1306 if (rM
== unat_save_reg
)
1308 /* Track UNAT register */
1309 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1314 /* Track PR register */
1315 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1318 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1319 /* st8 [rN] = rM, imm9 */
1320 spill_addr
+= imm9(instr
);
1322 spill_addr
= 0; /* must be done spilling */
1323 last_prologue_pc
= next_pc
;
1325 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1327 /* Allow up to one store of each input register. */
1328 instores
[rM
-32] = 1;
1329 last_prologue_pc
= next_pc
;
1331 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1332 !instores
[indirect
-32])
1334 /* Allow an indirect store of an input register. */
1335 instores
[indirect
-32] = 1;
1336 last_prologue_pc
= next_pc
;
1339 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1346 Note that the st8 case is handled in the clause above.
1348 Advance over stores of input registers. One store per input
1349 register is permitted. */
1350 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1351 int qp
= (int) (instr
& 0x0000000003fLL
);
1352 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1353 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1355 instores
[rM
-32] = 1;
1356 last_prologue_pc
= next_pc
;
1358 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1359 !instores
[indirect
-32])
1361 /* Allow an indirect store of an input register. */
1362 instores
[indirect
-32] = 1;
1363 last_prologue_pc
= next_pc
;
1366 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1373 Advance over stores of floating point input registers. Again
1374 one store per register is permitted */
1375 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1376 int qp
= (int) (instr
& 0x0000000003fLL
);
1377 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1379 infpstores
[fM
-8] = 1;
1380 last_prologue_pc
= next_pc
;
1384 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1385 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1387 /* st8.spill [rN] = rM
1389 st8.spill [rN] = rM, imm9 */
1390 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1391 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1392 int qp
= (int) (instr
& 0x0000000003fLL
);
1393 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1395 /* We've found a spill of one of the preserved general purpose
1396 regs. Record the spill address and advance the spill
1397 register if appropriate. */
1398 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1399 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1400 /* st8.spill [rN] = rM, imm9 */
1401 spill_addr
+= imm9(instr
);
1403 spill_addr
= 0; /* Done spilling */
1404 last_prologue_pc
= next_pc
;
1411 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1412 registers for the previous frame which will be needed later. */
1414 if (!frameless
&& next_frame
)
1416 /* Extract the size of the rotating portion of the stack
1417 frame and the register rename base from the current
1423 rrb_gr
= (cfm
>> 18) & 0x7f;
1425 /* Find the bof (beginning of frame). */
1426 bof
= rse_address_add (cache
->bsp
, -sof
);
1428 for (i
= 0, addr
= bof
;
1432 if (IS_NaT_COLLECTION_ADDR (addr
))
1436 if (i
+32 == cfm_reg
)
1437 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1438 if (i
+32 == ret_reg
)
1439 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1441 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1444 /* For the previous argument registers we require the previous bof.
1445 If we can't find the previous cfm, then we can do nothing. */
1447 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1449 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1451 else if (cfm_reg
!= 0)
1453 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1454 cfm
= extract_unsigned_integer (buf
, 8);
1456 cache
->prev_cfm
= cfm
;
1460 sor
= ((cfm
>> 14) & 0xf) * 8;
1462 sol
= (cfm
>> 7) & 0x7f;
1463 rrb_gr
= (cfm
>> 18) & 0x7f;
1465 /* The previous bof only requires subtraction of the sol (size of locals)
1466 due to the overlap between output and input of subsequent frames. */
1467 bof
= rse_address_add (bof
, -sol
);
1469 for (i
= 0, addr
= bof
;
1473 if (IS_NaT_COLLECTION_ADDR (addr
))
1478 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1481 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1487 /* Try and trust the lim_pc value whenever possible. */
1488 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1489 last_prologue_pc
= lim_pc
;
1491 cache
->frameless
= frameless
;
1492 cache
->after_prologue
= last_prologue_pc
;
1493 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1494 cache
->fp_reg
= fp_reg
;
1496 return last_prologue_pc
;
1500 ia64_skip_prologue (CORE_ADDR pc
)
1502 struct ia64_frame_cache cache
;
1504 cache
.after_prologue
= 0;
1508 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1509 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1513 /* Normal frames. */
1515 static struct ia64_frame_cache
*
1516 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1518 struct ia64_frame_cache
*cache
;
1520 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1526 cache
= ia64_alloc_frame_cache ();
1527 *this_cache
= cache
;
1529 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1530 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1532 /* We always want the bsp to point to the end of frame.
1533 This way, we can always get the beginning of frame (bof)
1534 by subtracting frame size. */
1535 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1536 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1538 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1539 psr
= extract_unsigned_integer (buf
, 8);
1541 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1542 cfm
= extract_unsigned_integer (buf
, 8);
1544 cache
->sof
= (cfm
& 0x7f);
1545 cache
->sol
= (cfm
>> 7) & 0x7f;
1546 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1550 cache
->pc
= frame_func_unwind (next_frame
);
1553 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1555 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1561 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1562 struct frame_id
*this_id
)
1564 struct ia64_frame_cache
*cache
=
1565 ia64_frame_cache (next_frame
, this_cache
);
1567 /* If outermost frame, mark with null frame id. */
1568 if (cache
->base
== 0)
1569 (*this_id
) = null_frame_id
;
1571 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1572 if (gdbarch_debug
>= 1)
1573 fprintf_unfiltered (gdb_stdlog
,
1574 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1575 paddr_nz (this_id
->code_addr
),
1576 paddr_nz (this_id
->stack_addr
),
1577 paddr_nz (cache
->bsp
), next_frame
);
1581 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1582 int regnum
, int *optimizedp
,
1583 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1584 int *realnump
, gdb_byte
*valuep
)
1586 struct ia64_frame_cache
*cache
=
1587 ia64_frame_cache (next_frame
, this_cache
);
1588 char dummy_valp
[MAX_REGISTER_SIZE
];
1591 gdb_assert (regnum
>= 0);
1593 if (!target_has_registers
)
1594 error (_("No registers."));
1601 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1602 when valuep is not supplied. */
1604 valuep
= dummy_valp
;
1606 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1608 if (regnum
== SP_REGNUM
)
1610 /* Handle SP values for all frames but the topmost. */
1611 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1614 else if (regnum
== IA64_BSP_REGNUM
)
1616 char cfm_valuep
[MAX_REGISTER_SIZE
];
1619 enum lval_type cfm_lval
;
1621 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1623 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1624 This corresponds to what the hardware bsp register will be if we pop the frame
1625 back which is why we might have been called. We know the beginning of the current
1626 frame is cache->bsp - cache->sof. This value in the previous frame points to
1627 the start of the output registers. We can calculate the end of that frame by adding
1628 the size of output (sof (size of frame) - sol (size of locals)). */
1629 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1630 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1631 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1633 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1634 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1636 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1639 else if (regnum
== IA64_CFM_REGNUM
)
1641 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1645 *lvalp
= lval_memory
;
1647 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1649 else if (cache
->prev_cfm
)
1650 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1651 else if (cache
->frameless
)
1654 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1657 else if (regnum
== IA64_VFP_REGNUM
)
1659 /* If the function in question uses an automatic register (r32-r127)
1660 for the frame pointer, it'll be found by ia64_find_saved_register()
1661 above. If the function lacks one of these frame pointers, we can
1662 still provide a value since we know the size of the frame. */
1663 CORE_ADDR vfp
= cache
->base
;
1664 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1666 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1668 char pr_valuep
[MAX_REGISTER_SIZE
];
1671 enum lval_type pr_lval
;
1674 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1675 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1676 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1678 /* Fetch predicate register rename base from current frame
1679 marker for this frame. */
1680 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1682 /* Adjust the register number to account for register rotation. */
1683 regnum
= VP16_REGNUM
1684 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1686 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1687 regnum
- VP0_REGNUM
, 1);
1688 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1690 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1692 char unat_valuep
[MAX_REGISTER_SIZE
];
1695 enum lval_type unat_lval
;
1696 CORE_ADDR unat_addr
;
1698 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1699 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1700 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1701 regnum
- IA64_NAT0_REGNUM
, 1);
1702 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1705 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1708 /* Find address of general register corresponding to nat bit we're
1712 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1716 /* Compute address of nat collection bits. */
1717 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1719 CORE_ADDR nat_collection
;
1721 /* If our nat collection address is bigger than bsp, we have to get
1722 the nat collection from rnat. Otherwise, we fetch the nat
1723 collection from the computed address. */
1724 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1725 bsp
= extract_unsigned_integer (buf
, 8);
1726 if (nat_addr
>= bsp
)
1728 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1729 nat_collection
= extract_unsigned_integer (buf
, 8);
1732 nat_collection
= read_memory_integer (nat_addr
, 8);
1733 nat_bit
= (gr_addr
>> 3) & 0x3f;
1734 natval
= (nat_collection
>> nat_bit
) & 1;
1737 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1739 else if (regnum
== IA64_IP_REGNUM
)
1742 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1746 *lvalp
= lval_memory
;
1748 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1749 pc
= extract_unsigned_integer (buf
, 8);
1751 else if (cache
->frameless
)
1753 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1754 pc
= extract_unsigned_integer (buf
, 8);
1757 store_unsigned_integer (valuep
, 8, pc
);
1759 else if (regnum
== IA64_PSR_REGNUM
)
1761 /* We don't know how to get the complete previous PSR, but we need it for
1762 the slot information when we unwind the pc (pc is formed of IP register
1763 plus slot information from PSR). To get the previous slot information,
1764 we mask it off the return address. */
1765 ULONGEST slot_num
= 0;
1768 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1770 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1771 psr
= extract_unsigned_integer (buf
, 8);
1775 *lvalp
= lval_memory
;
1777 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1778 pc
= extract_unsigned_integer (buf
, 8);
1780 else if (cache
->frameless
)
1783 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1784 pc
= extract_unsigned_integer (buf
, 8);
1786 psr
&= ~(3LL << 41);
1787 slot_num
= pc
& 0x3LL
;
1788 psr
|= (CORE_ADDR
)slot_num
<< 41;
1789 store_unsigned_integer (valuep
, 8, psr
);
1791 else if (regnum
== IA64_BR0_REGNUM
)
1794 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1797 *lvalp
= lval_memory
;
1799 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1800 br0
= extract_unsigned_integer (buf
, 8);
1802 store_unsigned_integer (valuep
, 8, br0
);
1804 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1805 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1808 if (regnum
>= V32_REGNUM
)
1809 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1810 addr
= cache
->saved_regs
[regnum
];
1813 *lvalp
= lval_memory
;
1815 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1817 else if (cache
->frameless
)
1819 char r_valuep
[MAX_REGISTER_SIZE
];
1822 enum lval_type r_lval
;
1824 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1826 if (regnum
>= V32_REGNUM
)
1827 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1828 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1829 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1830 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1831 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1832 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1833 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1834 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1836 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1837 *lvalp
= lval_memory
;
1839 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1845 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1847 /* Fetch floating point register rename base from current
1848 frame marker for this frame. */
1849 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1851 /* Adjust the floating point register number to account for
1852 register rotation. */
1853 regnum
= IA64_FR32_REGNUM
1854 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1857 /* If we have stored a memory address, access the register. */
1858 addr
= cache
->saved_regs
[regnum
];
1861 *lvalp
= lval_memory
;
1863 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1865 /* Otherwise, punt and get the current value of the register. */
1867 frame_unwind_register (next_frame
, regnum
, valuep
);
1870 if (gdbarch_debug
>= 1)
1871 fprintf_unfiltered (gdb_stdlog
,
1872 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1873 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1874 ? ia64_register_names
[regnum
] : "r??"),
1875 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1878 static const struct frame_unwind ia64_frame_unwind
=
1881 &ia64_frame_this_id
,
1882 &ia64_frame_prev_register
1885 static const struct frame_unwind
*
1886 ia64_frame_sniffer (struct frame_info
*next_frame
)
1888 return &ia64_frame_unwind
;
1891 /* Signal trampolines. */
1894 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1896 if (SIGCONTEXT_REGISTER_ADDRESS
)
1900 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1901 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1902 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1903 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1904 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1905 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1906 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1907 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1908 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1909 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1910 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1911 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1912 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1913 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1914 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1915 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1916 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1917 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1918 cache
->saved_regs
[IA64_LC_REGNUM
] =
1919 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1920 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1921 cache
->saved_regs
[regno
] =
1922 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1923 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1924 cache
->saved_regs
[regno
] =
1925 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1926 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1927 cache
->saved_regs
[regno
] =
1928 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1932 static struct ia64_frame_cache
*
1933 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1935 struct ia64_frame_cache
*cache
;
1943 cache
= ia64_alloc_frame_cache ();
1945 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1946 /* Note that frame size is hard-coded below. We cannot calculate it
1947 via prologue examination. */
1948 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1950 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1951 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1953 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1954 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1955 cache
->sof
= cache
->cfm
& 0x7f;
1957 ia64_sigtramp_frame_init_saved_regs (cache
);
1959 *this_cache
= cache
;
1964 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1965 void **this_cache
, struct frame_id
*this_id
)
1967 struct ia64_frame_cache
*cache
=
1968 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1970 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1971 if (gdbarch_debug
>= 1)
1972 fprintf_unfiltered (gdb_stdlog
,
1973 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1974 paddr_nz (this_id
->code_addr
),
1975 paddr_nz (this_id
->stack_addr
),
1976 paddr_nz (cache
->bsp
), next_frame
);
1980 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1982 int regnum
, int *optimizedp
,
1983 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1984 int *realnump
, gdb_byte
*valuep
)
1986 char dummy_valp
[MAX_REGISTER_SIZE
];
1987 char buf
[MAX_REGISTER_SIZE
];
1989 struct ia64_frame_cache
*cache
=
1990 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1992 gdb_assert (regnum
>= 0);
1994 if (!target_has_registers
)
1995 error (_("No registers."));
2002 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2003 when valuep is not supplied. */
2005 valuep
= dummy_valp
;
2007 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2009 if (regnum
== IA64_IP_REGNUM
)
2012 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2016 *lvalp
= lval_memory
;
2018 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2019 pc
= extract_unsigned_integer (buf
, 8);
2022 store_unsigned_integer (valuep
, 8, pc
);
2024 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2025 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2028 if (regnum
>= V32_REGNUM
)
2029 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2030 addr
= cache
->saved_regs
[regnum
];
2033 *lvalp
= lval_memory
;
2035 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2040 /* All other registers not listed above. */
2041 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2044 *lvalp
= lval_memory
;
2046 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2050 if (gdbarch_debug
>= 1)
2051 fprintf_unfiltered (gdb_stdlog
,
2052 "sigtramp prev register <%s> is 0x%s\n",
2053 (regnum
< IA64_GR32_REGNUM
2054 || (regnum
> IA64_GR127_REGNUM
2055 && regnum
< LAST_PSEUDO_REGNUM
))
2056 ? ia64_register_names
[regnum
]
2057 : (regnum
< LAST_PSEUDO_REGNUM
2058 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2060 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2063 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2066 ia64_sigtramp_frame_this_id
,
2067 ia64_sigtramp_frame_prev_register
2070 static const struct frame_unwind
*
2071 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2074 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2076 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2077 if (legacy_pc_in_sigtramp (pc
, name
))
2078 return &ia64_sigtramp_frame_unwind
;
2085 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2087 struct ia64_frame_cache
*cache
=
2088 ia64_frame_cache (next_frame
, this_cache
);
2093 static const struct frame_base ia64_frame_base
=
2096 ia64_frame_base_address
,
2097 ia64_frame_base_address
,
2098 ia64_frame_base_address
2101 #ifdef HAVE_LIBUNWIND_IA64_H
2103 struct ia64_unwind_table_entry
2105 unw_word_t start_offset
;
2106 unw_word_t end_offset
;
2107 unw_word_t info_offset
;
2110 static __inline__
uint64_t
2111 ia64_rse_slot_num (uint64_t addr
)
2113 return (addr
>> 3) & 0x3f;
2116 /* Skip over a designated number of registers in the backing
2117 store, remembering every 64th position is for NAT. */
2118 static __inline__
uint64_t
2119 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2121 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2125 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2128 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2129 number to a libunwind register number. */
2131 ia64_gdb2uw_regnum (int regnum
)
2133 if (regnum
== sp_regnum
)
2135 else if (regnum
== IA64_BSP_REGNUM
)
2136 return UNW_IA64_BSP
;
2137 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2138 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2139 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2140 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2141 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2142 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2143 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2145 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2146 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2147 else if (regnum
== IA64_PR_REGNUM
)
2149 else if (regnum
== IA64_IP_REGNUM
)
2151 else if (regnum
== IA64_CFM_REGNUM
)
2152 return UNW_IA64_CFM
;
2153 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2154 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2155 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2156 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2161 /* Gdb libunwind-frame callback function to convert from a libunwind register
2162 number to a ia64 gdb register number. */
2164 ia64_uw2gdb_regnum (int uw_regnum
)
2166 if (uw_regnum
== UNW_IA64_SP
)
2168 else if (uw_regnum
== UNW_IA64_BSP
)
2169 return IA64_BSP_REGNUM
;
2170 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2171 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2172 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2173 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2174 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2175 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2176 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2177 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2178 else if (uw_regnum
== UNW_IA64_PR
)
2179 return IA64_PR_REGNUM
;
2180 else if (uw_regnum
== UNW_REG_IP
)
2181 return IA64_IP_REGNUM
;
2182 else if (uw_regnum
== UNW_IA64_CFM
)
2183 return IA64_CFM_REGNUM
;
2184 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2185 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2186 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2187 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2192 /* Gdb libunwind-frame callback function to reveal if register is a float
2195 ia64_is_fpreg (int uw_regnum
)
2197 return unw_is_fpreg (uw_regnum
);
2200 /* Libunwind callback accessor function for general registers. */
2202 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2203 int write
, void *arg
)
2205 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2206 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2207 struct frame_info
*next_frame
= arg
;
2208 long new_sof
, old_sof
;
2209 char buf
[MAX_REGISTER_SIZE
];
2214 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2220 ia64_write_pc (*val
, inferior_ptid
);
2223 case UNW_IA64_AR_BSPSTORE
:
2224 write_register (IA64_BSP_REGNUM
, *val
);
2227 case UNW_IA64_AR_BSP
:
2229 /* Account for the fact that ptrace() expects bsp to point
2230 after the current register frame. */
2231 cfm
= read_register (IA64_CFM_REGNUM
);
2233 bsp
= ia64_rse_skip_regs (*val
, sof
);
2234 write_register (IA64_BSP_REGNUM
, bsp
);
2238 /* If we change CFM, we need to adjust ptrace's notion of
2239 bsp accordingly, so that the real bsp remains
2241 bsp
= read_register (IA64_BSP_REGNUM
);
2242 cfm
= read_register (IA64_CFM_REGNUM
);
2243 old_sof
= (cfm
& 0x7f);
2244 new_sof
= (*val
& 0x7f);
2245 if (old_sof
!= new_sof
)
2247 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2248 write_register (IA64_BSP_REGNUM
, bsp
);
2250 write_register (IA64_CFM_REGNUM
, *val
);
2254 write_register (regnum
, *val
);
2257 if (gdbarch_debug
>= 1)
2258 fprintf_unfiltered (gdb_stdlog
,
2259 " access_reg: to cache: %4s=0x%s\n",
2260 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2261 ? ia64_register_names
[regnum
] : "r??"),
2269 /* Libunwind expects to see the pc value which means the slot number
2270 from the psr must be merged with the ip word address. */
2271 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2272 ip
= extract_unsigned_integer (buf
, 8);
2273 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2274 psr
= extract_unsigned_integer (buf
, 8);
2275 *val
= ip
| ((psr
>> 41) & 0x3);
2278 case UNW_IA64_AR_BSP
:
2279 /* Libunwind expects to see the beginning of the current register
2280 frame so we must account for the fact that ptrace() will return a value
2281 for bsp that points *after* the current register frame. */
2282 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2283 bsp
= extract_unsigned_integer (buf
, 8);
2284 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2285 cfm
= extract_unsigned_integer (buf
, 8);
2287 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2290 case UNW_IA64_AR_BSPSTORE
:
2291 /* Libunwind wants bspstore to be after the current register frame.
2292 This is what ptrace() and gdb treats as the regular bsp value. */
2293 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2294 *val
= extract_unsigned_integer (buf
, 8);
2298 /* For all other registers, just unwind the value directly. */
2299 frame_unwind_register (next_frame
, regnum
, buf
);
2300 *val
= extract_unsigned_integer (buf
, 8);
2304 if (gdbarch_debug
>= 1)
2305 fprintf_unfiltered (gdb_stdlog
,
2306 " access_reg: from cache: %4s=0x%s\n",
2307 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2308 ? ia64_register_names
[regnum
] : "r??"),
2314 /* Libunwind callback accessor function for floating-point registers. */
2316 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2317 int write
, void *arg
)
2319 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2322 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2324 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2328 /* Libunwind callback accessor function for top-level rse registers. */
2330 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2331 int write
, void *arg
)
2333 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2334 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2335 long new_sof
, old_sof
;
2340 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2346 ia64_write_pc (*val
, inferior_ptid
);
2349 case UNW_IA64_AR_BSPSTORE
:
2350 write_register (IA64_BSP_REGNUM
, *val
);
2353 case UNW_IA64_AR_BSP
:
2355 /* Account for the fact that ptrace() expects bsp to point
2356 after the current register frame. */
2357 cfm
= read_register (IA64_CFM_REGNUM
);
2359 bsp
= ia64_rse_skip_regs (*val
, sof
);
2360 write_register (IA64_BSP_REGNUM
, bsp
);
2364 /* If we change CFM, we need to adjust ptrace's notion of
2365 bsp accordingly, so that the real bsp remains
2367 bsp
= read_register (IA64_BSP_REGNUM
);
2368 cfm
= read_register (IA64_CFM_REGNUM
);
2369 old_sof
= (cfm
& 0x7f);
2370 new_sof
= (*val
& 0x7f);
2371 if (old_sof
!= new_sof
)
2373 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2374 write_register (IA64_BSP_REGNUM
, bsp
);
2376 write_register (IA64_CFM_REGNUM
, *val
);
2380 write_register (regnum
, *val
);
2383 if (gdbarch_debug
>= 1)
2384 fprintf_unfiltered (gdb_stdlog
,
2385 " access_rse_reg: to cache: %4s=0x%s\n",
2386 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2387 ? ia64_register_names
[regnum
] : "r??"),
2395 /* Libunwind expects to see the pc value which means the slot number
2396 from the psr must be merged with the ip word address. */
2397 ip
= read_register (IA64_IP_REGNUM
);
2398 psr
= read_register (IA64_PSR_REGNUM
);
2399 *val
= ip
| ((psr
>> 41) & 0x3);
2402 case UNW_IA64_AR_BSP
:
2403 /* Libunwind expects to see the beginning of the current register
2404 frame so we must account for the fact that ptrace() will return a value
2405 for bsp that points *after* the current register frame. */
2406 bsp
= read_register (IA64_BSP_REGNUM
);
2407 cfm
= read_register (IA64_CFM_REGNUM
);
2409 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2412 case UNW_IA64_AR_BSPSTORE
:
2413 /* Libunwind wants bspstore to be after the current register frame.
2414 This is what ptrace() and gdb treats as the regular bsp value. */
2415 *val
= read_register (IA64_BSP_REGNUM
);
2419 /* For all other registers, just read the value directly. */
2420 *val
= read_register (regnum
);
2425 if (gdbarch_debug
>= 1)
2426 fprintf_unfiltered (gdb_stdlog
,
2427 " access_rse_reg: from cache: %4s=0x%s\n",
2428 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2429 ? ia64_register_names
[regnum
] : "r??"),
2435 /* Libunwind callback accessor function for accessing memory. */
2437 ia64_access_mem (unw_addr_space_t as
,
2438 unw_word_t addr
, unw_word_t
*val
,
2439 int write
, void *arg
)
2441 if (addr
- KERNEL_START
< ktab_size
)
2443 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2444 + (addr
- KERNEL_START
));
2453 /* XXX do we need to normalize byte-order here? */
2455 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2457 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2460 /* Call low-level function to access the kernel unwind table. */
2462 getunwind_table (gdb_byte
**buf_p
)
2466 /* FIXME drow/2005-09-10: This code used to call
2467 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2468 for the currently running ia64-linux kernel. That data should
2469 come from the core file and be accessed via the auxv vector; if
2470 we want to preserve fall back to the running kernel's table, then
2471 we should find a way to override the corefile layer's
2472 xfer_partial method. */
2474 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2480 /* Get the kernel unwind table. */
2482 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2484 static struct ia64_table_entry
*etab
;
2491 size
= getunwind_table (&ktab_buf
);
2493 return -UNW_ENOINFO
;
2495 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2498 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2499 etab
->info_offset
+= KERNEL_START
;
2502 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2503 return -UNW_ENOINFO
;
2505 di
->format
= UNW_INFO_FORMAT_TABLE
;
2507 di
->start_ip
= ktab
[0].start_offset
;
2508 di
->end_ip
= etab
[-1].end_offset
;
2509 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2510 di
->u
.ti
.segbase
= 0;
2511 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2512 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2514 if (gdbarch_debug
>= 1)
2515 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2516 "segbase=0x%s, length=%s, gp=0x%s\n",
2517 (char *) di
->u
.ti
.name_ptr
,
2518 paddr_nz (di
->u
.ti
.segbase
),
2519 paddr_u (di
->u
.ti
.table_len
),
2524 /* Find the unwind table entry for a specified address. */
2526 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2527 unw_dyn_info_t
*dip
, void **buf
)
2529 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2530 Elf_Internal_Ehdr
*ehdr
;
2531 unw_word_t segbase
= 0;
2532 CORE_ADDR load_base
;
2536 bfd
= objfile
->obfd
;
2538 ehdr
= elf_tdata (bfd
)->elf_header
;
2539 phdr
= elf_tdata (bfd
)->phdr
;
2541 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2543 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2545 switch (phdr
[i
].p_type
)
2548 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2553 case PT_IA_64_UNWIND
:
2554 p_unwind
= phdr
+ i
;
2562 if (!p_text
|| !p_unwind
)
2563 return -UNW_ENOINFO
;
2565 /* Verify that the segment that contains the IP also contains
2566 the static unwind table. If not, we may be in the Linux kernel's
2567 DSO gate page in which case the unwind table is another segment.
2568 Otherwise, we are dealing with runtime-generated code, for which we
2569 have no info here. */
2570 segbase
= p_text
->p_vaddr
+ load_base
;
2572 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2575 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2577 if (phdr
[i
].p_type
== PT_LOAD
2578 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2581 /* Get the segbase from the section containing the
2583 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2587 return -UNW_ENOINFO
;
2590 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2591 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2592 dip
->gp
= ia64_find_global_pointer (ip
);
2593 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2594 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2595 dip
->u
.rti
.segbase
= segbase
;
2596 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2597 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2602 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2604 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2605 int need_unwind_info
, void *arg
)
2607 struct obj_section
*sec
= find_pc_section (ip
);
2614 /* XXX This only works if the host and the target architecture are
2615 both ia64 and if the have (more or less) the same kernel
2617 if (get_kernel_table (ip
, &di
) < 0)
2618 return -UNW_ENOINFO
;
2620 if (gdbarch_debug
>= 1)
2621 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2622 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2623 "length=%s,data=0x%s)\n",
2624 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2625 paddr_nz (di
.u
.ti
.segbase
),
2626 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2628 paddr_u (di
.u
.ti
.table_len
),
2629 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2633 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2637 if (gdbarch_debug
>= 1)
2638 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2639 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2640 "length=%s,data=0x%s)\n",
2641 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2642 paddr_nz (di
.u
.rti
.segbase
),
2643 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2645 paddr_u (di
.u
.rti
.table_len
),
2646 paddr_nz (di
.u
.rti
.table_data
));
2649 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2652 /* We no longer need the dyn info storage so free it. */
2658 /* Libunwind callback accessor function for cleanup. */
2660 ia64_put_unwind_info (unw_addr_space_t as
,
2661 unw_proc_info_t
*pip
, void *arg
)
2663 /* Nothing required for now. */
2666 /* Libunwind callback accessor function to get head of the dynamic
2667 unwind-info registration list. */
2669 ia64_get_dyn_info_list (unw_addr_space_t as
,
2670 unw_word_t
*dilap
, void *arg
)
2672 struct obj_section
*text_sec
;
2673 struct objfile
*objfile
;
2674 unw_word_t ip
, addr
;
2678 if (!libunwind_is_initialized ())
2679 return -UNW_ENOINFO
;
2681 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2685 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2686 ip
= text_sec
->addr
;
2687 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2690 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2691 /* We no longer need the dyn info storage so free it. */
2696 if (gdbarch_debug
>= 1)
2697 fprintf_unfiltered (gdb_stdlog
,
2698 "dynamic unwind table in objfile %s "
2699 "at 0x%s (gp=0x%s)\n",
2700 bfd_get_filename (objfile
->obfd
),
2701 paddr_nz (addr
), paddr_nz (di
.gp
));
2707 return -UNW_ENOINFO
;
2711 /* Frame interface functions for libunwind. */
2714 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2715 struct frame_id
*this_id
)
2720 CORE_ADDR prev_ip
, addr
;
2721 int realnum
, optimized
;
2722 enum lval_type lval
;
2725 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2726 if (frame_id_eq (id
, null_frame_id
))
2728 (*this_id
) = null_frame_id
;
2732 /* We must add the bsp as the special address for frame comparison
2734 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2735 bsp
= extract_unsigned_integer (buf
, 8);
2737 /* If the previous frame pc value is 0, then we are at the end of the stack
2738 and don't want to unwind past this frame. We return a null frame_id to
2740 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2741 &optimized
, &lval
, &addr
, &realnum
, buf
);
2742 prev_ip
= extract_unsigned_integer (buf
, 8);
2745 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2747 (*this_id
) = null_frame_id
;
2749 if (gdbarch_debug
>= 1)
2750 fprintf_unfiltered (gdb_stdlog
,
2751 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2752 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2753 paddr_nz (bsp
), next_frame
);
2757 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2759 int regnum
, int *optimizedp
,
2760 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2761 int *realnump
, gdb_byte
*valuep
)
2765 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2766 reg
= IA64_PR_REGNUM
;
2767 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2768 reg
= IA64_UNAT_REGNUM
;
2770 /* Let libunwind do most of the work. */
2771 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2772 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2774 /* No more to do if the value is not supposed to be supplied. */
2778 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2782 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2786 unsigned char buf
[MAX_REGISTER_SIZE
];
2788 /* Fetch predicate register rename base from current frame
2789 marker for this frame. */
2790 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2791 cfm
= extract_unsigned_integer (buf
, 8);
2792 rrb_pr
= (cfm
>> 32) & 0x3f;
2794 /* Adjust the register number to account for register rotation. */
2795 regnum
= VP16_REGNUM
2796 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2798 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2799 regnum
- VP0_REGNUM
, 1);
2800 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2802 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2806 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2807 regnum
- IA64_NAT0_REGNUM
, 1);
2808 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2811 else if (regnum
== IA64_BSP_REGNUM
)
2813 char cfm_valuep
[MAX_REGISTER_SIZE
];
2816 enum lval_type cfm_lval
;
2818 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2820 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2821 This corresponds to what the hardware bsp register will be if we pop the frame
2822 back which is why we might have been called. We know that libunwind will pass us back
2823 the beginning of the current frame so we should just add sof to it. */
2824 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2825 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2826 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2827 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2828 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2830 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2834 if (gdbarch_debug
>= 1)
2835 fprintf_unfiltered (gdb_stdlog
,
2836 "libunwind prev register <%s> is 0x%s\n",
2837 (regnum
< IA64_GR32_REGNUM
2838 || (regnum
> IA64_GR127_REGNUM
2839 && regnum
< LAST_PSEUDO_REGNUM
))
2840 ? ia64_register_names
[regnum
]
2841 : (regnum
< LAST_PSEUDO_REGNUM
2842 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2844 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2847 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2850 ia64_libunwind_frame_this_id
,
2851 ia64_libunwind_frame_prev_register
2854 static const struct frame_unwind
*
2855 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2857 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2858 return &ia64_libunwind_frame_unwind
;
2864 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2865 struct frame_id
*this_id
)
2872 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2873 if (frame_id_eq (id
, null_frame_id
))
2875 (*this_id
) = null_frame_id
;
2879 /* We must add the bsp as the special address for frame comparison
2881 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2882 bsp
= extract_unsigned_integer (buf
, 8);
2884 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2885 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2887 if (gdbarch_debug
>= 1)
2888 fprintf_unfiltered (gdb_stdlog
,
2889 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2890 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2891 paddr_nz (bsp
), next_frame
);
2895 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2897 int regnum
, int *optimizedp
,
2898 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2899 int *realnump
, gdb_byte
*valuep
)
2903 CORE_ADDR prev_ip
, addr
;
2904 int realnum
, optimized
;
2905 enum lval_type lval
;
2908 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2909 method of getting previous registers. */
2910 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2911 &optimized
, &lval
, &addr
, &realnum
, buf
);
2912 prev_ip
= extract_unsigned_integer (buf
, 8);
2916 void *tmp_cache
= NULL
;
2917 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2918 addrp
, realnump
, valuep
);
2921 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2922 addrp
, realnump
, valuep
);
2925 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2928 ia64_libunwind_sigtramp_frame_this_id
,
2929 ia64_libunwind_sigtramp_frame_prev_register
2932 static const struct frame_unwind
*
2933 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2935 if (libunwind_is_initialized ())
2937 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2938 return &ia64_libunwind_sigtramp_frame_unwind
;
2942 return ia64_sigtramp_frame_sniffer (next_frame
);
2945 /* Set of libunwind callback acccessor functions. */
2946 static unw_accessors_t ia64_unw_accessors
=
2948 ia64_find_proc_info_x
,
2949 ia64_put_unwind_info
,
2950 ia64_get_dyn_info_list
,
2958 /* Set of special libunwind callback acccessor functions specific for accessing
2959 the rse registers. At the top of the stack, we want libunwind to figure out
2960 how to read r32 - r127. Though usually they are found sequentially in memory
2961 starting from $bof, this is not always true. */
2962 static unw_accessors_t ia64_unw_rse_accessors
=
2964 ia64_find_proc_info_x
,
2965 ia64_put_unwind_info
,
2966 ia64_get_dyn_info_list
,
2968 ia64_access_rse_reg
,
2974 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2975 static struct libunwind_descr ia64_libunwind_descr
=
2980 &ia64_unw_accessors
,
2981 &ia64_unw_rse_accessors
,
2984 #endif /* HAVE_LIBUNWIND_IA64_H */
2986 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2987 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2988 is the type (which is known to be struct, union or array). */
2990 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2992 struct type
*float_elt_type
;
2994 /* HFAs are structures (or arrays) consisting entirely of floating
2995 point values of the same length. Up to 8 of these are returned
2996 in registers. Don't use the struct convention when this is the
2998 float_elt_type
= is_float_or_hfa_type (type
);
2999 if (float_elt_type
!= NULL
3000 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3003 /* Other structs of length 32 or less are returned in r8-r11.
3004 Don't use the struct convention for those either. */
3005 return TYPE_LENGTH (type
) > 32;
3009 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3012 struct type
*float_elt_type
;
3014 float_elt_type
= is_float_or_hfa_type (type
);
3015 if (float_elt_type
!= NULL
)
3017 char from
[MAX_REGISTER_SIZE
];
3019 int regnum
= IA64_FR8_REGNUM
;
3020 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3024 regcache_cooked_read (regcache
, regnum
, from
);
3025 convert_typed_floating (from
, builtin_type_ia64_ext
,
3026 (char *)valbuf
+ offset
, float_elt_type
);
3027 offset
+= TYPE_LENGTH (float_elt_type
);
3035 int regnum
= IA64_GR8_REGNUM
;
3036 int reglen
= TYPE_LENGTH (ia64_register_type (NULL
, IA64_GR8_REGNUM
));
3037 int n
= TYPE_LENGTH (type
) / reglen
;
3038 int m
= TYPE_LENGTH (type
) % reglen
;
3043 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3044 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3051 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3052 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3058 ia64_extract_struct_value_address (struct regcache
*regcache
)
3060 error (_("ia64_extract_struct_value_address called and cannot get struct value address"));
3066 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3068 switch (TYPE_CODE (t
))
3072 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3079 case TYPE_CODE_ARRAY
:
3081 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3084 case TYPE_CODE_STRUCT
:
3088 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3089 if (!is_float_or_hfa_type_recurse
3090 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3101 /* Determine if the given type is one of the floating point types or
3102 and HFA (which is a struct, array, or combination thereof whose
3103 bottom-most elements are all of the same floating point type). */
3105 static struct type
*
3106 is_float_or_hfa_type (struct type
*t
)
3108 struct type
*et
= 0;
3110 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3114 /* Return 1 if the alignment of T is such that the next even slot
3115 should be used. Return 0, if the next available slot should
3116 be used. (See section 8.5.1 of the IA-64 Software Conventions
3117 and Runtime manual). */
3120 slot_alignment_is_next_even (struct type
*t
)
3122 switch (TYPE_CODE (t
))
3126 if (TYPE_LENGTH (t
) > 8)
3130 case TYPE_CODE_ARRAY
:
3132 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3133 case TYPE_CODE_STRUCT
:
3137 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3138 if (slot_alignment_is_next_even
3139 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3148 /* Attempt to find (and return) the global pointer for the given
3151 This is a rather nasty bit of code searchs for the .dynamic section
3152 in the objfile corresponding to the pc of the function we're trying
3153 to call. Once it finds the addresses at which the .dynamic section
3154 lives in the child process, it scans the Elf64_Dyn entries for a
3155 DT_PLTGOT tag. If it finds one of these, the corresponding
3156 d_un.d_ptr value is the global pointer. */
3159 ia64_find_global_pointer (CORE_ADDR faddr
)
3161 struct obj_section
*faddr_sect
;
3163 faddr_sect
= find_pc_section (faddr
);
3164 if (faddr_sect
!= NULL
)
3166 struct obj_section
*osect
;
3168 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3170 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3174 if (osect
< faddr_sect
->objfile
->sections_end
)
3179 while (addr
< osect
->endaddr
)
3185 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3188 tag
= extract_signed_integer (buf
, sizeof (buf
));
3190 if (tag
== DT_PLTGOT
)
3192 CORE_ADDR global_pointer
;
3194 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3197 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3200 return global_pointer
;
3213 /* Given a function's address, attempt to find (and return) the
3214 corresponding (canonical) function descriptor. Return 0 if
3217 find_extant_func_descr (CORE_ADDR faddr
)
3219 struct obj_section
*faddr_sect
;
3221 /* Return early if faddr is already a function descriptor. */
3222 faddr_sect
= find_pc_section (faddr
);
3223 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3226 if (faddr_sect
!= NULL
)
3228 struct obj_section
*osect
;
3229 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3231 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3235 if (osect
< faddr_sect
->objfile
->sections_end
)
3240 while (addr
< osect
->endaddr
)
3246 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3249 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3251 if (faddr
== faddr2
)
3261 /* Attempt to find a function descriptor corresponding to the
3262 given address. If none is found, construct one on the
3263 stack using the address at fdaptr. */
3266 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3270 fdesc
= find_extant_func_descr (faddr
);
3274 CORE_ADDR global_pointer
;
3280 global_pointer
= ia64_find_global_pointer (faddr
);
3282 if (global_pointer
== 0)
3283 global_pointer
= read_register (IA64_GR1_REGNUM
);
3285 store_unsigned_integer (buf
, 8, faddr
);
3286 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3288 write_memory (fdesc
, buf
, 16);
3294 /* Use the following routine when printing out function pointers
3295 so the user can see the function address rather than just the
3296 function descriptor. */
3298 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3299 struct target_ops
*targ
)
3301 struct obj_section
*s
;
3303 s
= find_pc_section (addr
);
3305 /* check if ADDR points to a function descriptor. */
3306 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3307 return read_memory_unsigned_integer (addr
, 8);
3313 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3319 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3320 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3321 int nargs
, struct value
**args
, CORE_ADDR sp
,
3322 int struct_return
, CORE_ADDR struct_addr
)
3328 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3330 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3331 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3335 /* Count the number of slots needed for the arguments. */
3336 for (argno
= 0; argno
< nargs
; argno
++)
3339 type
= check_typedef (value_type (arg
));
3340 len
= TYPE_LENGTH (type
);
3342 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3345 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3348 nslots
+= (len
+ 7) / 8;
3351 /* Divvy up the slots between the RSE and the memory stack. */
3352 rseslots
= (nslots
> 8) ? 8 : nslots
;
3353 memslots
= nslots
- rseslots
;
3355 /* Allocate a new RSE frame. */
3356 cfm
= read_register (IA64_CFM_REGNUM
);
3358 bsp
= read_register (IA64_BSP_REGNUM
);
3359 new_bsp
= rse_address_add (bsp
, rseslots
);
3360 write_register (IA64_BSP_REGNUM
, new_bsp
);
3362 pfs
= read_register (IA64_PFS_REGNUM
);
3363 pfs
&= 0xc000000000000000LL
;
3364 pfs
|= (cfm
& 0xffffffffffffLL
);
3365 write_register (IA64_PFS_REGNUM
, pfs
);
3367 cfm
&= 0xc000000000000000LL
;
3369 write_register (IA64_CFM_REGNUM
, cfm
);
3371 /* We will attempt to find function descriptors in the .opd segment,
3372 but if we can't we'll construct them ourselves. That being the
3373 case, we'll need to reserve space on the stack for them. */
3374 funcdescaddr
= sp
- nfuncargs
* 16;
3375 funcdescaddr
&= ~0xfLL
;
3377 /* Adjust the stack pointer to it's new value. The calling conventions
3378 require us to have 16 bytes of scratch, plus whatever space is
3379 necessary for the memory slots and our function descriptors. */
3380 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3381 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3383 /* Place the arguments where they belong. The arguments will be
3384 either placed in the RSE backing store or on the memory stack.
3385 In addition, floating point arguments or HFAs are placed in
3386 floating point registers. */
3388 floatreg
= IA64_FR8_REGNUM
;
3389 for (argno
= 0; argno
< nargs
; argno
++)
3391 struct type
*float_elt_type
;
3394 type
= check_typedef (value_type (arg
));
3395 len
= TYPE_LENGTH (type
);
3397 /* Special handling for function parameters. */
3399 && TYPE_CODE (type
) == TYPE_CODE_PTR
3400 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3404 store_unsigned_integer (val_buf
, 8,
3405 find_func_descr (extract_unsigned_integer (value_contents (arg
), 8),
3407 if (slotnum
< rseslots
)
3408 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3410 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3417 /* Skip odd slot if necessary... */
3418 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3426 memset (val_buf
, 0, 8);
3427 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3429 if (slotnum
< rseslots
)
3430 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3432 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3439 /* Handle floating point types (including HFAs). */
3440 float_elt_type
= is_float_or_hfa_type (type
);
3441 if (float_elt_type
!= NULL
)
3444 len
= TYPE_LENGTH (type
);
3445 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3447 char to
[MAX_REGISTER_SIZE
];
3448 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3449 to
, builtin_type_ia64_ext
);
3450 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3452 argoffset
+= TYPE_LENGTH (float_elt_type
);
3453 len
-= TYPE_LENGTH (float_elt_type
);
3458 /* Store the struct return value in r8 if necessary. */
3461 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3464 global_pointer
= ia64_find_global_pointer (func_addr
);
3466 if (global_pointer
!= 0)
3467 write_register (IA64_GR1_REGNUM
, global_pointer
);
3469 write_register (IA64_BR0_REGNUM
, bp_addr
);
3471 write_register (sp_regnum
, sp
);
3476 static struct frame_id
3477 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3482 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3483 sp
= extract_unsigned_integer (buf
, 8);
3485 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3486 bsp
= extract_unsigned_integer (buf
, 8);
3488 if (gdbarch_debug
>= 1)
3489 fprintf_unfiltered (gdb_stdlog
,
3490 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3491 paddr_nz (frame_pc_unwind (next_frame
)),
3492 paddr_nz (sp
), paddr_nz (bsp
));
3494 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3498 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3501 CORE_ADDR ip
, psr
, pc
;
3503 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3504 ip
= extract_unsigned_integer (buf
, 8);
3505 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3506 psr
= extract_unsigned_integer (buf
, 8);
3508 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3513 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3514 const gdb_byte
*valbuf
)
3516 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3518 char to
[MAX_REGISTER_SIZE
];
3519 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3520 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3521 target_store_registers (IA64_FR8_REGNUM
);
3524 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3528 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3529 struct regcache
*regcache
,
3530 CORE_ADDR memaddr
, int nr_bytes
,
3531 CORE_ADDR
*targ_addr
, int *targ_len
)
3533 *targ_addr
= memaddr
;
3534 *targ_len
= nr_bytes
;
3538 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3540 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3541 return print_insn_ia64 (memaddr
, info
);
3544 static struct gdbarch
*
3545 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3547 struct gdbarch
*gdbarch
;
3548 struct gdbarch_tdep
*tdep
;
3550 /* If there is already a candidate, use it. */
3551 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3553 return arches
->gdbarch
;
3555 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3556 gdbarch
= gdbarch_alloc (&info
, tdep
);
3558 tdep
->sigcontext_register_address
= 0;
3560 /* Define the ia64 floating-point format to gdb. */
3561 builtin_type_ia64_ext
=
3562 init_type (TYPE_CODE_FLT
, 128 / 8,
3563 0, "builtin_type_ia64_ext", NULL
);
3564 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = &floatformat_ia64_ext
;
3566 /* According to the ia64 specs, instructions that store long double
3567 floats in memory use a long-double format different than that
3568 used in the floating registers. The memory format matches the
3569 x86 extended float format which is 80 bits. An OS may choose to
3570 use this format (e.g. GNU/Linux) or choose to use a different
3571 format for storing long doubles (e.g. HPUX). In the latter case,
3572 the setting of the format may be moved/overridden in an
3573 OS-specific tdep file. */
3574 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
3576 set_gdbarch_short_bit (gdbarch
, 16);
3577 set_gdbarch_int_bit (gdbarch
, 32);
3578 set_gdbarch_long_bit (gdbarch
, 64);
3579 set_gdbarch_long_long_bit (gdbarch
, 64);
3580 set_gdbarch_float_bit (gdbarch
, 32);
3581 set_gdbarch_double_bit (gdbarch
, 64);
3582 set_gdbarch_long_double_bit (gdbarch
, 128);
3583 set_gdbarch_ptr_bit (gdbarch
, 64);
3585 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3586 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3587 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3588 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3590 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3591 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3592 gets a number of extra failures. */
3593 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3594 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3596 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3597 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3598 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3599 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3600 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3601 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3602 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3604 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3606 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3607 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3609 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3610 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3612 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3613 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3614 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3615 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3616 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3618 /* Settings for calling functions in the inferior. */
3619 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3620 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3621 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3623 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3624 #ifdef HAVE_LIBUNWIND_IA64_H
3625 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3626 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3627 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3629 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3631 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3632 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3634 /* Settings that should be unnecessary. */
3635 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3637 set_gdbarch_remote_translate_xfer_address (
3638 gdbarch
, ia64_remote_translate_xfer_address
);
3640 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3641 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3643 /* Hook in ABI-specific overrides, if they have been registered. */
3644 gdbarch_init_osabi (info
, gdbarch
);
3649 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3652 _initialize_ia64_tdep (void)
3654 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);