* lynx-nat.c: Add Sparc support.
[deliverable/binutils-gdb.git] / gdb / lynx-nat.c
1 /* Native-dependent code for LynxOS.
2 Copyright 1993, 1994 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "inferior.h"
23 #include "target.h"
24
25 #include <sys/ptrace.h>
26 #include <sys/wait.h>
27 #include <sys/fpp.h>
28
29 static unsigned long registers_addr PARAMS ((int pid));
30
31 #define X(ENTRY)(offsetof(struct econtext, ENTRY))
32
33 #ifdef I386
34 /* Mappings from tm-i386v.h */
35
36 static int regmap[] =
37 {
38 X(eax),
39 X(ecx),
40 X(edx),
41 X(ebx),
42 X(esp), /* sp */
43 X(ebp), /* fp */
44 X(esi),
45 X(edi),
46 X(eip), /* pc */
47 X(flags), /* ps */
48 X(cs),
49 X(ss),
50 X(ds),
51 X(es),
52 X(ecode), /* Lynx doesn't give us either fs or gs, so */
53 X(fault), /* we just substitute these two in the hopes
54 that they are useful. */
55 };
56 #endif
57
58 #ifdef M68K
59 /* Mappings from tm-m68k.h */
60
61 static int regmap[] =
62 {
63 X(regs[0]), /* d0 */
64 X(regs[1]), /* d1 */
65 X(regs[2]), /* d2 */
66 X(regs[3]), /* d3 */
67 X(regs[4]), /* d4 */
68 X(regs[5]), /* d5 */
69 X(regs[6]), /* d6 */
70 X(regs[7]), /* d7 */
71 X(regs[8]), /* a0 */
72 X(regs[9]), /* a1 */
73 X(regs[10]), /* a2 */
74 X(regs[11]), /* a3 */
75 X(regs[12]), /* a4 */
76 X(regs[13]), /* a5 */
77 X(regs[14]), /* fp */
78 offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
79 X(status), /* ps */
80 X(pc),
81
82 X(fregs[0*3]), /* fp0 */
83 X(fregs[1*3]), /* fp1 */
84 X(fregs[2*3]), /* fp2 */
85 X(fregs[3*3]), /* fp3 */
86 X(fregs[4*3]), /* fp4 */
87 X(fregs[5*3]), /* fp5 */
88 X(fregs[6*3]), /* fp6 */
89 X(fregs[7*3]), /* fp7 */
90
91 X(fcregs[0]), /* fpcontrol */
92 X(fcregs[1]), /* fpstatus */
93 X(fcregs[2]), /* fpiaddr */
94 X(ssw), /* fpcode */
95 X(fault), /* fpflags */
96 };
97 #endif
98
99 #ifdef SPARC
100 /* Mappings from tm-sparc.h */
101
102 #define FX(ENTRY)(offsetof(struct fcontext, ENTRY))
103
104 static int regmap[] =
105 {
106 -1, /* g0 */
107 X(g1),
108 X(g2),
109 X(g3),
110 X(g4),
111 -1, /* g5->g7 aren't saved by Lynx */
112 -1,
113 -1,
114
115 X(o[0]),
116 X(o[1]),
117 X(o[2]),
118 X(o[3]),
119 X(o[4]),
120 X(o[5]),
121 X(o[6]), /* sp */
122 X(o[7]), /* ra */
123
124 -1,-1,-1,-1,-1,-1,-1,-1, /* l0 -> l7 */
125
126 -1,-1,-1,-1,-1,-1,-1,-1, /* i0 -> i7 */
127
128 FX(f.fregs[0]), /* f0 */
129 FX(f.fregs[1]),
130 FX(f.fregs[2]),
131 FX(f.fregs[3]),
132 FX(f.fregs[4]),
133 FX(f.fregs[5]),
134 FX(f.fregs[6]),
135 FX(f.fregs[7]),
136 FX(f.fregs[8]),
137 FX(f.fregs[9]),
138 FX(f.fregs[10]),
139 FX(f.fregs[11]),
140 FX(f.fregs[12]),
141 FX(f.fregs[13]),
142 FX(f.fregs[14]),
143 FX(f.fregs[15]),
144 FX(f.fregs[16]),
145 FX(f.fregs[17]),
146 FX(f.fregs[18]),
147 FX(f.fregs[19]),
148 FX(f.fregs[20]),
149 FX(f.fregs[21]),
150 FX(f.fregs[22]),
151 FX(f.fregs[23]),
152 FX(f.fregs[24]),
153 FX(f.fregs[25]),
154 FX(f.fregs[26]),
155 FX(f.fregs[27]),
156 FX(f.fregs[28]),
157 FX(f.fregs[29]),
158 FX(f.fregs[30]),
159 FX(f.fregs[31]),
160
161 X(y),
162 X(psr),
163 X(wim),
164 X(tbr),
165 X(pc),
166 X(npc),
167 FX(fsr), /* fpsr */
168 -1, /* cpsr */
169 };
170 #endif
171
172 #ifdef SPARC
173
174 /* This routine handles some oddball cases for Sparc registers and LynxOS.
175 In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
176 It also handles knows where to find the I & L regs on the stack. */
177
178 void
179 fetch_inferior_registers (regno)
180 int regno;
181 {
182 int whatregs = 0;
183
184 #define WHATREGS_FLOAT 1
185 #define WHATREGS_GEN 2
186 #define WHATREGS_STACK 4
187
188 if (regno == -1)
189 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
190 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
191 whatregs = WHATREGS_STACK;
192 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
193 whatregs = WHATREGS_FLOAT;
194 else
195 whatregs = WHATREGS_GEN;
196
197 if (whatregs & WHATREGS_GEN)
198 {
199 struct econtext ec; /* general regs */
200 char buf[MAX_REGISTER_RAW_SIZE];
201 int retval;
202 int i;
203
204 errno = 0;
205 retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
206 0);
207 if (errno)
208 perror_with_name ("Sparc fetch_inferior_registers(ptrace)");
209
210 memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
211 supply_register (G0_REGNUM, buf);
212 supply_register (TBR_REGNUM, (char *)&ec.tbr);
213
214 memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
215 4 * REGISTER_RAW_SIZE (G1_REGNUM));
216 for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
217 register_valid[i] = 1;
218
219 supply_register (PS_REGNUM, (char *)&ec.psr);
220 supply_register (Y_REGNUM, (char *)&ec.y);
221 supply_register (PC_REGNUM, (char *)&ec.pc);
222 supply_register (NPC_REGNUM, (char *)&ec.npc);
223 supply_register (WIM_REGNUM, (char *)&ec.wim);
224
225 memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
226 8 * REGISTER_RAW_SIZE (O0_REGNUM));
227 for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
228 register_valid[i] = 1;
229 }
230
231 if (whatregs & WHATREGS_STACK)
232 {
233 CORE_ADDR sp;
234 int i;
235
236 sp = read_register (SP_REGNUM);
237
238 target_xfer_memory (sp, &registers[REGISTER_BYTE(I0_REGNUM)],
239 8 * REGISTER_RAW_SIZE (I0_REGNUM), 0);
240 for (i = I0_REGNUM; i <= I7_REGNUM; i++)
241 register_valid[i] = 1;
242
243 sp += 8 * REGISTER_RAW_SIZE (I0_REGNUM);
244
245 target_xfer_memory (sp, &registers[REGISTER_BYTE(L0_REGNUM)],
246 8 * REGISTER_RAW_SIZE (L0_REGNUM), 0);
247 for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
248 register_valid[i] = 1;
249 }
250
251 if (whatregs & WHATREGS_FLOAT)
252 {
253 struct fcontext fc; /* fp regs */
254 int retval;
255 int i;
256
257 errno = 0;
258 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
259 0);
260 if (errno)
261 perror_with_name ("Sparc fetch_inferior_registers(ptrace)");
262
263 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
264 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
265 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
266 register_valid[i] = 1;
267
268 supply_register (FPS_REGNUM, (char *)&fc.fsr);
269 }
270 }
271
272 /* This routine handles storing of the I & L regs for the Sparc. The trick
273 here is that they actually live on the stack. The really tricky part is
274 that when changing the stack pointer, the I & L regs must be written to
275 where the new SP points, otherwise the regs will be incorrect when the
276 process is started up again. We assume that the I & L regs are valid at
277 this point. */
278
279 void
280 store_inferior_registers (regno)
281 int regno;
282 {
283 int whatregs = 0;
284
285 if (regno == -1)
286 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
287 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
288 whatregs = WHATREGS_STACK;
289 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
290 whatregs = WHATREGS_FLOAT;
291 else if (regno == SP_REGNUM)
292 whatregs = WHATREGS_STACK | WHATREGS_GEN;
293 else
294 whatregs = WHATREGS_GEN;
295
296 if (whatregs & WHATREGS_GEN)
297 {
298 struct econtext ec; /* general regs */
299 int retval;
300
301 ec.tbr = read_register (TBR_REGNUM);
302 memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
303 4 * REGISTER_RAW_SIZE (G1_REGNUM));
304
305 ec.psr = read_register (PS_REGNUM);
306 ec.y = read_register (Y_REGNUM);
307 ec.pc = read_register (PC_REGNUM);
308 ec.npc = read_register (NPC_REGNUM);
309 ec.wim = read_register (WIM_REGNUM);
310
311 memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
312 8 * REGISTER_RAW_SIZE (O0_REGNUM));
313
314 errno = 0;
315 retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
316 0);
317 if (errno)
318 perror_with_name ("Sparc fetch_inferior_registers(ptrace)");
319 }
320
321 if (whatregs & WHATREGS_STACK)
322 {
323 int regoffset;
324 CORE_ADDR sp;
325
326 sp = read_register (SP_REGNUM);
327
328 if (regno == -1 || regno == SP_REGNUM)
329 {
330 if (!register_valid[L0_REGNUM+5])
331 abort();
332 target_xfer_memory (sp, &registers[REGISTER_BYTE (I0_REGNUM)],
333 8 * REGISTER_RAW_SIZE (I0_REGNUM), 1);
334 sp += 8 * REGISTER_RAW_SIZE (I0_REGNUM);
335 target_xfer_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
336 8 * REGISTER_RAW_SIZE (L0_REGNUM), 1);
337 }
338 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
339 {
340 if (!register_valid[regno])
341 abort();
342 if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
343 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
344 + 8 * REGISTER_RAW_SIZE (I0_REGNUM);
345 else
346 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM);
347 target_xfer_memory (sp + regoffset, &registers[REGISTER_BYTE (regno)],
348 REGISTER_RAW_SIZE (regno), 1);
349 }
350 }
351
352 if (whatregs & WHATREGS_FLOAT)
353 {
354 struct fcontext fc; /* fp regs */
355 int retval;
356
357 /* We read fcontext first so that we can get good values for fq_t... */
358 errno = 0;
359 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
360 0);
361 if (errno)
362 perror_with_name ("Sparc fetch_inferior_registers(ptrace)");
363
364 memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
365 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
366
367 fc.fsr = read_register (FPS_REGNUM);
368
369 errno = 0;
370 retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
371 0);
372 if (errno)
373 perror_with_name ("Sparc fetch_inferior_registers(ptrace)");
374 }
375 }
376 #endif
377
378 #ifndef SPARC
379
380 /* Return the offset relative to the start of the per-thread data to the
381 saved context block. */
382
383 static unsigned long
384 registers_addr(pid)
385 int pid;
386 {
387 CORE_ADDR stblock;
388 int ecpoff = offsetof(st_t, ecp);
389 CORE_ADDR ecp;
390
391 errno = 0;
392 stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE)0,
393 0);
394 if (errno)
395 perror_with_name ("registers_addr(PTRACE_THREADUSER)");
396
397 ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE)ecpoff,
398 0);
399 if (errno)
400 perror_with_name ("registers_addr(PTRACE_PEEKTHREAD)");
401
402 return ecp - stblock;
403 }
404
405 /* Fetch one or more registers from the inferior. REGNO == -1 to get
406 them all. We actually fetch more than requested, when convenient,
407 marking them as valid so we won't fetch them again. */
408
409 void
410 fetch_inferior_registers (regno)
411 int regno;
412 {
413 int reglo, reghi;
414 int i;
415 unsigned long ecp;
416
417 if (regno == -1)
418 {
419 reglo = 0;
420 reghi = NUM_REGS - 1;
421 }
422 else
423 reglo = reghi = regno;
424
425 ecp = registers_addr (inferior_pid);
426
427 for (regno = reglo; regno <= reghi && regmap[regno] != -1; regno++)
428 {
429 char buf[MAX_REGISTER_RAW_SIZE];
430 int ptrace_fun = PTRACE_PEEKTHREAD;
431
432 #ifdef PTRACE_PEEKUSP
433 ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
434 #endif
435
436 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
437 {
438 unsigned int reg;
439
440 errno = 0;
441 reg = ptrace (ptrace_fun, inferior_pid,
442 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
443 if (errno)
444 perror_with_name ("fetch_inferior_registers(ptrace)");
445
446 *(int *)&buf[i] = reg;
447 }
448 supply_register (regno, buf);
449 }
450 }
451
452 /* Store our register values back into the inferior.
453 If REGNO is -1, do this for all registers.
454 Otherwise, REGNO specifies which register (so we can save time). */
455
456 void
457 store_inferior_registers (regno)
458 int regno;
459 {
460 int reglo, reghi;
461 int i;
462 unsigned long ecp;
463
464 if (regno == -1)
465 {
466 reglo = 0;
467 reghi = NUM_REGS - 1;
468 }
469 else
470 reglo = reghi = regno;
471
472 ecp = registers_addr (inferior_pid);
473
474 for (regno = reglo; regno <= reghi && regmap[regno] != -1; regno++)
475 {
476 int ptrace_fun = PTRACE_POKEUSER;
477
478 #ifdef PTRACE_POKEUSP
479 ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
480 #endif
481
482 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
483 {
484 unsigned int reg;
485
486 reg = *(unsigned int *)&registers[REGISTER_BYTE (regno) + i];
487
488 errno = 0;
489 ptrace (ptrace_fun, inferior_pid,
490 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
491 if (errno)
492 perror_with_name ("PTRACE_POKEUSER");
493 }
494 }
495 }
496 #endif /* ifndef SPARC */
497
498 /* Wait for child to do something. Return pid of child, or -1 in case
499 of error; store status through argument pointer OURSTATUS. */
500
501 int
502 child_wait (pid, ourstatus)
503 int pid;
504 struct target_waitstatus *ourstatus;
505 {
506 int save_errno;
507 int thread;
508 int status;
509
510 while (1)
511 {
512 int sig;
513
514 if (attach_flag)
515 set_sigint_trap(); /* Causes SIGINT to be passed on to the
516 attached process. */
517 pid = wait (&status);
518 #ifdef SPARC
519 /* Swap halves of status so that the rest of GDB can understand it */
520 status = (status << 16) | ((unsigned)status >> 16);
521 #endif
522
523 save_errno = errno;
524
525 if (attach_flag)
526 clear_sigint_trap();
527
528 if (pid == -1)
529 {
530 if (save_errno == EINTR)
531 continue;
532 fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
533 safe_strerror (save_errno));
534 /* Claim it exited with unknown signal. */
535 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
536 ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
537 return -1;
538 }
539
540 if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
541 continue;
542
543 /* thread = WIFTID (status);*/
544 thread = status >> 16;
545
546 /* Initial thread value can only be acquired via wait, so we have to
547 resort to this hack. */
548
549 if (TIDGET (inferior_pid) == 0)
550 {
551 inferior_pid = BUILDPID (inferior_pid, thread);
552 add_thread (inferior_pid);
553 }
554
555 pid = BUILDPID (pid, thread);
556
557 store_waitstatus (ourstatus, status);
558
559 return pid;
560 }
561 }
562
563 /* Convert a Lynx process ID to a string. Returns the string in a static
564 buffer. */
565
566 char *
567 lynx_pid_to_str (pid)
568 int pid;
569 {
570 static char buf[40];
571
572 sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
573
574 return buf;
575 }
576
577 /* Extract the register values out of the core file and store
578 them where `read_register' will find them.
579
580 CORE_REG_SECT points to the register values themselves, read into memory.
581 CORE_REG_SIZE is the size of that area.
582 WHICH says which set of registers we are handling (0 = int, 2 = float
583 on machines where they are discontiguous).
584 REG_ADDR is the offset from u.u_ar0 to the register values relative to
585 core_reg_sect. This is used with old-fashioned core files to
586 locate the registers in a large upage-plus-stack ".reg" section.
587 Original upage address X is at location core_reg_sect+x+reg_addr.
588 */
589
590 void
591 fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
592 char *core_reg_sect;
593 unsigned core_reg_size;
594 int which;
595 unsigned reg_addr;
596 {
597 struct st_entry s;
598 unsigned int regno;
599
600 for (regno = 0; regno < NUM_REGS; regno++)
601 supply_register (regno, core_reg_sect + offsetof (st_t, ec)
602 + regmap[regno]);
603 }
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