1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
3 Copyright 2004, 2005, 2007 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #if defined (HAVE_STRING_H)
30 #include "gdb_assert.h"
33 #include "gdb/sim-m32c.h"
37 #include "arch-utils.h"
39 #include "frame-unwind.h"
40 #include "dwarf2-frame.h"
41 #include "dwarf2expr.h"
45 #include "reggroups.h"
46 #include "prologue-value.h"
50 /* The m32c tdep structure. */
52 static struct reggroup
*m32c_dma_reggroup
;
56 /* The type of a function that moves the value of REG between CACHE or
57 BUF --- in either direction. */
58 typedef void (m32c_move_reg_t
) (struct m32c_reg
*reg
,
59 struct regcache
*cache
,
64 /* The name of this register. */
70 /* The architecture this register belongs to. */
73 /* Its GDB register number. */
76 /* Its sim register number. */
79 /* Its DWARF register number, or -1 if it doesn't have one. */
82 /* Register group memberships. */
83 unsigned int general_p
: 1;
84 unsigned int dma_p
: 1;
85 unsigned int system_p
: 1;
86 unsigned int save_restore_p
: 1;
88 /* Functions to read its value from a regcache, and write its value
90 m32c_move_reg_t
*read
, *write
;
92 /* Data for READ and WRITE functions. The exact meaning depends on
93 the specific functions selected; see the comments for those
95 struct m32c_reg
*rx
, *ry
;
100 /* An overestimate of the number of raw and pseudoregisters we will
101 have. The exact answer depends on the variant of the architecture
102 at hand, but we can use this to declare statically allocated
103 arrays, and bump it up when needed. */
104 #define M32C_MAX_NUM_REGS (75)
106 /* The largest assigned DWARF register number. */
107 #define M32C_MAX_DWARF_REGNUM (40)
112 /* All the registers for this variant, indexed by GDB register
113 number, and the number of registers present. */
114 struct m32c_reg regs
[M32C_MAX_NUM_REGS
];
116 /* The number of valid registers. */
119 /* Interesting registers. These are pointers into REGS. */
120 struct m32c_reg
*pc
, *flg
;
121 struct m32c_reg
*r0
, *r1
, *r2
, *r3
, *a0
, *a1
;
122 struct m32c_reg
*r2r0
, *r3r2r1r0
, *r3r1r2r0
;
123 struct m32c_reg
*sb
, *fb
, *sp
;
125 /* A table indexed by DWARF register numbers, pointing into
127 struct m32c_reg
*dwarf_regs
[M32C_MAX_DWARF_REGNUM
+ 1];
129 /* Types for this architecture. We can't use the builtin_type_foo
130 types, because they're not initialized when building a gdbarch
132 struct type
*voyd
, *ptr_voyd
, *func_voyd
;
133 struct type
*uint8
, *uint16
;
134 struct type
*int8
, *int16
, *int32
, *int64
;
136 /* The types for data address and code address registers. */
137 struct type
*data_addr_reg_type
, *code_addr_reg_type
;
139 /* The number of bytes a return address pushed by a 'jsr' instruction
140 occupies on the stack. */
143 /* The number of bytes an address register occupies on the stack
144 when saved by an 'enter' or 'pushm' instruction. */
152 make_types (struct gdbarch
*arch
)
154 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
155 unsigned long mach
= gdbarch_bfd_arch_info (arch
)->mach
;
156 int data_addr_reg_bits
, code_addr_reg_bits
;
160 /* This is used to clip CORE_ADDR values, so this value is
161 appropriate both on the m32c, where pointers are 32 bits long,
162 and on the m16c, where pointers are sixteen bits long, but there
163 may be code above the 64k boundary. */
164 set_gdbarch_addr_bit (arch
, 24);
166 /* GCC uses 32 bits for addrs in the dwarf info, even though
167 only 16/24 bits are used. Setting addr_bit to 24 causes
168 errors in reading the dwarf addresses. */
169 set_gdbarch_addr_bit (arch
, 32);
172 set_gdbarch_int_bit (arch
, 16);
176 data_addr_reg_bits
= 16;
177 code_addr_reg_bits
= 24;
178 set_gdbarch_ptr_bit (arch
, 16);
179 tdep
->ret_addr_bytes
= 3;
180 tdep
->push_addr_bytes
= 2;
184 data_addr_reg_bits
= 24;
185 code_addr_reg_bits
= 24;
186 set_gdbarch_ptr_bit (arch
, 32);
187 tdep
->ret_addr_bytes
= 4;
188 tdep
->push_addr_bytes
= 4;
195 /* The builtin_type_mumble variables are sometimes uninitialized when
196 this is called, so we avoid using them. */
197 tdep
->voyd
= init_type (TYPE_CODE_VOID
, 1, 0, "void", NULL
);
198 tdep
->ptr_voyd
= init_type (TYPE_CODE_PTR
, gdbarch_ptr_bit (arch
) / 8,
199 TYPE_FLAG_UNSIGNED
, NULL
, NULL
);
200 TYPE_TARGET_TYPE (tdep
->ptr_voyd
) = tdep
->voyd
;
201 tdep
->func_voyd
= lookup_function_type (tdep
->voyd
);
203 sprintf (type_name
, "%s_data_addr_t",
204 gdbarch_bfd_arch_info (arch
)->printable_name
);
205 tdep
->data_addr_reg_type
206 = init_type (TYPE_CODE_PTR
, data_addr_reg_bits
/ 8,
207 TYPE_FLAG_UNSIGNED
, xstrdup (type_name
), NULL
);
208 TYPE_TARGET_TYPE (tdep
->data_addr_reg_type
) = tdep
->voyd
;
210 sprintf (type_name
, "%s_code_addr_t",
211 gdbarch_bfd_arch_info (arch
)->printable_name
);
212 tdep
->code_addr_reg_type
213 = init_type (TYPE_CODE_PTR
, code_addr_reg_bits
/ 8,
214 TYPE_FLAG_UNSIGNED
, xstrdup (type_name
), NULL
);
215 TYPE_TARGET_TYPE (tdep
->code_addr_reg_type
) = tdep
->func_voyd
;
217 tdep
->uint8
= init_type (TYPE_CODE_INT
, 1, TYPE_FLAG_UNSIGNED
,
219 tdep
->uint16
= init_type (TYPE_CODE_INT
, 2, TYPE_FLAG_UNSIGNED
,
221 tdep
->int8
= init_type (TYPE_CODE_INT
, 1, 0, "int8_t", NULL
);
222 tdep
->int16
= init_type (TYPE_CODE_INT
, 2, 0, "int16_t", NULL
);
223 tdep
->int32
= init_type (TYPE_CODE_INT
, 4, 0, "int32_t", NULL
);
224 tdep
->int64
= init_type (TYPE_CODE_INT
, 8, 0, "int64_t", NULL
);
232 m32c_register_name (int num
)
234 return gdbarch_tdep (current_gdbarch
)->regs
[num
].name
;
239 m32c_register_type (struct gdbarch
*arch
, int reg_nr
)
241 return gdbarch_tdep (arch
)->regs
[reg_nr
].type
;
246 m32c_register_sim_regno (int reg_nr
)
248 return gdbarch_tdep (current_gdbarch
)->regs
[reg_nr
].sim_num
;
253 m32c_debug_info_reg_to_regnum (int reg_nr
)
255 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
256 if (0 <= reg_nr
&& reg_nr
<= M32C_MAX_DWARF_REGNUM
257 && tdep
->dwarf_regs
[reg_nr
])
258 return tdep
->dwarf_regs
[reg_nr
]->num
;
260 /* The DWARF CFI code expects to see -1 for invalid register
267 m32c_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
268 struct reggroup
*group
)
270 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
271 struct m32c_reg
*reg
= &tdep
->regs
[regnum
];
273 /* The anonymous raw registers aren't in any groups. */
277 if (group
== all_reggroup
)
280 if (group
== general_reggroup
284 if (group
== m32c_dma_reggroup
288 if (group
== system_reggroup
292 /* Since the m32c DWARF register numbers refer to cooked registers, not
293 raw registers, and frame_pop depends on the save and restore groups
294 containing registers the DWARF CFI will actually mention, our save
295 and restore groups are cooked registers, not raw registers. (This is
296 why we can't use the default reggroup function.) */
297 if ((group
== save_reggroup
298 || group
== restore_reggroup
)
299 && reg
->save_restore_p
)
306 /* Register move functions. We declare them here using
307 m32c_move_reg_t to check the types. */
308 static m32c_move_reg_t m32c_raw_read
, m32c_raw_write
;
309 static m32c_move_reg_t m32c_banked_read
, m32c_banked_write
;
310 static m32c_move_reg_t m32c_sb_read
, m32c_sb_write
;
311 static m32c_move_reg_t m32c_part_read
, m32c_part_write
;
312 static m32c_move_reg_t m32c_cat_read
, m32c_cat_write
;
313 static m32c_move_reg_t m32c_r3r2r1r0_read
, m32c_r3r2r1r0_write
;
316 /* Copy the value of the raw register REG from CACHE to BUF. */
318 m32c_raw_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
320 regcache_raw_read (cache
, reg
->num
, buf
);
324 /* Copy the value of the raw register REG from BUF to CACHE. */
326 m32c_raw_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
328 regcache_raw_write (cache
, reg
->num
, (const void *) buf
);
332 /* Return the value of the 'flg' register in CACHE. */
334 m32c_read_flg (struct regcache
*cache
)
336 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (cache
));
338 regcache_raw_read_unsigned (cache
, tdep
->flg
->num
, &flg
);
343 /* Evaluate the real register number of a banked register. */
344 static struct m32c_reg
*
345 m32c_banked_register (struct m32c_reg
*reg
, struct regcache
*cache
)
347 return ((m32c_read_flg (cache
) & reg
->n
) ? reg
->ry
: reg
->rx
);
351 /* Move the value of a banked register from CACHE to BUF.
352 If the value of the 'flg' register in CACHE has any of the bits
353 masked in REG->n set, then read REG->ry. Otherwise, read
356 m32c_banked_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
358 struct m32c_reg
*bank_reg
= m32c_banked_register (reg
, cache
);
359 regcache_raw_read (cache
, bank_reg
->num
, buf
);
363 /* Move the value of a banked register from BUF to CACHE.
364 If the value of the 'flg' register in CACHE has any of the bits
365 masked in REG->n set, then write REG->ry. Otherwise, write
368 m32c_banked_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
370 struct m32c_reg
*bank_reg
= m32c_banked_register (reg
, cache
);
371 regcache_raw_write (cache
, bank_reg
->num
, (const void *) buf
);
375 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
376 banked register; on bfd_mach_m16c, it's not. */
378 m32c_sb_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
380 if (gdbarch_bfd_arch_info (reg
->arch
)->mach
== bfd_mach_m16c
)
381 m32c_raw_read (reg
->rx
, cache
, buf
);
383 m32c_banked_read (reg
, cache
, buf
);
387 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
388 banked register; on bfd_mach_m16c, it's not. */
390 m32c_sb_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
392 if (gdbarch_bfd_arch_info (reg
->arch
)->mach
== bfd_mach_m16c
)
393 m32c_raw_write (reg
->rx
, cache
, buf
);
395 m32c_banked_write (reg
, cache
, buf
);
399 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
400 and *LEN_P to the offset and length, in bytes, of the part REG
401 occupies in its underlying register. The offset is from the
402 lower-addressed end, regardless of the architecture's endianness.
403 (The M32C family is always little-endian, but let's keep those
404 assumptions out of here.) */
406 m32c_find_part (struct m32c_reg
*reg
, int *offset_p
, int *len_p
)
408 /* The length of the containing register, of which REG is one part. */
409 int containing_len
= TYPE_LENGTH (reg
->rx
->type
);
411 /* The length of one "element" in our imaginary array. */
412 int elt_len
= TYPE_LENGTH (reg
->type
);
414 /* The offset of REG's "element" from the least significant end of
415 the containing register. */
416 int elt_offset
= reg
->n
* elt_len
;
418 /* If we extend off the end, trim the length of the element. */
419 if (elt_offset
+ elt_len
> containing_len
)
421 elt_len
= containing_len
- elt_offset
;
422 /* We shouldn't be declaring partial registers that go off the
423 end of their containing registers. */
424 gdb_assert (elt_len
> 0);
427 /* Flip the offset around if we're big-endian. */
428 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
429 elt_offset
= TYPE_LENGTH (reg
->rx
->type
) - elt_offset
- elt_len
;
431 *offset_p
= elt_offset
;
436 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
437 to BUF. Treating the value of the register REG->rx as an array of
438 REG->type values, where higher indices refer to more significant
439 bits, read the value of the REG->n'th element. */
441 m32c_part_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
444 memset (buf
, 0, TYPE_LENGTH (reg
->type
));
445 m32c_find_part (reg
, &offset
, &len
);
446 regcache_cooked_read_part (cache
, reg
->rx
->num
, offset
, len
, buf
);
450 /* Move the value of a banked register from BUF to CACHE.
451 Treating the value of the register REG->rx as an array of REG->type
452 values, where higher indices refer to more significant bits, write
453 the value of the REG->n'th element. */
455 m32c_part_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
458 m32c_find_part (reg
, &offset
, &len
);
459 regcache_cooked_write_part (cache
, reg
->rx
->num
, offset
, len
, buf
);
463 /* Move the value of REG from CACHE to BUF. REG's value is the
464 concatenation of the values of the registers REG->rx and REG->ry,
465 with REG->rx contributing the more significant bits. */
467 m32c_cat_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
469 int high_bytes
= TYPE_LENGTH (reg
->rx
->type
);
470 int low_bytes
= TYPE_LENGTH (reg
->ry
->type
);
471 /* For address arithmetic. */
472 unsigned char *cbuf
= buf
;
474 gdb_assert (TYPE_LENGTH (reg
->type
) == high_bytes
+ low_bytes
);
476 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
478 regcache_cooked_read (cache
, reg
->rx
->num
, cbuf
);
479 regcache_cooked_read (cache
, reg
->ry
->num
, cbuf
+ high_bytes
);
483 regcache_cooked_read (cache
, reg
->rx
->num
, cbuf
+ low_bytes
);
484 regcache_cooked_read (cache
, reg
->ry
->num
, cbuf
);
489 /* Move the value of REG from CACHE to BUF. REG's value is the
490 concatenation of the values of the registers REG->rx and REG->ry,
491 with REG->rx contributing the more significant bits. */
493 m32c_cat_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
495 int high_bytes
= TYPE_LENGTH (reg
->rx
->type
);
496 int low_bytes
= TYPE_LENGTH (reg
->ry
->type
);
497 /* For address arithmetic. */
498 unsigned char *cbuf
= buf
;
500 gdb_assert (TYPE_LENGTH (reg
->type
) == high_bytes
+ low_bytes
);
502 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
504 regcache_cooked_write (cache
, reg
->rx
->num
, cbuf
);
505 regcache_cooked_write (cache
, reg
->ry
->num
, cbuf
+ high_bytes
);
509 regcache_cooked_write (cache
, reg
->rx
->num
, cbuf
+ low_bytes
);
510 regcache_cooked_write (cache
, reg
->ry
->num
, cbuf
);
515 /* Copy the value of the raw register REG from CACHE to BUF. REG is
516 the concatenation (from most significant to least) of r3, r2, r1,
519 m32c_r3r2r1r0_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
521 struct gdbarch_tdep
*tdep
= gdbarch_tdep (reg
->arch
);
522 int len
= TYPE_LENGTH (tdep
->r0
->type
);
524 /* For address arithmetic. */
525 unsigned char *cbuf
= buf
;
527 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
529 regcache_cooked_read (cache
, tdep
->r0
->num
, cbuf
+ len
* 3);
530 regcache_cooked_read (cache
, tdep
->r1
->num
, cbuf
+ len
* 2);
531 regcache_cooked_read (cache
, tdep
->r2
->num
, cbuf
+ len
* 1);
532 regcache_cooked_read (cache
, tdep
->r3
->num
, cbuf
);
536 regcache_cooked_read (cache
, tdep
->r0
->num
, cbuf
);
537 regcache_cooked_read (cache
, tdep
->r1
->num
, cbuf
+ len
* 1);
538 regcache_cooked_read (cache
, tdep
->r2
->num
, cbuf
+ len
* 2);
539 regcache_cooked_read (cache
, tdep
->r3
->num
, cbuf
+ len
* 3);
544 /* Copy the value of the raw register REG from BUF to CACHE. REG is
545 the concatenation (from most significant to least) of r3, r2, r1,
548 m32c_r3r2r1r0_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
550 struct gdbarch_tdep
*tdep
= gdbarch_tdep (reg
->arch
);
551 int len
= TYPE_LENGTH (tdep
->r0
->type
);
553 /* For address arithmetic. */
554 unsigned char *cbuf
= buf
;
556 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
558 regcache_cooked_write (cache
, tdep
->r0
->num
, cbuf
+ len
* 3);
559 regcache_cooked_write (cache
, tdep
->r1
->num
, cbuf
+ len
* 2);
560 regcache_cooked_write (cache
, tdep
->r2
->num
, cbuf
+ len
* 1);
561 regcache_cooked_write (cache
, tdep
->r3
->num
, cbuf
);
565 regcache_cooked_write (cache
, tdep
->r0
->num
, cbuf
);
566 regcache_cooked_write (cache
, tdep
->r1
->num
, cbuf
+ len
* 1);
567 regcache_cooked_write (cache
, tdep
->r2
->num
, cbuf
+ len
* 2);
568 regcache_cooked_write (cache
, tdep
->r3
->num
, cbuf
+ len
* 3);
574 m32c_pseudo_register_read (struct gdbarch
*arch
,
575 struct regcache
*cache
,
579 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
580 struct m32c_reg
*reg
;
582 gdb_assert (0 <= cookednum
&& cookednum
< tdep
->num_regs
);
583 gdb_assert (arch
== get_regcache_arch (cache
));
584 gdb_assert (arch
== tdep
->regs
[cookednum
].arch
);
585 reg
= &tdep
->regs
[cookednum
];
587 reg
->read (reg
, cache
, buf
);
592 m32c_pseudo_register_write (struct gdbarch
*arch
,
593 struct regcache
*cache
,
597 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
598 struct m32c_reg
*reg
;
600 gdb_assert (0 <= cookednum
&& cookednum
< tdep
->num_regs
);
601 gdb_assert (arch
== get_regcache_arch (cache
));
602 gdb_assert (arch
== tdep
->regs
[cookednum
].arch
);
603 reg
= &tdep
->regs
[cookednum
];
605 reg
->write (reg
, cache
, (void *) buf
);
609 /* Add a register with the given fields to the end of ARCH's table.
610 Return a pointer to the newly added register. */
611 static struct m32c_reg
*
612 add_reg (struct gdbarch
*arch
,
616 m32c_move_reg_t
*read
,
617 m32c_move_reg_t
*write
,
622 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
623 struct m32c_reg
*r
= &tdep
->regs
[tdep
->num_regs
];
625 gdb_assert (tdep
->num_regs
< M32C_MAX_NUM_REGS
);
630 r
->num
= tdep
->num_regs
;
631 r
->sim_num
= sim_num
;
636 r
->save_restore_p
= 0;
649 /* Record NUM as REG's DWARF register number. */
651 set_dwarf_regnum (struct m32c_reg
*reg
, int num
)
653 gdb_assert (num
< M32C_MAX_NUM_REGS
);
655 /* Update the reg->DWARF mapping. Only count the first number
656 assigned to this register. */
657 if (reg
->dwarf_num
== -1)
658 reg
->dwarf_num
= num
;
660 /* Update the DWARF->reg mapping. */
661 gdbarch_tdep (reg
->arch
)->dwarf_regs
[num
] = reg
;
665 /* Mark REG as a general-purpose register, and return it. */
666 static struct m32c_reg
*
667 mark_general (struct m32c_reg
*reg
)
674 /* Mark REG as a DMA register, and return it. */
675 static struct m32c_reg
*
676 mark_dma (struct m32c_reg
*reg
)
683 /* Mark REG as a SYSTEM register, and return it. */
684 static struct m32c_reg
*
685 mark_system (struct m32c_reg
*reg
)
692 /* Mark REG as a save-restore register, and return it. */
693 static struct m32c_reg
*
694 mark_save_restore (struct m32c_reg
*reg
)
696 reg
->save_restore_p
= 1;
701 #define FLAGBIT_B 0x0010
702 #define FLAGBIT_U 0x0080
704 /* Handy macros for declaring registers. These all evaluate to
705 pointers to the register declared. Macros that define two
706 registers evaluate to a pointer to the first. */
708 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
709 #define R(name, type, sim_num) \
710 (add_reg (arch, (name), (type), (sim_num), \
711 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
713 /* The simulator register number for a raw register named NAME. */
714 #define SIM(name) (m32c_sim_reg_ ## name)
716 /* A raw unsigned 16-bit data register named NAME.
717 NAME should be an identifier, not a string. */
719 (R(#name, tdep->uint16, SIM (name)))
721 /* A raw data address register named NAME.
722 NAME should be an identifier, not a string. */
724 (R(#name, tdep->data_addr_reg_type, SIM (name)))
726 /* A raw code address register named NAME. NAME should
727 be an identifier, not a string. */
729 (R(#name, tdep->code_addr_reg_type, SIM (name)))
731 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
732 NAME should be an identifier, not a string. */
733 #define RP(name, type) \
734 (R(#name "0", (type), SIM (name ## 0)), \
735 R(#name "1", (type), SIM (name ## 1)) - 1)
737 /* A raw banked general-purpose data register named NAME.
738 NAME should be an identifier, not a string. */
740 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
741 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
743 /* A raw banked data address register named NAME.
744 NAME should be an identifier, not a string. */
746 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
747 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
749 /* A cooked register named NAME referring to a raw banked register
750 from the bank selected by the current value of FLG. RAW_PAIR
751 should be a pointer to the first register in the banked pair.
752 NAME must be an identifier, not a string. */
753 #define CB(name, raw_pair) \
754 (add_reg (arch, #name, (raw_pair)->type, 0, \
755 m32c_banked_read, m32c_banked_write, \
756 (raw_pair), (raw_pair + 1), FLAGBIT_B))
758 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
759 access the top and bottom halves of the register pointed to by
760 NAME. NAME should be an identifier. */
761 #define CHL(name, type) \
762 (add_reg (arch, #name "h", (type), 0, \
763 m32c_part_read, m32c_part_write, name, NULL, 1), \
764 add_reg (arch, #name "l", (type), 0, \
765 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
767 /* A register constructed by concatenating the two registers HIGH and
768 LOW, whose name is HIGHLOW and whose type is TYPE. */
769 #define CCAT(high, low, type) \
770 (add_reg (arch, #high #low, (type), 0, \
771 m32c_cat_read, m32c_cat_write, (high), (low), 0))
773 /* Abbreviations for marking register group membership. */
774 #define G(reg) (mark_general (reg))
775 #define S(reg) (mark_system (reg))
776 #define DMA(reg) (mark_dma (reg))
779 /* Construct the register set for ARCH. */
781 make_regs (struct gdbarch
*arch
)
783 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
784 int mach
= gdbarch_bfd_arch_info (arch
)->mach
;
797 struct m32c_reg
*r0hl
;
798 struct m32c_reg
*r1hl
;
799 struct m32c_reg
*r2hl
;
800 struct m32c_reg
*r3hl
;
801 struct m32c_reg
*intbhl
;
802 struct m32c_reg
*r2r0
;
803 struct m32c_reg
*r3r1
;
804 struct m32c_reg
*r3r1r2r0
;
805 struct m32c_reg
*r3r2r1r0
;
806 struct m32c_reg
*a1a0
;
808 struct m32c_reg
*raw_r0_pair
= RBD (r0
);
809 struct m32c_reg
*raw_r1_pair
= RBD (r1
);
810 struct m32c_reg
*raw_r2_pair
= RBD (r2
);
811 struct m32c_reg
*raw_r3_pair
= RBD (r3
);
812 struct m32c_reg
*raw_a0_pair
= RBA (a0
);
813 struct m32c_reg
*raw_a1_pair
= RBA (a1
);
814 struct m32c_reg
*raw_fb_pair
= RBA (fb
);
816 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
817 We always declare both raw registers, and deal with the distinction
818 in the pseudoregister. */
819 struct m32c_reg
*raw_sb_pair
= RBA (sb
);
821 struct m32c_reg
*usp
= S (RA (usp
));
822 struct m32c_reg
*isp
= S (RA (isp
));
823 struct m32c_reg
*intb
= S (RC (intb
));
824 struct m32c_reg
*pc
= G (RC (pc
));
825 struct m32c_reg
*flg
= G (R16U (flg
));
827 if (mach
== bfd_mach_m32c
)
829 struct m32c_reg
*svf
= S (R16U (svf
));
830 struct m32c_reg
*svp
= S (RC (svp
));
831 struct m32c_reg
*vct
= S (RC (vct
));
833 struct m32c_reg
*dmd01
= DMA (RP (dmd
, tdep
->uint8
));
834 struct m32c_reg
*dct01
= DMA (RP (dct
, tdep
->uint16
));
835 struct m32c_reg
*drc01
= DMA (RP (drc
, tdep
->uint16
));
836 struct m32c_reg
*dma01
= DMA (RP (dma
, tdep
->data_addr_reg_type
));
837 struct m32c_reg
*dsa01
= DMA (RP (dsa
, tdep
->data_addr_reg_type
));
838 struct m32c_reg
*dra01
= DMA (RP (dra
, tdep
->data_addr_reg_type
));
841 num_raw_regs
= tdep
->num_regs
;
843 r0
= G (CB (r0
, raw_r0_pair
));
844 r1
= G (CB (r1
, raw_r1_pair
));
845 r2
= G (CB (r2
, raw_r2_pair
));
846 r3
= G (CB (r3
, raw_r3_pair
));
847 a0
= G (CB (a0
, raw_a0_pair
));
848 a1
= G (CB (a1
, raw_a1_pair
));
849 fb
= G (CB (fb
, raw_fb_pair
));
851 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
852 Specify custom read/write functions that do the right thing. */
853 sb
= G (add_reg (arch
, "sb", raw_sb_pair
->type
, 0,
854 m32c_sb_read
, m32c_sb_write
,
855 raw_sb_pair
, raw_sb_pair
+ 1, 0));
857 /* The current sp is either usp or isp, depending on the value of
858 the FLG register's U bit. */
859 sp
= G (add_reg (arch
, "sp", usp
->type
, 0,
860 m32c_banked_read
, m32c_banked_write
,
861 isp
, usp
, FLAGBIT_U
));
863 r0hl
= CHL (r0
, tdep
->int8
);
864 r1hl
= CHL (r1
, tdep
->int8
);
865 r2hl
= CHL (r2
, tdep
->int8
);
866 r3hl
= CHL (r3
, tdep
->int8
);
867 intbhl
= CHL (intb
, tdep
->int16
);
869 r2r0
= CCAT (r2
, r0
, tdep
->int32
);
870 r3r1
= CCAT (r3
, r1
, tdep
->int32
);
871 r3r1r2r0
= CCAT (r3r1
, r2r0
, tdep
->int64
);
874 = add_reg (arch
, "r3r2r1r0", tdep
->int64
, 0,
875 m32c_r3r2r1r0_read
, m32c_r3r2r1r0_write
, NULL
, NULL
, 0);
877 if (mach
== bfd_mach_m16c
)
878 a1a0
= CCAT (a1
, a0
, tdep
->int32
);
882 num_cooked_regs
= tdep
->num_regs
- num_raw_regs
;
891 tdep
->r3r2r1r0
= r3r2r1r0
;
892 tdep
->r3r1r2r0
= r3r1r2r0
;
899 /* Set up the DWARF register table. */
900 memset (tdep
->dwarf_regs
, 0, sizeof (tdep
->dwarf_regs
));
901 set_dwarf_regnum (r0hl
+ 1, 0x01);
902 set_dwarf_regnum (r0hl
+ 0, 0x02);
903 set_dwarf_regnum (r1hl
+ 1, 0x03);
904 set_dwarf_regnum (r1hl
+ 0, 0x04);
905 set_dwarf_regnum (r0
, 0x05);
906 set_dwarf_regnum (r1
, 0x06);
907 set_dwarf_regnum (r2
, 0x07);
908 set_dwarf_regnum (r3
, 0x08);
909 set_dwarf_regnum (a0
, 0x09);
910 set_dwarf_regnum (a1
, 0x0a);
911 set_dwarf_regnum (fb
, 0x0b);
912 set_dwarf_regnum (sp
, 0x0c);
913 set_dwarf_regnum (pc
, 0x0d); /* GCC's invention */
914 set_dwarf_regnum (sb
, 0x13);
915 set_dwarf_regnum (r2r0
, 0x15);
916 set_dwarf_regnum (r3r1
, 0x16);
918 set_dwarf_regnum (a1a0
, 0x17);
920 /* Enumerate the save/restore register group.
922 The regcache_save and regcache_restore functions apply their read
923 function to each register in this group.
925 Since frame_pop supplies frame_unwind_register as its read
926 function, the registers meaningful to the Dwarf unwinder need to
929 On the other hand, when we make inferior calls, save_inferior_status
930 and restore_inferior_status use them to preserve the current register
931 values across the inferior call. For this, you'd kind of like to
932 preserve all the raw registers, to protect the interrupted code from
933 any sort of bank switching the callee might have done. But we handle
934 those cases so badly anyway --- for example, it matters whether we
935 restore FLG before or after we restore the general-purpose registers,
936 but there's no way to express that --- that it isn't worth worrying
939 We omit control registers like inthl: if you call a function that
940 changes those, it's probably because you wanted that change to be
941 visible to the interrupted code. */
942 mark_save_restore (r0
);
943 mark_save_restore (r1
);
944 mark_save_restore (r2
);
945 mark_save_restore (r3
);
946 mark_save_restore (a0
);
947 mark_save_restore (a1
);
948 mark_save_restore (sb
);
949 mark_save_restore (fb
);
950 mark_save_restore (sp
);
951 mark_save_restore (pc
);
952 mark_save_restore (flg
);
954 set_gdbarch_num_regs (arch
, num_raw_regs
);
955 set_gdbarch_num_pseudo_regs (arch
, num_cooked_regs
);
956 set_gdbarch_pc_regnum (arch
, pc
->num
);
957 set_gdbarch_sp_regnum (arch
, sp
->num
);
958 set_gdbarch_register_name (arch
, m32c_register_name
);
959 set_gdbarch_register_type (arch
, m32c_register_type
);
960 set_gdbarch_pseudo_register_read (arch
, m32c_pseudo_register_read
);
961 set_gdbarch_pseudo_register_write (arch
, m32c_pseudo_register_write
);
962 set_gdbarch_register_sim_regno (arch
, m32c_register_sim_regno
);
963 set_gdbarch_stab_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
964 set_gdbarch_dwarf_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
965 set_gdbarch_dwarf2_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
966 set_gdbarch_register_reggroup_p (arch
, m32c_register_reggroup_p
);
968 reggroup_add (arch
, general_reggroup
);
969 reggroup_add (arch
, all_reggroup
);
970 reggroup_add (arch
, save_reggroup
);
971 reggroup_add (arch
, restore_reggroup
);
972 reggroup_add (arch
, system_reggroup
);
973 reggroup_add (arch
, m32c_dma_reggroup
);
980 static const unsigned char *
981 m32c_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
983 static unsigned char break_insn
[] = { 0x00 }; /* brk */
985 *len
= sizeof (break_insn
);
991 /* Prologue analysis. */
995 /* For consistency with the DWARF 2 .debug_frame info generated by
996 GCC, a frame's CFA is the address immediately after the saved
999 /* The architecture for which we generated this prologue info. */
1000 struct gdbarch
*arch
;
1003 /* This function uses a frame pointer. */
1004 prologue_with_frame_ptr
,
1006 /* This function has no frame pointer. */
1007 prologue_sans_frame_ptr
,
1009 /* This function sets up the stack, so its frame is the first
1010 frame on the stack. */
1011 prologue_first_frame
1015 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1016 CFA to where the frame pointer points. This is always zero or
1018 LONGEST frame_ptr_offset
;
1020 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1021 the stack pointer --- always zero or negative.
1023 Calling this a "size" is a bit misleading, but given that the
1024 stack grows downwards, using offsets for everything keeps one
1025 from going completely sign-crazy: you never change anything's
1026 sign for an ADD instruction; always change the second operand's
1027 sign for a SUB instruction; and everything takes care of
1030 Functions that use alloca don't have a constant frame size. But
1031 they always have frame pointers, so we must use that to find the
1032 CFA (and perhaps to unwind the stack pointer). */
1035 /* The address of the first instruction at which the frame has been
1036 set up and the arguments are where the debug info says they are
1037 --- as best as we can tell. */
1038 CORE_ADDR prologue_end
;
1040 /* reg_offset[R] is the offset from the CFA at which register R is
1041 saved, or 1 if register R has not been saved. (Real values are
1042 always zero or negative.) */
1043 LONGEST reg_offset
[M32C_MAX_NUM_REGS
];
1047 /* The longest I've seen, anyway. */
1048 #define M32C_MAX_INSN_LEN (9)
1050 /* Processor state, for the prologue analyzer. */
1051 struct m32c_pv_state
1053 struct gdbarch
*arch
;
1054 pv_t r0
, r1
, r2
, r3
;
1058 struct pv_area
*stack
;
1060 /* Bytes from the current PC, the address they were read from,
1061 and the address of the next unconsumed byte. */
1062 gdb_byte insn
[M32C_MAX_INSN_LEN
];
1063 CORE_ADDR scan_pc
, next_addr
;
1067 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1068 all went well, or non-zero if simulating the action would trash our
1071 m32c_pv_push (struct m32c_pv_state
*state
, pv_t value
, int size
)
1073 if (pv_area_store_would_trash (state
->stack
, state
->sp
))
1076 state
->sp
= pv_add_constant (state
->sp
, -size
);
1077 pv_area_store (state
->stack
, state
->sp
, size
, value
);
1083 /* A source or destination location for an m16c or m32c
1087 /* If srcdest_reg, the location is a register pointed to by REG.
1088 If srcdest_partial_reg, the location is part of a register pointed
1089 to by REG. We don't try to handle this too well.
1090 If srcdest_mem, the location is memory whose address is ADDR. */
1091 enum { srcdest_reg
, srcdest_partial_reg
, srcdest_mem
} kind
;
1096 /* Return the SIZE-byte value at LOC in STATE. */
1098 m32c_srcdest_fetch (struct m32c_pv_state
*state
, struct srcdest loc
, int size
)
1100 if (loc
.kind
== srcdest_mem
)
1101 return pv_area_fetch (state
->stack
, loc
.addr
, size
);
1102 else if (loc
.kind
== srcdest_partial_reg
)
1103 return pv_unknown ();
1109 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1110 all went well, or non-zero if simulating the store would trash our
1113 m32c_srcdest_store (struct m32c_pv_state
*state
, struct srcdest loc
,
1114 pv_t value
, int size
)
1116 if (loc
.kind
== srcdest_mem
)
1118 if (pv_area_store_would_trash (state
->stack
, loc
.addr
))
1120 pv_area_store (state
->stack
, loc
.addr
, size
, value
);
1122 else if (loc
.kind
== srcdest_partial_reg
)
1123 *loc
.reg
= pv_unknown ();
1132 m32c_sign_ext (int v
, int bits
)
1134 int mask
= 1 << (bits
- 1);
1135 return (v
^ mask
) - mask
;
1139 m32c_next_byte (struct m32c_pv_state
*st
)
1141 gdb_assert (st
->next_addr
- st
->scan_pc
< sizeof (st
->insn
));
1142 return st
->insn
[st
->next_addr
++ - st
->scan_pc
];
1146 m32c_udisp8 (struct m32c_pv_state
*st
)
1148 return m32c_next_byte (st
);
1153 m32c_sdisp8 (struct m32c_pv_state
*st
)
1155 return m32c_sign_ext (m32c_next_byte (st
), 8);
1160 m32c_udisp16 (struct m32c_pv_state
*st
)
1162 int low
= m32c_next_byte (st
);
1163 int high
= m32c_next_byte (st
);
1165 return low
+ (high
<< 8);
1170 m32c_sdisp16 (struct m32c_pv_state
*st
)
1172 int low
= m32c_next_byte (st
);
1173 int high
= m32c_next_byte (st
);
1175 return m32c_sign_ext (low
+ (high
<< 8), 16);
1180 m32c_udisp24 (struct m32c_pv_state
*st
)
1182 int low
= m32c_next_byte (st
);
1183 int mid
= m32c_next_byte (st
);
1184 int high
= m32c_next_byte (st
);
1186 return low
+ (mid
<< 8) + (high
<< 16);
1190 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1192 m32c_get_src23 (unsigned char *i
)
1194 return (((i
[0] & 0x70) >> 2)
1195 | ((i
[1] & 0x30) >> 4));
1199 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1201 m32c_get_dest23 (unsigned char *i
)
1203 return (((i
[0] & 0x0e) << 1)
1204 | ((i
[1] & 0xc0) >> 6));
1208 static struct srcdest
1209 m32c_decode_srcdest4 (struct m32c_pv_state
*st
,
1215 sd
.kind
= (size
== 2 ? srcdest_reg
: srcdest_partial_reg
);
1217 sd
.kind
= srcdest_mem
;
1219 sd
.addr
= pv_unknown ();
1224 case 0x0: sd
.reg
= (size
== 1 ? &st
->r0
: &st
->r0
); break;
1225 case 0x1: sd
.reg
= (size
== 1 ? &st
->r0
: &st
->r1
); break;
1226 case 0x2: sd
.reg
= (size
== 1 ? &st
->r1
: &st
->r2
); break;
1227 case 0x3: sd
.reg
= (size
== 1 ? &st
->r1
: &st
->r3
); break;
1229 case 0x4: sd
.reg
= &st
->a0
; break;
1230 case 0x5: sd
.reg
= &st
->a1
; break;
1232 case 0x6: sd
.addr
= st
->a0
; break;
1233 case 0x7: sd
.addr
= st
->a1
; break;
1235 case 0x8: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp8 (st
)); break;
1236 case 0x9: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp8 (st
)); break;
1237 case 0xa: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp8 (st
)); break;
1238 case 0xb: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp8 (st
)); break;
1240 case 0xc: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp16 (st
)); break;
1241 case 0xd: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp16 (st
)); break;
1242 case 0xe: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp16 (st
)); break;
1243 case 0xf: sd
.addr
= pv_constant (m32c_udisp16 (st
)); break;
1253 static struct srcdest
1254 m32c_decode_sd23 (struct m32c_pv_state
*st
, int code
, int size
, int ind
)
1258 sd
.addr
= pv_unknown ();
1267 sd
.kind
= (size
== 1) ? srcdest_partial_reg
: srcdest_reg
;
1272 sd
.kind
= (size
== 4) ? srcdest_reg
: srcdest_partial_reg
;
1276 sd
.kind
= srcdest_mem
;
1283 case 0x12: sd
.reg
= &st
->r0
; break;
1284 case 0x13: sd
.reg
= &st
->r1
; break;
1285 case 0x10: sd
.reg
= ((size
== 1) ? &st
->r0
: &st
->r2
); break;
1286 case 0x11: sd
.reg
= ((size
== 1) ? &st
->r1
: &st
->r3
); break;
1287 case 0x02: sd
.reg
= &st
->a0
; break;
1288 case 0x03: sd
.reg
= &st
->a1
; break;
1290 case 0x00: sd
.addr
= st
->a0
; break;
1291 case 0x01: sd
.addr
= st
->a1
; break;
1292 case 0x04: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp8 (st
)); break;
1293 case 0x05: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp8 (st
)); break;
1294 case 0x06: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp8 (st
)); break;
1295 case 0x07: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp8 (st
)); break;
1296 case 0x08: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp16 (st
)); break;
1297 case 0x09: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp16 (st
)); break;
1298 case 0x0a: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp16 (st
)); break;
1299 case 0x0b: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp16 (st
)); break;
1300 case 0x0c: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp24 (st
)); break;
1301 case 0x0d: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp24 (st
)); break;
1302 case 0x0f: sd
.addr
= pv_constant (m32c_udisp16 (st
)); break;
1303 case 0x0e: sd
.addr
= pv_constant (m32c_udisp24 (st
)); break;
1310 sd
.addr
= m32c_srcdest_fetch (st
, sd
, 4);
1311 sd
.kind
= srcdest_mem
;
1318 /* The r16c and r32c machines have instructions with similar
1319 semantics, but completely different machine language encodings. So
1320 we break out the semantics into their own functions, and leave
1321 machine-specific decoding in m32c_analyze_prologue.
1323 The following functions all expect their arguments already decoded,
1324 and they all return zero if analysis should continue past this
1325 instruction, or non-zero if analysis should stop. */
1328 /* Simulate an 'enter SIZE' instruction in STATE. */
1330 m32c_pv_enter (struct m32c_pv_state
*state
, int size
)
1332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1334 /* If simulating this store would require us to forget
1335 everything we know about the stack frame in the name of
1336 accuracy, it would be better to just quit now. */
1337 if (pv_area_store_would_trash (state
->stack
, state
->sp
))
1340 if (m32c_pv_push (state
, state
->fb
, tdep
->push_addr_bytes
))
1342 state
->fb
= state
->sp
;
1343 state
->sp
= pv_add_constant (state
->sp
, -size
);
1350 m32c_pv_pushm_one (struct m32c_pv_state
*state
, pv_t reg
,
1351 int bit
, int src
, int size
)
1355 if (m32c_pv_push (state
, reg
, size
))
1363 /* Simulate a 'pushm SRC' instruction in STATE. */
1365 m32c_pv_pushm (struct m32c_pv_state
*state
, int src
)
1367 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1369 /* The bits in SRC indicating which registers to save are:
1370 r0 r1 r2 r3 a0 a1 sb fb */
1372 ( m32c_pv_pushm_one (state
, state
->fb
, 0x01, src
, tdep
->push_addr_bytes
)
1373 || m32c_pv_pushm_one (state
, state
->sb
, 0x02, src
, tdep
->push_addr_bytes
)
1374 || m32c_pv_pushm_one (state
, state
->a1
, 0x04, src
, tdep
->push_addr_bytes
)
1375 || m32c_pv_pushm_one (state
, state
->a0
, 0x08, src
, tdep
->push_addr_bytes
)
1376 || m32c_pv_pushm_one (state
, state
->r3
, 0x10, src
, 2)
1377 || m32c_pv_pushm_one (state
, state
->r2
, 0x20, src
, 2)
1378 || m32c_pv_pushm_one (state
, state
->r1
, 0x40, src
, 2)
1379 || m32c_pv_pushm_one (state
, state
->r0
, 0x80, src
, 2));
1382 /* Return non-zero if VALUE is the first incoming argument register. */
1385 m32c_is_1st_arg_reg (struct m32c_pv_state
*state
, pv_t value
)
1387 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1388 return (value
.kind
== pvk_register
1389 && (gdbarch_bfd_arch_info (state
->arch
)->mach
== bfd_mach_m16c
1390 ? (value
.reg
== tdep
->r1
->num
)
1391 : (value
.reg
== tdep
->r0
->num
))
1395 /* Return non-zero if VALUE is an incoming argument register. */
1398 m32c_is_arg_reg (struct m32c_pv_state
*state
, pv_t value
)
1400 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1401 return (value
.kind
== pvk_register
1402 && (gdbarch_bfd_arch_info (state
->arch
)->mach
== bfd_mach_m16c
1403 ? (value
.reg
== tdep
->r1
->num
|| value
.reg
== tdep
->r2
->num
)
1404 : (value
.reg
== tdep
->r0
->num
))
1408 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1409 argument register to its stack slot in STATE. Such instructions
1410 should be included in the prologue, if possible.
1412 The store is a spill if:
1413 - the value being stored is the original value of an argument register;
1414 - the value has not already been stored somewhere in STACK; and
1415 - LOC is a stack slot (e.g., a memory location whose address is
1416 relative to the original value of the SP). */
1419 m32c_is_arg_spill (struct m32c_pv_state
*st
,
1423 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1425 return (m32c_is_arg_reg (st
, value
)
1426 && loc
.kind
== srcdest_mem
1427 && pv_is_register (loc
.addr
, tdep
->sp
->num
)
1428 && ! pv_area_find_reg (st
->stack
, st
->arch
, value
.reg
, 0));
1431 /* Return non-zero if a store of VALUE to LOC is probably
1432 copying the struct return address into an address register
1433 for immediate use. This is basically a "spill" into the
1434 address register, instead of onto the stack.
1436 The prerequisites are:
1437 - value being stored is original value of the FIRST arg register;
1438 - value has not already been stored on stack; and
1439 - LOC is an address register (a0 or a1). */
1442 m32c_is_struct_return (struct m32c_pv_state
*st
,
1446 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1448 return (m32c_is_1st_arg_reg (st
, value
)
1449 && !pv_area_find_reg (st
->stack
, st
->arch
, value
.reg
, 0)
1450 && loc
.kind
== srcdest_reg
1451 && (pv_is_register (*loc
.reg
, tdep
->a0
->num
)
1452 || pv_is_register (*loc
.reg
, tdep
->a1
->num
)));
1455 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1456 was a register save:
1457 - all the named registers should have their original values, and
1458 - the stack pointer should be at a constant offset from the
1459 original stack pointer. */
1461 m32c_pushm_is_reg_save (struct m32c_pv_state
*st
, int src
)
1463 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1464 /* The bits in SRC indicating which registers to save are:
1465 r0 r1 r2 r3 a0 a1 sb fb */
1467 (pv_is_register (st
->sp
, tdep
->sp
->num
)
1468 && (! (src
& 0x01) || pv_is_register_k (st
->fb
, tdep
->fb
->num
, 0))
1469 && (! (src
& 0x02) || pv_is_register_k (st
->sb
, tdep
->sb
->num
, 0))
1470 && (! (src
& 0x04) || pv_is_register_k (st
->a1
, tdep
->a1
->num
, 0))
1471 && (! (src
& 0x08) || pv_is_register_k (st
->a0
, tdep
->a0
->num
, 0))
1472 && (! (src
& 0x10) || pv_is_register_k (st
->r3
, tdep
->r3
->num
, 0))
1473 && (! (src
& 0x20) || pv_is_register_k (st
->r2
, tdep
->r2
->num
, 0))
1474 && (! (src
& 0x40) || pv_is_register_k (st
->r1
, tdep
->r1
->num
, 0))
1475 && (! (src
& 0x80) || pv_is_register_k (st
->r0
, tdep
->r0
->num
, 0)));
1479 /* Function for finding saved registers in a 'struct pv_area'; we pass
1480 this to pv_area_scan.
1482 If VALUE is a saved register, ADDR says it was saved at a constant
1483 offset from the frame base, and SIZE indicates that the whole
1484 register was saved, record its offset in RESULT_UNTYPED. */
1486 check_for_saved (void *prologue_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
1488 struct m32c_prologue
*prologue
= (struct m32c_prologue
*) prologue_untyped
;
1489 struct gdbarch
*arch
= prologue
->arch
;
1490 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1492 /* Is this the unchanged value of some register being saved on the
1494 if (value
.kind
== pvk_register
1496 && pv_is_register (addr
, tdep
->sp
->num
))
1498 /* Some registers require special handling: they're saved as a
1499 larger value than the register itself. */
1500 CORE_ADDR saved_size
= register_size (arch
, value
.reg
);
1502 if (value
.reg
== tdep
->pc
->num
)
1503 saved_size
= tdep
->ret_addr_bytes
;
1504 else if (register_type (arch
, value
.reg
)
1505 == tdep
->data_addr_reg_type
)
1506 saved_size
= tdep
->push_addr_bytes
;
1508 if (size
== saved_size
)
1510 /* Find which end of the saved value corresponds to our
1512 if (gdbarch_byte_order (arch
) == BFD_ENDIAN_BIG
)
1513 prologue
->reg_offset
[value
.reg
]
1514 = (addr
.k
+ saved_size
- register_size (arch
, value
.reg
));
1516 prologue
->reg_offset
[value
.reg
] = addr
.k
;
1522 /* Analyze the function prologue for ARCH at START, going no further
1523 than LIMIT, and place a description of what we found in
1526 m32c_analyze_prologue (struct gdbarch
*arch
,
1527 CORE_ADDR start
, CORE_ADDR limit
,
1528 struct m32c_prologue
*prologue
)
1530 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1531 unsigned long mach
= gdbarch_bfd_arch_info (arch
)->mach
;
1532 CORE_ADDR after_last_frame_related_insn
;
1533 struct cleanup
*back_to
;
1534 struct m32c_pv_state st
;
1537 st
.r0
= pv_register (tdep
->r0
->num
, 0);
1538 st
.r1
= pv_register (tdep
->r1
->num
, 0);
1539 st
.r2
= pv_register (tdep
->r2
->num
, 0);
1540 st
.r3
= pv_register (tdep
->r3
->num
, 0);
1541 st
.a0
= pv_register (tdep
->a0
->num
, 0);
1542 st
.a1
= pv_register (tdep
->a1
->num
, 0);
1543 st
.sb
= pv_register (tdep
->sb
->num
, 0);
1544 st
.fb
= pv_register (tdep
->fb
->num
, 0);
1545 st
.sp
= pv_register (tdep
->sp
->num
, 0);
1546 st
.pc
= pv_register (tdep
->pc
->num
, 0);
1547 st
.stack
= make_pv_area (tdep
->sp
->num
);
1548 back_to
= make_cleanup_free_pv_area (st
.stack
);
1550 /* Record that the call instruction has saved the return address on
1552 m32c_pv_push (&st
, st
.pc
, tdep
->ret_addr_bytes
);
1554 memset (prologue
, 0, sizeof (*prologue
));
1555 prologue
->arch
= arch
;
1558 for (i
= 0; i
< M32C_MAX_NUM_REGS
; i
++)
1559 prologue
->reg_offset
[i
] = 1;
1562 st
.scan_pc
= after_last_frame_related_insn
= start
;
1564 while (st
.scan_pc
< limit
)
1566 pv_t pre_insn_fb
= st
.fb
;
1567 pv_t pre_insn_sp
= st
.sp
;
1569 /* In theory we could get in trouble by trying to read ahead
1570 here, when we only know we're expecting one byte. In
1571 practice I doubt anyone will care, and it makes the rest of
1573 if (target_read_memory (st
.scan_pc
, st
.insn
, sizeof (st
.insn
)))
1574 /* If we can't fetch the instruction from memory, stop here
1575 and hope for the best. */
1577 st
.next_addr
= st
.scan_pc
;
1579 /* The assembly instructions are written as they appear in the
1580 section of the processor manuals that describe the
1581 instruction encodings.
1583 When a single assembly language instruction has several
1584 different machine-language encodings, the manual
1585 distinguishes them by a number in parens, before the
1586 mnemonic. Those numbers are included, as well.
1588 The srcdest decoding instructions have the same names as the
1589 analogous functions in the simulator. */
1590 if (mach
== bfd_mach_m16c
)
1592 /* (1) ENTER #imm8 */
1593 if (st
.insn
[0] == 0x7c && st
.insn
[1] == 0xf2)
1595 if (m32c_pv_enter (&st
, st
.insn
[2]))
1600 else if (st
.insn
[0] == 0xec)
1602 int src
= st
.insn
[1];
1603 if (m32c_pv_pushm (&st
, src
))
1607 if (m32c_pushm_is_reg_save (&st
, src
))
1608 after_last_frame_related_insn
= st
.next_addr
;
1611 /* (6) MOV.size:G src, dest */
1612 else if ((st
.insn
[0] & 0xfe) == 0x72)
1614 int size
= (st
.insn
[0] & 0x01) ? 2 : 1;
1616 struct srcdest dest
;
1621 = m32c_decode_srcdest4 (&st
, (st
.insn
[1] >> 4) & 0xf, size
);
1623 = m32c_decode_srcdest4 (&st
, st
.insn
[1] & 0xf, size
);
1624 src_value
= m32c_srcdest_fetch (&st
, src
, size
);
1626 if (m32c_is_arg_spill (&st
, dest
, src_value
))
1627 after_last_frame_related_insn
= st
.next_addr
;
1628 else if (m32c_is_struct_return (&st
, dest
, src_value
))
1629 after_last_frame_related_insn
= st
.next_addr
;
1631 if (m32c_srcdest_store (&st
, dest
, src_value
, size
))
1635 /* (1) LDC #IMM16, sp */
1636 else if (st
.insn
[0] == 0xeb
1637 && st
.insn
[1] == 0x50)
1640 st
.sp
= pv_constant (m32c_udisp16 (&st
));
1644 /* We've hit some instruction we don't know how to simulate.
1645 Strictly speaking, we should set every value we're
1646 tracking to "unknown". But we'll be optimistic, assume
1647 that we have enough information already, and stop
1653 int src_indirect
= 0;
1654 int dest_indirect
= 0;
1657 gdb_assert (mach
== bfd_mach_m32c
);
1659 /* Check for prefix bytes indicating indirect addressing. */
1660 if (st
.insn
[0] == 0x41)
1665 else if (st
.insn
[0] == 0x09)
1670 else if (st
.insn
[0] == 0x49)
1672 src_indirect
= dest_indirect
= 1;
1676 /* (1) ENTER #imm8 */
1677 if (st
.insn
[i
] == 0xec)
1679 if (m32c_pv_enter (&st
, st
.insn
[i
+ 1]))
1685 else if (st
.insn
[i
] == 0x8f)
1687 int src
= st
.insn
[i
+ 1];
1688 if (m32c_pv_pushm (&st
, src
))
1692 if (m32c_pushm_is_reg_save (&st
, src
))
1693 after_last_frame_related_insn
= st
.next_addr
;
1696 /* (7) MOV.size:G src, dest */
1697 else if ((st
.insn
[i
] & 0x80) == 0x80
1698 && (st
.insn
[i
+ 1] & 0x0f) == 0x0b
1699 && m32c_get_src23 (&st
.insn
[i
]) < 20
1700 && m32c_get_dest23 (&st
.insn
[i
]) < 20)
1703 struct srcdest dest
;
1705 int bw
= st
.insn
[i
] & 0x01;
1706 int size
= bw
? 2 : 1;
1710 = m32c_decode_sd23 (&st
, m32c_get_src23 (&st
.insn
[i
]),
1711 size
, src_indirect
);
1713 = m32c_decode_sd23 (&st
, m32c_get_dest23 (&st
.insn
[i
]),
1714 size
, dest_indirect
);
1715 src_value
= m32c_srcdest_fetch (&st
, src
, size
);
1717 if (m32c_is_arg_spill (&st
, dest
, src_value
))
1718 after_last_frame_related_insn
= st
.next_addr
;
1720 if (m32c_srcdest_store (&st
, dest
, src_value
, size
))
1723 /* (2) LDC #IMM24, sp */
1724 else if (st
.insn
[i
] == 0xd5
1725 && st
.insn
[i
+ 1] == 0x29)
1728 st
.sp
= pv_constant (m32c_udisp24 (&st
));
1731 /* We've hit some instruction we don't know how to simulate.
1732 Strictly speaking, we should set every value we're
1733 tracking to "unknown". But we'll be optimistic, assume
1734 that we have enough information already, and stop
1739 /* If this instruction changed the FB or decreased the SP (i.e.,
1740 allocated more stack space), then this may be a good place to
1741 declare the prologue finished. However, there are some
1744 - If the instruction just changed the FB back to its original
1745 value, then that's probably a restore instruction. The
1746 prologue should definitely end before that.
1748 - If the instruction increased the value of the SP (that is,
1749 shrunk the frame), then it's probably part of a frame
1750 teardown sequence, and the prologue should end before
1753 if (! pv_is_identical (st
.fb
, pre_insn_fb
))
1755 if (! pv_is_register_k (st
.fb
, tdep
->fb
->num
, 0))
1756 after_last_frame_related_insn
= st
.next_addr
;
1758 else if (! pv_is_identical (st
.sp
, pre_insn_sp
))
1760 /* The comparison of the constants looks odd, there, because
1761 .k is unsigned. All it really means is that the SP is
1762 lower than it was before the instruction. */
1763 if ( pv_is_register (pre_insn_sp
, tdep
->sp
->num
)
1764 && pv_is_register (st
.sp
, tdep
->sp
->num
)
1765 && ((pre_insn_sp
.k
- st
.sp
.k
) < (st
.sp
.k
- pre_insn_sp
.k
)))
1766 after_last_frame_related_insn
= st
.next_addr
;
1769 st
.scan_pc
= st
.next_addr
;
1772 /* Did we load a constant value into the stack pointer? */
1773 if (pv_is_constant (st
.sp
))
1774 prologue
->kind
= prologue_first_frame
;
1776 /* Alternatively, did we initialize the frame pointer? Remember
1777 that the CFA is the address after the return address. */
1778 if (pv_is_register (st
.fb
, tdep
->sp
->num
))
1780 prologue
->kind
= prologue_with_frame_ptr
;
1781 prologue
->frame_ptr_offset
= st
.fb
.k
;
1784 /* Is the frame size a known constant? Remember that frame_size is
1785 actually the offset from the CFA to the SP (i.e., a negative
1787 else if (pv_is_register (st
.sp
, tdep
->sp
->num
))
1789 prologue
->kind
= prologue_sans_frame_ptr
;
1790 prologue
->frame_size
= st
.sp
.k
;
1793 /* We haven't been able to make sense of this function's frame. Treat
1794 it as the first frame. */
1796 prologue
->kind
= prologue_first_frame
;
1798 /* Record where all the registers were saved. */
1799 pv_area_scan (st
.stack
, check_for_saved
, (void *) prologue
);
1801 prologue
->prologue_end
= after_last_frame_related_insn
;
1803 do_cleanups (back_to
);
1808 m32c_skip_prologue (CORE_ADDR ip
)
1811 CORE_ADDR func_addr
, func_end
, sal_end
;
1812 struct m32c_prologue p
;
1814 /* Try to find the extent of the function that contains IP. */
1815 if (! find_pc_partial_function (ip
, &name
, &func_addr
, &func_end
))
1818 /* Find end by prologue analysis. */
1819 m32c_analyze_prologue (current_gdbarch
, ip
, func_end
, &p
);
1820 /* Find end by line info. */
1821 sal_end
= skip_prologue_using_sal (ip
);
1822 /* Return whichever is lower. */
1823 if (sal_end
!= 0 && sal_end
!= ip
&& sal_end
< p
.prologue_end
)
1826 return p
.prologue_end
;
1831 /* Stack unwinding. */
1833 static struct m32c_prologue
*
1834 m32c_analyze_frame_prologue (struct frame_info
*next_frame
,
1835 void **this_prologue_cache
)
1837 if (! *this_prologue_cache
)
1839 CORE_ADDR func_start
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1840 CORE_ADDR stop_addr
= frame_pc_unwind (next_frame
);
1842 /* If we couldn't find any function containing the PC, then
1843 just initialize the prologue cache, but don't do anything. */
1845 stop_addr
= func_start
;
1847 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct m32c_prologue
);
1848 m32c_analyze_prologue (get_frame_arch (next_frame
),
1849 func_start
, stop_addr
, *this_prologue_cache
);
1852 return *this_prologue_cache
;
1857 m32c_frame_base (struct frame_info
*next_frame
,
1858 void **this_prologue_cache
)
1860 struct m32c_prologue
*p
1861 = m32c_analyze_frame_prologue (next_frame
, this_prologue_cache
);
1862 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1864 /* In functions that use alloca, the distance between the stack
1865 pointer and the frame base varies dynamically, so we can't use
1866 the SP plus static information like prologue analysis to find the
1867 frame base. However, such functions must have a frame pointer,
1868 to be able to restore the SP on exit. So whenever we do have a
1869 frame pointer, use that to find the base. */
1872 case prologue_with_frame_ptr
:
1875 = frame_unwind_register_unsigned (next_frame
, tdep
->fb
->num
);
1876 return fb
- p
->frame_ptr_offset
;
1879 case prologue_sans_frame_ptr
:
1882 = frame_unwind_register_unsigned (next_frame
, tdep
->sp
->num
);
1883 return sp
- p
->frame_size
;
1886 case prologue_first_frame
:
1896 m32c_this_id (struct frame_info
*next_frame
,
1897 void **this_prologue_cache
,
1898 struct frame_id
*this_id
)
1900 CORE_ADDR base
= m32c_frame_base (next_frame
, this_prologue_cache
);
1903 *this_id
= frame_id_build (base
,
1904 frame_func_unwind (next_frame
, NORMAL_FRAME
));
1905 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1910 m32c_prev_register (struct frame_info
*next_frame
,
1911 void **this_prologue_cache
,
1912 int regnum
, int *optimizedp
,
1913 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1914 int *realnump
, gdb_byte
*bufferp
)
1916 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1917 struct m32c_prologue
*p
1918 = m32c_analyze_frame_prologue (next_frame
, this_prologue_cache
);
1919 CORE_ADDR frame_base
= m32c_frame_base (next_frame
, this_prologue_cache
);
1920 int reg_size
= register_size (get_frame_arch (next_frame
), regnum
);
1922 if (regnum
== tdep
->sp
->num
)
1929 store_unsigned_integer (bufferp
, reg_size
, frame_base
);
1932 /* If prologue analysis says we saved this register somewhere,
1933 return a description of the stack slot holding it. */
1934 else if (p
->reg_offset
[regnum
] != 1)
1937 *lvalp
= lval_memory
;
1938 *addrp
= frame_base
+ p
->reg_offset
[regnum
];
1941 get_frame_memory (next_frame
, *addrp
, bufferp
, reg_size
);
1944 /* Otherwise, presume we haven't changed the value of this
1945 register, and get it from the next frame. */
1949 *lvalp
= lval_register
;
1953 frame_unwind_register (next_frame
, *realnump
, bufferp
);
1958 static const struct frame_unwind m32c_unwind
= {
1965 static const struct frame_unwind
*
1966 m32c_frame_sniffer (struct frame_info
*next_frame
)
1968 return &m32c_unwind
;
1973 m32c_unwind_pc (struct gdbarch
*arch
, struct frame_info
*next_frame
)
1975 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1976 return frame_unwind_register_unsigned (next_frame
, tdep
->pc
->num
);
1981 m32c_unwind_sp (struct gdbarch
*arch
, struct frame_info
*next_frame
)
1983 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1984 return frame_unwind_register_unsigned (next_frame
, tdep
->sp
->num
);
1988 /* Inferior calls. */
1990 /* The calling conventions, according to GCC:
1994 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1995 HImode), (2) is named, and (3) is an integer or pointer type (no
1996 structs, floats, etc). Otherwise, it's passed on the stack.
1998 Second arg may be passed in r2, same restrictions (but not QImode),
1999 even if the first arg is passed on the stack.
2001 Third and further args are passed on the stack. No padding is
2002 used, stack "alignment" is 8 bits.
2007 First arg may be passed in r0l or r0, same restrictions as above.
2009 Second and further args are passed on the stack. Padding is used
2010 after QImode parameters (i.e. lower-addressed byte is the value,
2011 higher-addressed byte is the padding), stack "alignment" is 16
2015 /* Return true if TYPE is a type that can be passed in registers. (We
2016 ignore the size, and pay attention only to the type code;
2017 acceptable sizes depends on which register is being considered to
2020 m32c_reg_arg_type (struct type
*type
)
2022 enum type_code code
= TYPE_CODE (type
);
2024 return (code
== TYPE_CODE_INT
2025 || code
== TYPE_CODE_ENUM
2026 || code
== TYPE_CODE_PTR
2027 || code
== TYPE_CODE_REF
2028 || code
== TYPE_CODE_BOOL
2029 || code
== TYPE_CODE_CHAR
);
2034 m32c_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2035 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2036 struct value
**args
, CORE_ADDR sp
, int struct_return
,
2037 CORE_ADDR struct_addr
)
2039 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2040 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
2044 /* The number of arguments given in this function's prototype, or
2045 zero if it has a non-prototyped function type. The m32c ABI
2046 passes arguments mentioned in the prototype differently from
2047 those in the ellipsis of a varargs function, or from those passed
2048 to a non-prototyped function. */
2049 int num_prototyped_args
= 0;
2052 struct type
*func_type
= value_type (function
);
2054 gdb_assert (TYPE_CODE (func_type
) == TYPE_CODE_FUNC
||
2055 TYPE_CODE (func_type
) == TYPE_CODE_METHOD
);
2058 /* The ABI description in gcc/config/m32c/m32c.abi says that
2059 we need to handle prototyped and non-prototyped functions
2060 separately, but the code in GCC doesn't actually do so. */
2061 if (TYPE_PROTOTYPED (func_type
))
2063 num_prototyped_args
= TYPE_NFIELDS (func_type
);
2066 /* First, if the function returns an aggregate by value, push a
2067 pointer to a buffer for it. This doesn't affect the way
2068 subsequent arguments are allocated to registers. */
2071 int ptr_len
= TYPE_LENGTH (tdep
->ptr_voyd
);
2073 write_memory_unsigned_integer (sp
, ptr_len
, struct_addr
);
2076 /* Push the arguments. */
2077 for (i
= nargs
- 1; i
>= 0; i
--)
2079 struct value
*arg
= args
[i
];
2080 const gdb_byte
*arg_bits
= value_contents (arg
);
2081 struct type
*arg_type
= value_type (arg
);
2082 ULONGEST arg_size
= TYPE_LENGTH (arg_type
);
2084 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2087 && i
< num_prototyped_args
2088 && m32c_reg_arg_type (arg_type
))
2090 /* Extract and re-store as an integer as a terse way to make
2091 sure it ends up in the least significant end of r1. (GDB
2092 should avoid assuming endianness, even on uni-endian
2094 ULONGEST u
= extract_unsigned_integer (arg_bits
, arg_size
);
2095 struct m32c_reg
*reg
= (mach
== bfd_mach_m16c
) ? tdep
->r1
: tdep
->r0
;
2096 regcache_cooked_write_unsigned (regcache
, reg
->num
, u
);
2099 /* Can it go in r2? */
2100 else if (mach
== bfd_mach_m16c
2103 && i
< num_prototyped_args
2104 && m32c_reg_arg_type (arg_type
))
2105 regcache_cooked_write (regcache
, tdep
->r2
->num
, arg_bits
);
2107 /* Everything else goes on the stack. */
2112 /* Align the stack. */
2113 if (mach
== bfd_mach_m32c
)
2116 write_memory (sp
, arg_bits
, arg_size
);
2120 /* This is the CFA we use to identify the dummy frame. */
2123 /* Push the return address. */
2124 sp
-= tdep
->ret_addr_bytes
;
2125 write_memory_unsigned_integer (sp
, tdep
->ret_addr_bytes
, bp_addr
);
2127 /* Update the stack pointer. */
2128 regcache_cooked_write_unsigned (regcache
, tdep
->sp
->num
, sp
);
2130 /* We need to borrow an odd trick from the i386 target here.
2132 The value we return from this function gets used as the stack
2133 address (the CFA) for the dummy frame's ID. The obvious thing is
2134 to return the new TOS. However, that points at the return
2135 address, saved on the stack, which is inconsistent with the CFA's
2136 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2137 .debug_frame info uses the address immediately after the saved
2138 return address. So you end up with a dummy frame whose CFA
2139 points at the return address, but the frame for the function
2140 being called has a CFA pointing after the return address: the
2141 younger CFA is *greater than* the older CFA. The sanity checks
2142 in frame.c don't like that.
2144 So we try to be consistent with the CFA's used by DWARF 2.
2145 Having a dummy frame and a real frame with the *same* CFA is
2151 static struct frame_id
2152 m32c_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
2154 /* This needs to return a frame ID whose PC is the return address
2155 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2156 m32c_push_dummy_call returned.
2158 m32c_unwind_sp gives us the CFA, which is the value the SP had
2159 before the return address was pushed. */
2160 return frame_id_build (m32c_unwind_sp (gdbarch
, next_frame
),
2161 frame_pc_unwind (next_frame
));
2166 /* Return values. */
2168 /* Return value conventions, according to GCC:
2179 Aggregate values (regardless of size) are returned by pushing a
2180 pointer to a temporary area on the stack after the args are pushed.
2181 The function fills in this area with the value. Note that this
2182 pointer on the stack does not affect how register arguments, if any,
2189 /* Return non-zero if values of type TYPE are returned by storing them
2190 in a buffer whose address is passed on the stack, ahead of the
2193 m32c_return_by_passed_buf (struct type
*type
)
2195 enum type_code code
= TYPE_CODE (type
);
2197 return (code
== TYPE_CODE_STRUCT
2198 || code
== TYPE_CODE_UNION
);
2201 static enum return_value_convention
2202 m32c_return_value (struct gdbarch
*gdbarch
,
2203 struct type
*valtype
,
2204 struct regcache
*regcache
,
2206 const gdb_byte
*writebuf
)
2208 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2209 enum return_value_convention conv
;
2210 ULONGEST valtype_len
= TYPE_LENGTH (valtype
);
2212 if (m32c_return_by_passed_buf (valtype
))
2213 conv
= RETURN_VALUE_STRUCT_CONVENTION
;
2215 conv
= RETURN_VALUE_REGISTER_CONVENTION
;
2219 /* We should never be called to find values being returned by
2220 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2221 unless we made the call ourselves. */
2222 gdb_assert (conv
== RETURN_VALUE_REGISTER_CONVENTION
);
2224 gdb_assert (valtype_len
<= 8);
2226 /* Anything that fits in r0 is returned there. */
2227 if (valtype_len
<= TYPE_LENGTH (tdep
->r0
->type
))
2230 regcache_cooked_read_unsigned (regcache
, tdep
->r0
->num
, &u
);
2231 store_unsigned_integer (readbuf
, valtype_len
, u
);
2235 /* Everything else is passed in mem0, using as many bytes as
2236 needed. This is not what the Renesas tools do, but it's
2237 what GCC does at the moment. */
2238 struct minimal_symbol
*mem0
2239 = lookup_minimal_symbol ("mem0", NULL
, NULL
);
2242 error ("The return value is stored in memory at 'mem0', "
2243 "but GDB cannot find\n"
2245 read_memory (SYMBOL_VALUE_ADDRESS (mem0
), readbuf
, valtype_len
);
2251 /* We should never be called to store values to be returned
2252 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2253 finding the buffer, unless we made the call ourselves. */
2254 gdb_assert (conv
== RETURN_VALUE_REGISTER_CONVENTION
);
2256 gdb_assert (valtype_len
<= 8);
2258 /* Anything that fits in r0 is returned there. */
2259 if (valtype_len
<= TYPE_LENGTH (tdep
->r0
->type
))
2261 ULONGEST u
= extract_unsigned_integer (writebuf
, valtype_len
);
2262 regcache_cooked_write_unsigned (regcache
, tdep
->r0
->num
, u
);
2266 /* Everything else is passed in mem0, using as many bytes as
2267 needed. This is not what the Renesas tools do, but it's
2268 what GCC does at the moment. */
2269 struct minimal_symbol
*mem0
2270 = lookup_minimal_symbol ("mem0", NULL
, NULL
);
2273 error ("The return value is stored in memory at 'mem0', "
2274 "but GDB cannot find\n"
2276 write_memory (SYMBOL_VALUE_ADDRESS (mem0
),
2277 (char *) writebuf
, valtype_len
);
2288 /* The m16c and m32c use a trampoline function for indirect function
2289 calls. An indirect call looks like this:
2291 ... push arguments ...
2292 ... push target function address ...
2295 The code for m32c_jsri16 looks like this:
2299 # Save return address.
2301 pop.b m32c_jsri_ret+2
2303 # Store target function address.
2304 pop.w m32c_jsri_addr
2306 # Re-push return address.
2307 push.b m32c_jsri_ret+2
2308 push.w m32c_jsri_ret
2310 # Call the target function.
2311 jmpi.a m32c_jsri_addr
2313 Without further information, GDB will treat calls to m32c_jsri16
2314 like calls to any other function. Since m32c_jsri16 doesn't have
2315 debugging information, that normally means that GDB sets a step-
2316 resume breakpoint and lets the program continue --- which is not
2317 what the user wanted. (Giving the trampoline debugging info
2318 doesn't help: the user expects the program to stop in the function
2319 their program is calling, not in some trampoline code they've never
2322 The SKIP_TRAMPOLINE_CODE gdbarch method tells GDB how to step
2323 through such trampoline functions transparently to the user. When
2324 given the address of a trampoline function's first instruction,
2325 SKIP_TRAMPOLINE_CODE should return the address of the first
2326 instruction of the function really being called. If GDB decides it
2327 wants to step into that function, it will set a breakpoint there
2328 and silently continue to it.
2330 We recognize the trampoline by name, and extract the target address
2331 directly from the stack. This isn't great, but recognizing by its
2332 code sequence seems more fragile. */
2335 m32c_skip_trampoline_code (CORE_ADDR stop_pc
)
2337 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2339 /* It would be nicer to simply look up the addresses of known
2340 trampolines once, and then compare stop_pc with them. However,
2341 we'd need to ensure that that cached address got invalidated when
2342 someone loaded a new executable, and I'm not quite sure of the
2343 best way to do that. find_pc_partial_function does do some
2344 caching, so we'll see how this goes. */
2346 CORE_ADDR start
, end
;
2348 if (find_pc_partial_function (stop_pc
, &name
, &start
, &end
))
2350 /* Are we stopped at the beginning of the trampoline function? */
2351 if (strcmp (name
, "m32c_jsri16") == 0
2352 && stop_pc
== start
)
2354 /* Get the stack pointer. The return address is at the top,
2355 and the target function's address is just below that. We
2356 know it's a two-byte address, since the trampoline is
2358 CORE_ADDR sp
= get_frame_sp (get_current_frame ());
2360 = read_memory_unsigned_integer (sp
+ tdep
->ret_addr_bytes
, 2);
2362 /* What we have now is the address of a jump instruction.
2363 What we need is the destination of that jump.
2364 The opcode is 1 byte, and the destination is the next 3 bytes.
2366 target
= read_memory_unsigned_integer (target
+ 1, 3);
2375 /* Address/pointer conversions. */
2377 /* On the m16c, there is a 24-bit address space, but only a very few
2378 instructions can generate addresses larger than 0xffff: jumps,
2379 jumps to subroutines, and the lde/std (load/store extended)
2382 Since GCC can only support one size of pointer, we can't have
2383 distinct 'near' and 'far' pointer types; we have to pick one size
2384 for everything. If we wanted to use 24-bit pointers, then GCC
2385 would have to use lde and ste for all memory references, which
2386 would be terrible for performance and code size. So the GNU
2387 toolchain uses 16-bit pointers for everything, and gives up the
2388 ability to have pointers point outside the first 64k of memory.
2390 However, as a special hack, we let the linker place functions at
2391 addresses above 0xffff, as long as it also places a trampoline in
2392 the low 64k for every function whose address is taken. Each
2393 trampoline consists of a single jmp.a instruction that jumps to the
2394 function's real entry point. Pointers to functions can be 16 bits
2395 long, even though the functions themselves are at higher addresses:
2396 the pointers refer to the trampolines, not the functions.
2398 This complicates things for GDB, however: given the address of a
2399 function (from debug info or linker symbols, say) which could be
2400 anywhere in the 24-bit address space, how can we find an
2401 appropriate 16-bit value to use as a pointer to it?
2403 If the linker has not generated a trampoline for the function,
2404 we're out of luck. Well, I guess we could malloc some space and
2405 write a jmp.a instruction to it, but I'm not going to get into that
2408 If the linker has generated a trampoline for the function, then it
2409 also emitted a symbol for the trampoline: if the function's linker
2410 symbol is named NAME, then the function's trampoline's linker
2411 symbol is named NAME.plt.
2413 So, given a code address:
2414 - We try to find a linker symbol at that address.
2415 - If we find such a symbol named NAME, we look for a linker symbol
2417 - If we find such a symbol, we assume it is a trampoline, and use
2418 its address as the pointer value.
2420 And, given a function pointer:
2421 - We try to find a linker symbol at that address named NAME.plt.
2422 - If we find such a symbol, we look for a linker symbol named NAME.
2423 - If we find that, we provide that as the function's address.
2424 - If any of the above steps fail, we return the original address
2425 unchanged; it might really be a function in the low 64k.
2427 See? You *knew* there was a reason you wanted to be a computer
2431 m32c_m16c_address_to_pointer (struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
2433 enum type_code target_code
;
2434 gdb_assert (TYPE_CODE (type
) == TYPE_CODE_PTR
||
2435 TYPE_CODE (type
) == TYPE_CODE_REF
);
2437 target_code
= TYPE_CODE (TYPE_TARGET_TYPE (type
));
2439 if (target_code
== TYPE_CODE_FUNC
|| target_code
== TYPE_CODE_METHOD
)
2443 struct minimal_symbol
*tramp_msym
;
2445 /* Try to find a linker symbol at this address. */
2446 struct minimal_symbol
*func_msym
= lookup_minimal_symbol_by_pc (addr
);
2449 error ("Cannot convert code address %s to function pointer:\n"
2450 "couldn't find a symbol at that address, to find trampoline.",
2453 func_name
= SYMBOL_LINKAGE_NAME (func_msym
);
2454 tramp_name
= xmalloc (strlen (func_name
) + 5);
2455 strcpy (tramp_name
, func_name
);
2456 strcat (tramp_name
, ".plt");
2458 /* Try to find a linker symbol for the trampoline. */
2459 tramp_msym
= lookup_minimal_symbol (tramp_name
, NULL
, NULL
);
2461 /* We've either got another copy of the name now, or don't need
2462 the name any more. */
2466 error ("Cannot convert code address %s to function pointer:\n"
2467 "couldn't find trampoline named '%s.plt'.",
2468 paddr_nz (addr
), func_name
);
2470 /* The trampoline's address is our pointer. */
2471 addr
= SYMBOL_VALUE_ADDRESS (tramp_msym
);
2474 store_unsigned_integer (buf
, TYPE_LENGTH (type
), addr
);
2479 m32c_m16c_pointer_to_address (struct type
*type
, const gdb_byte
*buf
)
2482 enum type_code target_code
;
2484 gdb_assert (TYPE_CODE (type
) == TYPE_CODE_PTR
||
2485 TYPE_CODE (type
) == TYPE_CODE_REF
);
2487 ptr
= extract_unsigned_integer (buf
, TYPE_LENGTH (type
));
2489 target_code
= TYPE_CODE (TYPE_TARGET_TYPE (type
));
2491 if (target_code
== TYPE_CODE_FUNC
|| target_code
== TYPE_CODE_METHOD
)
2493 /* See if there is a minimal symbol at that address whose name is
2495 struct minimal_symbol
*ptr_msym
= lookup_minimal_symbol_by_pc (ptr
);
2499 char *ptr_msym_name
= SYMBOL_LINKAGE_NAME (ptr_msym
);
2500 int len
= strlen (ptr_msym_name
);
2503 && strcmp (ptr_msym_name
+ len
- 4, ".plt") == 0)
2505 struct minimal_symbol
*func_msym
;
2506 /* We have a .plt symbol; try to find the symbol for the
2507 corresponding function.
2509 Since the trampoline contains a jump instruction, we
2510 could also just extract the jump's target address. I
2511 don't see much advantage one way or the other. */
2512 char *func_name
= xmalloc (len
- 4 + 1);
2513 memcpy (func_name
, ptr_msym_name
, len
- 4);
2514 func_name
[len
- 4] = '\0';
2516 = lookup_minimal_symbol (func_name
, NULL
, NULL
);
2518 /* If we do have such a symbol, return its value as the
2519 function's true address. */
2521 ptr
= SYMBOL_VALUE_ADDRESS (func_msym
);
2530 m32c_virtual_frame_pointer (CORE_ADDR pc
,
2532 LONGEST
*frame_offset
)
2535 CORE_ADDR func_addr
, func_end
, sal_end
;
2536 struct m32c_prologue p
;
2538 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2540 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
2541 internal_error (__FILE__
, __LINE__
, _("No virtual frame pointer available"));
2543 m32c_analyze_prologue (current_gdbarch
, func_addr
, pc
, &p
);
2546 case prologue_with_frame_ptr
:
2547 *frame_regnum
= m32c_banked_register (tdep
->fb
, current_regcache
)->num
;
2548 *frame_offset
= p
.frame_ptr_offset
;
2550 case prologue_sans_frame_ptr
:
2551 *frame_regnum
= m32c_banked_register (tdep
->sp
, current_regcache
)->num
;
2552 *frame_offset
= p
.frame_size
;
2555 *frame_regnum
= m32c_banked_register (tdep
->sp
, current_regcache
)->num
;
2560 if (*frame_regnum
> NUM_REGS
)
2561 internal_error (__FILE__
, __LINE__
, _("No virtual frame pointer available"));
2565 /* Initialization. */
2567 static struct gdbarch
*
2568 m32c_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2570 struct gdbarch
*arch
;
2571 struct gdbarch_tdep
*tdep
;
2572 unsigned long mach
= info
.bfd_arch_info
->mach
;
2574 /* Find a candidate among the list of architectures we've created
2576 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2578 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2579 return arches
->gdbarch
;
2581 tdep
= xcalloc (1, sizeof (*tdep
));
2582 arch
= gdbarch_alloc (&info
, tdep
);
2584 /* Essential types. */
2587 /* Address/pointer conversions. */
2588 if (mach
== bfd_mach_m16c
)
2590 set_gdbarch_address_to_pointer (arch
, m32c_m16c_address_to_pointer
);
2591 set_gdbarch_pointer_to_address (arch
, m32c_m16c_pointer_to_address
);
2598 set_gdbarch_print_insn (arch
, print_insn_m32c
);
2601 set_gdbarch_breakpoint_from_pc (arch
, m32c_breakpoint_from_pc
);
2603 /* Prologue analysis and unwinding. */
2604 set_gdbarch_inner_than (arch
, core_addr_lessthan
);
2605 set_gdbarch_skip_prologue (arch
, m32c_skip_prologue
);
2606 set_gdbarch_unwind_pc (arch
, m32c_unwind_pc
);
2607 set_gdbarch_unwind_sp (arch
, m32c_unwind_sp
);
2609 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2610 They may be in the dwarf2 cfi code in GDB, or they may be in
2611 the debug info emitted by the upstream toolchain. I don't
2612 know which, but I do know that the prologue analyzer works better.
2615 frame_unwind_append_sniffer (arch
, dwarf2_frame_sniffer
);
2617 frame_unwind_append_sniffer (arch
, m32c_frame_sniffer
);
2619 /* Inferior calls. */
2620 set_gdbarch_push_dummy_call (arch
, m32c_push_dummy_call
);
2621 set_gdbarch_return_value (arch
, m32c_return_value
);
2622 set_gdbarch_unwind_dummy_id (arch
, m32c_unwind_dummy_id
);
2625 set_gdbarch_skip_trampoline_code (arch
, m32c_skip_trampoline_code
);
2627 set_gdbarch_virtual_frame_pointer (arch
, m32c_virtual_frame_pointer
);
2634 _initialize_m32c_tdep (void)
2636 register_gdbarch_init (bfd_arch_m32c
, m32c_gdbarch_init
);
2638 m32c_dma_reggroup
= reggroup_new ("dma", USER_REGGROUP
);