1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
3 Copyright 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #if defined (HAVE_STRING_H)
28 #include "gdb_assert.h"
31 #include "gdb/sim-m32c.h"
35 #include "arch-utils.h"
37 #include "frame-unwind.h"
38 #include "dwarf2-frame.h"
39 #include "dwarf2expr.h"
43 #include "reggroups.h"
44 #include "prologue-value.h"
48 /* The m32c tdep structure. */
50 static struct reggroup
*m32c_dma_reggroup
;
54 /* The type of a function that moves the value of REG between CACHE or
55 BUF --- in either direction. */
56 typedef void (m32c_move_reg_t
) (struct m32c_reg
*reg
,
57 struct regcache
*cache
,
62 /* The name of this register. */
68 /* The architecture this register belongs to. */
71 /* Its GDB register number. */
74 /* Its sim register number. */
77 /* Its DWARF register number, or -1 if it doesn't have one. */
80 /* Register group memberships. */
81 unsigned int general_p
: 1;
82 unsigned int dma_p
: 1;
83 unsigned int system_p
: 1;
84 unsigned int save_restore_p
: 1;
86 /* Functions to read its value from a regcache, and write its value
88 m32c_move_reg_t
*read
, *write
;
90 /* Data for READ and WRITE functions. The exact meaning depends on
91 the specific functions selected; see the comments for those
93 struct m32c_reg
*rx
, *ry
;
98 /* An overestimate of the number of raw and pseudoregisters we will
99 have. The exact answer depends on the variant of the architecture
100 at hand, but we can use this to declare statically allocated
101 arrays, and bump it up when needed. */
102 #define M32C_MAX_NUM_REGS (75)
104 /* The largest assigned DWARF register number. */
105 #define M32C_MAX_DWARF_REGNUM (40)
110 /* All the registers for this variant, indexed by GDB register
111 number, and the number of registers present. */
112 struct m32c_reg regs
[M32C_MAX_NUM_REGS
];
114 /* The number of valid registers. */
117 /* Interesting registers. These are pointers into REGS. */
118 struct m32c_reg
*pc
, *flg
;
119 struct m32c_reg
*r0
, *r1
, *r2
, *r3
, *a0
, *a1
;
120 struct m32c_reg
*r2r0
, *r3r2r1r0
, *r3r1r2r0
;
121 struct m32c_reg
*sb
, *fb
, *sp
;
123 /* A table indexed by DWARF register numbers, pointing into
125 struct m32c_reg
*dwarf_regs
[M32C_MAX_DWARF_REGNUM
+ 1];
127 /* Types for this architecture. We can't use the builtin_type_foo
128 types, because they're not initialized when building a gdbarch
130 struct type
*voyd
, *ptr_voyd
, *func_voyd
;
131 struct type
*uint8
, *uint16
;
132 struct type
*int8
, *int16
, *int32
, *int64
;
134 /* The types for data address and code address registers. */
135 struct type
*data_addr_reg_type
, *code_addr_reg_type
;
137 /* The number of bytes a return address pushed by a 'jsr' instruction
138 occupies on the stack. */
141 /* The number of bytes an address register occupies on the stack
142 when saved by an 'enter' or 'pushm' instruction. */
150 make_types (struct gdbarch
*arch
)
152 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
153 unsigned long mach
= gdbarch_bfd_arch_info (arch
)->mach
;
154 int data_addr_reg_bits
, code_addr_reg_bits
;
158 /* This is used to clip CORE_ADDR values, so this value is
159 appropriate both on the m32c, where pointers are 32 bits long,
160 and on the m16c, where pointers are sixteen bits long, but there
161 may be code above the 64k boundary. */
162 set_gdbarch_addr_bit (arch
, 24);
164 /* GCC uses 32 bits for addrs in the dwarf info, even though
165 only 16/24 bits are used. Setting addr_bit to 24 causes
166 errors in reading the dwarf addresses. */
167 set_gdbarch_addr_bit (arch
, 32);
170 set_gdbarch_int_bit (arch
, 16);
174 data_addr_reg_bits
= 16;
175 code_addr_reg_bits
= 24;
176 set_gdbarch_ptr_bit (arch
, 16);
177 tdep
->ret_addr_bytes
= 3;
178 tdep
->push_addr_bytes
= 2;
182 data_addr_reg_bits
= 24;
183 code_addr_reg_bits
= 24;
184 set_gdbarch_ptr_bit (arch
, 32);
185 tdep
->ret_addr_bytes
= 4;
186 tdep
->push_addr_bytes
= 4;
193 /* The builtin_type_mumble variables are sometimes uninitialized when
194 this is called, so we avoid using them. */
195 tdep
->voyd
= arch_type (arch
, TYPE_CODE_VOID
, 1, "void");
197 = arch_type (arch
, TYPE_CODE_PTR
, gdbarch_ptr_bit (arch
), NULL
);
198 TYPE_TARGET_TYPE (tdep
->ptr_voyd
) = tdep
->voyd
;
199 TYPE_UNSIGNED (tdep
->ptr_voyd
) = 1;
200 tdep
->func_voyd
= lookup_function_type (tdep
->voyd
);
202 sprintf (type_name
, "%s_data_addr_t",
203 gdbarch_bfd_arch_info (arch
)->printable_name
);
204 tdep
->data_addr_reg_type
205 = arch_type (arch
, TYPE_CODE_PTR
, data_addr_reg_bits
, xstrdup (type_name
));
206 TYPE_TARGET_TYPE (tdep
->data_addr_reg_type
) = tdep
->voyd
;
207 TYPE_UNSIGNED (tdep
->data_addr_reg_type
) = 1;
209 sprintf (type_name
, "%s_code_addr_t",
210 gdbarch_bfd_arch_info (arch
)->printable_name
);
211 tdep
->code_addr_reg_type
212 = arch_type (arch
, TYPE_CODE_PTR
, code_addr_reg_bits
, xstrdup (type_name
));
213 TYPE_TARGET_TYPE (tdep
->code_addr_reg_type
) = tdep
->func_voyd
;
214 TYPE_UNSIGNED (tdep
->code_addr_reg_type
) = 1;
216 tdep
->uint8
= arch_integer_type (arch
, 8, 1, "uint8_t");
217 tdep
->uint16
= arch_integer_type (arch
, 16, 1, "uint16_t");
218 tdep
->int8
= arch_integer_type (arch
, 8, 0, "int8_t");
219 tdep
->int16
= arch_integer_type (arch
, 16, 0, "int16_t");
220 tdep
->int32
= arch_integer_type (arch
, 32, 0, "int32_t");
221 tdep
->int64
= arch_integer_type (arch
, 64, 0, "int64_t");
229 m32c_register_name (struct gdbarch
*gdbarch
, int num
)
231 return gdbarch_tdep (gdbarch
)->regs
[num
].name
;
236 m32c_register_type (struct gdbarch
*arch
, int reg_nr
)
238 return gdbarch_tdep (arch
)->regs
[reg_nr
].type
;
243 m32c_register_sim_regno (struct gdbarch
*gdbarch
, int reg_nr
)
245 return gdbarch_tdep (gdbarch
)->regs
[reg_nr
].sim_num
;
250 m32c_debug_info_reg_to_regnum (struct gdbarch
*gdbarch
, int reg_nr
)
252 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
253 if (0 <= reg_nr
&& reg_nr
<= M32C_MAX_DWARF_REGNUM
254 && tdep
->dwarf_regs
[reg_nr
])
255 return tdep
->dwarf_regs
[reg_nr
]->num
;
257 /* The DWARF CFI code expects to see -1 for invalid register
264 m32c_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
265 struct reggroup
*group
)
267 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
268 struct m32c_reg
*reg
= &tdep
->regs
[regnum
];
270 /* The anonymous raw registers aren't in any groups. */
274 if (group
== all_reggroup
)
277 if (group
== general_reggroup
281 if (group
== m32c_dma_reggroup
285 if (group
== system_reggroup
289 /* Since the m32c DWARF register numbers refer to cooked registers, not
290 raw registers, and frame_pop depends on the save and restore groups
291 containing registers the DWARF CFI will actually mention, our save
292 and restore groups are cooked registers, not raw registers. (This is
293 why we can't use the default reggroup function.) */
294 if ((group
== save_reggroup
295 || group
== restore_reggroup
)
296 && reg
->save_restore_p
)
303 /* Register move functions. We declare them here using
304 m32c_move_reg_t to check the types. */
305 static m32c_move_reg_t m32c_raw_read
, m32c_raw_write
;
306 static m32c_move_reg_t m32c_banked_read
, m32c_banked_write
;
307 static m32c_move_reg_t m32c_sb_read
, m32c_sb_write
;
308 static m32c_move_reg_t m32c_part_read
, m32c_part_write
;
309 static m32c_move_reg_t m32c_cat_read
, m32c_cat_write
;
310 static m32c_move_reg_t m32c_r3r2r1r0_read
, m32c_r3r2r1r0_write
;
313 /* Copy the value of the raw register REG from CACHE to BUF. */
315 m32c_raw_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
317 regcache_raw_read (cache
, reg
->num
, buf
);
321 /* Copy the value of the raw register REG from BUF to CACHE. */
323 m32c_raw_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
325 regcache_raw_write (cache
, reg
->num
, (const void *) buf
);
329 /* Return the value of the 'flg' register in CACHE. */
331 m32c_read_flg (struct regcache
*cache
)
333 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (cache
));
335 regcache_raw_read_unsigned (cache
, tdep
->flg
->num
, &flg
);
340 /* Evaluate the real register number of a banked register. */
341 static struct m32c_reg
*
342 m32c_banked_register (struct m32c_reg
*reg
, struct regcache
*cache
)
344 return ((m32c_read_flg (cache
) & reg
->n
) ? reg
->ry
: reg
->rx
);
348 /* Move the value of a banked register from CACHE to BUF.
349 If the value of the 'flg' register in CACHE has any of the bits
350 masked in REG->n set, then read REG->ry. Otherwise, read
353 m32c_banked_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
355 struct m32c_reg
*bank_reg
= m32c_banked_register (reg
, cache
);
356 regcache_raw_read (cache
, bank_reg
->num
, buf
);
360 /* Move the value of a banked register from BUF to CACHE.
361 If the value of the 'flg' register in CACHE has any of the bits
362 masked in REG->n set, then write REG->ry. Otherwise, write
365 m32c_banked_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
367 struct m32c_reg
*bank_reg
= m32c_banked_register (reg
, cache
);
368 regcache_raw_write (cache
, bank_reg
->num
, (const void *) buf
);
372 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
373 banked register; on bfd_mach_m16c, it's not. */
375 m32c_sb_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
377 if (gdbarch_bfd_arch_info (reg
->arch
)->mach
== bfd_mach_m16c
)
378 m32c_raw_read (reg
->rx
, cache
, buf
);
380 m32c_banked_read (reg
, cache
, buf
);
384 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
385 banked register; on bfd_mach_m16c, it's not. */
387 m32c_sb_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
389 if (gdbarch_bfd_arch_info (reg
->arch
)->mach
== bfd_mach_m16c
)
390 m32c_raw_write (reg
->rx
, cache
, buf
);
392 m32c_banked_write (reg
, cache
, buf
);
396 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
397 and *LEN_P to the offset and length, in bytes, of the part REG
398 occupies in its underlying register. The offset is from the
399 lower-addressed end, regardless of the architecture's endianness.
400 (The M32C family is always little-endian, but let's keep those
401 assumptions out of here.) */
403 m32c_find_part (struct m32c_reg
*reg
, int *offset_p
, int *len_p
)
405 /* The length of the containing register, of which REG is one part. */
406 int containing_len
= TYPE_LENGTH (reg
->rx
->type
);
408 /* The length of one "element" in our imaginary array. */
409 int elt_len
= TYPE_LENGTH (reg
->type
);
411 /* The offset of REG's "element" from the least significant end of
412 the containing register. */
413 int elt_offset
= reg
->n
* elt_len
;
415 /* If we extend off the end, trim the length of the element. */
416 if (elt_offset
+ elt_len
> containing_len
)
418 elt_len
= containing_len
- elt_offset
;
419 /* We shouldn't be declaring partial registers that go off the
420 end of their containing registers. */
421 gdb_assert (elt_len
> 0);
424 /* Flip the offset around if we're big-endian. */
425 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
426 elt_offset
= TYPE_LENGTH (reg
->rx
->type
) - elt_offset
- elt_len
;
428 *offset_p
= elt_offset
;
433 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
434 to BUF. Treating the value of the register REG->rx as an array of
435 REG->type values, where higher indices refer to more significant
436 bits, read the value of the REG->n'th element. */
438 m32c_part_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
441 memset (buf
, 0, TYPE_LENGTH (reg
->type
));
442 m32c_find_part (reg
, &offset
, &len
);
443 regcache_cooked_read_part (cache
, reg
->rx
->num
, offset
, len
, buf
);
447 /* Move the value of a banked register from BUF to CACHE.
448 Treating the value of the register REG->rx as an array of REG->type
449 values, where higher indices refer to more significant bits, write
450 the value of the REG->n'th element. */
452 m32c_part_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
455 m32c_find_part (reg
, &offset
, &len
);
456 regcache_cooked_write_part (cache
, reg
->rx
->num
, offset
, len
, buf
);
460 /* Move the value of REG from CACHE to BUF. REG's value is the
461 concatenation of the values of the registers REG->rx and REG->ry,
462 with REG->rx contributing the more significant bits. */
464 m32c_cat_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
466 int high_bytes
= TYPE_LENGTH (reg
->rx
->type
);
467 int low_bytes
= TYPE_LENGTH (reg
->ry
->type
);
468 /* For address arithmetic. */
469 unsigned char *cbuf
= buf
;
471 gdb_assert (TYPE_LENGTH (reg
->type
) == high_bytes
+ low_bytes
);
473 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
475 regcache_cooked_read (cache
, reg
->rx
->num
, cbuf
);
476 regcache_cooked_read (cache
, reg
->ry
->num
, cbuf
+ high_bytes
);
480 regcache_cooked_read (cache
, reg
->rx
->num
, cbuf
+ low_bytes
);
481 regcache_cooked_read (cache
, reg
->ry
->num
, cbuf
);
486 /* Move the value of REG from CACHE to BUF. REG's value is the
487 concatenation of the values of the registers REG->rx and REG->ry,
488 with REG->rx contributing the more significant bits. */
490 m32c_cat_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
492 int high_bytes
= TYPE_LENGTH (reg
->rx
->type
);
493 int low_bytes
= TYPE_LENGTH (reg
->ry
->type
);
494 /* For address arithmetic. */
495 unsigned char *cbuf
= buf
;
497 gdb_assert (TYPE_LENGTH (reg
->type
) == high_bytes
+ low_bytes
);
499 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
501 regcache_cooked_write (cache
, reg
->rx
->num
, cbuf
);
502 regcache_cooked_write (cache
, reg
->ry
->num
, cbuf
+ high_bytes
);
506 regcache_cooked_write (cache
, reg
->rx
->num
, cbuf
+ low_bytes
);
507 regcache_cooked_write (cache
, reg
->ry
->num
, cbuf
);
512 /* Copy the value of the raw register REG from CACHE to BUF. REG is
513 the concatenation (from most significant to least) of r3, r2, r1,
516 m32c_r3r2r1r0_read (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
518 struct gdbarch_tdep
*tdep
= gdbarch_tdep (reg
->arch
);
519 int len
= TYPE_LENGTH (tdep
->r0
->type
);
521 /* For address arithmetic. */
522 unsigned char *cbuf
= buf
;
524 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
526 regcache_cooked_read (cache
, tdep
->r0
->num
, cbuf
+ len
* 3);
527 regcache_cooked_read (cache
, tdep
->r1
->num
, cbuf
+ len
* 2);
528 regcache_cooked_read (cache
, tdep
->r2
->num
, cbuf
+ len
* 1);
529 regcache_cooked_read (cache
, tdep
->r3
->num
, cbuf
);
533 regcache_cooked_read (cache
, tdep
->r0
->num
, cbuf
);
534 regcache_cooked_read (cache
, tdep
->r1
->num
, cbuf
+ len
* 1);
535 regcache_cooked_read (cache
, tdep
->r2
->num
, cbuf
+ len
* 2);
536 regcache_cooked_read (cache
, tdep
->r3
->num
, cbuf
+ len
* 3);
541 /* Copy the value of the raw register REG from BUF to CACHE. REG is
542 the concatenation (from most significant to least) of r3, r2, r1,
545 m32c_r3r2r1r0_write (struct m32c_reg
*reg
, struct regcache
*cache
, void *buf
)
547 struct gdbarch_tdep
*tdep
= gdbarch_tdep (reg
->arch
);
548 int len
= TYPE_LENGTH (tdep
->r0
->type
);
550 /* For address arithmetic. */
551 unsigned char *cbuf
= buf
;
553 if (gdbarch_byte_order (reg
->arch
) == BFD_ENDIAN_BIG
)
555 regcache_cooked_write (cache
, tdep
->r0
->num
, cbuf
+ len
* 3);
556 regcache_cooked_write (cache
, tdep
->r1
->num
, cbuf
+ len
* 2);
557 regcache_cooked_write (cache
, tdep
->r2
->num
, cbuf
+ len
* 1);
558 regcache_cooked_write (cache
, tdep
->r3
->num
, cbuf
);
562 regcache_cooked_write (cache
, tdep
->r0
->num
, cbuf
);
563 regcache_cooked_write (cache
, tdep
->r1
->num
, cbuf
+ len
* 1);
564 regcache_cooked_write (cache
, tdep
->r2
->num
, cbuf
+ len
* 2);
565 regcache_cooked_write (cache
, tdep
->r3
->num
, cbuf
+ len
* 3);
571 m32c_pseudo_register_read (struct gdbarch
*arch
,
572 struct regcache
*cache
,
576 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
577 struct m32c_reg
*reg
;
579 gdb_assert (0 <= cookednum
&& cookednum
< tdep
->num_regs
);
580 gdb_assert (arch
== get_regcache_arch (cache
));
581 gdb_assert (arch
== tdep
->regs
[cookednum
].arch
);
582 reg
= &tdep
->regs
[cookednum
];
584 reg
->read (reg
, cache
, buf
);
589 m32c_pseudo_register_write (struct gdbarch
*arch
,
590 struct regcache
*cache
,
594 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
595 struct m32c_reg
*reg
;
597 gdb_assert (0 <= cookednum
&& cookednum
< tdep
->num_regs
);
598 gdb_assert (arch
== get_regcache_arch (cache
));
599 gdb_assert (arch
== tdep
->regs
[cookednum
].arch
);
600 reg
= &tdep
->regs
[cookednum
];
602 reg
->write (reg
, cache
, (void *) buf
);
606 /* Add a register with the given fields to the end of ARCH's table.
607 Return a pointer to the newly added register. */
608 static struct m32c_reg
*
609 add_reg (struct gdbarch
*arch
,
613 m32c_move_reg_t
*read
,
614 m32c_move_reg_t
*write
,
619 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
620 struct m32c_reg
*r
= &tdep
->regs
[tdep
->num_regs
];
622 gdb_assert (tdep
->num_regs
< M32C_MAX_NUM_REGS
);
627 r
->num
= tdep
->num_regs
;
628 r
->sim_num
= sim_num
;
633 r
->save_restore_p
= 0;
646 /* Record NUM as REG's DWARF register number. */
648 set_dwarf_regnum (struct m32c_reg
*reg
, int num
)
650 gdb_assert (num
< M32C_MAX_NUM_REGS
);
652 /* Update the reg->DWARF mapping. Only count the first number
653 assigned to this register. */
654 if (reg
->dwarf_num
== -1)
655 reg
->dwarf_num
= num
;
657 /* Update the DWARF->reg mapping. */
658 gdbarch_tdep (reg
->arch
)->dwarf_regs
[num
] = reg
;
662 /* Mark REG as a general-purpose register, and return it. */
663 static struct m32c_reg
*
664 mark_general (struct m32c_reg
*reg
)
671 /* Mark REG as a DMA register, and return it. */
672 static struct m32c_reg
*
673 mark_dma (struct m32c_reg
*reg
)
680 /* Mark REG as a SYSTEM register, and return it. */
681 static struct m32c_reg
*
682 mark_system (struct m32c_reg
*reg
)
689 /* Mark REG as a save-restore register, and return it. */
690 static struct m32c_reg
*
691 mark_save_restore (struct m32c_reg
*reg
)
693 reg
->save_restore_p
= 1;
698 #define FLAGBIT_B 0x0010
699 #define FLAGBIT_U 0x0080
701 /* Handy macros for declaring registers. These all evaluate to
702 pointers to the register declared. Macros that define two
703 registers evaluate to a pointer to the first. */
705 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
706 #define R(name, type, sim_num) \
707 (add_reg (arch, (name), (type), (sim_num), \
708 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
710 /* The simulator register number for a raw register named NAME. */
711 #define SIM(name) (m32c_sim_reg_ ## name)
713 /* A raw unsigned 16-bit data register named NAME.
714 NAME should be an identifier, not a string. */
716 (R(#name, tdep->uint16, SIM (name)))
718 /* A raw data address register named NAME.
719 NAME should be an identifier, not a string. */
721 (R(#name, tdep->data_addr_reg_type, SIM (name)))
723 /* A raw code address register named NAME. NAME should
724 be an identifier, not a string. */
726 (R(#name, tdep->code_addr_reg_type, SIM (name)))
728 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
729 NAME should be an identifier, not a string. */
730 #define RP(name, type) \
731 (R(#name "0", (type), SIM (name ## 0)), \
732 R(#name "1", (type), SIM (name ## 1)) - 1)
734 /* A raw banked general-purpose data register named NAME.
735 NAME should be an identifier, not a string. */
737 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
738 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
740 /* A raw banked data address register named NAME.
741 NAME should be an identifier, not a string. */
743 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
744 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
746 /* A cooked register named NAME referring to a raw banked register
747 from the bank selected by the current value of FLG. RAW_PAIR
748 should be a pointer to the first register in the banked pair.
749 NAME must be an identifier, not a string. */
750 #define CB(name, raw_pair) \
751 (add_reg (arch, #name, (raw_pair)->type, 0, \
752 m32c_banked_read, m32c_banked_write, \
753 (raw_pair), (raw_pair + 1), FLAGBIT_B))
755 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
756 access the top and bottom halves of the register pointed to by
757 NAME. NAME should be an identifier. */
758 #define CHL(name, type) \
759 (add_reg (arch, #name "h", (type), 0, \
760 m32c_part_read, m32c_part_write, name, NULL, 1), \
761 add_reg (arch, #name "l", (type), 0, \
762 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
764 /* A register constructed by concatenating the two registers HIGH and
765 LOW, whose name is HIGHLOW and whose type is TYPE. */
766 #define CCAT(high, low, type) \
767 (add_reg (arch, #high #low, (type), 0, \
768 m32c_cat_read, m32c_cat_write, (high), (low), 0))
770 /* Abbreviations for marking register group membership. */
771 #define G(reg) (mark_general (reg))
772 #define S(reg) (mark_system (reg))
773 #define DMA(reg) (mark_dma (reg))
776 /* Construct the register set for ARCH. */
778 make_regs (struct gdbarch
*arch
)
780 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
781 int mach
= gdbarch_bfd_arch_info (arch
)->mach
;
794 struct m32c_reg
*r0hl
;
795 struct m32c_reg
*r1hl
;
796 struct m32c_reg
*r2hl
;
797 struct m32c_reg
*r3hl
;
798 struct m32c_reg
*intbhl
;
799 struct m32c_reg
*r2r0
;
800 struct m32c_reg
*r3r1
;
801 struct m32c_reg
*r3r1r2r0
;
802 struct m32c_reg
*r3r2r1r0
;
803 struct m32c_reg
*a1a0
;
805 struct m32c_reg
*raw_r0_pair
= RBD (r0
);
806 struct m32c_reg
*raw_r1_pair
= RBD (r1
);
807 struct m32c_reg
*raw_r2_pair
= RBD (r2
);
808 struct m32c_reg
*raw_r3_pair
= RBD (r3
);
809 struct m32c_reg
*raw_a0_pair
= RBA (a0
);
810 struct m32c_reg
*raw_a1_pair
= RBA (a1
);
811 struct m32c_reg
*raw_fb_pair
= RBA (fb
);
813 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
814 We always declare both raw registers, and deal with the distinction
815 in the pseudoregister. */
816 struct m32c_reg
*raw_sb_pair
= RBA (sb
);
818 struct m32c_reg
*usp
= S (RA (usp
));
819 struct m32c_reg
*isp
= S (RA (isp
));
820 struct m32c_reg
*intb
= S (RC (intb
));
821 struct m32c_reg
*pc
= G (RC (pc
));
822 struct m32c_reg
*flg
= G (R16U (flg
));
824 if (mach
== bfd_mach_m32c
)
826 struct m32c_reg
*svf
= S (R16U (svf
));
827 struct m32c_reg
*svp
= S (RC (svp
));
828 struct m32c_reg
*vct
= S (RC (vct
));
830 struct m32c_reg
*dmd01
= DMA (RP (dmd
, tdep
->uint8
));
831 struct m32c_reg
*dct01
= DMA (RP (dct
, tdep
->uint16
));
832 struct m32c_reg
*drc01
= DMA (RP (drc
, tdep
->uint16
));
833 struct m32c_reg
*dma01
= DMA (RP (dma
, tdep
->data_addr_reg_type
));
834 struct m32c_reg
*dsa01
= DMA (RP (dsa
, tdep
->data_addr_reg_type
));
835 struct m32c_reg
*dra01
= DMA (RP (dra
, tdep
->data_addr_reg_type
));
838 num_raw_regs
= tdep
->num_regs
;
840 r0
= G (CB (r0
, raw_r0_pair
));
841 r1
= G (CB (r1
, raw_r1_pair
));
842 r2
= G (CB (r2
, raw_r2_pair
));
843 r3
= G (CB (r3
, raw_r3_pair
));
844 a0
= G (CB (a0
, raw_a0_pair
));
845 a1
= G (CB (a1
, raw_a1_pair
));
846 fb
= G (CB (fb
, raw_fb_pair
));
848 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
849 Specify custom read/write functions that do the right thing. */
850 sb
= G (add_reg (arch
, "sb", raw_sb_pair
->type
, 0,
851 m32c_sb_read
, m32c_sb_write
,
852 raw_sb_pair
, raw_sb_pair
+ 1, 0));
854 /* The current sp is either usp or isp, depending on the value of
855 the FLG register's U bit. */
856 sp
= G (add_reg (arch
, "sp", usp
->type
, 0,
857 m32c_banked_read
, m32c_banked_write
,
858 isp
, usp
, FLAGBIT_U
));
860 r0hl
= CHL (r0
, tdep
->int8
);
861 r1hl
= CHL (r1
, tdep
->int8
);
862 r2hl
= CHL (r2
, tdep
->int8
);
863 r3hl
= CHL (r3
, tdep
->int8
);
864 intbhl
= CHL (intb
, tdep
->int16
);
866 r2r0
= CCAT (r2
, r0
, tdep
->int32
);
867 r3r1
= CCAT (r3
, r1
, tdep
->int32
);
868 r3r1r2r0
= CCAT (r3r1
, r2r0
, tdep
->int64
);
871 = add_reg (arch
, "r3r2r1r0", tdep
->int64
, 0,
872 m32c_r3r2r1r0_read
, m32c_r3r2r1r0_write
, NULL
, NULL
, 0);
874 if (mach
== bfd_mach_m16c
)
875 a1a0
= CCAT (a1
, a0
, tdep
->int32
);
879 num_cooked_regs
= tdep
->num_regs
- num_raw_regs
;
888 tdep
->r3r2r1r0
= r3r2r1r0
;
889 tdep
->r3r1r2r0
= r3r1r2r0
;
896 /* Set up the DWARF register table. */
897 memset (tdep
->dwarf_regs
, 0, sizeof (tdep
->dwarf_regs
));
898 set_dwarf_regnum (r0hl
+ 1, 0x01);
899 set_dwarf_regnum (r0hl
+ 0, 0x02);
900 set_dwarf_regnum (r1hl
+ 1, 0x03);
901 set_dwarf_regnum (r1hl
+ 0, 0x04);
902 set_dwarf_regnum (r0
, 0x05);
903 set_dwarf_regnum (r1
, 0x06);
904 set_dwarf_regnum (r2
, 0x07);
905 set_dwarf_regnum (r3
, 0x08);
906 set_dwarf_regnum (a0
, 0x09);
907 set_dwarf_regnum (a1
, 0x0a);
908 set_dwarf_regnum (fb
, 0x0b);
909 set_dwarf_regnum (sp
, 0x0c);
910 set_dwarf_regnum (pc
, 0x0d); /* GCC's invention */
911 set_dwarf_regnum (sb
, 0x13);
912 set_dwarf_regnum (r2r0
, 0x15);
913 set_dwarf_regnum (r3r1
, 0x16);
915 set_dwarf_regnum (a1a0
, 0x17);
917 /* Enumerate the save/restore register group.
919 The regcache_save and regcache_restore functions apply their read
920 function to each register in this group.
922 Since frame_pop supplies frame_unwind_register as its read
923 function, the registers meaningful to the Dwarf unwinder need to
926 On the other hand, when we make inferior calls, save_inferior_status
927 and restore_inferior_status use them to preserve the current register
928 values across the inferior call. For this, you'd kind of like to
929 preserve all the raw registers, to protect the interrupted code from
930 any sort of bank switching the callee might have done. But we handle
931 those cases so badly anyway --- for example, it matters whether we
932 restore FLG before or after we restore the general-purpose registers,
933 but there's no way to express that --- that it isn't worth worrying
936 We omit control registers like inthl: if you call a function that
937 changes those, it's probably because you wanted that change to be
938 visible to the interrupted code. */
939 mark_save_restore (r0
);
940 mark_save_restore (r1
);
941 mark_save_restore (r2
);
942 mark_save_restore (r3
);
943 mark_save_restore (a0
);
944 mark_save_restore (a1
);
945 mark_save_restore (sb
);
946 mark_save_restore (fb
);
947 mark_save_restore (sp
);
948 mark_save_restore (pc
);
949 mark_save_restore (flg
);
951 set_gdbarch_num_regs (arch
, num_raw_regs
);
952 set_gdbarch_num_pseudo_regs (arch
, num_cooked_regs
);
953 set_gdbarch_pc_regnum (arch
, pc
->num
);
954 set_gdbarch_sp_regnum (arch
, sp
->num
);
955 set_gdbarch_register_name (arch
, m32c_register_name
);
956 set_gdbarch_register_type (arch
, m32c_register_type
);
957 set_gdbarch_pseudo_register_read (arch
, m32c_pseudo_register_read
);
958 set_gdbarch_pseudo_register_write (arch
, m32c_pseudo_register_write
);
959 set_gdbarch_register_sim_regno (arch
, m32c_register_sim_regno
);
960 set_gdbarch_stab_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
961 set_gdbarch_dwarf2_reg_to_regnum (arch
, m32c_debug_info_reg_to_regnum
);
962 set_gdbarch_register_reggroup_p (arch
, m32c_register_reggroup_p
);
964 reggroup_add (arch
, general_reggroup
);
965 reggroup_add (arch
, all_reggroup
);
966 reggroup_add (arch
, save_reggroup
);
967 reggroup_add (arch
, restore_reggroup
);
968 reggroup_add (arch
, system_reggroup
);
969 reggroup_add (arch
, m32c_dma_reggroup
);
976 static const unsigned char *
977 m32c_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
979 static unsigned char break_insn
[] = { 0x00 }; /* brk */
981 *len
= sizeof (break_insn
);
987 /* Prologue analysis. */
991 /* For consistency with the DWARF 2 .debug_frame info generated by
992 GCC, a frame's CFA is the address immediately after the saved
995 /* The architecture for which we generated this prologue info. */
996 struct gdbarch
*arch
;
999 /* This function uses a frame pointer. */
1000 prologue_with_frame_ptr
,
1002 /* This function has no frame pointer. */
1003 prologue_sans_frame_ptr
,
1005 /* This function sets up the stack, so its frame is the first
1006 frame on the stack. */
1007 prologue_first_frame
1011 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1012 CFA to where the frame pointer points. This is always zero or
1014 LONGEST frame_ptr_offset
;
1016 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1017 the stack pointer --- always zero or negative.
1019 Calling this a "size" is a bit misleading, but given that the
1020 stack grows downwards, using offsets for everything keeps one
1021 from going completely sign-crazy: you never change anything's
1022 sign for an ADD instruction; always change the second operand's
1023 sign for a SUB instruction; and everything takes care of
1026 Functions that use alloca don't have a constant frame size. But
1027 they always have frame pointers, so we must use that to find the
1028 CFA (and perhaps to unwind the stack pointer). */
1031 /* The address of the first instruction at which the frame has been
1032 set up and the arguments are where the debug info says they are
1033 --- as best as we can tell. */
1034 CORE_ADDR prologue_end
;
1036 /* reg_offset[R] is the offset from the CFA at which register R is
1037 saved, or 1 if register R has not been saved. (Real values are
1038 always zero or negative.) */
1039 LONGEST reg_offset
[M32C_MAX_NUM_REGS
];
1043 /* The longest I've seen, anyway. */
1044 #define M32C_MAX_INSN_LEN (9)
1046 /* Processor state, for the prologue analyzer. */
1047 struct m32c_pv_state
1049 struct gdbarch
*arch
;
1050 pv_t r0
, r1
, r2
, r3
;
1054 struct pv_area
*stack
;
1056 /* Bytes from the current PC, the address they were read from,
1057 and the address of the next unconsumed byte. */
1058 gdb_byte insn
[M32C_MAX_INSN_LEN
];
1059 CORE_ADDR scan_pc
, next_addr
;
1063 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1064 all went well, or non-zero if simulating the action would trash our
1067 m32c_pv_push (struct m32c_pv_state
*state
, pv_t value
, int size
)
1069 if (pv_area_store_would_trash (state
->stack
, state
->sp
))
1072 state
->sp
= pv_add_constant (state
->sp
, -size
);
1073 pv_area_store (state
->stack
, state
->sp
, size
, value
);
1079 /* A source or destination location for an m16c or m32c
1083 /* If srcdest_reg, the location is a register pointed to by REG.
1084 If srcdest_partial_reg, the location is part of a register pointed
1085 to by REG. We don't try to handle this too well.
1086 If srcdest_mem, the location is memory whose address is ADDR. */
1087 enum { srcdest_reg
, srcdest_partial_reg
, srcdest_mem
} kind
;
1092 /* Return the SIZE-byte value at LOC in STATE. */
1094 m32c_srcdest_fetch (struct m32c_pv_state
*state
, struct srcdest loc
, int size
)
1096 if (loc
.kind
== srcdest_mem
)
1097 return pv_area_fetch (state
->stack
, loc
.addr
, size
);
1098 else if (loc
.kind
== srcdest_partial_reg
)
1099 return pv_unknown ();
1105 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1106 all went well, or non-zero if simulating the store would trash our
1109 m32c_srcdest_store (struct m32c_pv_state
*state
, struct srcdest loc
,
1110 pv_t value
, int size
)
1112 if (loc
.kind
== srcdest_mem
)
1114 if (pv_area_store_would_trash (state
->stack
, loc
.addr
))
1116 pv_area_store (state
->stack
, loc
.addr
, size
, value
);
1118 else if (loc
.kind
== srcdest_partial_reg
)
1119 *loc
.reg
= pv_unknown ();
1128 m32c_sign_ext (int v
, int bits
)
1130 int mask
= 1 << (bits
- 1);
1131 return (v
^ mask
) - mask
;
1135 m32c_next_byte (struct m32c_pv_state
*st
)
1137 gdb_assert (st
->next_addr
- st
->scan_pc
< sizeof (st
->insn
));
1138 return st
->insn
[st
->next_addr
++ - st
->scan_pc
];
1142 m32c_udisp8 (struct m32c_pv_state
*st
)
1144 return m32c_next_byte (st
);
1149 m32c_sdisp8 (struct m32c_pv_state
*st
)
1151 return m32c_sign_ext (m32c_next_byte (st
), 8);
1156 m32c_udisp16 (struct m32c_pv_state
*st
)
1158 int low
= m32c_next_byte (st
);
1159 int high
= m32c_next_byte (st
);
1161 return low
+ (high
<< 8);
1166 m32c_sdisp16 (struct m32c_pv_state
*st
)
1168 int low
= m32c_next_byte (st
);
1169 int high
= m32c_next_byte (st
);
1171 return m32c_sign_ext (low
+ (high
<< 8), 16);
1176 m32c_udisp24 (struct m32c_pv_state
*st
)
1178 int low
= m32c_next_byte (st
);
1179 int mid
= m32c_next_byte (st
);
1180 int high
= m32c_next_byte (st
);
1182 return low
+ (mid
<< 8) + (high
<< 16);
1186 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1188 m32c_get_src23 (unsigned char *i
)
1190 return (((i
[0] & 0x70) >> 2)
1191 | ((i
[1] & 0x30) >> 4));
1195 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1197 m32c_get_dest23 (unsigned char *i
)
1199 return (((i
[0] & 0x0e) << 1)
1200 | ((i
[1] & 0xc0) >> 6));
1204 static struct srcdest
1205 m32c_decode_srcdest4 (struct m32c_pv_state
*st
,
1211 sd
.kind
= (size
== 2 ? srcdest_reg
: srcdest_partial_reg
);
1213 sd
.kind
= srcdest_mem
;
1215 sd
.addr
= pv_unknown ();
1220 case 0x0: sd
.reg
= (size
== 1 ? &st
->r0
: &st
->r0
); break;
1221 case 0x1: sd
.reg
= (size
== 1 ? &st
->r0
: &st
->r1
); break;
1222 case 0x2: sd
.reg
= (size
== 1 ? &st
->r1
: &st
->r2
); break;
1223 case 0x3: sd
.reg
= (size
== 1 ? &st
->r1
: &st
->r3
); break;
1225 case 0x4: sd
.reg
= &st
->a0
; break;
1226 case 0x5: sd
.reg
= &st
->a1
; break;
1228 case 0x6: sd
.addr
= st
->a0
; break;
1229 case 0x7: sd
.addr
= st
->a1
; break;
1231 case 0x8: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp8 (st
)); break;
1232 case 0x9: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp8 (st
)); break;
1233 case 0xa: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp8 (st
)); break;
1234 case 0xb: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp8 (st
)); break;
1236 case 0xc: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp16 (st
)); break;
1237 case 0xd: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp16 (st
)); break;
1238 case 0xe: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp16 (st
)); break;
1239 case 0xf: sd
.addr
= pv_constant (m32c_udisp16 (st
)); break;
1249 static struct srcdest
1250 m32c_decode_sd23 (struct m32c_pv_state
*st
, int code
, int size
, int ind
)
1254 sd
.addr
= pv_unknown ();
1263 sd
.kind
= (size
== 1) ? srcdest_partial_reg
: srcdest_reg
;
1268 sd
.kind
= (size
== 4) ? srcdest_reg
: srcdest_partial_reg
;
1272 sd
.kind
= srcdest_mem
;
1279 case 0x12: sd
.reg
= &st
->r0
; break;
1280 case 0x13: sd
.reg
= &st
->r1
; break;
1281 case 0x10: sd
.reg
= ((size
== 1) ? &st
->r0
: &st
->r2
); break;
1282 case 0x11: sd
.reg
= ((size
== 1) ? &st
->r1
: &st
->r3
); break;
1283 case 0x02: sd
.reg
= &st
->a0
; break;
1284 case 0x03: sd
.reg
= &st
->a1
; break;
1286 case 0x00: sd
.addr
= st
->a0
; break;
1287 case 0x01: sd
.addr
= st
->a1
; break;
1288 case 0x04: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp8 (st
)); break;
1289 case 0x05: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp8 (st
)); break;
1290 case 0x06: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp8 (st
)); break;
1291 case 0x07: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp8 (st
)); break;
1292 case 0x08: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp16 (st
)); break;
1293 case 0x09: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp16 (st
)); break;
1294 case 0x0a: sd
.addr
= pv_add_constant (st
->sb
, m32c_udisp16 (st
)); break;
1295 case 0x0b: sd
.addr
= pv_add_constant (st
->fb
, m32c_sdisp16 (st
)); break;
1296 case 0x0c: sd
.addr
= pv_add_constant (st
->a0
, m32c_udisp24 (st
)); break;
1297 case 0x0d: sd
.addr
= pv_add_constant (st
->a1
, m32c_udisp24 (st
)); break;
1298 case 0x0f: sd
.addr
= pv_constant (m32c_udisp16 (st
)); break;
1299 case 0x0e: sd
.addr
= pv_constant (m32c_udisp24 (st
)); break;
1306 sd
.addr
= m32c_srcdest_fetch (st
, sd
, 4);
1307 sd
.kind
= srcdest_mem
;
1314 /* The r16c and r32c machines have instructions with similar
1315 semantics, but completely different machine language encodings. So
1316 we break out the semantics into their own functions, and leave
1317 machine-specific decoding in m32c_analyze_prologue.
1319 The following functions all expect their arguments already decoded,
1320 and they all return zero if analysis should continue past this
1321 instruction, or non-zero if analysis should stop. */
1324 /* Simulate an 'enter SIZE' instruction in STATE. */
1326 m32c_pv_enter (struct m32c_pv_state
*state
, int size
)
1328 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1330 /* If simulating this store would require us to forget
1331 everything we know about the stack frame in the name of
1332 accuracy, it would be better to just quit now. */
1333 if (pv_area_store_would_trash (state
->stack
, state
->sp
))
1336 if (m32c_pv_push (state
, state
->fb
, tdep
->push_addr_bytes
))
1338 state
->fb
= state
->sp
;
1339 state
->sp
= pv_add_constant (state
->sp
, -size
);
1346 m32c_pv_pushm_one (struct m32c_pv_state
*state
, pv_t reg
,
1347 int bit
, int src
, int size
)
1351 if (m32c_pv_push (state
, reg
, size
))
1359 /* Simulate a 'pushm SRC' instruction in STATE. */
1361 m32c_pv_pushm (struct m32c_pv_state
*state
, int src
)
1363 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1365 /* The bits in SRC indicating which registers to save are:
1366 r0 r1 r2 r3 a0 a1 sb fb */
1368 ( m32c_pv_pushm_one (state
, state
->fb
, 0x01, src
, tdep
->push_addr_bytes
)
1369 || m32c_pv_pushm_one (state
, state
->sb
, 0x02, src
, tdep
->push_addr_bytes
)
1370 || m32c_pv_pushm_one (state
, state
->a1
, 0x04, src
, tdep
->push_addr_bytes
)
1371 || m32c_pv_pushm_one (state
, state
->a0
, 0x08, src
, tdep
->push_addr_bytes
)
1372 || m32c_pv_pushm_one (state
, state
->r3
, 0x10, src
, 2)
1373 || m32c_pv_pushm_one (state
, state
->r2
, 0x20, src
, 2)
1374 || m32c_pv_pushm_one (state
, state
->r1
, 0x40, src
, 2)
1375 || m32c_pv_pushm_one (state
, state
->r0
, 0x80, src
, 2));
1378 /* Return non-zero if VALUE is the first incoming argument register. */
1381 m32c_is_1st_arg_reg (struct m32c_pv_state
*state
, pv_t value
)
1383 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1384 return (value
.kind
== pvk_register
1385 && (gdbarch_bfd_arch_info (state
->arch
)->mach
== bfd_mach_m16c
1386 ? (value
.reg
== tdep
->r1
->num
)
1387 : (value
.reg
== tdep
->r0
->num
))
1391 /* Return non-zero if VALUE is an incoming argument register. */
1394 m32c_is_arg_reg (struct m32c_pv_state
*state
, pv_t value
)
1396 struct gdbarch_tdep
*tdep
= gdbarch_tdep (state
->arch
);
1397 return (value
.kind
== pvk_register
1398 && (gdbarch_bfd_arch_info (state
->arch
)->mach
== bfd_mach_m16c
1399 ? (value
.reg
== tdep
->r1
->num
|| value
.reg
== tdep
->r2
->num
)
1400 : (value
.reg
== tdep
->r0
->num
))
1404 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1405 argument register to its stack slot in STATE. Such instructions
1406 should be included in the prologue, if possible.
1408 The store is a spill if:
1409 - the value being stored is the original value of an argument register;
1410 - the value has not already been stored somewhere in STACK; and
1411 - LOC is a stack slot (e.g., a memory location whose address is
1412 relative to the original value of the SP). */
1415 m32c_is_arg_spill (struct m32c_pv_state
*st
,
1419 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1421 return (m32c_is_arg_reg (st
, value
)
1422 && loc
.kind
== srcdest_mem
1423 && pv_is_register (loc
.addr
, tdep
->sp
->num
)
1424 && ! pv_area_find_reg (st
->stack
, st
->arch
, value
.reg
, 0));
1427 /* Return non-zero if a store of VALUE to LOC is probably
1428 copying the struct return address into an address register
1429 for immediate use. This is basically a "spill" into the
1430 address register, instead of onto the stack.
1432 The prerequisites are:
1433 - value being stored is original value of the FIRST arg register;
1434 - value has not already been stored on stack; and
1435 - LOC is an address register (a0 or a1). */
1438 m32c_is_struct_return (struct m32c_pv_state
*st
,
1442 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1444 return (m32c_is_1st_arg_reg (st
, value
)
1445 && !pv_area_find_reg (st
->stack
, st
->arch
, value
.reg
, 0)
1446 && loc
.kind
== srcdest_reg
1447 && (pv_is_register (*loc
.reg
, tdep
->a0
->num
)
1448 || pv_is_register (*loc
.reg
, tdep
->a1
->num
)));
1451 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1452 was a register save:
1453 - all the named registers should have their original values, and
1454 - the stack pointer should be at a constant offset from the
1455 original stack pointer. */
1457 m32c_pushm_is_reg_save (struct m32c_pv_state
*st
, int src
)
1459 struct gdbarch_tdep
*tdep
= gdbarch_tdep (st
->arch
);
1460 /* The bits in SRC indicating which registers to save are:
1461 r0 r1 r2 r3 a0 a1 sb fb */
1463 (pv_is_register (st
->sp
, tdep
->sp
->num
)
1464 && (! (src
& 0x01) || pv_is_register_k (st
->fb
, tdep
->fb
->num
, 0))
1465 && (! (src
& 0x02) || pv_is_register_k (st
->sb
, tdep
->sb
->num
, 0))
1466 && (! (src
& 0x04) || pv_is_register_k (st
->a1
, tdep
->a1
->num
, 0))
1467 && (! (src
& 0x08) || pv_is_register_k (st
->a0
, tdep
->a0
->num
, 0))
1468 && (! (src
& 0x10) || pv_is_register_k (st
->r3
, tdep
->r3
->num
, 0))
1469 && (! (src
& 0x20) || pv_is_register_k (st
->r2
, tdep
->r2
->num
, 0))
1470 && (! (src
& 0x40) || pv_is_register_k (st
->r1
, tdep
->r1
->num
, 0))
1471 && (! (src
& 0x80) || pv_is_register_k (st
->r0
, tdep
->r0
->num
, 0)));
1475 /* Function for finding saved registers in a 'struct pv_area'; we pass
1476 this to pv_area_scan.
1478 If VALUE is a saved register, ADDR says it was saved at a constant
1479 offset from the frame base, and SIZE indicates that the whole
1480 register was saved, record its offset in RESULT_UNTYPED. */
1482 check_for_saved (void *prologue_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
1484 struct m32c_prologue
*prologue
= (struct m32c_prologue
*) prologue_untyped
;
1485 struct gdbarch
*arch
= prologue
->arch
;
1486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1488 /* Is this the unchanged value of some register being saved on the
1490 if (value
.kind
== pvk_register
1492 && pv_is_register (addr
, tdep
->sp
->num
))
1494 /* Some registers require special handling: they're saved as a
1495 larger value than the register itself. */
1496 CORE_ADDR saved_size
= register_size (arch
, value
.reg
);
1498 if (value
.reg
== tdep
->pc
->num
)
1499 saved_size
= tdep
->ret_addr_bytes
;
1500 else if (register_type (arch
, value
.reg
)
1501 == tdep
->data_addr_reg_type
)
1502 saved_size
= tdep
->push_addr_bytes
;
1504 if (size
== saved_size
)
1506 /* Find which end of the saved value corresponds to our
1508 if (gdbarch_byte_order (arch
) == BFD_ENDIAN_BIG
)
1509 prologue
->reg_offset
[value
.reg
]
1510 = (addr
.k
+ saved_size
- register_size (arch
, value
.reg
));
1512 prologue
->reg_offset
[value
.reg
] = addr
.k
;
1518 /* Analyze the function prologue for ARCH at START, going no further
1519 than LIMIT, and place a description of what we found in
1522 m32c_analyze_prologue (struct gdbarch
*arch
,
1523 CORE_ADDR start
, CORE_ADDR limit
,
1524 struct m32c_prologue
*prologue
)
1526 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1527 unsigned long mach
= gdbarch_bfd_arch_info (arch
)->mach
;
1528 CORE_ADDR after_last_frame_related_insn
;
1529 struct cleanup
*back_to
;
1530 struct m32c_pv_state st
;
1533 st
.r0
= pv_register (tdep
->r0
->num
, 0);
1534 st
.r1
= pv_register (tdep
->r1
->num
, 0);
1535 st
.r2
= pv_register (tdep
->r2
->num
, 0);
1536 st
.r3
= pv_register (tdep
->r3
->num
, 0);
1537 st
.a0
= pv_register (tdep
->a0
->num
, 0);
1538 st
.a1
= pv_register (tdep
->a1
->num
, 0);
1539 st
.sb
= pv_register (tdep
->sb
->num
, 0);
1540 st
.fb
= pv_register (tdep
->fb
->num
, 0);
1541 st
.sp
= pv_register (tdep
->sp
->num
, 0);
1542 st
.pc
= pv_register (tdep
->pc
->num
, 0);
1543 st
.stack
= make_pv_area (tdep
->sp
->num
, gdbarch_addr_bit (arch
));
1544 back_to
= make_cleanup_free_pv_area (st
.stack
);
1546 /* Record that the call instruction has saved the return address on
1548 m32c_pv_push (&st
, st
.pc
, tdep
->ret_addr_bytes
);
1550 memset (prologue
, 0, sizeof (*prologue
));
1551 prologue
->arch
= arch
;
1554 for (i
= 0; i
< M32C_MAX_NUM_REGS
; i
++)
1555 prologue
->reg_offset
[i
] = 1;
1558 st
.scan_pc
= after_last_frame_related_insn
= start
;
1560 while (st
.scan_pc
< limit
)
1562 pv_t pre_insn_fb
= st
.fb
;
1563 pv_t pre_insn_sp
= st
.sp
;
1565 /* In theory we could get in trouble by trying to read ahead
1566 here, when we only know we're expecting one byte. In
1567 practice I doubt anyone will care, and it makes the rest of
1569 if (target_read_memory (st
.scan_pc
, st
.insn
, sizeof (st
.insn
)))
1570 /* If we can't fetch the instruction from memory, stop here
1571 and hope for the best. */
1573 st
.next_addr
= st
.scan_pc
;
1575 /* The assembly instructions are written as they appear in the
1576 section of the processor manuals that describe the
1577 instruction encodings.
1579 When a single assembly language instruction has several
1580 different machine-language encodings, the manual
1581 distinguishes them by a number in parens, before the
1582 mnemonic. Those numbers are included, as well.
1584 The srcdest decoding instructions have the same names as the
1585 analogous functions in the simulator. */
1586 if (mach
== bfd_mach_m16c
)
1588 /* (1) ENTER #imm8 */
1589 if (st
.insn
[0] == 0x7c && st
.insn
[1] == 0xf2)
1591 if (m32c_pv_enter (&st
, st
.insn
[2]))
1596 else if (st
.insn
[0] == 0xec)
1598 int src
= st
.insn
[1];
1599 if (m32c_pv_pushm (&st
, src
))
1603 if (m32c_pushm_is_reg_save (&st
, src
))
1604 after_last_frame_related_insn
= st
.next_addr
;
1607 /* (6) MOV.size:G src, dest */
1608 else if ((st
.insn
[0] & 0xfe) == 0x72)
1610 int size
= (st
.insn
[0] & 0x01) ? 2 : 1;
1612 struct srcdest dest
;
1617 = m32c_decode_srcdest4 (&st
, (st
.insn
[1] >> 4) & 0xf, size
);
1619 = m32c_decode_srcdest4 (&st
, st
.insn
[1] & 0xf, size
);
1620 src_value
= m32c_srcdest_fetch (&st
, src
, size
);
1622 if (m32c_is_arg_spill (&st
, dest
, src_value
))
1623 after_last_frame_related_insn
= st
.next_addr
;
1624 else if (m32c_is_struct_return (&st
, dest
, src_value
))
1625 after_last_frame_related_insn
= st
.next_addr
;
1627 if (m32c_srcdest_store (&st
, dest
, src_value
, size
))
1631 /* (1) LDC #IMM16, sp */
1632 else if (st
.insn
[0] == 0xeb
1633 && st
.insn
[1] == 0x50)
1636 st
.sp
= pv_constant (m32c_udisp16 (&st
));
1640 /* We've hit some instruction we don't know how to simulate.
1641 Strictly speaking, we should set every value we're
1642 tracking to "unknown". But we'll be optimistic, assume
1643 that we have enough information already, and stop
1649 int src_indirect
= 0;
1650 int dest_indirect
= 0;
1653 gdb_assert (mach
== bfd_mach_m32c
);
1655 /* Check for prefix bytes indicating indirect addressing. */
1656 if (st
.insn
[0] == 0x41)
1661 else if (st
.insn
[0] == 0x09)
1666 else if (st
.insn
[0] == 0x49)
1668 src_indirect
= dest_indirect
= 1;
1672 /* (1) ENTER #imm8 */
1673 if (st
.insn
[i
] == 0xec)
1675 if (m32c_pv_enter (&st
, st
.insn
[i
+ 1]))
1681 else if (st
.insn
[i
] == 0x8f)
1683 int src
= st
.insn
[i
+ 1];
1684 if (m32c_pv_pushm (&st
, src
))
1688 if (m32c_pushm_is_reg_save (&st
, src
))
1689 after_last_frame_related_insn
= st
.next_addr
;
1692 /* (7) MOV.size:G src, dest */
1693 else if ((st
.insn
[i
] & 0x80) == 0x80
1694 && (st
.insn
[i
+ 1] & 0x0f) == 0x0b
1695 && m32c_get_src23 (&st
.insn
[i
]) < 20
1696 && m32c_get_dest23 (&st
.insn
[i
]) < 20)
1699 struct srcdest dest
;
1701 int bw
= st
.insn
[i
] & 0x01;
1702 int size
= bw
? 2 : 1;
1706 = m32c_decode_sd23 (&st
, m32c_get_src23 (&st
.insn
[i
]),
1707 size
, src_indirect
);
1709 = m32c_decode_sd23 (&st
, m32c_get_dest23 (&st
.insn
[i
]),
1710 size
, dest_indirect
);
1711 src_value
= m32c_srcdest_fetch (&st
, src
, size
);
1713 if (m32c_is_arg_spill (&st
, dest
, src_value
))
1714 after_last_frame_related_insn
= st
.next_addr
;
1716 if (m32c_srcdest_store (&st
, dest
, src_value
, size
))
1719 /* (2) LDC #IMM24, sp */
1720 else if (st
.insn
[i
] == 0xd5
1721 && st
.insn
[i
+ 1] == 0x29)
1724 st
.sp
= pv_constant (m32c_udisp24 (&st
));
1727 /* We've hit some instruction we don't know how to simulate.
1728 Strictly speaking, we should set every value we're
1729 tracking to "unknown". But we'll be optimistic, assume
1730 that we have enough information already, and stop
1735 /* If this instruction changed the FB or decreased the SP (i.e.,
1736 allocated more stack space), then this may be a good place to
1737 declare the prologue finished. However, there are some
1740 - If the instruction just changed the FB back to its original
1741 value, then that's probably a restore instruction. The
1742 prologue should definitely end before that.
1744 - If the instruction increased the value of the SP (that is,
1745 shrunk the frame), then it's probably part of a frame
1746 teardown sequence, and the prologue should end before
1749 if (! pv_is_identical (st
.fb
, pre_insn_fb
))
1751 if (! pv_is_register_k (st
.fb
, tdep
->fb
->num
, 0))
1752 after_last_frame_related_insn
= st
.next_addr
;
1754 else if (! pv_is_identical (st
.sp
, pre_insn_sp
))
1756 /* The comparison of the constants looks odd, there, because
1757 .k is unsigned. All it really means is that the SP is
1758 lower than it was before the instruction. */
1759 if ( pv_is_register (pre_insn_sp
, tdep
->sp
->num
)
1760 && pv_is_register (st
.sp
, tdep
->sp
->num
)
1761 && ((pre_insn_sp
.k
- st
.sp
.k
) < (st
.sp
.k
- pre_insn_sp
.k
)))
1762 after_last_frame_related_insn
= st
.next_addr
;
1765 st
.scan_pc
= st
.next_addr
;
1768 /* Did we load a constant value into the stack pointer? */
1769 if (pv_is_constant (st
.sp
))
1770 prologue
->kind
= prologue_first_frame
;
1772 /* Alternatively, did we initialize the frame pointer? Remember
1773 that the CFA is the address after the return address. */
1774 if (pv_is_register (st
.fb
, tdep
->sp
->num
))
1776 prologue
->kind
= prologue_with_frame_ptr
;
1777 prologue
->frame_ptr_offset
= st
.fb
.k
;
1780 /* Is the frame size a known constant? Remember that frame_size is
1781 actually the offset from the CFA to the SP (i.e., a negative
1783 else if (pv_is_register (st
.sp
, tdep
->sp
->num
))
1785 prologue
->kind
= prologue_sans_frame_ptr
;
1786 prologue
->frame_size
= st
.sp
.k
;
1789 /* We haven't been able to make sense of this function's frame. Treat
1790 it as the first frame. */
1792 prologue
->kind
= prologue_first_frame
;
1794 /* Record where all the registers were saved. */
1795 pv_area_scan (st
.stack
, check_for_saved
, (void *) prologue
);
1797 prologue
->prologue_end
= after_last_frame_related_insn
;
1799 do_cleanups (back_to
);
1804 m32c_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR ip
)
1807 CORE_ADDR func_addr
, func_end
, sal_end
;
1808 struct m32c_prologue p
;
1810 /* Try to find the extent of the function that contains IP. */
1811 if (! find_pc_partial_function (ip
, &name
, &func_addr
, &func_end
))
1814 /* Find end by prologue analysis. */
1815 m32c_analyze_prologue (gdbarch
, ip
, func_end
, &p
);
1816 /* Find end by line info. */
1817 sal_end
= skip_prologue_using_sal (gdbarch
, ip
);
1818 /* Return whichever is lower. */
1819 if (sal_end
!= 0 && sal_end
!= ip
&& sal_end
< p
.prologue_end
)
1822 return p
.prologue_end
;
1827 /* Stack unwinding. */
1829 static struct m32c_prologue
*
1830 m32c_analyze_frame_prologue (struct frame_info
*this_frame
,
1831 void **this_prologue_cache
)
1833 if (! *this_prologue_cache
)
1835 CORE_ADDR func_start
= get_frame_func (this_frame
);
1836 CORE_ADDR stop_addr
= get_frame_pc (this_frame
);
1838 /* If we couldn't find any function containing the PC, then
1839 just initialize the prologue cache, but don't do anything. */
1841 stop_addr
= func_start
;
1843 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct m32c_prologue
);
1844 m32c_analyze_prologue (get_frame_arch (this_frame
),
1845 func_start
, stop_addr
, *this_prologue_cache
);
1848 return *this_prologue_cache
;
1853 m32c_frame_base (struct frame_info
*this_frame
,
1854 void **this_prologue_cache
)
1856 struct m32c_prologue
*p
1857 = m32c_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1858 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1860 /* In functions that use alloca, the distance between the stack
1861 pointer and the frame base varies dynamically, so we can't use
1862 the SP plus static information like prologue analysis to find the
1863 frame base. However, such functions must have a frame pointer,
1864 to be able to restore the SP on exit. So whenever we do have a
1865 frame pointer, use that to find the base. */
1868 case prologue_with_frame_ptr
:
1871 = get_frame_register_unsigned (this_frame
, tdep
->fb
->num
);
1872 return fb
- p
->frame_ptr_offset
;
1875 case prologue_sans_frame_ptr
:
1878 = get_frame_register_unsigned (this_frame
, tdep
->sp
->num
);
1879 return sp
- p
->frame_size
;
1882 case prologue_first_frame
:
1892 m32c_this_id (struct frame_info
*this_frame
,
1893 void **this_prologue_cache
,
1894 struct frame_id
*this_id
)
1896 CORE_ADDR base
= m32c_frame_base (this_frame
, this_prologue_cache
);
1899 *this_id
= frame_id_build (base
, get_frame_func (this_frame
));
1900 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1904 static struct value
*
1905 m32c_prev_register (struct frame_info
*this_frame
,
1906 void **this_prologue_cache
, int regnum
)
1908 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
1909 struct m32c_prologue
*p
1910 = m32c_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1911 CORE_ADDR frame_base
= m32c_frame_base (this_frame
, this_prologue_cache
);
1912 int reg_size
= register_size (get_frame_arch (this_frame
), regnum
);
1914 if (regnum
== tdep
->sp
->num
)
1915 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1917 /* If prologue analysis says we saved this register somewhere,
1918 return a description of the stack slot holding it. */
1919 if (p
->reg_offset
[regnum
] != 1)
1920 return frame_unwind_got_memory (this_frame
, regnum
,
1921 frame_base
+ p
->reg_offset
[regnum
]);
1923 /* Otherwise, presume we haven't changed the value of this
1924 register, and get it from the next frame. */
1925 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1929 static const struct frame_unwind m32c_unwind
= {
1934 default_frame_sniffer
1939 m32c_unwind_pc (struct gdbarch
*arch
, struct frame_info
*next_frame
)
1941 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1942 return frame_unwind_register_unsigned (next_frame
, tdep
->pc
->num
);
1947 m32c_unwind_sp (struct gdbarch
*arch
, struct frame_info
*next_frame
)
1949 struct gdbarch_tdep
*tdep
= gdbarch_tdep (arch
);
1950 return frame_unwind_register_unsigned (next_frame
, tdep
->sp
->num
);
1954 /* Inferior calls. */
1956 /* The calling conventions, according to GCC:
1960 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1961 HImode), (2) is named, and (3) is an integer or pointer type (no
1962 structs, floats, etc). Otherwise, it's passed on the stack.
1964 Second arg may be passed in r2, same restrictions (but not QImode),
1965 even if the first arg is passed on the stack.
1967 Third and further args are passed on the stack. No padding is
1968 used, stack "alignment" is 8 bits.
1973 First arg may be passed in r0l or r0, same restrictions as above.
1975 Second and further args are passed on the stack. Padding is used
1976 after QImode parameters (i.e. lower-addressed byte is the value,
1977 higher-addressed byte is the padding), stack "alignment" is 16
1981 /* Return true if TYPE is a type that can be passed in registers. (We
1982 ignore the size, and pay attention only to the type code;
1983 acceptable sizes depends on which register is being considered to
1986 m32c_reg_arg_type (struct type
*type
)
1988 enum type_code code
= TYPE_CODE (type
);
1990 return (code
== TYPE_CODE_INT
1991 || code
== TYPE_CODE_ENUM
1992 || code
== TYPE_CODE_PTR
1993 || code
== TYPE_CODE_REF
1994 || code
== TYPE_CODE_BOOL
1995 || code
== TYPE_CODE_CHAR
);
2000 m32c_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2001 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2002 struct value
**args
, CORE_ADDR sp
, int struct_return
,
2003 CORE_ADDR struct_addr
)
2005 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2006 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2007 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
2011 /* The number of arguments given in this function's prototype, or
2012 zero if it has a non-prototyped function type. The m32c ABI
2013 passes arguments mentioned in the prototype differently from
2014 those in the ellipsis of a varargs function, or from those passed
2015 to a non-prototyped function. */
2016 int num_prototyped_args
= 0;
2019 struct type
*func_type
= value_type (function
);
2021 /* Dereference function pointer types. */
2022 if (TYPE_CODE (func_type
) == TYPE_CODE_PTR
)
2023 func_type
= TYPE_TARGET_TYPE (func_type
);
2025 gdb_assert (TYPE_CODE (func_type
) == TYPE_CODE_FUNC
||
2026 TYPE_CODE (func_type
) == TYPE_CODE_METHOD
);
2029 /* The ABI description in gcc/config/m32c/m32c.abi says that
2030 we need to handle prototyped and non-prototyped functions
2031 separately, but the code in GCC doesn't actually do so. */
2032 if (TYPE_PROTOTYPED (func_type
))
2034 num_prototyped_args
= TYPE_NFIELDS (func_type
);
2037 /* First, if the function returns an aggregate by value, push a
2038 pointer to a buffer for it. This doesn't affect the way
2039 subsequent arguments are allocated to registers. */
2042 int ptr_len
= TYPE_LENGTH (tdep
->ptr_voyd
);
2044 write_memory_unsigned_integer (sp
, ptr_len
, byte_order
, struct_addr
);
2047 /* Push the arguments. */
2048 for (i
= nargs
- 1; i
>= 0; i
--)
2050 struct value
*arg
= args
[i
];
2051 const gdb_byte
*arg_bits
= value_contents (arg
);
2052 struct type
*arg_type
= value_type (arg
);
2053 ULONGEST arg_size
= TYPE_LENGTH (arg_type
);
2055 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2058 && i
< num_prototyped_args
2059 && m32c_reg_arg_type (arg_type
))
2061 /* Extract and re-store as an integer as a terse way to make
2062 sure it ends up in the least significant end of r1. (GDB
2063 should avoid assuming endianness, even on uni-endian
2065 ULONGEST u
= extract_unsigned_integer (arg_bits
, arg_size
,
2067 struct m32c_reg
*reg
= (mach
== bfd_mach_m16c
) ? tdep
->r1
: tdep
->r0
;
2068 regcache_cooked_write_unsigned (regcache
, reg
->num
, u
);
2071 /* Can it go in r2? */
2072 else if (mach
== bfd_mach_m16c
2075 && i
< num_prototyped_args
2076 && m32c_reg_arg_type (arg_type
))
2077 regcache_cooked_write (regcache
, tdep
->r2
->num
, arg_bits
);
2079 /* Everything else goes on the stack. */
2084 /* Align the stack. */
2085 if (mach
== bfd_mach_m32c
)
2088 write_memory (sp
, arg_bits
, arg_size
);
2092 /* This is the CFA we use to identify the dummy frame. */
2095 /* Push the return address. */
2096 sp
-= tdep
->ret_addr_bytes
;
2097 write_memory_unsigned_integer (sp
, tdep
->ret_addr_bytes
, byte_order
,
2100 /* Update the stack pointer. */
2101 regcache_cooked_write_unsigned (regcache
, tdep
->sp
->num
, sp
);
2103 /* We need to borrow an odd trick from the i386 target here.
2105 The value we return from this function gets used as the stack
2106 address (the CFA) for the dummy frame's ID. The obvious thing is
2107 to return the new TOS. However, that points at the return
2108 address, saved on the stack, which is inconsistent with the CFA's
2109 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2110 .debug_frame info uses the address immediately after the saved
2111 return address. So you end up with a dummy frame whose CFA
2112 points at the return address, but the frame for the function
2113 being called has a CFA pointing after the return address: the
2114 younger CFA is *greater than* the older CFA. The sanity checks
2115 in frame.c don't like that.
2117 So we try to be consistent with the CFA's used by DWARF 2.
2118 Having a dummy frame and a real frame with the *same* CFA is
2124 static struct frame_id
2125 m32c_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2127 /* This needs to return a frame ID whose PC is the return address
2128 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2129 m32c_push_dummy_call returned.
2131 m32c_unwind_sp gives us the CFA, which is the value the SP had
2132 before the return address was pushed. */
2133 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2134 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, tdep
->sp
->num
);
2135 return frame_id_build (sp
, get_frame_pc (this_frame
));
2140 /* Return values. */
2142 /* Return value conventions, according to GCC:
2153 Aggregate values (regardless of size) are returned by pushing a
2154 pointer to a temporary area on the stack after the args are pushed.
2155 The function fills in this area with the value. Note that this
2156 pointer on the stack does not affect how register arguments, if any,
2163 /* Return non-zero if values of type TYPE are returned by storing them
2164 in a buffer whose address is passed on the stack, ahead of the
2167 m32c_return_by_passed_buf (struct type
*type
)
2169 enum type_code code
= TYPE_CODE (type
);
2171 return (code
== TYPE_CODE_STRUCT
2172 || code
== TYPE_CODE_UNION
);
2175 static enum return_value_convention
2176 m32c_return_value (struct gdbarch
*gdbarch
,
2177 struct type
*func_type
,
2178 struct type
*valtype
,
2179 struct regcache
*regcache
,
2181 const gdb_byte
*writebuf
)
2183 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2184 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2185 enum return_value_convention conv
;
2186 ULONGEST valtype_len
= TYPE_LENGTH (valtype
);
2188 if (m32c_return_by_passed_buf (valtype
))
2189 conv
= RETURN_VALUE_STRUCT_CONVENTION
;
2191 conv
= RETURN_VALUE_REGISTER_CONVENTION
;
2195 /* We should never be called to find values being returned by
2196 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2197 unless we made the call ourselves. */
2198 gdb_assert (conv
== RETURN_VALUE_REGISTER_CONVENTION
);
2200 gdb_assert (valtype_len
<= 8);
2202 /* Anything that fits in r0 is returned there. */
2203 if (valtype_len
<= TYPE_LENGTH (tdep
->r0
->type
))
2206 regcache_cooked_read_unsigned (regcache
, tdep
->r0
->num
, &u
);
2207 store_unsigned_integer (readbuf
, valtype_len
, byte_order
, u
);
2211 /* Everything else is passed in mem0, using as many bytes as
2212 needed. This is not what the Renesas tools do, but it's
2213 what GCC does at the moment. */
2214 struct minimal_symbol
*mem0
2215 = lookup_minimal_symbol ("mem0", NULL
, NULL
);
2218 error ("The return value is stored in memory at 'mem0', "
2219 "but GDB cannot find\n"
2221 read_memory (SYMBOL_VALUE_ADDRESS (mem0
), readbuf
, valtype_len
);
2227 /* We should never be called to store values to be returned
2228 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2229 finding the buffer, unless we made the call ourselves. */
2230 gdb_assert (conv
== RETURN_VALUE_REGISTER_CONVENTION
);
2232 gdb_assert (valtype_len
<= 8);
2234 /* Anything that fits in r0 is returned there. */
2235 if (valtype_len
<= TYPE_LENGTH (tdep
->r0
->type
))
2237 ULONGEST u
= extract_unsigned_integer (writebuf
, valtype_len
,
2239 regcache_cooked_write_unsigned (regcache
, tdep
->r0
->num
, u
);
2243 /* Everything else is passed in mem0, using as many bytes as
2244 needed. This is not what the Renesas tools do, but it's
2245 what GCC does at the moment. */
2246 struct minimal_symbol
*mem0
2247 = lookup_minimal_symbol ("mem0", NULL
, NULL
);
2250 error ("The return value is stored in memory at 'mem0', "
2251 "but GDB cannot find\n"
2253 write_memory (SYMBOL_VALUE_ADDRESS (mem0
),
2254 (char *) writebuf
, valtype_len
);
2265 /* The m16c and m32c use a trampoline function for indirect function
2266 calls. An indirect call looks like this:
2268 ... push arguments ...
2269 ... push target function address ...
2272 The code for m32c_jsri16 looks like this:
2276 # Save return address.
2278 pop.b m32c_jsri_ret+2
2280 # Store target function address.
2281 pop.w m32c_jsri_addr
2283 # Re-push return address.
2284 push.b m32c_jsri_ret+2
2285 push.w m32c_jsri_ret
2287 # Call the target function.
2288 jmpi.a m32c_jsri_addr
2290 Without further information, GDB will treat calls to m32c_jsri16
2291 like calls to any other function. Since m32c_jsri16 doesn't have
2292 debugging information, that normally means that GDB sets a step-
2293 resume breakpoint and lets the program continue --- which is not
2294 what the user wanted. (Giving the trampoline debugging info
2295 doesn't help: the user expects the program to stop in the function
2296 their program is calling, not in some trampoline code they've never
2299 The gdbarch_skip_trampoline_code method tells GDB how to step
2300 through such trampoline functions transparently to the user. When
2301 given the address of a trampoline function's first instruction,
2302 gdbarch_skip_trampoline_code should return the address of the first
2303 instruction of the function really being called. If GDB decides it
2304 wants to step into that function, it will set a breakpoint there
2305 and silently continue to it.
2307 We recognize the trampoline by name, and extract the target address
2308 directly from the stack. This isn't great, but recognizing by its
2309 code sequence seems more fragile. */
2312 m32c_skip_trampoline_code (struct frame_info
*frame
, CORE_ADDR stop_pc
)
2314 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2315 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2316 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2318 /* It would be nicer to simply look up the addresses of known
2319 trampolines once, and then compare stop_pc with them. However,
2320 we'd need to ensure that that cached address got invalidated when
2321 someone loaded a new executable, and I'm not quite sure of the
2322 best way to do that. find_pc_partial_function does do some
2323 caching, so we'll see how this goes. */
2325 CORE_ADDR start
, end
;
2327 if (find_pc_partial_function (stop_pc
, &name
, &start
, &end
))
2329 /* Are we stopped at the beginning of the trampoline function? */
2330 if (strcmp (name
, "m32c_jsri16") == 0
2331 && stop_pc
== start
)
2333 /* Get the stack pointer. The return address is at the top,
2334 and the target function's address is just below that. We
2335 know it's a two-byte address, since the trampoline is
2337 CORE_ADDR sp
= get_frame_sp (get_current_frame ());
2339 = read_memory_unsigned_integer (sp
+ tdep
->ret_addr_bytes
,
2342 /* What we have now is the address of a jump instruction.
2343 What we need is the destination of that jump.
2344 The opcode is 1 byte, and the destination is the next 3 bytes.
2346 target
= read_memory_unsigned_integer (target
+ 1, 3, byte_order
);
2355 /* Address/pointer conversions. */
2357 /* On the m16c, there is a 24-bit address space, but only a very few
2358 instructions can generate addresses larger than 0xffff: jumps,
2359 jumps to subroutines, and the lde/std (load/store extended)
2362 Since GCC can only support one size of pointer, we can't have
2363 distinct 'near' and 'far' pointer types; we have to pick one size
2364 for everything. If we wanted to use 24-bit pointers, then GCC
2365 would have to use lde and ste for all memory references, which
2366 would be terrible for performance and code size. So the GNU
2367 toolchain uses 16-bit pointers for everything, and gives up the
2368 ability to have pointers point outside the first 64k of memory.
2370 However, as a special hack, we let the linker place functions at
2371 addresses above 0xffff, as long as it also places a trampoline in
2372 the low 64k for every function whose address is taken. Each
2373 trampoline consists of a single jmp.a instruction that jumps to the
2374 function's real entry point. Pointers to functions can be 16 bits
2375 long, even though the functions themselves are at higher addresses:
2376 the pointers refer to the trampolines, not the functions.
2378 This complicates things for GDB, however: given the address of a
2379 function (from debug info or linker symbols, say) which could be
2380 anywhere in the 24-bit address space, how can we find an
2381 appropriate 16-bit value to use as a pointer to it?
2383 If the linker has not generated a trampoline for the function,
2384 we're out of luck. Well, I guess we could malloc some space and
2385 write a jmp.a instruction to it, but I'm not going to get into that
2388 If the linker has generated a trampoline for the function, then it
2389 also emitted a symbol for the trampoline: if the function's linker
2390 symbol is named NAME, then the function's trampoline's linker
2391 symbol is named NAME.plt.
2393 So, given a code address:
2394 - We try to find a linker symbol at that address.
2395 - If we find such a symbol named NAME, we look for a linker symbol
2397 - If we find such a symbol, we assume it is a trampoline, and use
2398 its address as the pointer value.
2400 And, given a function pointer:
2401 - We try to find a linker symbol at that address named NAME.plt.
2402 - If we find such a symbol, we look for a linker symbol named NAME.
2403 - If we find that, we provide that as the function's address.
2404 - If any of the above steps fail, we return the original address
2405 unchanged; it might really be a function in the low 64k.
2407 See? You *knew* there was a reason you wanted to be a computer
2411 m32c_m16c_address_to_pointer (struct gdbarch
*gdbarch
,
2412 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
2414 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2415 enum type_code target_code
;
2416 gdb_assert (TYPE_CODE (type
) == TYPE_CODE_PTR
||
2417 TYPE_CODE (type
) == TYPE_CODE_REF
);
2419 target_code
= TYPE_CODE (TYPE_TARGET_TYPE (type
));
2421 if (target_code
== TYPE_CODE_FUNC
|| target_code
== TYPE_CODE_METHOD
)
2425 struct minimal_symbol
*tramp_msym
;
2427 /* Try to find a linker symbol at this address. */
2428 struct minimal_symbol
*func_msym
= lookup_minimal_symbol_by_pc (addr
);
2431 error ("Cannot convert code address %s to function pointer:\n"
2432 "couldn't find a symbol at that address, to find trampoline.",
2433 paddress (gdbarch
, addr
));
2435 func_name
= SYMBOL_LINKAGE_NAME (func_msym
);
2436 tramp_name
= xmalloc (strlen (func_name
) + 5);
2437 strcpy (tramp_name
, func_name
);
2438 strcat (tramp_name
, ".plt");
2440 /* Try to find a linker symbol for the trampoline. */
2441 tramp_msym
= lookup_minimal_symbol (tramp_name
, NULL
, NULL
);
2443 /* We've either got another copy of the name now, or don't need
2444 the name any more. */
2448 error ("Cannot convert code address %s to function pointer:\n"
2449 "couldn't find trampoline named '%s.plt'.",
2450 paddress (gdbarch
, addr
), func_name
);
2452 /* The trampoline's address is our pointer. */
2453 addr
= SYMBOL_VALUE_ADDRESS (tramp_msym
);
2456 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
, addr
);
2461 m32c_m16c_pointer_to_address (struct gdbarch
*gdbarch
,
2462 struct type
*type
, const gdb_byte
*buf
)
2464 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2466 enum type_code target_code
;
2468 gdb_assert (TYPE_CODE (type
) == TYPE_CODE_PTR
||
2469 TYPE_CODE (type
) == TYPE_CODE_REF
);
2471 ptr
= extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
2473 target_code
= TYPE_CODE (TYPE_TARGET_TYPE (type
));
2475 if (target_code
== TYPE_CODE_FUNC
|| target_code
== TYPE_CODE_METHOD
)
2477 /* See if there is a minimal symbol at that address whose name is
2479 struct minimal_symbol
*ptr_msym
= lookup_minimal_symbol_by_pc (ptr
);
2483 char *ptr_msym_name
= SYMBOL_LINKAGE_NAME (ptr_msym
);
2484 int len
= strlen (ptr_msym_name
);
2487 && strcmp (ptr_msym_name
+ len
- 4, ".plt") == 0)
2489 struct minimal_symbol
*func_msym
;
2490 /* We have a .plt symbol; try to find the symbol for the
2491 corresponding function.
2493 Since the trampoline contains a jump instruction, we
2494 could also just extract the jump's target address. I
2495 don't see much advantage one way or the other. */
2496 char *func_name
= xmalloc (len
- 4 + 1);
2497 memcpy (func_name
, ptr_msym_name
, len
- 4);
2498 func_name
[len
- 4] = '\0';
2500 = lookup_minimal_symbol (func_name
, NULL
, NULL
);
2502 /* If we do have such a symbol, return its value as the
2503 function's true address. */
2505 ptr
= SYMBOL_VALUE_ADDRESS (func_msym
);
2514 m32c_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
2516 LONGEST
*frame_offset
)
2519 CORE_ADDR func_addr
, func_end
, sal_end
;
2520 struct m32c_prologue p
;
2522 struct regcache
*regcache
= get_current_regcache ();
2523 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2525 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
2526 internal_error (__FILE__
, __LINE__
, _("No virtual frame pointer available"));
2528 m32c_analyze_prologue (gdbarch
, func_addr
, pc
, &p
);
2531 case prologue_with_frame_ptr
:
2532 *frame_regnum
= m32c_banked_register (tdep
->fb
, regcache
)->num
;
2533 *frame_offset
= p
.frame_ptr_offset
;
2535 case prologue_sans_frame_ptr
:
2536 *frame_regnum
= m32c_banked_register (tdep
->sp
, regcache
)->num
;
2537 *frame_offset
= p
.frame_size
;
2540 *frame_regnum
= m32c_banked_register (tdep
->sp
, regcache
)->num
;
2545 if (*frame_regnum
> gdbarch_num_regs (gdbarch
))
2546 internal_error (__FILE__
, __LINE__
, _("No virtual frame pointer available"));
2550 /* Initialization. */
2552 static struct gdbarch
*
2553 m32c_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2555 struct gdbarch
*arch
;
2556 struct gdbarch_tdep
*tdep
;
2557 unsigned long mach
= info
.bfd_arch_info
->mach
;
2559 /* Find a candidate among the list of architectures we've created
2561 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2563 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2564 return arches
->gdbarch
;
2566 tdep
= xcalloc (1, sizeof (*tdep
));
2567 arch
= gdbarch_alloc (&info
, tdep
);
2569 /* Essential types. */
2572 /* Address/pointer conversions. */
2573 if (mach
== bfd_mach_m16c
)
2575 set_gdbarch_address_to_pointer (arch
, m32c_m16c_address_to_pointer
);
2576 set_gdbarch_pointer_to_address (arch
, m32c_m16c_pointer_to_address
);
2583 set_gdbarch_print_insn (arch
, print_insn_m32c
);
2586 set_gdbarch_breakpoint_from_pc (arch
, m32c_breakpoint_from_pc
);
2588 /* Prologue analysis and unwinding. */
2589 set_gdbarch_inner_than (arch
, core_addr_lessthan
);
2590 set_gdbarch_skip_prologue (arch
, m32c_skip_prologue
);
2591 set_gdbarch_unwind_pc (arch
, m32c_unwind_pc
);
2592 set_gdbarch_unwind_sp (arch
, m32c_unwind_sp
);
2594 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2595 They may be in the dwarf2 cfi code in GDB, or they may be in
2596 the debug info emitted by the upstream toolchain. I don't
2597 know which, but I do know that the prologue analyzer works better.
2600 dwarf2_append_sniffers (arch
);
2602 frame_unwind_append_unwinder (arch
, &m32c_unwind
);
2604 /* Inferior calls. */
2605 set_gdbarch_push_dummy_call (arch
, m32c_push_dummy_call
);
2606 set_gdbarch_return_value (arch
, m32c_return_value
);
2607 set_gdbarch_dummy_id (arch
, m32c_dummy_id
);
2610 set_gdbarch_skip_trampoline_code (arch
, m32c_skip_trampoline_code
);
2612 set_gdbarch_virtual_frame_pointer (arch
, m32c_virtual_frame_pointer
);
2614 /* m32c function boundary addresses are not necessarily even.
2615 Therefore, the `vbit', which indicates a pointer to a virtual
2616 member function, is stored in the delta field, rather than as
2617 the low bit of a function pointer address.
2619 In order to verify this, see the definition of
2620 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2621 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2622 set_gdbarch_vbit_in_delta (arch
, 1);
2627 /* Provide a prototype to silence -Wmissing-prototypes. */
2628 extern initialize_file_ftype _initialize_m32c_tdep
;
2631 _initialize_m32c_tdep (void)
2633 register_gdbarch_init (bfd_arch_m32c
, m32c_gdbarch_init
);
2635 m32c_dma_reggroup
= reggroup_new ("dma", USER_REGGROUP
);