1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
31 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "trad-frame.h"
42 #include "gdb_assert.h"
44 #include "m32r-tdep.h"
48 extern void _initialize_m32r_tdep (void);
51 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
53 /* Align to the size of an instruction (so that they can safely be
54 pushed onto the stack. */
60 #define M32R_BE_BREAKPOINT32 {0x10, 0xf1, 0x70, 0x00}
61 #define M32R_LE_BREAKPOINT32 {0xf1, 0x10, 0x00, 0x70}
62 #define M32R_BE_BREAKPOINT16 {0x10, 0xf1}
63 #define M32R_LE_BREAKPOINT16 {0xf1, 0x10}
66 m32r_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
72 bplen
= (addr
& 3) ? 2 : 4;
74 /* Save the memory contents. */
75 val
= target_read_memory (addr
, contents_cache
, bplen
);
77 return val
; /* return error */
79 /* Determine appropriate breakpoint contents and size for this address. */
80 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
83 && ((contents_cache
[0] & 0x80) || (contents_cache
[2] & 0x80)))
85 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
87 bplen
= sizeof (insn
);
91 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
93 bplen
= sizeof (insn
);
99 && ((contents_cache
[1] & 0x80) || (contents_cache
[3] & 0x80)))
101 static unsigned char insn
[] = M32R_LE_BREAKPOINT32
;
103 bplen
= sizeof (insn
);
107 static unsigned char insn
[] = M32R_LE_BREAKPOINT16
;
109 bplen
= sizeof (insn
);
113 /* Write the breakpoint. */
114 val
= target_write_memory (addr
, (char *) bp
, bplen
);
119 m32r_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
124 /* Determine appropriate breakpoint contents and size for this address. */
125 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
127 if (((addr
& 3) == 0)
128 && ((contents_cache
[0] & 0x80) || (contents_cache
[2] & 0x80)))
130 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
131 bplen
= sizeof (insn
);
135 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
136 bplen
= sizeof (insn
);
142 if (((addr
& 3) == 0)
143 && ((contents_cache
[1] & 0x80) || (contents_cache
[3] & 0x80)))
145 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
146 bplen
= sizeof (insn
);
150 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
151 bplen
= sizeof (insn
);
155 /* Write contents. */
156 val
= target_write_memory (addr
, contents_cache
, bplen
);
160 static const unsigned char *
161 m32r_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
165 /* Determine appropriate breakpoint. */
166 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
168 if ((*pcptr
& 3) == 0)
170 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
172 *lenptr
= sizeof (insn
);
176 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
178 *lenptr
= sizeof (insn
);
183 if ((*pcptr
& 3) == 0)
185 static unsigned char insn
[] = M32R_LE_BREAKPOINT32
;
187 *lenptr
= sizeof (insn
);
191 static unsigned char insn
[] = M32R_LE_BREAKPOINT16
;
193 *lenptr
= sizeof (insn
);
201 char *m32r_register_names
[] = {
202 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
203 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
204 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
209 m32r_register_name (int reg_nr
)
213 if (reg_nr
>= M32R_NUM_REGS
)
215 return m32r_register_names
[reg_nr
];
219 /* Return the GDB type object for the "standard" data type
220 of data in register N. */
223 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
225 if (reg_nr
== M32R_PC_REGNUM
)
226 return builtin_type_void_func_ptr
;
227 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
228 return builtin_type_void_data_ptr
;
230 return builtin_type_int32
;
234 /* Write into appropriate registers a function return value
235 of type TYPE, given in virtual format.
237 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
240 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
244 int len
= TYPE_LENGTH (type
);
246 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
);
247 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
251 regval
= extract_unsigned_integer ((char *) valbuf
+ 4, len
- 4);
252 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
256 /* This is required by skip_prologue. The results of decoding a prologue
257 should be cached because this thrashing is getting nuts. */
260 decode_prologue (CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
261 CORE_ADDR
*pl_endptr
, unsigned long *framelength
)
263 unsigned long framesize
;
266 CORE_ADDR after_prologue
= 0;
267 CORE_ADDR after_push
= 0;
268 CORE_ADDR after_stack_adjust
= 0;
269 CORE_ADDR current_pc
;
270 LONGEST return_value
;
275 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
277 /* Check if current pc's location is readable. */
278 if (!safe_read_memory_integer (current_pc
, 2, &return_value
))
281 insn
= read_memory_unsigned_integer (current_pc
, 2);
286 /* If this is a 32 bit instruction, we dont want to examine its
287 immediate data as though it were an instruction */
288 if (current_pc
& 0x02)
290 /* decode this instruction further */
297 if (current_pc
== scan_limit
)
298 scan_limit
+= 2; /* extend the search */
300 current_pc
+= 2; /* skip the immediate data */
302 /* Check if current pc's location is readable. */
303 if (!safe_read_memory_integer (current_pc
, 2, &return_value
))
306 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
307 /* add 16 bit sign-extended offset */
310 -((short) read_memory_unsigned_integer (current_pc
, 2));
314 if (((insn
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
315 && safe_read_memory_integer (current_pc
+ 2, 2,
317 && read_memory_unsigned_integer (current_pc
+ 2,
319 /* subtract 24 bit sign-extended negative-offset */
321 insn
= read_memory_unsigned_integer (current_pc
- 2, 4);
322 if (insn
& 0x00800000) /* sign extend */
323 insn
|= 0xff000000; /* negative */
325 insn
&= 0x00ffffff; /* positive */
329 after_push
= current_pc
+ 2;
333 op1
= insn
& 0xf000; /* isolate just the first nibble */
335 if ((insn
& 0xf0ff) == 0x207f)
339 regno
= ((insn
>> 8) & 0xf);
343 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
344 /* add 8 bit sign-extended offset */
346 int stack_adjust
= (char) (insn
& 0xff);
348 /* there are probably two of these stack adjustments:
349 1) A negative one in the prologue, and
350 2) A positive one in the epilogue.
351 We are only interested in the first one. */
353 if (stack_adjust
< 0)
355 framesize
-= stack_adjust
;
357 /* A frameless function may have no "mv fp, sp".
358 In that case, this is the end of the prologue. */
359 after_stack_adjust
= current_pc
+ 2;
365 after_prologue
= current_pc
+ 2;
366 break; /* end of stack adjustments */
369 /* Nop looks like a branch, continue explicitly */
372 after_prologue
= current_pc
+ 2;
373 continue; /* nop occurs between pushes */
375 /* End of prolog if any of these are trap instructions */
376 if ((insn
& 0xfff0) == 0x10f0)
378 after_prologue
= current_pc
;
381 /* End of prolog if any of these are branch instructions */
382 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
384 after_prologue
= current_pc
;
387 /* Some of the branch instructions are mixed with other types */
390 int subop
= insn
& 0x0ff0;
391 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
393 after_prologue
= current_pc
;
394 continue; /* jmp , jl */
400 *framelength
= framesize
;
402 if (current_pc
>= scan_limit
)
406 if (after_stack_adjust
!= 0)
407 /* We did not find a "mv fp,sp", but we DID find
408 a stack_adjust. Is it safe to use that as the
409 end of the prologue? I just don't know. */
411 *pl_endptr
= after_stack_adjust
;
413 else if (after_push
!= 0)
414 /* We did not find a "mv fp,sp", but we DID find
415 a push. Is it safe to use that as the
416 end of the prologue? I just don't know. */
418 *pl_endptr
= after_push
;
421 /* We reached the end of the loop without finding the end
422 of the prologue. No way to win -- we should report failure.
423 The way we do that is to return the original start_pc.
424 GDB will set a breakpoint at the start of the function (etc.) */
425 *pl_endptr
= start_pc
;
430 if (after_prologue
== 0)
431 after_prologue
= current_pc
;
434 *pl_endptr
= after_prologue
;
437 } /* decode_prologue */
439 /* Function: skip_prologue
440 Find end of function prologue */
442 #define DEFAULT_SEARCH_LIMIT 128
445 m32r_skip_prologue (CORE_ADDR pc
)
447 CORE_ADDR func_addr
, func_end
;
448 struct symtab_and_line sal
;
449 LONGEST return_value
;
451 /* See what the symbol table says */
453 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
455 sal
= find_pc_line (func_addr
, 0);
457 if (sal
.line
!= 0 && sal
.end
<= func_end
)
462 /* Either there's no line info, or the line after the prologue is after
463 the end of the function. In this case, there probably isn't a
466 func_end
= min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
470 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
472 /* If pc's location is not readable, just quit. */
473 if (!safe_read_memory_integer (pc
, 4, &return_value
))
476 /* Find the end of prologue. */
477 if (decode_prologue (pc
, func_end
, &sal
.end
, NULL
) < 0)
483 struct m32r_unwind_cache
485 /* The previous frame's inner most stack address. Used as this
486 frame ID's stack_addr. */
488 /* The frame's base, optionally used by the high-level debug info. */
491 /* How far the SP and r13 (FP) have been offset from the start of
492 the stack frame (as defined by the previous frame's stack
497 /* Table indicating the location of each and every register. */
498 struct trad_frame_saved_reg
*saved_regs
;
501 /* Put here the code to store, into fi->saved_regs, the addresses of
502 the saved registers of frame described by FRAME_INFO. This
503 includes special registers such as pc and fp saved in special ways
504 in the stack frame. sp is even more special: the address we return
505 for it IS the sp for the next frame. */
507 static struct m32r_unwind_cache
*
508 m32r_frame_unwind_cache (struct frame_info
*next_frame
,
509 void **this_prologue_cache
)
511 CORE_ADDR pc
, scan_limit
;
514 unsigned long op
, op2
;
516 struct m32r_unwind_cache
*info
;
519 if ((*this_prologue_cache
))
520 return (*this_prologue_cache
);
522 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
523 (*this_prologue_cache
) = info
;
524 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
528 info
->uses_frame
= 0;
530 scan_limit
= frame_pc_unwind (next_frame
);
531 for (pc
= frame_func_unwind (next_frame
);
532 pc
> 0 && pc
< scan_limit
; pc
+= 2)
536 op
= get_frame_memory_unsigned (next_frame
, pc
, 4);
537 if ((op
& 0x80000000) == 0x80000000)
539 /* 32-bit instruction */
540 if ((op
& 0xffff0000) == 0x8faf0000)
542 /* add3 sp,sp,xxxx */
543 short n
= op
& 0xffff;
544 info
->sp_offset
+= n
;
546 else if (((op
>> 8) == 0xe4)
547 && get_frame_memory_unsigned (next_frame
, pc
+ 2,
550 /* ld24 r4, xxxxxx; sub sp, r4 */
551 unsigned long n
= op
& 0xffffff;
552 info
->sp_offset
+= n
;
553 pc
+= 2; /* skip sub instruction */
556 if (pc
== scan_limit
)
557 scan_limit
+= 2; /* extend the search */
558 pc
+= 2; /* skip the immediate data */
563 /* 16-bit instructions */
564 op
= get_frame_memory_unsigned (next_frame
, pc
, 2) & 0x7fff;
565 if ((op
& 0xf0ff) == 0x207f)
568 int regno
= ((op
>> 8) & 0xf);
569 info
->sp_offset
-= 4;
570 info
->saved_regs
[regno
].addr
= info
->sp_offset
;
572 else if ((op
& 0xff00) == 0x4f00)
575 int n
= (char) (op
& 0xff);
576 info
->sp_offset
+= n
;
578 else if (op
== 0x1d8f)
581 info
->uses_frame
= 1;
582 info
->r13_offset
= info
->sp_offset
;
583 break; /* end of stack adjustments */
585 else if ((op
& 0xfff0) == 0x10f0)
587 /* end of prologue if this is a trap instruction */
588 break; /* end of stack adjustments */
592 info
->size
= -info
->sp_offset
;
594 /* Compute the previous frame's stack pointer (which is also the
595 frame's ID's stack address), and this frame's base pointer. */
596 if (info
->uses_frame
)
598 /* The SP was moved to the FP. This indicates that a new frame
599 was created. Get THIS frame's FP value by unwinding it from
601 this_base
= frame_unwind_register_unsigned (next_frame
, M32R_FP_REGNUM
);
602 /* The FP points at the last saved register. Adjust the FP back
603 to before the first saved register giving the SP. */
604 prev_sp
= this_base
+ info
->size
;
608 /* Assume that the FP is this frame's SP but with that pushed
609 stack space added back. */
610 this_base
= frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
611 prev_sp
= this_base
+ info
->size
;
614 /* Convert that SP/BASE into real addresses. */
615 info
->prev_sp
= prev_sp
;
616 info
->base
= this_base
;
618 /* Adjust all the saved registers so that they contain addresses and
620 for (i
= 0; i
< NUM_REGS
- 1; i
++)
621 if (trad_frame_addr_p (info
->saved_regs
, i
))
622 info
->saved_regs
[i
].addr
= (info
->prev_sp
+ info
->saved_regs
[i
].addr
);
624 /* The call instruction moves the caller's PC in the callee's LR.
625 Since this is an unwind, do the reverse. Copy the location of LR
626 into PC (the address / regnum) so that a request for PC will be
627 converted into a request for the LR. */
628 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
630 /* The previous frame's SP needed to be computed. Save the computed
632 trad_frame_set_value (info
->saved_regs
, M32R_SP_REGNUM
, prev_sp
);
638 m32r_read_pc (ptid_t ptid
)
643 save_ptid
= inferior_ptid
;
644 inferior_ptid
= ptid
;
645 regcache_cooked_read_unsigned (current_regcache
, M32R_PC_REGNUM
, &pc
);
646 inferior_ptid
= save_ptid
;
651 m32r_write_pc (CORE_ADDR val
, ptid_t ptid
)
655 save_ptid
= inferior_ptid
;
656 inferior_ptid
= ptid
;
657 write_register (M32R_PC_REGNUM
, val
);
658 inferior_ptid
= save_ptid
;
662 m32r_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
664 return frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
669 m32r_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
670 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
671 struct value
**args
, CORE_ADDR sp
, int struct_return
,
672 CORE_ADDR struct_addr
)
674 int stack_offset
, stack_alloc
;
675 int argreg
= ARG1_REGNUM
;
678 enum type_code typecode
;
681 char valbuf
[MAX_REGISTER_SIZE
];
683 int odd_sized_struct
;
685 /* first force sp to a 4-byte alignment */
688 /* Set the return address. For the m32r, the return breakpoint is
689 always at BP_ADDR. */
690 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
692 /* If STRUCT_RETURN is true, then the struct return address (in
693 STRUCT_ADDR) will consume the first argument-passing register.
694 Both adjust the register count and store that value. */
697 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
701 /* Now make sure there's space on the stack */
702 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
703 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
704 sp
-= stack_alloc
; /* make room on stack for args */
706 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
708 type
= VALUE_TYPE (args
[argnum
]);
709 typecode
= TYPE_CODE (type
);
710 len
= TYPE_LENGTH (type
);
712 memset (valbuf
, 0, sizeof (valbuf
));
714 /* Passes structures that do not fit in 2 registers by reference. */
716 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
718 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (args
[argnum
]));
719 typecode
= TYPE_CODE_PTR
;
725 /* value gets right-justified in the register or stack word */
726 memcpy (valbuf
+ (register_size (gdbarch
, argreg
) - len
),
727 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
731 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
735 if (argreg
> ARGN_REGNUM
)
737 /* must go on the stack */
738 write_memory (sp
+ stack_offset
, val
, 4);
741 else if (argreg
<= ARGN_REGNUM
)
743 /* there's room in a register */
745 extract_unsigned_integer (val
,
746 register_size (gdbarch
, argreg
));
747 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
750 /* Store the value 4 bytes at a time. This means that things
751 larger than 4 bytes may go partly in registers and partly
753 len
-= register_size (gdbarch
, argreg
);
754 val
+= register_size (gdbarch
, argreg
);
758 /* Finally, update the SP register. */
759 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
765 /* Given a return value in `regbuf' with a type `valtype',
766 extract and copy its value into `valbuf'. */
769 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
772 bfd_byte
*valbuf
= dst
;
773 int len
= TYPE_LENGTH (type
);
776 /* By using store_unsigned_integer we avoid having to do
777 anything special for small big-endian values. */
778 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
779 store_unsigned_integer (valbuf
, (len
> 4 ? len
- 4 : len
), tmp
);
781 /* Ignore return values more than 8 bytes in size because the m32r
782 returns anything more than 8 bytes in the stack. */
785 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
786 store_unsigned_integer (valbuf
+ len
- 4, 4, tmp
);
790 enum return_value_convention
791 m32r_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
792 struct regcache
*regcache
, void *readbuf
,
793 const void *writebuf
)
795 if (TYPE_LENGTH (valtype
) > 8)
796 return RETURN_VALUE_STRUCT_CONVENTION
;
800 m32r_extract_return_value (valtype
, regcache
, readbuf
);
801 if (writebuf
!= NULL
)
802 m32r_store_return_value (valtype
, regcache
, writebuf
);
803 return RETURN_VALUE_REGISTER_CONVENTION
;
810 m32r_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
812 return frame_unwind_register_unsigned (next_frame
, M32R_PC_REGNUM
);
815 /* Given a GDB frame, determine the address of the calling function's
816 frame. This will be used to create a new GDB frame struct. */
819 m32r_frame_this_id (struct frame_info
*next_frame
,
820 void **this_prologue_cache
, struct frame_id
*this_id
)
822 struct m32r_unwind_cache
*info
823 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
826 struct minimal_symbol
*msym_stack
;
829 /* The FUNC is easy. */
830 func
= frame_func_unwind (next_frame
);
832 /* Check if the stack is empty. */
833 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
834 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
837 /* Hopefully the prologue analysis either correctly determined the
838 frame's base (which is the SP from the previous frame), or set
839 that base to "NULL". */
840 base
= info
->prev_sp
;
844 id
= frame_id_build (base
, func
);
849 m32r_frame_prev_register (struct frame_info
*next_frame
,
850 void **this_prologue_cache
,
851 int regnum
, int *optimizedp
,
852 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
853 int *realnump
, void *bufferp
)
855 struct m32r_unwind_cache
*info
856 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
857 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
858 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
861 static const struct frame_unwind m32r_frame_unwind
= {
864 m32r_frame_prev_register
867 static const struct frame_unwind
*
868 m32r_frame_sniffer (struct frame_info
*next_frame
)
870 return &m32r_frame_unwind
;
874 m32r_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
876 struct m32r_unwind_cache
*info
877 = m32r_frame_unwind_cache (next_frame
, this_cache
);
881 static const struct frame_base m32r_frame_base
= {
883 m32r_frame_base_address
,
884 m32r_frame_base_address
,
885 m32r_frame_base_address
888 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
889 dummy frame. The frame ID's base needs to match the TOS value
890 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
893 static struct frame_id
894 m32r_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
896 return frame_id_build (m32r_unwind_sp (gdbarch
, next_frame
),
897 frame_pc_unwind (next_frame
));
901 static gdbarch_init_ftype m32r_gdbarch_init
;
903 static struct gdbarch
*
904 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
906 struct gdbarch
*gdbarch
;
907 struct gdbarch_tdep
*tdep
;
909 /* If there is already a candidate, use it. */
910 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
912 return arches
->gdbarch
;
914 /* Allocate space for the new architecture. */
915 tdep
= XMALLOC (struct gdbarch_tdep
);
916 gdbarch
= gdbarch_alloc (&info
, tdep
);
918 set_gdbarch_read_pc (gdbarch
, m32r_read_pc
);
919 set_gdbarch_write_pc (gdbarch
, m32r_write_pc
);
920 set_gdbarch_unwind_sp (gdbarch
, m32r_unwind_sp
);
922 set_gdbarch_num_regs (gdbarch
, M32R_NUM_REGS
);
923 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
924 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
925 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
927 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
928 set_gdbarch_return_value (gdbarch
, m32r_return_value
);
930 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
931 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
932 set_gdbarch_breakpoint_from_pc (gdbarch
, m32r_breakpoint_from_pc
);
933 set_gdbarch_memory_insert_breakpoint (gdbarch
,
934 m32r_memory_insert_breakpoint
);
935 set_gdbarch_memory_remove_breakpoint (gdbarch
,
936 m32r_memory_remove_breakpoint
);
938 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
940 frame_unwind_append_sniffer (gdbarch
, m32r_frame_sniffer
);
941 frame_base_set_default (gdbarch
, &m32r_frame_base
);
943 /* Methods for saving / extracting a dummy frame's ID. The ID's
944 stack address must match the SP value returned by
945 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
946 set_gdbarch_unwind_dummy_id (gdbarch
, m32r_unwind_dummy_id
);
948 /* Return the unwound PC value. */
949 set_gdbarch_unwind_pc (gdbarch
, m32r_unwind_pc
);
951 set_gdbarch_print_insn (gdbarch
, print_insn_m32r
);
957 _initialize_m32r_tdep (void)
959 register_gdbarch_init (bfd_arch_m32r
, m32r_gdbarch_init
);