1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright (C) 1996-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-unwind.h"
23 #include "frame-base.h"
34 #include "arch-utils.h"
36 #include "trad-frame.h"
39 #include "m32r-tdep.h"
42 /* The size of the argument registers (r0 - r3) in bytes. */
43 #define M32R_ARG_REGISTER_SIZE 4
47 extern void _initialize_m32r_tdep (void);
50 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
52 /* Align to the size of an instruction (so that they can safely be
53 pushed onto the stack. */
60 The little endian mode of M32R is unique. In most of architectures,
61 two 16-bit instructions, A and B, are placed as the following:
69 In M32R, they are placed like this:
77 This is because M32R always fetches instructions in 32-bit.
79 The following functions take care of this behavior. */
82 m32r_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
83 struct bp_target_info
*bp_tgt
)
85 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
88 gdb_byte contents_cache
[4];
89 gdb_byte bp_entry
[] = { 0x10, 0xf1 }; /* dpt */
91 /* Save the memory contents. */
92 val
= target_read_memory (addr
& 0xfffffffc, contents_cache
, 4);
94 return val
; /* return error */
96 memcpy (bp_tgt
->shadow_contents
, contents_cache
, 4);
97 bp_tgt
->shadow_len
= 4;
99 /* Determine appropriate breakpoint contents and size for this address. */
100 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
104 buf
[0] = bp_entry
[0];
105 buf
[1] = bp_entry
[1];
106 buf
[2] = contents_cache
[2] & 0x7f;
107 buf
[3] = contents_cache
[3];
111 buf
[0] = contents_cache
[0];
112 buf
[1] = contents_cache
[1];
113 buf
[2] = bp_entry
[0];
114 buf
[3] = bp_entry
[1];
117 else /* little-endian */
121 buf
[0] = contents_cache
[0];
122 buf
[1] = contents_cache
[1] & 0x7f;
123 buf
[2] = bp_entry
[1];
124 buf
[3] = bp_entry
[0];
128 buf
[0] = bp_entry
[1];
129 buf
[1] = bp_entry
[0];
130 buf
[2] = contents_cache
[2];
131 buf
[3] = contents_cache
[3];
135 /* Write the breakpoint. */
136 val
= target_write_memory (addr
& 0xfffffffc, buf
, 4);
141 m32r_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
142 struct bp_target_info
*bp_tgt
)
144 CORE_ADDR addr
= bp_tgt
->placed_address
;
147 gdb_byte
*contents_cache
= bp_tgt
->shadow_contents
;
149 buf
[0] = contents_cache
[0];
150 buf
[1] = contents_cache
[1];
151 buf
[2] = contents_cache
[2];
152 buf
[3] = contents_cache
[3];
154 /* Remove parallel bit. */
155 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
157 if ((buf
[0] & 0x80) == 0 && (buf
[2] & 0x80) != 0)
160 else /* little-endian */
162 if ((buf
[3] & 0x80) == 0 && (buf
[1] & 0x80) != 0)
166 /* Write contents. */
167 val
= target_write_raw_memory (addr
& 0xfffffffc, buf
, 4);
171 /* Implement the breakpoint_kind_from_pc gdbarch method. */
174 m32r_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
176 if ((*pcptr
& 3) == 0)
182 /* Implement the sw_breakpoint_from_kind gdbarch method. */
184 static const gdb_byte
*
185 m32r_sw_breakpoint_from_kind (struct gdbarch
*gdbarch
, int kind
, int *size
)
187 static gdb_byte be_bp_entry
[] = {
188 0x10, 0xf1, 0x70, 0x00
190 static gdb_byte le_bp_entry
[] = {
191 0x00, 0x70, 0xf1, 0x10
196 /* Determine appropriate breakpoint. */
197 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
204 return le_bp_entry
+ 2;
208 static const char *m32r_register_names
[] = {
209 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
210 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
211 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
216 m32r_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
220 if (reg_nr
>= M32R_NUM_REGS
)
222 return m32r_register_names
[reg_nr
];
226 /* Return the GDB type object for the "standard" data type
227 of data in register N. */
230 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
232 if (reg_nr
== M32R_PC_REGNUM
)
233 return builtin_type (gdbarch
)->builtin_func_ptr
;
234 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
235 return builtin_type (gdbarch
)->builtin_data_ptr
;
237 return builtin_type (gdbarch
)->builtin_int32
;
241 /* Write into appropriate registers a function return value
242 of type TYPE, given in virtual format.
244 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
247 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
248 const gdb_byte
*valbuf
)
250 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
251 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
253 int len
= TYPE_LENGTH (type
);
255 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
, byte_order
);
256 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
260 regval
= extract_unsigned_integer (valbuf
+ 4,
261 len
- 4, byte_order
);
262 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
266 /* This is required by skip_prologue. The results of decoding a prologue
267 should be cached because this thrashing is getting nuts. */
270 decode_prologue (struct gdbarch
*gdbarch
,
271 CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
272 CORE_ADDR
*pl_endptr
, unsigned long *framelength
)
274 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
275 unsigned long framesize
;
278 CORE_ADDR after_prologue
= 0;
279 CORE_ADDR after_push
= 0;
280 CORE_ADDR after_stack_adjust
= 0;
281 CORE_ADDR current_pc
;
282 LONGEST return_value
;
287 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
289 /* Check if current pc's location is readable. */
290 if (!safe_read_memory_integer (current_pc
, 2, byte_order
, &return_value
))
293 insn
= read_memory_unsigned_integer (current_pc
, 2, byte_order
);
298 /* If this is a 32 bit instruction, we dont want to examine its
299 immediate data as though it were an instruction. */
300 if (current_pc
& 0x02)
302 /* Decode this instruction further. */
309 if (current_pc
== scan_limit
)
310 scan_limit
+= 2; /* extend the search */
312 current_pc
+= 2; /* skip the immediate data */
314 /* Check if current pc's location is readable. */
315 if (!safe_read_memory_integer (current_pc
, 2, byte_order
,
319 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
320 /* add 16 bit sign-extended offset */
323 -((short) read_memory_unsigned_integer (current_pc
,
328 if (((insn
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
329 && safe_read_memory_integer (current_pc
+ 2,
332 && read_memory_unsigned_integer (current_pc
+ 2,
336 /* Subtract 24 bit sign-extended negative-offset. */
337 insn
= read_memory_unsigned_integer (current_pc
- 2,
339 if (insn
& 0x00800000) /* sign extend */
340 insn
|= 0xff000000; /* negative */
342 insn
&= 0x00ffffff; /* positive */
346 after_push
= current_pc
+ 2;
350 op1
= insn
& 0xf000; /* Isolate just the first nibble. */
352 if ((insn
& 0xf0ff) == 0x207f)
358 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
359 /* Add 8 bit sign-extended offset. */
361 int stack_adjust
= (signed char) (insn
& 0xff);
363 /* there are probably two of these stack adjustments:
364 1) A negative one in the prologue, and
365 2) A positive one in the epilogue.
366 We are only interested in the first one. */
368 if (stack_adjust
< 0)
370 framesize
-= stack_adjust
;
372 /* A frameless function may have no "mv fp, sp".
373 In that case, this is the end of the prologue. */
374 after_stack_adjust
= current_pc
+ 2;
380 after_prologue
= current_pc
+ 2;
381 break; /* end of stack adjustments */
384 /* Nop looks like a branch, continue explicitly. */
387 after_prologue
= current_pc
+ 2;
388 continue; /* nop occurs between pushes. */
390 /* End of prolog if any of these are trap instructions. */
391 if ((insn
& 0xfff0) == 0x10f0)
393 after_prologue
= current_pc
;
396 /* End of prolog if any of these are branch instructions. */
397 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
399 after_prologue
= current_pc
;
402 /* Some of the branch instructions are mixed with other types. */
405 int subop
= insn
& 0x0ff0;
406 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
408 after_prologue
= current_pc
;
409 continue; /* jmp , jl */
415 *framelength
= framesize
;
417 if (current_pc
>= scan_limit
)
421 if (after_stack_adjust
!= 0)
422 /* We did not find a "mv fp,sp", but we DID find
423 a stack_adjust. Is it safe to use that as the
424 end of the prologue? I just don't know. */
426 *pl_endptr
= after_stack_adjust
;
428 else if (after_push
!= 0)
429 /* We did not find a "mv fp,sp", but we DID find
430 a push. Is it safe to use that as the
431 end of the prologue? I just don't know. */
433 *pl_endptr
= after_push
;
436 /* We reached the end of the loop without finding the end
437 of the prologue. No way to win -- we should report
438 failure. The way we do that is to return the original
439 start_pc. GDB will set a breakpoint at the start of
440 the function (etc.) */
441 *pl_endptr
= start_pc
;
446 if (after_prologue
== 0)
447 after_prologue
= current_pc
;
450 *pl_endptr
= after_prologue
;
453 } /* decode_prologue */
455 /* Function: skip_prologue
456 Find end of function prologue. */
458 #define DEFAULT_SEARCH_LIMIT 128
461 m32r_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
463 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
464 CORE_ADDR func_addr
, func_end
;
465 struct symtab_and_line sal
;
466 LONGEST return_value
;
468 /* See what the symbol table says. */
470 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
472 sal
= find_pc_line (func_addr
, 0);
474 if (sal
.line
!= 0 && sal
.end
<= func_end
)
479 /* Either there's no line info, or the line after the prologue is after
480 the end of the function. In this case, there probably isn't a
483 func_end
= std::min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
487 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
489 /* If pc's location is not readable, just quit. */
490 if (!safe_read_memory_integer (pc
, 4, byte_order
, &return_value
))
493 /* Find the end of prologue. */
494 if (decode_prologue (gdbarch
, pc
, func_end
, &sal
.end
, NULL
) < 0)
500 struct m32r_unwind_cache
502 /* The previous frame's inner most stack address. Used as this
503 frame ID's stack_addr. */
505 /* The frame's base, optionally used by the high-level debug info. */
508 /* How far the SP and r13 (FP) have been offset from the start of
509 the stack frame (as defined by the previous frame's stack
514 /* Table indicating the location of each and every register. */
515 struct trad_frame_saved_reg
*saved_regs
;
518 /* Put here the code to store, into fi->saved_regs, the addresses of
519 the saved registers of frame described by FRAME_INFO. This
520 includes special registers such as pc and fp saved in special ways
521 in the stack frame. sp is even more special: the address we return
522 for it IS the sp for the next frame. */
524 static struct m32r_unwind_cache
*
525 m32r_frame_unwind_cache (struct frame_info
*this_frame
,
526 void **this_prologue_cache
)
528 CORE_ADDR pc
, scan_limit
;
533 struct m32r_unwind_cache
*info
;
536 if ((*this_prologue_cache
))
537 return (struct m32r_unwind_cache
*) (*this_prologue_cache
);
539 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
540 (*this_prologue_cache
) = info
;
541 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
545 info
->uses_frame
= 0;
547 scan_limit
= get_frame_pc (this_frame
);
548 for (pc
= get_frame_func (this_frame
);
549 pc
> 0 && pc
< scan_limit
; pc
+= 2)
553 op
= get_frame_memory_unsigned (this_frame
, pc
, 4);
554 if ((op
& 0x80000000) == 0x80000000)
556 /* 32-bit instruction */
557 if ((op
& 0xffff0000) == 0x8faf0000)
559 /* add3 sp,sp,xxxx */
560 short n
= op
& 0xffff;
561 info
->sp_offset
+= n
;
563 else if (((op
>> 8) == 0xe4)
564 && get_frame_memory_unsigned (this_frame
, pc
+ 2,
567 /* ld24 r4, xxxxxx; sub sp, r4 */
568 unsigned long n
= op
& 0xffffff;
569 info
->sp_offset
+= n
;
570 pc
+= 2; /* skip sub instruction */
573 if (pc
== scan_limit
)
574 scan_limit
+= 2; /* extend the search */
575 pc
+= 2; /* skip the immediate data */
580 /* 16-bit instructions */
581 op
= get_frame_memory_unsigned (this_frame
, pc
, 2) & 0x7fff;
582 if ((op
& 0xf0ff) == 0x207f)
585 int regno
= ((op
>> 8) & 0xf);
586 info
->sp_offset
-= 4;
587 info
->saved_regs
[regno
].addr
= info
->sp_offset
;
589 else if ((op
& 0xff00) == 0x4f00)
592 int n
= (signed char) (op
& 0xff);
593 info
->sp_offset
+= n
;
595 else if (op
== 0x1d8f)
598 info
->uses_frame
= 1;
599 info
->r13_offset
= info
->sp_offset
;
600 break; /* end of stack adjustments */
602 else if ((op
& 0xfff0) == 0x10f0)
604 /* End of prologue if this is a trap instruction. */
605 break; /* End of stack adjustments. */
609 info
->size
= -info
->sp_offset
;
611 /* Compute the previous frame's stack pointer (which is also the
612 frame's ID's stack address), and this frame's base pointer. */
613 if (info
->uses_frame
)
615 /* The SP was moved to the FP. This indicates that a new frame
616 was created. Get THIS frame's FP value by unwinding it from
618 this_base
= get_frame_register_unsigned (this_frame
, M32R_FP_REGNUM
);
619 /* The FP points at the last saved register. Adjust the FP back
620 to before the first saved register giving the SP. */
621 prev_sp
= this_base
+ info
->size
;
625 /* Assume that the FP is this frame's SP but with that pushed
626 stack space added back. */
627 this_base
= get_frame_register_unsigned (this_frame
, M32R_SP_REGNUM
);
628 prev_sp
= this_base
+ info
->size
;
631 /* Convert that SP/BASE into real addresses. */
632 info
->prev_sp
= prev_sp
;
633 info
->base
= this_base
;
635 /* Adjust all the saved registers so that they contain addresses and
637 for (i
= 0; i
< gdbarch_num_regs (get_frame_arch (this_frame
)) - 1; i
++)
638 if (trad_frame_addr_p (info
->saved_regs
, i
))
639 info
->saved_regs
[i
].addr
= (info
->prev_sp
+ info
->saved_regs
[i
].addr
);
641 /* The call instruction moves the caller's PC in the callee's LR.
642 Since this is an unwind, do the reverse. Copy the location of LR
643 into PC (the address / regnum) so that a request for PC will be
644 converted into a request for the LR. */
645 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
647 /* The previous frame's SP needed to be computed. Save the computed
649 trad_frame_set_value (info
->saved_regs
, M32R_SP_REGNUM
, prev_sp
);
655 m32r_read_pc (struct regcache
*regcache
)
658 regcache_cooked_read_unsigned (regcache
, M32R_PC_REGNUM
, &pc
);
663 m32r_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
665 return frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
670 m32r_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
671 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
672 struct value
**args
, CORE_ADDR sp
, int struct_return
,
673 CORE_ADDR struct_addr
)
675 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
676 int stack_offset
, stack_alloc
;
677 int argreg
= ARG1_REGNUM
;
680 enum type_code typecode
;
683 gdb_byte valbuf
[M32R_ARG_REGISTER_SIZE
];
686 /* First force sp to a 4-byte alignment. */
689 /* Set the return address. For the m32r, the return breakpoint is
690 always at BP_ADDR. */
691 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
693 /* If STRUCT_RETURN is true, then the struct return address (in
694 STRUCT_ADDR) will consume the first argument-passing register.
695 Both adjust the register count and store that value. */
698 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
702 /* Now make sure there's space on the stack. */
703 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
704 stack_alloc
+= ((TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3);
705 sp
-= stack_alloc
; /* Make room on stack for args. */
707 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
709 type
= value_type (args
[argnum
]);
710 typecode
= TYPE_CODE (type
);
711 len
= TYPE_LENGTH (type
);
713 memset (valbuf
, 0, sizeof (valbuf
));
715 /* Passes structures that do not fit in 2 registers by reference. */
717 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
719 store_unsigned_integer (valbuf
, 4, byte_order
,
720 value_address (args
[argnum
]));
721 typecode
= TYPE_CODE_PTR
;
727 /* Value gets right-justified in the register or stack word. */
728 memcpy (valbuf
+ (register_size (gdbarch
, argreg
) - len
),
729 (gdb_byte
*) value_contents (args
[argnum
]), len
);
733 val
= (gdb_byte
*) value_contents (args
[argnum
]);
737 if (argreg
> ARGN_REGNUM
)
739 /* Must go on the stack. */
740 write_memory (sp
+ stack_offset
, val
, 4);
743 else if (argreg
<= ARGN_REGNUM
)
745 /* There's room in a register. */
747 extract_unsigned_integer (val
,
748 register_size (gdbarch
, argreg
),
750 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
753 /* Store the value 4 bytes at a time. This means that things
754 larger than 4 bytes may go partly in registers and partly
756 len
-= register_size (gdbarch
, argreg
);
757 val
+= register_size (gdbarch
, argreg
);
761 /* Finally, update the SP register. */
762 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
768 /* Given a return value in `regbuf' with a type `valtype',
769 extract and copy its value into `valbuf'. */
772 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
775 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
776 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
777 int len
= TYPE_LENGTH (type
);
780 /* By using store_unsigned_integer we avoid having to do
781 anything special for small big-endian values. */
782 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
783 store_unsigned_integer (dst
, (len
> 4 ? len
- 4 : len
), byte_order
, tmp
);
785 /* Ignore return values more than 8 bytes in size because the m32r
786 returns anything more than 8 bytes in the stack. */
789 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
790 store_unsigned_integer (dst
+ len
- 4, 4, byte_order
, tmp
);
794 static enum return_value_convention
795 m32r_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
796 struct type
*valtype
, struct regcache
*regcache
,
797 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
799 if (TYPE_LENGTH (valtype
) > 8)
800 return RETURN_VALUE_STRUCT_CONVENTION
;
804 m32r_extract_return_value (valtype
, regcache
, readbuf
);
805 if (writebuf
!= NULL
)
806 m32r_store_return_value (valtype
, regcache
, writebuf
);
807 return RETURN_VALUE_REGISTER_CONVENTION
;
814 m32r_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
816 return frame_unwind_register_unsigned (next_frame
, M32R_PC_REGNUM
);
819 /* Given a GDB frame, determine the address of the calling function's
820 frame. This will be used to create a new GDB frame struct. */
823 m32r_frame_this_id (struct frame_info
*this_frame
,
824 void **this_prologue_cache
, struct frame_id
*this_id
)
826 struct m32r_unwind_cache
*info
827 = m32r_frame_unwind_cache (this_frame
, this_prologue_cache
);
830 struct bound_minimal_symbol msym_stack
;
833 /* The FUNC is easy. */
834 func
= get_frame_func (this_frame
);
836 /* Check if the stack is empty. */
837 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
838 if (msym_stack
.minsym
&& info
->base
== BMSYMBOL_VALUE_ADDRESS (msym_stack
))
841 /* Hopefully the prologue analysis either correctly determined the
842 frame's base (which is the SP from the previous frame), or set
843 that base to "NULL". */
844 base
= info
->prev_sp
;
848 id
= frame_id_build (base
, func
);
852 static struct value
*
853 m32r_frame_prev_register (struct frame_info
*this_frame
,
854 void **this_prologue_cache
, int regnum
)
856 struct m32r_unwind_cache
*info
857 = m32r_frame_unwind_cache (this_frame
, this_prologue_cache
);
858 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
861 static const struct frame_unwind m32r_frame_unwind
= {
863 default_frame_unwind_stop_reason
,
865 m32r_frame_prev_register
,
867 default_frame_sniffer
871 m32r_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
873 struct m32r_unwind_cache
*info
874 = m32r_frame_unwind_cache (this_frame
, this_cache
);
878 static const struct frame_base m32r_frame_base
= {
880 m32r_frame_base_address
,
881 m32r_frame_base_address
,
882 m32r_frame_base_address
885 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
886 frame. The frame ID's base needs to match the TOS value saved by
887 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
889 static struct frame_id
890 m32r_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
892 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, M32R_SP_REGNUM
);
893 return frame_id_build (sp
, get_frame_pc (this_frame
));
897 static gdbarch_init_ftype m32r_gdbarch_init
;
899 static struct gdbarch
*
900 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
902 struct gdbarch
*gdbarch
;
903 struct gdbarch_tdep
*tdep
;
905 /* If there is already a candidate, use it. */
906 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
908 return arches
->gdbarch
;
910 /* Allocate space for the new architecture. */
911 tdep
= XNEW (struct gdbarch_tdep
);
912 gdbarch
= gdbarch_alloc (&info
, tdep
);
914 set_gdbarch_read_pc (gdbarch
, m32r_read_pc
);
915 set_gdbarch_unwind_sp (gdbarch
, m32r_unwind_sp
);
917 set_gdbarch_num_regs (gdbarch
, M32R_NUM_REGS
);
918 set_gdbarch_pc_regnum (gdbarch
, M32R_PC_REGNUM
);
919 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
920 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
921 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
923 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
924 set_gdbarch_return_value (gdbarch
, m32r_return_value
);
926 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
927 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
928 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, m32r_breakpoint_kind_from_pc
);
929 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, m32r_sw_breakpoint_from_kind
);
930 set_gdbarch_memory_insert_breakpoint (gdbarch
,
931 m32r_memory_insert_breakpoint
);
932 set_gdbarch_memory_remove_breakpoint (gdbarch
,
933 m32r_memory_remove_breakpoint
);
935 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
937 frame_base_set_default (gdbarch
, &m32r_frame_base
);
939 /* Methods for saving / extracting a dummy frame's ID. The ID's
940 stack address must match the SP value returned by
941 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
942 set_gdbarch_dummy_id (gdbarch
, m32r_dummy_id
);
944 /* Return the unwound PC value. */
945 set_gdbarch_unwind_pc (gdbarch
, m32r_unwind_pc
);
947 set_gdbarch_print_insn (gdbarch
, print_insn_m32r
);
949 /* Hook in ABI-specific overrides, if they have been registered. */
950 gdbarch_init_osabi (info
, gdbarch
);
952 /* Hook in the default unwinders. */
953 frame_unwind_append_unwinder (gdbarch
, &m32r_frame_unwind
);
955 /* Support simple overlay manager. */
956 set_gdbarch_overlay_update (gdbarch
, simple_overlay_update
);
962 _initialize_m32r_tdep (void)
964 register_gdbarch_init (bfd_arch_m32r
, m32r_gdbarch_init
);