1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2003 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
31 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "trad-frame.h"
41 #include "gdb_assert.h"
45 /* gdbarch target dependent data here. Currently unused for M32R. */
48 /* m32r register names. */
59 /* m32r calling convention. */
60 ARG1_REGNUM
= R0_REGNUM
,
61 ARGN_REGNUM
= R3_REGNUM
,
62 RET1_REGNUM
= R0_REGNUM
,
67 extern void _initialize_m32r_tdep (void);
70 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
72 /* Align to the size of an instruction (so that they can safely be
73 pushed onto the stack. */
77 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
78 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
79 and TYPE is the type (which is known to be struct, union or array).
81 The m32r returns anything less than 8 bytes in size in
85 m32r_use_struct_convention (int gcc_p
, struct type
*type
)
87 return (TYPE_LENGTH (type
) > 8);
92 #define M32R_BE_BREAKPOINT32 {0x10, 0xf1, 0x70, 0x00}
93 #define M32R_LE_BREAKPOINT32 {0xf1, 0x10, 0x00, 0x70}
94 #define M32R_BE_BREAKPOINT16 {0x10, 0xf1}
95 #define M32R_LE_BREAKPOINT16 {0xf1, 0x10}
98 m32r_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
104 bplen
= (addr
& 3) ? 2 : 4;
106 /* Save the memory contents. */
107 val
= target_read_memory (addr
, contents_cache
, bplen
);
109 return val
; /* return error */
111 /* Determine appropriate breakpoint contents and size for this address. */
112 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
114 if (((addr
& 3) == 0) &&
115 ((contents_cache
[0] & 0x80) || (contents_cache
[2] & 0x80)))
117 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
119 bplen
= sizeof (insn
);
123 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
125 bplen
= sizeof (insn
);
129 { /* little-endian */
130 if (((addr
& 3) == 0) &&
131 ((contents_cache
[1] & 0x80) || (contents_cache
[3] & 0x80)))
133 static unsigned char insn
[] = M32R_LE_BREAKPOINT32
;
135 bplen
= sizeof (insn
);
139 static unsigned char insn
[] = M32R_LE_BREAKPOINT16
;
141 bplen
= sizeof (insn
);
145 /* Write the breakpoint. */
146 val
= target_write_memory (addr
, (char *) bp
, bplen
);
151 m32r_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
156 /* Determine appropriate breakpoint contents and size for this address. */
157 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
159 if (((addr
& 3) == 0) &&
160 ((contents_cache
[0] & 0x80) || (contents_cache
[2] & 0x80)))
162 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
163 bplen
= sizeof (insn
);
167 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
168 bplen
= sizeof (insn
);
174 if (((addr
& 3) == 0) &&
175 ((contents_cache
[1] & 0x80) || (contents_cache
[3] & 0x80)))
177 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
178 bplen
= sizeof (insn
);
182 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
183 bplen
= sizeof (insn
);
187 /* Write contents. */
188 val
= target_write_memory (addr
, contents_cache
, bplen
);
192 static const unsigned char *
193 m32r_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
197 /* Determine appropriate breakpoint. */
198 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
200 if ((*pcptr
& 3) == 0)
202 static unsigned char insn
[] = M32R_BE_BREAKPOINT32
;
204 *lenptr
= sizeof (insn
);
208 static unsigned char insn
[] = M32R_BE_BREAKPOINT16
;
210 *lenptr
= sizeof (insn
);
215 if ((*pcptr
& 3) == 0)
217 static unsigned char insn
[] = M32R_LE_BREAKPOINT32
;
219 *lenptr
= sizeof (insn
);
223 static unsigned char insn
[] = M32R_LE_BREAKPOINT16
;
225 *lenptr
= sizeof (insn
);
233 char *m32r_register_names
[] = {
234 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
235 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
236 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
243 return (sizeof (m32r_register_names
) / sizeof (m32r_register_names
[0]));
247 m32r_register_name (int reg_nr
)
251 if (reg_nr
>= m32r_num_regs ())
253 return m32r_register_names
[reg_nr
];
257 /* Return the GDB type object for the "standard" data type
258 of data in register N. */
261 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
263 if (reg_nr
== M32R_PC_REGNUM
)
264 return builtin_type_void_func_ptr
;
265 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
266 return builtin_type_void_data_ptr
;
268 return builtin_type_int32
;
272 /* Write into appropriate registers a function return value
273 of type TYPE, given in virtual format.
275 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
278 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
282 int len
= TYPE_LENGTH (type
);
284 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
);
285 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
289 regval
= extract_unsigned_integer (valbuf
+ 4, len
- 4);
290 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
294 /* Extract from an array REGBUF containing the (raw) register state
295 the address in which a function should return its structure value,
296 as a CORE_ADDR (or an expression that can be used as one). */
299 m32r_extract_struct_value_address (struct regcache
*regcache
)
302 regcache_cooked_read_unsigned (regcache
, ARG1_REGNUM
, &addr
);
307 /* This is required by skip_prologue. The results of decoding a prologue
308 should be cached because this thrashing is getting nuts. */
311 decode_prologue (CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
312 CORE_ADDR
*pl_endptr
)
314 unsigned long framesize
;
317 int maybe_one_more
= 0;
318 CORE_ADDR after_prologue
= 0;
319 CORE_ADDR after_stack_adjust
= 0;
320 CORE_ADDR current_pc
;
325 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
327 insn
= read_memory_unsigned_integer (current_pc
, 2);
329 /* If this is a 32 bit instruction, we dont want to examine its
330 immediate data as though it were an instruction */
331 if (current_pc
& 0x02)
333 /* Clear the parallel execution bit from 16 bit instruction */
336 /* The last instruction was a branch, usually terminates
337 the series, but if this is a parallel instruction,
338 it may be a stack framing instruction */
339 if (!(insn
& 0x8000))
341 /* nope, we are really done */
345 /* decode this instruction further */
351 break; /* This isnt the one more */
354 if (current_pc
== scan_limit
)
355 scan_limit
+= 2; /* extend the search */
356 current_pc
+= 2; /* skip the immediate data */
357 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
358 /* add 16 bit sign-extended offset */
361 -((short) read_memory_unsigned_integer (current_pc
, 2));
365 if (((insn
>> 8) == 0xe4) && /* ld24 r4, xxxxxx; sub sp, r4 */
366 read_memory_unsigned_integer (current_pc
+ 2,
368 /* subtract 24 bit sign-extended negative-offset */
370 insn
= read_memory_unsigned_integer (current_pc
- 2, 4);
371 if (insn
& 0x00800000) /* sign extend */
372 insn
|= 0xff000000; /* negative */
374 insn
&= 0x00ffffff; /* positive */
378 after_prologue
= current_pc
;
382 op1
= insn
& 0xf000; /* isolate just the first nibble */
384 if ((insn
& 0xf0ff) == 0x207f)
388 regno
= ((insn
>> 8) & 0xf);
392 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
393 /* add 8 bit sign-extended offset */
395 int stack_adjust
= (char) (insn
& 0xff);
397 /* there are probably two of these stack adjustments:
398 1) A negative one in the prologue, and
399 2) A positive one in the epilogue.
400 We are only interested in the first one. */
402 if (stack_adjust
< 0)
404 framesize
-= stack_adjust
;
406 /* A frameless function may have no "mv fp, sp".
407 In that case, this is the end of the prologue. */
408 after_stack_adjust
= current_pc
+ 2;
414 after_prologue
= current_pc
+ 2;
415 break; /* end of stack adjustments */
417 /* Nop looks like a branch, continue explicitly */
420 after_prologue
= current_pc
+ 2;
421 continue; /* nop occurs between pushes */
423 /* End of prolog if any of these are branch instructions */
424 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
426 after_prologue
= current_pc
;
430 /* Some of the branch instructions are mixed with other types */
433 int subop
= insn
& 0x0ff0;
434 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
436 after_prologue
= current_pc
;
438 continue; /* jmp , jl */
443 if (current_pc
>= scan_limit
)
447 if (after_stack_adjust
!= 0)
448 /* We did not find a "mv fp,sp", but we DID find
449 a stack_adjust. Is it safe to use that as the
450 end of the prologue? I just don't know. */
452 *pl_endptr
= after_stack_adjust
;
455 /* We reached the end of the loop without finding the end
456 of the prologue. No way to win -- we should report failure.
457 The way we do that is to return the original start_pc.
458 GDB will set a breakpoint at the start of the function (etc.) */
459 *pl_endptr
= start_pc
;
463 if (after_prologue
== 0)
464 after_prologue
= current_pc
;
467 *pl_endptr
= after_prologue
;
468 } /* decode_prologue */
470 /* Function: skip_prologue
471 Find end of function prologue */
473 #define DEFAULT_SEARCH_LIMIT 44
476 m32r_skip_prologue (CORE_ADDR pc
)
478 CORE_ADDR func_addr
, func_end
;
479 struct symtab_and_line sal
;
481 /* See what the symbol table says */
483 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
485 sal
= find_pc_line (func_addr
, 0);
487 if (sal
.line
!= 0 && sal
.end
<= func_end
)
492 /* Either there's no line info, or the line after the prologue is after
493 the end of the function. In this case, there probably isn't a
496 func_end
= min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
500 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
501 decode_prologue (pc
, func_end
, &sal
.end
);
506 struct m32r_unwind_cache
508 /* The previous frame's inner most stack address. Used as this
509 frame ID's stack_addr. */
511 /* The frame's base, optionally used by the high-level debug info. */
514 /* How far the SP and r13 (FP) have been offset from the start of
515 the stack frame (as defined by the previous frame's stack
520 /* Table indicating the location of each and every register. */
521 struct trad_frame_saved_reg
*saved_regs
;
524 /* Put here the code to store, into fi->saved_regs, the addresses of
525 the saved registers of frame described by FRAME_INFO. This
526 includes special registers such as pc and fp saved in special ways
527 in the stack frame. sp is even more special: the address we return
528 for it IS the sp for the next frame. */
530 static struct m32r_unwind_cache
*
531 m32r_frame_unwind_cache (struct frame_info
*next_frame
,
532 void **this_prologue_cache
)
539 struct m32r_unwind_cache
*info
;
541 if ((*this_prologue_cache
))
542 return (*this_prologue_cache
);
544 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
545 (*this_prologue_cache
) = info
;
546 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
551 info
->uses_frame
= 0;
552 for (pc
= frame_func_unwind (next_frame
);
553 pc
> 0 && pc
< frame_pc_unwind (next_frame
); pc
+= 2)
557 op
= get_frame_memory_unsigned (next_frame
, pc
, 4);
558 if ((op
& 0x80000000) == 0x80000000)
560 /* 32-bit instruction */
561 if ((op
& 0xffff0000) == 0x8faf0000)
563 /* add3 sp,sp,xxxx */
564 short n
= op
& 0xffff;
565 info
->sp_offset
+= n
;
567 else if (((op
>> 8) == 0xe4) && /* ld24 r4, xxxxxx; sub sp, r4 */
568 get_frame_memory_unsigned (next_frame
, pc
+ 4,
571 unsigned long n
= op
& 0xffffff;
572 info
->sp_offset
+= n
;
583 /* 16-bit instructions */
584 op
= get_frame_memory_unsigned (next_frame
, pc
, 2) & 0x7fff;
585 if ((op
& 0xf0ff) == 0x207f)
588 int regno
= ((op
>> 8) & 0xf);
589 info
->sp_offset
-= 4;
590 info
->saved_regs
[regno
].addr
= info
->sp_offset
;
592 else if ((op
& 0xff00) == 0x4f00)
595 int n
= (char) (op
& 0xff);
596 info
->sp_offset
+= n
;
598 else if (op
== 0x1d8f)
601 info
->uses_frame
= 1;
602 info
->r13_offset
= info
->sp_offset
;
604 else if (op
== 0x7000)
611 info
->size
= -info
->sp_offset
;
613 /* Compute the previous frame's stack pointer (which is also the
614 frame's ID's stack address), and this frame's base pointer. */
615 if (info
->uses_frame
)
617 /* The SP was moved to the FP. This indicates that a new frame
618 was created. Get THIS frame's FP value by unwinding it from
620 frame_unwind_unsigned_register (next_frame
, M32R_FP_REGNUM
, &this_base
);
621 /* The FP points at the last saved register. Adjust the FP back
622 to before the first saved register giving the SP. */
623 prev_sp
= this_base
+ info
->size
;
627 /* Assume that the FP is this frame's SP but with that pushed
628 stack space added back. */
629 frame_unwind_unsigned_register (next_frame
, M32R_SP_REGNUM
, &this_base
);
630 prev_sp
= this_base
+ info
->size
;
633 /* Convert that SP/BASE into real addresses. */
634 info
->prev_sp
= prev_sp
;
635 info
->base
= this_base
;
637 /* Adjust all the saved registers so that they contain addresses and
639 for (i
= 0; i
< NUM_REGS
- 1; i
++)
640 if (trad_frame_addr_p (info
->saved_regs
, i
))
641 info
->saved_regs
[i
].addr
= (info
->prev_sp
+ info
->saved_regs
[i
].addr
);
643 /* The call instruction moves the caller's PC in the callee's LR.
644 Since this is an unwind, do the reverse. Copy the location of LR
645 into PC (the address / regnum) so that a request for PC will be
646 converted into a request for the LR. */
647 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
649 /* The previous frame's SP needed to be computed. Save the computed
651 trad_frame_set_value (info
->saved_regs
, M32R_SP_REGNUM
, prev_sp
);
657 m32r_read_pc (ptid_t ptid
)
662 save_ptid
= inferior_ptid
;
663 inferior_ptid
= ptid
;
664 pc
= (int) read_register (M32R_PC_REGNUM
);
665 inferior_ptid
= save_ptid
;
670 m32r_write_pc (CORE_ADDR val
, ptid_t ptid
)
674 save_ptid
= inferior_ptid
;
675 inferior_ptid
= ptid
;
676 write_register (M32R_PC_REGNUM
, val
);
677 inferior_ptid
= save_ptid
;
681 m32r_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
684 frame_unwind_unsigned_register (next_frame
, M32R_SP_REGNUM
, &sp
);
690 m32r_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
691 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
692 struct value
**args
, CORE_ADDR sp
, int struct_return
,
693 CORE_ADDR struct_addr
)
695 int stack_offset
, stack_alloc
;
696 int argreg
= ARG1_REGNUM
;
699 enum type_code typecode
;
702 char valbuf
[MAX_REGISTER_SIZE
];
704 int odd_sized_struct
;
706 /* first force sp to a 4-byte alignment */
709 /* Set the return address. For the m32r, the return breakpoint is
710 always at BP_ADDR. */
711 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
713 /* If STRUCT_RETURN is true, then the struct return address (in
714 STRUCT_ADDR) will consume the first argument-passing register.
715 Both adjust the register count and store that value. */
718 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
722 /* Now make sure there's space on the stack */
723 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
724 stack_alloc
+= ((TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + 3) & ~3);
725 sp
-= stack_alloc
; /* make room on stack for args */
727 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
729 type
= VALUE_TYPE (args
[argnum
]);
730 typecode
= TYPE_CODE (type
);
731 len
= TYPE_LENGTH (type
);
733 memset (valbuf
, 0, sizeof (valbuf
));
735 /* Passes structures that do not fit in 2 registers by reference. */
737 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
739 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (args
[argnum
]));
740 typecode
= TYPE_CODE_PTR
;
746 /* value gets right-justified in the register or stack word */
747 memcpy (valbuf
+ (REGISTER_RAW_SIZE (argreg
) - len
),
748 (char *) VALUE_CONTENTS (args
[argnum
]), len
);
752 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
756 if (argreg
> ARGN_REGNUM
)
758 /* must go on the stack */
759 write_memory (sp
+ stack_offset
, val
, 4);
762 else if (argreg
<= ARGN_REGNUM
)
764 /* there's room in a register */
766 extract_unsigned_integer (val
, REGISTER_RAW_SIZE (argreg
));
767 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
770 /* Store the value 4 bytes at a time. This means that things
771 larger than 4 bytes may go partly in registers and partly
773 len
-= REGISTER_RAW_SIZE (argreg
);
774 val
+= REGISTER_RAW_SIZE (argreg
);
778 /* Finally, update the SP register. */
779 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
785 /* Given a return value in `regbuf' with a type `valtype',
786 extract and copy its value into `valbuf'. */
789 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
792 bfd_byte
*valbuf
= dst
;
793 int len
= TYPE_LENGTH (type
);
796 /* By using store_unsigned_integer we avoid having to do
797 anything special for small big-endian values. */
798 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
799 store_unsigned_integer (valbuf
, (len
> 4 ? len
- 4 : len
), tmp
);
801 /* Ignore return values more than 8 bytes in size because the m32r
802 returns anything more than 8 bytes in the stack. */
805 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
806 store_unsigned_integer (valbuf
+ len
- 4, 4, tmp
);
812 m32r_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
815 frame_unwind_unsigned_register (next_frame
, M32R_PC_REGNUM
, &pc
);
819 /* Given a GDB frame, determine the address of the calling function's
820 frame. This will be used to create a new GDB frame struct. */
823 m32r_frame_this_id (struct frame_info
*next_frame
,
824 void **this_prologue_cache
, struct frame_id
*this_id
)
826 struct m32r_unwind_cache
*info
827 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
830 struct minimal_symbol
*msym_stack
;
833 /* The FUNC is easy. */
834 func
= frame_func_unwind (next_frame
);
836 /* This is meant to halt the backtrace at "_start". Make sure we
837 don't halt it at a generic dummy frame. */
838 if (inside_entry_file (func
))
841 /* Check if the stack is empty. */
842 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
843 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
846 /* Hopefully the prologue analysis either correctly determined the
847 frame's base (which is the SP from the previous frame), or set
848 that base to "NULL". */
849 base
= info
->prev_sp
;
853 id
= frame_id_build (base
, func
);
855 /* Check that we're not going round in circles with the same frame
856 ID (but avoid applying the test to sentinel frames which do go
857 round in circles). Can't use frame_id_eq() as that doesn't yet
858 compare the frame's PC value. */
859 if (frame_relative_level (next_frame
) >= 0
860 && get_frame_type (next_frame
) != DUMMY_FRAME
861 && frame_id_eq (get_frame_id (next_frame
), id
))
868 m32r_frame_prev_register (struct frame_info
*next_frame
,
869 void **this_prologue_cache
,
870 int regnum
, int *optimizedp
,
871 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
872 int *realnump
, void *bufferp
)
874 struct m32r_unwind_cache
*info
875 = m32r_frame_unwind_cache (next_frame
, this_prologue_cache
);
876 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
877 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
880 static const struct frame_unwind m32r_frame_unwind
= {
883 m32r_frame_prev_register
886 static const struct frame_unwind
*
887 m32r_frame_p (CORE_ADDR pc
)
889 return &m32r_frame_unwind
;
893 m32r_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
895 struct m32r_unwind_cache
*info
896 = m32r_frame_unwind_cache (next_frame
, this_cache
);
900 static const struct frame_base m32r_frame_base
= {
902 m32r_frame_base_address
,
903 m32r_frame_base_address
,
904 m32r_frame_base_address
907 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
908 dummy frame. The frame ID's base needs to match the TOS value
909 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
912 static struct frame_id
913 m32r_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
915 return frame_id_build (m32r_unwind_sp (gdbarch
, next_frame
),
916 frame_pc_unwind (next_frame
));
920 static gdbarch_init_ftype m32r_gdbarch_init
;
922 static struct gdbarch
*
923 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
925 struct gdbarch
*gdbarch
;
926 struct gdbarch_tdep
*tdep
;
928 /* If there is already a candidate, use it. */
929 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
931 return arches
->gdbarch
;
933 /* Allocate space for the new architecture. */
934 tdep
= XMALLOC (struct gdbarch_tdep
);
935 gdbarch
= gdbarch_alloc (&info
, tdep
);
937 set_gdbarch_read_pc (gdbarch
, m32r_read_pc
);
938 set_gdbarch_write_pc (gdbarch
, m32r_write_pc
);
939 set_gdbarch_unwind_sp (gdbarch
, m32r_unwind_sp
);
941 set_gdbarch_num_regs (gdbarch
, m32r_num_regs ());
942 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
943 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
944 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
946 set_gdbarch_extract_return_value (gdbarch
, m32r_extract_return_value
);
947 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
948 set_gdbarch_store_return_value (gdbarch
, m32r_store_return_value
);
949 set_gdbarch_extract_struct_value_address (gdbarch
,
950 m32r_extract_struct_value_address
);
951 set_gdbarch_use_struct_convention (gdbarch
, m32r_use_struct_convention
);
953 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
954 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
955 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
956 set_gdbarch_function_start_offset (gdbarch
, 0);
957 set_gdbarch_breakpoint_from_pc (gdbarch
, m32r_breakpoint_from_pc
);
958 set_gdbarch_memory_insert_breakpoint (gdbarch
,
959 m32r_memory_insert_breakpoint
);
960 set_gdbarch_memory_remove_breakpoint (gdbarch
,
961 m32r_memory_remove_breakpoint
);
963 set_gdbarch_frame_args_skip (gdbarch
, 0);
964 set_gdbarch_frameless_function_invocation (gdbarch
,
965 frameless_look_for_prologue
);
967 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
969 frame_unwind_append_predicate (gdbarch
, m32r_frame_p
);
970 frame_base_set_default (gdbarch
, &m32r_frame_base
);
972 /* Methods for saving / extracting a dummy frame's ID. The ID's
973 stack address must match the SP value returned by
974 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
975 set_gdbarch_unwind_dummy_id (gdbarch
, m32r_unwind_dummy_id
);
977 /* Return the unwound PC value. */
978 set_gdbarch_unwind_pc (gdbarch
, m32r_unwind_pc
);
980 set_gdbarch_print_insn (gdbarch
, print_insn_m32r
);
986 _initialize_m32r_tdep (void)
988 register_gdbarch_init (bfd_arch_m32r
, m32r_gdbarch_init
);