1 /* Target-dependent code for Motorola 68HC11 & 68HC12
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009,
4 2010, 2011 Free Software Foundation, Inc.
6 Contributed by Stephane Carrez, stcarrez@nerim.fr
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
26 #include "frame-unwind.h"
27 #include "frame-base.h"
28 #include "dwarf2-frame.h"
29 #include "trad-frame.h"
34 #include "gdb_string.h"
40 #include "arch-utils.h"
42 #include "reggroups.h"
45 #include "opcode/m68hc11.h"
46 #include "elf/m68hc11.h"
49 /* Macros for setting and testing a bit in a minimal symbol.
50 For 68HC11/68HC12 we have two flags that tell which return
51 type the function is using. This is used for prologue and frame
52 analysis to compute correct stack frame layout.
54 The MSB of the minimal symbol's "info" field is used for this purpose.
56 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
57 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
58 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
59 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
61 #define MSYMBOL_SET_RTC(msym) \
62 MSYMBOL_TARGET_FLAG_1 (msym) = 1
64 #define MSYMBOL_SET_RTI(msym) \
65 MSYMBOL_TARGET_FLAG_2 (msym) = 1
67 #define MSYMBOL_IS_RTC(msym) \
68 MSYMBOL_TARGET_FLAG_1 (msym)
70 #define MSYMBOL_IS_RTI(msym) \
71 MSYMBOL_TARGET_FLAG_2 (msym)
73 enum insn_return_kind
{
80 /* Register numbers of various important registers. */
82 #define HARD_X_REGNUM 0
83 #define HARD_D_REGNUM 1
84 #define HARD_Y_REGNUM 2
85 #define HARD_SP_REGNUM 3
86 #define HARD_PC_REGNUM 4
88 #define HARD_A_REGNUM 5
89 #define HARD_B_REGNUM 6
90 #define HARD_CCR_REGNUM 7
92 /* 68HC12 page number register.
93 Note: to keep a compatibility with gcc register naming, we must
94 not have to rename FP and other soft registers. The page register
95 is a real hard register and must therefore be counted by gdbarch_num_regs.
96 For this it has the same number as Z register (which is not used). */
97 #define HARD_PAGE_REGNUM 8
98 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
100 /* Z is replaced by X or Y by gcc during machine reorg.
101 ??? There is no way to get it and even know whether
102 it's in X or Y or in ZS. */
103 #define SOFT_Z_REGNUM 8
105 /* Soft registers. These registers are special. There are treated
106 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
107 They are physically located in memory. */
108 #define SOFT_FP_REGNUM 9
109 #define SOFT_TMP_REGNUM 10
110 #define SOFT_ZS_REGNUM 11
111 #define SOFT_XY_REGNUM 12
112 #define SOFT_UNUSED_REGNUM 13
113 #define SOFT_D1_REGNUM 14
114 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
115 #define M68HC11_MAX_SOFT_REGS 32
117 #define M68HC11_NUM_REGS (8)
118 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
119 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
121 #define M68HC11_REG_SIZE (2)
123 #define M68HC12_NUM_REGS (9)
124 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
125 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
127 struct insn_sequence
;
130 /* Stack pointer correction value. For 68hc11, the stack pointer points
131 to the next push location. An offset of 1 must be applied to obtain
132 the address where the last value is saved. For 68hc12, the stack
133 pointer points to the last value pushed. No offset is necessary. */
134 int stack_correction
;
136 /* Description of instructions in the prologue. */
137 struct insn_sequence
*prologue
;
139 /* True if the page memory bank register is available
141 int use_page_register
;
143 /* ELF flags for ABI. */
147 #define STACK_CORRECTION(gdbarch) (gdbarch_tdep (gdbarch)->stack_correction)
148 #define USE_PAGE_REGISTER(gdbarch) (gdbarch_tdep (gdbarch)->use_page_register)
150 struct m68hc11_unwind_cache
152 /* The previous frame's inner most stack address. Used as this
153 frame ID's stack_addr. */
155 /* The frame's base, optionally used by the high-level debug info. */
163 enum insn_return_kind return_kind
;
165 /* Table indicating the location of each and every register. */
166 struct trad_frame_saved_reg
*saved_regs
;
169 /* Table of registers for 68HC11. This includes the hard registers
170 and the soft registers used by GCC. */
172 m68hc11_register_names
[] =
174 "x", "d", "y", "sp", "pc", "a", "b",
175 "ccr", "page", "frame","tmp", "zs", "xy", 0,
176 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
177 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
178 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
179 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
180 "d29", "d30", "d31", "d32"
183 struct m68hc11_soft_reg
189 static struct m68hc11_soft_reg soft_regs
[M68HC11_ALL_REGS
];
191 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
193 static int soft_min_addr
;
194 static int soft_max_addr
;
195 static int soft_reg_initialized
= 0;
197 /* Look in the symbol table for the address of a pseudo register
198 in memory. If we don't find it, pretend the register is not used
199 and not available. */
201 m68hc11_get_register_info (struct m68hc11_soft_reg
*reg
, const char *name
)
203 struct minimal_symbol
*msymbol
;
205 msymbol
= lookup_minimal_symbol (name
, NULL
, NULL
);
208 reg
->addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
209 reg
->name
= xstrdup (name
);
211 /* Keep track of the address range for soft registers. */
212 if (reg
->addr
< (CORE_ADDR
) soft_min_addr
)
213 soft_min_addr
= reg
->addr
;
214 if (reg
->addr
> (CORE_ADDR
) soft_max_addr
)
215 soft_max_addr
= reg
->addr
;
224 /* Initialize the table of soft register addresses according
225 to the symbol table. */
227 m68hc11_initialize_register_info (void)
231 if (soft_reg_initialized
)
234 soft_min_addr
= INT_MAX
;
236 for (i
= 0; i
< M68HC11_ALL_REGS
; i
++)
238 soft_regs
[i
].name
= 0;
241 m68hc11_get_register_info (&soft_regs
[SOFT_FP_REGNUM
], "_.frame");
242 m68hc11_get_register_info (&soft_regs
[SOFT_TMP_REGNUM
], "_.tmp");
243 m68hc11_get_register_info (&soft_regs
[SOFT_ZS_REGNUM
], "_.z");
244 soft_regs
[SOFT_Z_REGNUM
] = soft_regs
[SOFT_ZS_REGNUM
];
245 m68hc11_get_register_info (&soft_regs
[SOFT_XY_REGNUM
], "_.xy");
247 for (i
= SOFT_D1_REGNUM
; i
< M68HC11_MAX_SOFT_REGS
; i
++)
251 sprintf (buf
, "_.d%d", i
- SOFT_D1_REGNUM
+ 1);
252 m68hc11_get_register_info (&soft_regs
[i
], buf
);
255 if (soft_regs
[SOFT_FP_REGNUM
].name
== 0)
256 warning (_("No frame soft register found in the symbol table.\n"
257 "Stack backtrace will not work."));
258 soft_reg_initialized
= 1;
261 /* Given an address in memory, return the soft register number if
262 that address corresponds to a soft register. Returns -1 if not. */
264 m68hc11_which_soft_register (CORE_ADDR addr
)
268 if (addr
< soft_min_addr
|| addr
> soft_max_addr
)
271 for (i
= SOFT_FP_REGNUM
; i
< M68HC11_ALL_REGS
; i
++)
273 if (soft_regs
[i
].name
&& soft_regs
[i
].addr
== addr
)
279 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
280 pseudo registers. They are located in memory. Translate the register
281 fetch into a memory read. */
282 static enum register_status
283 m68hc11_pseudo_register_read (struct gdbarch
*gdbarch
,
284 struct regcache
*regcache
,
285 int regno
, gdb_byte
*buf
)
287 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
289 /* The PC is a pseudo reg only for 68HC12 with the memory bank
291 if (regno
== M68HC12_HARD_PC_REGNUM
)
294 const int regsize
= 4;
295 enum register_status status
;
297 status
= regcache_cooked_read_unsigned (regcache
, HARD_PC_REGNUM
, &pc
);
298 if (status
!= REG_VALID
)
300 if (pc
>= 0x8000 && pc
< 0xc000)
304 regcache_cooked_read_unsigned (regcache
, HARD_PAGE_REGNUM
, &page
);
309 store_unsigned_integer (buf
, regsize
, byte_order
, pc
);
313 m68hc11_initialize_register_info ();
315 /* Fetch a soft register: translate into a memory read. */
316 if (soft_regs
[regno
].name
)
318 target_read_memory (soft_regs
[regno
].addr
, buf
, 2);
328 /* Store a pseudo register. Translate the register store
329 into a memory write. */
331 m68hc11_pseudo_register_write (struct gdbarch
*gdbarch
,
332 struct regcache
*regcache
,
333 int regno
, const gdb_byte
*buf
)
335 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
337 /* The PC is a pseudo reg only for 68HC12 with the memory bank
339 if (regno
== M68HC12_HARD_PC_REGNUM
)
341 const int regsize
= 4;
342 char *tmp
= alloca (regsize
);
345 memcpy (tmp
, buf
, regsize
);
346 pc
= extract_unsigned_integer (tmp
, regsize
, byte_order
);
350 regcache_cooked_write_unsigned (regcache
, HARD_PAGE_REGNUM
,
353 regcache_cooked_write_unsigned (regcache
, HARD_PC_REGNUM
,
357 regcache_cooked_write_unsigned (regcache
, HARD_PC_REGNUM
, pc
);
361 m68hc11_initialize_register_info ();
363 /* Store a soft register: translate into a memory write. */
364 if (soft_regs
[regno
].name
)
366 const int regsize
= 2;
367 char *tmp
= alloca (regsize
);
368 memcpy (tmp
, buf
, regsize
);
369 target_write_memory (soft_regs
[regno
].addr
, tmp
, regsize
);
374 m68hc11_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
376 if (reg_nr
== M68HC12_HARD_PC_REGNUM
&& USE_PAGE_REGISTER (gdbarch
))
378 if (reg_nr
== HARD_PC_REGNUM
&& USE_PAGE_REGISTER (gdbarch
))
383 if (reg_nr
>= M68HC11_ALL_REGS
)
386 m68hc11_initialize_register_info ();
388 /* If we don't know the address of a soft register, pretend it
390 if (reg_nr
> M68HC11_LAST_HARD_REG
&& soft_regs
[reg_nr
].name
== 0)
392 return m68hc11_register_names
[reg_nr
];
395 static const unsigned char *
396 m68hc11_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
,
399 static unsigned char breakpoint
[] = {0x0};
401 *lenptr
= sizeof (breakpoint
);
406 /* 68HC11 & 68HC12 prologue analysis. */
410 /* 68HC11 opcodes. */
411 #undef M6811_OP_PAGE2
412 #define M6811_OP_PAGE2 (0x18)
413 #define M6811_OP_LDX (0xde)
414 #define M6811_OP_LDX_EXT (0xfe)
415 #define M6811_OP_PSHX (0x3c)
416 #define M6811_OP_STS (0x9f)
417 #define M6811_OP_STS_EXT (0xbf)
418 #define M6811_OP_TSX (0x30)
419 #define M6811_OP_XGDX (0x8f)
420 #define M6811_OP_ADDD (0xc3)
421 #define M6811_OP_TXS (0x35)
422 #define M6811_OP_DES (0x34)
424 /* 68HC12 opcodes. */
425 #define M6812_OP_PAGE2 (0x18)
426 #define M6812_OP_MOVW (0x01)
427 #define M6812_PB_PSHW (0xae)
428 #define M6812_OP_STS (0x5f)
429 #define M6812_OP_STS_EXT (0x7f)
430 #define M6812_OP_LEAS (0x1b)
431 #define M6812_OP_PSHX (0x34)
432 #define M6812_OP_PSHY (0x35)
434 /* Operand extraction. */
435 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
436 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
437 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
438 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
440 /* Identification of the sequence. */
444 P_SAVE_REG
, /* Save a register on the stack. */
445 P_SET_FRAME
, /* Setup the frame pointer. */
446 P_LOCAL_1
, /* Allocate 1 byte for locals. */
447 P_LOCAL_2
, /* Allocate 2 bytes for locals. */
448 P_LOCAL_N
/* Allocate N bytes for locals. */
451 struct insn_sequence
{
452 enum m6811_seq_type type
;
454 unsigned short code
[MAX_CODES
];
457 /* Sequence of instructions in the 68HC11 function prologue. */
458 static struct insn_sequence m6811_prologue
[] = {
459 /* Sequences to save a soft-register. */
460 { P_SAVE_REG
, 3, { M6811_OP_LDX
, OP_DIRECT
,
462 { P_SAVE_REG
, 5, { M6811_OP_PAGE2
, M6811_OP_LDX
, OP_DIRECT
,
463 M6811_OP_PAGE2
, M6811_OP_PSHX
} },
464 { P_SAVE_REG
, 4, { M6811_OP_LDX_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
,
466 { P_SAVE_REG
, 6, { M6811_OP_PAGE2
, M6811_OP_LDX_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
,
467 M6811_OP_PAGE2
, M6811_OP_PSHX
} },
469 /* Sequences to allocate local variables. */
470 { P_LOCAL_N
, 7, { M6811_OP_TSX
,
472 M6811_OP_ADDD
, OP_IMM_HIGH
, OP_IMM_LOW
,
475 { P_LOCAL_N
, 11, { M6811_OP_PAGE2
, M6811_OP_TSX
,
476 M6811_OP_PAGE2
, M6811_OP_XGDX
,
477 M6811_OP_ADDD
, OP_IMM_HIGH
, OP_IMM_LOW
,
478 M6811_OP_PAGE2
, M6811_OP_XGDX
,
479 M6811_OP_PAGE2
, M6811_OP_TXS
} },
480 { P_LOCAL_1
, 1, { M6811_OP_DES
} },
481 { P_LOCAL_2
, 1, { M6811_OP_PSHX
} },
482 { P_LOCAL_2
, 2, { M6811_OP_PAGE2
, M6811_OP_PSHX
} },
484 /* Initialize the frame pointer. */
485 { P_SET_FRAME
, 2, { M6811_OP_STS
, OP_DIRECT
} },
486 { P_SET_FRAME
, 3, { M6811_OP_STS_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
} },
491 /* Sequence of instructions in the 68HC12 function prologue. */
492 static struct insn_sequence m6812_prologue
[] = {
493 { P_SAVE_REG
, 5, { M6812_OP_PAGE2
, M6812_OP_MOVW
, M6812_PB_PSHW
,
494 OP_IMM_HIGH
, OP_IMM_LOW
} },
495 { P_SET_FRAME
, 2, { M6812_OP_STS
, OP_DIRECT
} },
496 { P_SET_FRAME
, 3, { M6812_OP_STS_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
} },
497 { P_LOCAL_N
, 2, { M6812_OP_LEAS
, OP_PBYTE
} },
498 { P_LOCAL_2
, 1, { M6812_OP_PSHX
} },
499 { P_LOCAL_2
, 1, { M6812_OP_PSHY
} },
504 /* Analyze the sequence of instructions starting at the given address.
505 Returns a pointer to the sequence when it is recognized and
506 the optional value (constant/address) associated with it. */
507 static struct insn_sequence
*
508 m68hc11_analyze_instruction (struct gdbarch
*gdbarch
,
509 struct insn_sequence
*seq
, CORE_ADDR pc
,
512 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
513 unsigned char buffer
[MAX_CODES
];
520 for (; seq
->type
!= P_LAST
; seq
++)
523 for (j
= 0; j
< seq
->length
; j
++)
527 buffer
[bufsize
] = read_memory_unsigned_integer (pc
+ bufsize
,
531 /* Continue while we match the opcode. */
532 if (seq
->code
[j
] == buffer
[j
])
535 if ((seq
->code
[j
] & 0xf00) == 0)
538 /* Extract a sequence parameter (address or constant). */
539 switch (seq
->code
[j
])
542 cur_val
= (CORE_ADDR
) buffer
[j
];
546 cur_val
= cur_val
& 0x0ff;
547 cur_val
|= (buffer
[j
] << 8);
552 cur_val
|= buffer
[j
];
556 if ((buffer
[j
] & 0xE0) == 0x80)
558 v
= buffer
[j
] & 0x1f;
562 else if ((buffer
[j
] & 0xfe) == 0xf0)
564 v
= read_memory_unsigned_integer (pc
+ j
+ 1, 1, byte_order
);
568 else if (buffer
[j
] == 0xf2)
570 v
= read_memory_unsigned_integer (pc
+ j
+ 1, 2, byte_order
);
577 /* We have a full match. */
578 if (j
== seq
->length
)
587 /* Return the instruction that the function at the PC is using. */
588 static enum insn_return_kind
589 m68hc11_get_return_insn (CORE_ADDR pc
)
591 struct minimal_symbol
*sym
;
593 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
594 function is stored by elfread.c in the high bit of the info field.
595 Use this to decide which instruction the function uses to return. */
596 sym
= lookup_minimal_symbol_by_pc (pc
);
600 if (MSYMBOL_IS_RTC (sym
))
602 else if (MSYMBOL_IS_RTI (sym
))
608 /* Analyze the function prologue to find some information
610 - the PC of the first line (for m68hc11_skip_prologue)
611 - the offset of the previous frame saved address (from current frame)
612 - the soft registers which are pushed. */
614 m68hc11_scan_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
615 CORE_ADDR current_pc
, struct m68hc11_unwind_cache
*info
)
620 int found_frame_point
;
623 struct insn_sequence
*seq_table
;
627 if (pc
>= current_pc
)
632 m68hc11_initialize_register_info ();
639 seq_table
= gdbarch_tdep (gdbarch
)->prologue
;
641 /* The 68hc11 stack is as follows:
657 +-----------+ <--- current frame
660 With most processors (like 68K) the previous frame can be computed
661 easily because it is always at a fixed offset (see link/unlink).
662 That is, locals are accessed with negative offsets, arguments are
663 accessed with positive ones. Since 68hc11 only supports offsets
664 in the range [0..255], the frame is defined at the bottom of
665 locals (see picture).
667 The purpose of the analysis made here is to find out the size
668 of locals in this function. An alternative to this is to use
669 DWARF2 info. This would be better but I don't know how to
670 access dwarf2 debug from this function.
672 Walk from the function entry point to the point where we save
673 the frame. While walking instructions, compute the size of bytes
674 which are pushed. This gives us the index to access the previous
677 We limit the search to 128 bytes so that the algorithm is bounded
678 in case of random and wrong code. We also stop and abort if
679 we find an instruction which is not supposed to appear in the
680 prologue (as generated by gcc 2.95, 2.96). */
683 found_frame_point
= 0;
686 while (!done
&& pc
+ 2 < func_end
)
688 struct insn_sequence
*seq
;
691 seq
= m68hc11_analyze_instruction (gdbarch
, seq_table
, pc
, &val
);
695 /* If we are within the instruction group, we can't advance the
696 pc nor the stack offset. Otherwise the caller's stack computed
697 from the current stack can be wrong. */
698 if (pc
+ seq
->length
> current_pc
)
701 pc
= pc
+ seq
->length
;
702 if (seq
->type
== P_SAVE_REG
)
704 if (found_frame_point
)
706 saved_reg
= m68hc11_which_soft_register (val
);
711 if (info
->saved_regs
)
712 info
->saved_regs
[saved_reg
].addr
= save_addr
;
719 else if (seq
->type
== P_SET_FRAME
)
721 found_frame_point
= 1;
724 else if (seq
->type
== P_LOCAL_1
)
728 else if (seq
->type
== P_LOCAL_2
)
732 else if (seq
->type
== P_LOCAL_N
)
734 /* Stack pointer is decremented for the allocation. */
736 size
-= (int) (val
) | 0xffff0000;
741 if (found_frame_point
== 0)
742 info
->sp_offset
= size
;
744 info
->sp_offset
= -1;
749 m68hc11_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
751 CORE_ADDR func_addr
, func_end
;
752 struct symtab_and_line sal
;
753 struct m68hc11_unwind_cache tmp_cache
= { 0 };
755 /* If we have line debugging information, then the end of the
756 prologue should be the first assembly instruction of the
757 first source line. */
758 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
760 sal
= find_pc_line (func_addr
, 0);
761 if (sal
.end
&& sal
.end
< func_end
)
765 pc
= m68hc11_scan_prologue (gdbarch
, pc
, (CORE_ADDR
) -1, &tmp_cache
);
770 m68hc11_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
774 pc
= frame_unwind_register_unsigned (next_frame
,
775 gdbarch_pc_regnum (gdbarch
));
779 /* Put here the code to store, into fi->saved_regs, the addresses of
780 the saved registers of frame described by FRAME_INFO. This
781 includes special registers such as pc and fp saved in special ways
782 in the stack frame. sp is even more special: the address we return
783 for it IS the sp for the next frame. */
785 static struct m68hc11_unwind_cache
*
786 m68hc11_frame_unwind_cache (struct frame_info
*this_frame
,
787 void **this_prologue_cache
)
789 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
792 struct m68hc11_unwind_cache
*info
;
793 CORE_ADDR current_pc
;
796 if ((*this_prologue_cache
))
797 return (*this_prologue_cache
);
799 info
= FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache
);
800 (*this_prologue_cache
) = info
;
801 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
803 info
->pc
= get_frame_func (this_frame
);
806 info
->return_kind
= m68hc11_get_return_insn (info
->pc
);
808 /* The SP was moved to the FP. This indicates that a new frame
809 was created. Get THIS frame's FP value by unwinding it from
811 this_base
= get_frame_register_unsigned (this_frame
, SOFT_FP_REGNUM
);
818 current_pc
= get_frame_pc (this_frame
);
820 m68hc11_scan_prologue (gdbarch
, info
->pc
, current_pc
, info
);
822 info
->saved_regs
[HARD_PC_REGNUM
].addr
= info
->size
;
824 if (info
->sp_offset
!= (CORE_ADDR
) -1)
826 info
->saved_regs
[HARD_PC_REGNUM
].addr
= info
->sp_offset
;
827 this_base
= get_frame_register_unsigned (this_frame
, HARD_SP_REGNUM
);
828 prev_sp
= this_base
+ info
->sp_offset
+ 2;
829 this_base
+= STACK_CORRECTION (gdbarch
);
833 /* The FP points at the last saved register. Adjust the FP back
834 to before the first saved register giving the SP. */
835 prev_sp
= this_base
+ info
->size
+ 2;
837 this_base
+= STACK_CORRECTION (gdbarch
);
838 if (soft_regs
[SOFT_FP_REGNUM
].name
)
839 info
->saved_regs
[SOFT_FP_REGNUM
].addr
= info
->size
- 2;
842 if (info
->return_kind
== RETURN_RTC
)
845 info
->saved_regs
[HARD_PAGE_REGNUM
].addr
= info
->size
;
846 info
->saved_regs
[HARD_PC_REGNUM
].addr
= info
->size
+ 1;
848 else if (info
->return_kind
== RETURN_RTI
)
851 info
->saved_regs
[HARD_CCR_REGNUM
].addr
= info
->size
;
852 info
->saved_regs
[HARD_D_REGNUM
].addr
= info
->size
+ 1;
853 info
->saved_regs
[HARD_X_REGNUM
].addr
= info
->size
+ 3;
854 info
->saved_regs
[HARD_Y_REGNUM
].addr
= info
->size
+ 5;
855 info
->saved_regs
[HARD_PC_REGNUM
].addr
= info
->size
+ 7;
858 /* Add 1 here to adjust for the post-decrement nature of the push
860 info
->prev_sp
= prev_sp
;
862 info
->base
= this_base
;
864 /* Adjust all the saved registers so that they contain addresses and not
867 i
< gdbarch_num_regs (gdbarch
)
868 + gdbarch_num_pseudo_regs (gdbarch
) - 1;
870 if (trad_frame_addr_p (info
->saved_regs
, i
))
872 info
->saved_regs
[i
].addr
+= this_base
;
875 /* The previous frame's SP needed to be computed. Save the computed
877 trad_frame_set_value (info
->saved_regs
, HARD_SP_REGNUM
, info
->prev_sp
);
882 /* Given a GDB frame, determine the address of the calling function's
883 frame. This will be used to create a new GDB frame struct. */
886 m68hc11_frame_this_id (struct frame_info
*this_frame
,
887 void **this_prologue_cache
,
888 struct frame_id
*this_id
)
890 struct m68hc11_unwind_cache
*info
891 = m68hc11_frame_unwind_cache (this_frame
, this_prologue_cache
);
896 /* The FUNC is easy. */
897 func
= get_frame_func (this_frame
);
899 /* Hopefully the prologue analysis either correctly determined the
900 frame's base (which is the SP from the previous frame), or set
901 that base to "NULL". */
902 base
= info
->prev_sp
;
906 id
= frame_id_build (base
, func
);
910 static struct value
*
911 m68hc11_frame_prev_register (struct frame_info
*this_frame
,
912 void **this_prologue_cache
, int regnum
)
915 struct m68hc11_unwind_cache
*info
916 = m68hc11_frame_unwind_cache (this_frame
, this_prologue_cache
);
918 value
= trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
920 /* Take into account the 68HC12 specific call (PC + page). */
921 if (regnum
== HARD_PC_REGNUM
922 && info
->return_kind
== RETURN_RTC
923 && USE_PAGE_REGISTER (get_frame_arch (this_frame
)))
925 CORE_ADDR pc
= value_as_long (value
);
926 if (pc
>= 0x08000 && pc
< 0x0c000)
930 release_value (value
);
933 value
= trad_frame_get_prev_register (this_frame
, info
->saved_regs
,
935 page
= value_as_long (value
);
936 release_value (value
);
940 pc
+= ((page
& 0x0ff) << 14);
943 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
950 static const struct frame_unwind m68hc11_frame_unwind
= {
952 default_frame_unwind_stop_reason
,
953 m68hc11_frame_this_id
,
954 m68hc11_frame_prev_register
,
956 default_frame_sniffer
960 m68hc11_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
962 struct m68hc11_unwind_cache
*info
963 = m68hc11_frame_unwind_cache (this_frame
, this_cache
);
969 m68hc11_frame_args_address (struct frame_info
*this_frame
, void **this_cache
)
972 struct m68hc11_unwind_cache
*info
973 = m68hc11_frame_unwind_cache (this_frame
, this_cache
);
975 addr
= info
->base
+ info
->size
;
976 if (info
->return_kind
== RETURN_RTC
)
978 else if (info
->return_kind
== RETURN_RTI
)
984 static const struct frame_base m68hc11_frame_base
= {
985 &m68hc11_frame_unwind
,
986 m68hc11_frame_base_address
,
987 m68hc11_frame_base_address
,
988 m68hc11_frame_args_address
992 m68hc11_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
995 sp
= frame_unwind_register_unsigned (next_frame
, HARD_SP_REGNUM
);
999 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1000 frame. The frame ID's base needs to match the TOS value saved by
1001 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1003 static struct frame_id
1004 m68hc11_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1007 CORE_ADDR pc
= get_frame_pc (this_frame
);
1009 tos
= get_frame_register_unsigned (this_frame
, SOFT_FP_REGNUM
);
1011 return frame_id_build (tos
, pc
);
1015 /* Get and print the register from the given frame. */
1017 m68hc11_print_register (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1018 struct frame_info
*frame
, int regno
)
1022 if (regno
== HARD_PC_REGNUM
|| regno
== HARD_SP_REGNUM
1023 || regno
== SOFT_FP_REGNUM
|| regno
== M68HC12_HARD_PC_REGNUM
)
1024 rval
= get_frame_register_unsigned (frame
, regno
);
1026 rval
= get_frame_register_signed (frame
, regno
);
1028 if (regno
== HARD_A_REGNUM
|| regno
== HARD_B_REGNUM
1029 || regno
== HARD_CCR_REGNUM
|| regno
== HARD_PAGE_REGNUM
)
1031 fprintf_filtered (file
, "0x%02x ", (unsigned char) rval
);
1032 if (regno
!= HARD_CCR_REGNUM
)
1033 print_longest (file
, 'd', 1, rval
);
1037 if (regno
== HARD_PC_REGNUM
&& gdbarch_tdep (gdbarch
)->use_page_register
)
1041 page
= get_frame_register_unsigned (frame
, HARD_PAGE_REGNUM
);
1042 fprintf_filtered (file
, "0x%02x:%04x ", (unsigned) page
,
1047 fprintf_filtered (file
, "0x%04x ", (unsigned) rval
);
1048 if (regno
!= HARD_PC_REGNUM
&& regno
!= HARD_SP_REGNUM
1049 && regno
!= SOFT_FP_REGNUM
&& regno
!= M68HC12_HARD_PC_REGNUM
)
1050 print_longest (file
, 'd', 1, rval
);
1054 if (regno
== HARD_CCR_REGNUM
)
1058 unsigned char l
= rval
& 0xff;
1060 fprintf_filtered (file
, "%c%c%c%c%c%c%c%c ",
1061 l
& M6811_S_BIT
? 'S' : '-',
1062 l
& M6811_X_BIT
? 'X' : '-',
1063 l
& M6811_H_BIT
? 'H' : '-',
1064 l
& M6811_I_BIT
? 'I' : '-',
1065 l
& M6811_N_BIT
? 'N' : '-',
1066 l
& M6811_Z_BIT
? 'Z' : '-',
1067 l
& M6811_V_BIT
? 'V' : '-',
1068 l
& M6811_C_BIT
? 'C' : '-');
1069 N
= (l
& M6811_N_BIT
) != 0;
1070 Z
= (l
& M6811_Z_BIT
) != 0;
1071 V
= (l
& M6811_V_BIT
) != 0;
1072 C
= (l
& M6811_C_BIT
) != 0;
1074 /* Print flags following the h8300. */
1076 fprintf_filtered (file
, "u> ");
1077 else if ((C
| Z
) == 1)
1078 fprintf_filtered (file
, "u<= ");
1080 fprintf_filtered (file
, "u< ");
1083 fprintf_filtered (file
, "!= ");
1085 fprintf_filtered (file
, "== ");
1088 fprintf_filtered (file
, ">= ");
1090 fprintf_filtered (file
, "< ");
1092 if ((Z
| (N
^ V
)) == 0)
1093 fprintf_filtered (file
, "> ");
1095 fprintf_filtered (file
, "<= ");
1099 /* Same as 'info reg' but prints the registers in a different way. */
1101 m68hc11_print_registers_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1102 struct frame_info
*frame
, int regno
, int cpregs
)
1106 const char *name
= gdbarch_register_name (gdbarch
, regno
);
1108 if (!name
|| !*name
)
1111 fprintf_filtered (file
, "%-10s ", name
);
1112 m68hc11_print_register (gdbarch
, file
, frame
, regno
);
1113 fprintf_filtered (file
, "\n");
1119 fprintf_filtered (file
, "PC=");
1120 m68hc11_print_register (gdbarch
, file
, frame
, HARD_PC_REGNUM
);
1122 fprintf_filtered (file
, " SP=");
1123 m68hc11_print_register (gdbarch
, file
, frame
, HARD_SP_REGNUM
);
1125 fprintf_filtered (file
, " FP=");
1126 m68hc11_print_register (gdbarch
, file
, frame
, SOFT_FP_REGNUM
);
1128 fprintf_filtered (file
, "\nCCR=");
1129 m68hc11_print_register (gdbarch
, file
, frame
, HARD_CCR_REGNUM
);
1131 fprintf_filtered (file
, "\nD=");
1132 m68hc11_print_register (gdbarch
, file
, frame
, HARD_D_REGNUM
);
1134 fprintf_filtered (file
, " X=");
1135 m68hc11_print_register (gdbarch
, file
, frame
, HARD_X_REGNUM
);
1137 fprintf_filtered (file
, " Y=");
1138 m68hc11_print_register (gdbarch
, file
, frame
, HARD_Y_REGNUM
);
1140 if (gdbarch_tdep (gdbarch
)->use_page_register
)
1142 fprintf_filtered (file
, "\nPage=");
1143 m68hc11_print_register (gdbarch
, file
, frame
, HARD_PAGE_REGNUM
);
1145 fprintf_filtered (file
, "\n");
1148 for (i
= SOFT_D1_REGNUM
; i
< M68HC11_ALL_REGS
; i
++)
1150 /* Skip registers which are not defined in the symbol table. */
1151 if (soft_regs
[i
].name
== 0)
1154 fprintf_filtered (file
, "D%d=", i
- SOFT_D1_REGNUM
+ 1);
1155 m68hc11_print_register (gdbarch
, file
, frame
, i
);
1158 fprintf_filtered (file
, "\n");
1160 fprintf_filtered (file
, " ");
1162 if (nr
&& (nr
% 8) != 7)
1163 fprintf_filtered (file
, "\n");
1168 m68hc11_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1169 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1170 int nargs
, struct value
**args
, CORE_ADDR sp
,
1171 int struct_return
, CORE_ADDR struct_addr
)
1173 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1175 int first_stack_argnum
;
1181 first_stack_argnum
= 0;
1184 regcache_cooked_write_unsigned (regcache
, HARD_D_REGNUM
, struct_addr
);
1188 type
= value_type (args
[0]);
1189 len
= TYPE_LENGTH (type
);
1191 /* First argument is passed in D and X registers. */
1196 v
= extract_unsigned_integer (value_contents (args
[0]),
1198 first_stack_argnum
= 1;
1200 regcache_cooked_write_unsigned (regcache
, HARD_D_REGNUM
, v
);
1204 regcache_cooked_write_unsigned (regcache
, HARD_X_REGNUM
, v
);
1209 for (argnum
= nargs
- 1; argnum
>= first_stack_argnum
; argnum
--)
1211 type
= value_type (args
[argnum
]);
1212 len
= TYPE_LENGTH (type
);
1216 static char zero
= 0;
1219 write_memory (sp
, &zero
, 1);
1221 val
= (char*) value_contents (args
[argnum
]);
1223 write_memory (sp
, val
, len
);
1226 /* Store return address. */
1228 store_unsigned_integer (buf
, 2, byte_order
, bp_addr
);
1229 write_memory (sp
, buf
, 2);
1231 /* Finally, update the stack pointer... */
1232 sp
-= STACK_CORRECTION (gdbarch
);
1233 regcache_cooked_write_unsigned (regcache
, HARD_SP_REGNUM
, sp
);
1235 /* ...and fake a frame pointer. */
1236 regcache_cooked_write_unsigned (regcache
, SOFT_FP_REGNUM
, sp
);
1238 /* DWARF2/GCC uses the stack address *before* the function call as a
1244 /* Return the GDB type object for the "standard" data type
1245 of data in register N. */
1247 static struct type
*
1248 m68hc11_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
1252 case HARD_PAGE_REGNUM
:
1255 case HARD_CCR_REGNUM
:
1256 return builtin_type (gdbarch
)->builtin_uint8
;
1258 case M68HC12_HARD_PC_REGNUM
:
1259 return builtin_type (gdbarch
)->builtin_uint32
;
1262 return builtin_type (gdbarch
)->builtin_uint16
;
1267 m68hc11_store_return_value (struct type
*type
, struct regcache
*regcache
,
1272 len
= TYPE_LENGTH (type
);
1274 /* First argument is passed in D and X registers. */
1276 regcache_raw_write_part (regcache
, HARD_D_REGNUM
, 2 - len
, len
, valbuf
);
1279 regcache_raw_write_part (regcache
, HARD_X_REGNUM
, 4 - len
,
1281 regcache_raw_write (regcache
, HARD_D_REGNUM
, (char*) valbuf
+ (len
- 2));
1284 error (_("return of value > 4 is not supported."));
1288 /* Given a return value in `regcache' with a type `type',
1289 extract and copy its value into `valbuf'. */
1292 m68hc11_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1295 int len
= TYPE_LENGTH (type
);
1296 char buf
[M68HC11_REG_SIZE
];
1298 regcache_raw_read (regcache
, HARD_D_REGNUM
, buf
);
1302 memcpy (valbuf
, buf
+ 1, 1);
1306 memcpy (valbuf
, buf
, 2);
1310 memcpy ((char*) valbuf
+ 1, buf
, 2);
1311 regcache_raw_read (regcache
, HARD_X_REGNUM
, buf
);
1312 memcpy (valbuf
, buf
+ 1, 1);
1316 memcpy ((char*) valbuf
+ 2, buf
, 2);
1317 regcache_raw_read (regcache
, HARD_X_REGNUM
, buf
);
1318 memcpy (valbuf
, buf
, 2);
1322 error (_("bad size for return value"));
1326 static enum return_value_convention
1327 m68hc11_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1328 struct type
*valtype
, struct regcache
*regcache
,
1329 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1331 if (TYPE_CODE (valtype
) == TYPE_CODE_STRUCT
1332 || TYPE_CODE (valtype
) == TYPE_CODE_UNION
1333 || TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1334 || TYPE_LENGTH (valtype
) > 4)
1335 return RETURN_VALUE_STRUCT_CONVENTION
;
1338 if (readbuf
!= NULL
)
1339 m68hc11_extract_return_value (valtype
, regcache
, readbuf
);
1340 if (writebuf
!= NULL
)
1341 m68hc11_store_return_value (valtype
, regcache
, writebuf
);
1342 return RETURN_VALUE_REGISTER_CONVENTION
;
1346 /* Test whether the ELF symbol corresponds to a function using rtc or
1350 m68hc11_elf_make_msymbol_special (asymbol
*sym
, struct minimal_symbol
*msym
)
1352 unsigned char flags
;
1354 flags
= ((elf_symbol_type
*)sym
)->internal_elf_sym
.st_other
;
1355 if (flags
& STO_M68HC12_FAR
)
1356 MSYMBOL_SET_RTC (msym
);
1357 if (flags
& STO_M68HC12_INTERRUPT
)
1358 MSYMBOL_SET_RTI (msym
);
1362 gdb_print_insn_m68hc11 (bfd_vma memaddr
, disassemble_info
*info
)
1364 if (info
->arch
== bfd_arch_m68hc11
)
1365 return print_insn_m68hc11 (memaddr
, info
);
1367 return print_insn_m68hc12 (memaddr
, info
);
1372 /* 68HC11/68HC12 register groups.
1373 Identify real hard registers and soft registers used by gcc. */
1375 static struct reggroup
*m68hc11_soft_reggroup
;
1376 static struct reggroup
*m68hc11_hard_reggroup
;
1379 m68hc11_init_reggroups (void)
1381 m68hc11_hard_reggroup
= reggroup_new ("hard", USER_REGGROUP
);
1382 m68hc11_soft_reggroup
= reggroup_new ("soft", USER_REGGROUP
);
1386 m68hc11_add_reggroups (struct gdbarch
*gdbarch
)
1388 reggroup_add (gdbarch
, m68hc11_hard_reggroup
);
1389 reggroup_add (gdbarch
, m68hc11_soft_reggroup
);
1390 reggroup_add (gdbarch
, general_reggroup
);
1391 reggroup_add (gdbarch
, float_reggroup
);
1392 reggroup_add (gdbarch
, all_reggroup
);
1393 reggroup_add (gdbarch
, save_reggroup
);
1394 reggroup_add (gdbarch
, restore_reggroup
);
1395 reggroup_add (gdbarch
, vector_reggroup
);
1396 reggroup_add (gdbarch
, system_reggroup
);
1400 m68hc11_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1401 struct reggroup
*group
)
1403 /* We must save the real hard register as well as gcc
1404 soft registers including the frame pointer. */
1405 if (group
== save_reggroup
|| group
== restore_reggroup
)
1407 return (regnum
<= gdbarch_num_regs (gdbarch
)
1408 || ((regnum
== SOFT_FP_REGNUM
1409 || regnum
== SOFT_TMP_REGNUM
1410 || regnum
== SOFT_ZS_REGNUM
1411 || regnum
== SOFT_XY_REGNUM
)
1412 && m68hc11_register_name (gdbarch
, regnum
)));
1415 /* Group to identify gcc soft registers (d1..dN). */
1416 if (group
== m68hc11_soft_reggroup
)
1418 return regnum
>= SOFT_D1_REGNUM
1419 && m68hc11_register_name (gdbarch
, regnum
);
1422 if (group
== m68hc11_hard_reggroup
)
1424 return regnum
== HARD_PC_REGNUM
|| regnum
== HARD_SP_REGNUM
1425 || regnum
== HARD_X_REGNUM
|| regnum
== HARD_D_REGNUM
1426 || regnum
== HARD_Y_REGNUM
|| regnum
== HARD_CCR_REGNUM
;
1428 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1431 static struct gdbarch
*
1432 m68hc11_gdbarch_init (struct gdbarch_info info
,
1433 struct gdbarch_list
*arches
)
1435 struct gdbarch
*gdbarch
;
1436 struct gdbarch_tdep
*tdep
;
1439 soft_reg_initialized
= 0;
1441 /* Extract the elf_flags if available. */
1442 if (info
.abfd
!= NULL
1443 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1444 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1448 /* Try to find a pre-existing architecture. */
1449 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1451 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1453 if (gdbarch_tdep (arches
->gdbarch
)->elf_flags
!= elf_flags
)
1456 return arches
->gdbarch
;
1459 /* Need a new architecture. Fill in a target specific vector. */
1460 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
1461 gdbarch
= gdbarch_alloc (&info
, tdep
);
1462 tdep
->elf_flags
= elf_flags
;
1464 switch (info
.bfd_arch_info
->arch
)
1466 case bfd_arch_m68hc11
:
1467 tdep
->stack_correction
= 1;
1468 tdep
->use_page_register
= 0;
1469 tdep
->prologue
= m6811_prologue
;
1470 set_gdbarch_addr_bit (gdbarch
, 16);
1471 set_gdbarch_num_pseudo_regs (gdbarch
, M68HC11_NUM_PSEUDO_REGS
);
1472 set_gdbarch_pc_regnum (gdbarch
, HARD_PC_REGNUM
);
1473 set_gdbarch_num_regs (gdbarch
, M68HC11_NUM_REGS
);
1476 case bfd_arch_m68hc12
:
1477 tdep
->stack_correction
= 0;
1478 tdep
->use_page_register
= elf_flags
& E_M68HC12_BANKS
;
1479 tdep
->prologue
= m6812_prologue
;
1480 set_gdbarch_addr_bit (gdbarch
, elf_flags
& E_M68HC12_BANKS
? 32 : 16);
1481 set_gdbarch_num_pseudo_regs (gdbarch
,
1482 elf_flags
& E_M68HC12_BANKS
1483 ? M68HC12_NUM_PSEUDO_REGS
1484 : M68HC11_NUM_PSEUDO_REGS
);
1485 set_gdbarch_pc_regnum (gdbarch
, elf_flags
& E_M68HC12_BANKS
1486 ? M68HC12_HARD_PC_REGNUM
: HARD_PC_REGNUM
);
1487 set_gdbarch_num_regs (gdbarch
, elf_flags
& E_M68HC12_BANKS
1488 ? M68HC12_NUM_REGS
: M68HC11_NUM_REGS
);
1495 /* Initially set everything according to the ABI.
1496 Use 16-bit integers since it will be the case for most
1497 programs. The size of these types should normally be set
1498 according to the dwarf2 debug information. */
1499 set_gdbarch_short_bit (gdbarch
, 16);
1500 set_gdbarch_int_bit (gdbarch
, elf_flags
& E_M68HC11_I32
? 32 : 16);
1501 set_gdbarch_float_bit (gdbarch
, 32);
1502 set_gdbarch_double_bit (gdbarch
, elf_flags
& E_M68HC11_F64
? 64 : 32);
1503 set_gdbarch_long_double_bit (gdbarch
, 64);
1504 set_gdbarch_long_bit (gdbarch
, 32);
1505 set_gdbarch_ptr_bit (gdbarch
, 16);
1506 set_gdbarch_long_long_bit (gdbarch
, 64);
1508 /* Characters are unsigned. */
1509 set_gdbarch_char_signed (gdbarch
, 0);
1511 set_gdbarch_unwind_pc (gdbarch
, m68hc11_unwind_pc
);
1512 set_gdbarch_unwind_sp (gdbarch
, m68hc11_unwind_sp
);
1514 /* Set register info. */
1515 set_gdbarch_fp0_regnum (gdbarch
, -1);
1517 set_gdbarch_sp_regnum (gdbarch
, HARD_SP_REGNUM
);
1518 set_gdbarch_register_name (gdbarch
, m68hc11_register_name
);
1519 set_gdbarch_register_type (gdbarch
, m68hc11_register_type
);
1520 set_gdbarch_pseudo_register_read (gdbarch
, m68hc11_pseudo_register_read
);
1521 set_gdbarch_pseudo_register_write (gdbarch
, m68hc11_pseudo_register_write
);
1523 set_gdbarch_push_dummy_call (gdbarch
, m68hc11_push_dummy_call
);
1525 set_gdbarch_return_value (gdbarch
, m68hc11_return_value
);
1526 set_gdbarch_skip_prologue (gdbarch
, m68hc11_skip_prologue
);
1527 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1528 set_gdbarch_breakpoint_from_pc (gdbarch
, m68hc11_breakpoint_from_pc
);
1529 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_m68hc11
);
1531 m68hc11_add_reggroups (gdbarch
);
1532 set_gdbarch_register_reggroup_p (gdbarch
, m68hc11_register_reggroup_p
);
1533 set_gdbarch_print_registers_info (gdbarch
, m68hc11_print_registers_info
);
1535 /* Hook in the DWARF CFI frame unwinder. */
1536 dwarf2_append_unwinders (gdbarch
);
1538 frame_unwind_append_unwinder (gdbarch
, &m68hc11_frame_unwind
);
1539 frame_base_set_default (gdbarch
, &m68hc11_frame_base
);
1541 /* Methods for saving / extracting a dummy frame's ID. The ID's
1542 stack address must match the SP value returned by
1543 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1544 set_gdbarch_dummy_id (gdbarch
, m68hc11_dummy_id
);
1546 /* Return the unwound PC value. */
1547 set_gdbarch_unwind_pc (gdbarch
, m68hc11_unwind_pc
);
1549 /* Minsymbol frobbing. */
1550 set_gdbarch_elf_make_msymbol_special (gdbarch
,
1551 m68hc11_elf_make_msymbol_special
);
1553 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
1558 /* -Wmissing-prototypes */
1559 extern initialize_file_ftype _initialize_m68hc11_tdep
;
1562 _initialize_m68hc11_tdep (void)
1564 register_gdbarch_init (bfd_arch_m68hc11
, m68hc11_gdbarch_init
);
1565 register_gdbarch_init (bfd_arch_m68hc12
, m68hc11_gdbarch_init
);
1566 m68hc11_init_reggroups ();