747db1bc2d5457295324b7f1be31f3dcdb39c99a
[deliverable/binutils-gdb.git] / gdb / m88k-tdep.c
1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "inferior.h"
23 #include "value.h"
24 #include "gdbcore.h"
25
26 #include "symtab.h"
27 #include "setjmp.h"
28 #include "value.h"
29
30 /* Size of an instruction */
31 #define BYTES_PER_88K_INSN 4
32
33 void frame_find_saved_regs ();
34
35 /* is this target an m88110? Otherwise assume m88100. This has
36 relevance for the ways in which we screw with instruction pointers. */
37 int target_is_m88110 = 0;
38
39 /* Given a GDB frame, determine the address of the calling function's frame.
40 This will be used to create a new GDB frame struct, and then
41 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
42
43 For us, the frame address is its stack pointer value, so we look up
44 the function prologue to determine the caller's sp value, and return it. */
45
46 FRAME_ADDR
47 frame_chain (thisframe)
48 FRAME thisframe;
49 {
50
51 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
52 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
53 the ADDRESS, of SP_REGNUM. It also depends on the cache of
54 frame_find_saved_regs results. */
55 if (thisframe->fsr->regs[SP_REGNUM])
56 return thisframe->fsr->regs[SP_REGNUM];
57 else
58 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
59 }
60
61 int
62 frameless_function_invocation (frame)
63 FRAME frame;
64 {
65
66 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
67 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
68 the ADDRESS, of SP_REGNUM. It also depends on the cache of
69 frame_find_saved_regs results. */
70 if (frame->fsr->regs[SP_REGNUM])
71 return 0; /* Frameful -- return addr saved somewhere */
72 else
73 return 1; /* Frameless -- no saved return address */
74 }
75
76 void
77 init_extra_frame_info (fromleaf, fi)
78 int fromleaf;
79 struct frame_info *fi;
80 {
81 fi->fsr = 0; /* Not yet allocated */
82 fi->args_pointer = 0; /* Unknown */
83 fi->locals_pointer = 0; /* Unknown */
84 }
85 \f
86 /* Examine an m88k function prologue, recording the addresses at which
87 registers are saved explicitly by the prologue code, and returning
88 the address of the first instruction after the prologue (but not
89 after the instruction at address LIMIT, as explained below).
90
91 LIMIT places an upper bound on addresses of the instructions to be
92 examined. If the prologue code scan reaches LIMIT, the scan is
93 aborted and LIMIT is returned. This is used, when examining the
94 prologue for the current frame, to keep examine_prologue () from
95 claiming that a given register has been saved when in fact the
96 instruction that saves it has not yet been executed. LIMIT is used
97 at other times to stop the scan when we hit code after the true
98 function prologue (e.g. for the first source line) which might
99 otherwise be mistaken for function prologue.
100
101 The format of the function prologue matched by this routine is
102 derived from examination of the source to gcc 1.95, particularly
103 the routine output_prologue () in config/out-m88k.c.
104
105 subu r31,r31,n # stack pointer update
106
107 (st rn,r31,offset)? # save incoming regs
108 (st.d rn,r31,offset)?
109
110 (addu r30,r31,n)? # frame pointer update
111
112 (pic sequence)? # PIC code prologue
113
114 (or rn,rm,0)? # Move parameters to other regs
115 */
116
117 /* Macros for extracting fields from instructions. */
118
119 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
120 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
121 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
122 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
123 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
124 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
125
126 /*
127 * prologue_insn_tbl is a table of instructions which may comprise a
128 * function prologue. Associated with each table entry (corresponding
129 * to a single instruction or group of instructions), is an action.
130 * This action is used by examine_prologue (below) to determine
131 * the state of certain machine registers and where the stack frame lives.
132 */
133
134 enum prologue_insn_action {
135 PIA_SKIP, /* don't care what the instruction does */
136 PIA_NOTE_ST, /* note register stored and where */
137 PIA_NOTE_STD, /* note pair of registers stored and where */
138 PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */
139 PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */
140 PIA_NOTE_PROLOGUE_END, /* no more prologue */
141 };
142
143 struct prologue_insns {
144 unsigned long insn;
145 unsigned long mask;
146 enum prologue_insn_action action;
147 };
148
149 struct prologue_insns prologue_insn_tbl[] = {
150 /* Various register move instructions */
151 { 0x58000000, 0xf800ffff, PIA_SKIP }, /* or/or.u with immed of 0 */
152 { 0xf4005800, 0xfc1fffe0, PIA_SKIP }, /* or rd, r0, rs */
153 { 0xf4005800, 0xfc00ffff, PIA_SKIP }, /* or rd, rs, r0 */
154
155 /* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */
156 { 0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT },
157
158 /* Frame pointer assignment: "addu r30, r31, n" */
159 { 0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT },
160
161 /* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */
162 { 0x241f0000, 0xfc1f0000, PIA_NOTE_ST }, /* st rx, sp, n */
163 { 0x201f0000, 0xfc1f0000, PIA_NOTE_STD }, /* st.d rs, sp, n */
164
165 /* Instructions needed for setting up r25 for pic code. */
166 { 0x5f200000, 0xffff0000, PIA_SKIP }, /* or.u r25, r0, offset_high */
167 { 0xcc000002, 0xffffffff, PIA_SKIP }, /* bsr.n Lab */
168 { 0x5b390000, 0xffff0000, PIA_SKIP }, /* or r25, r25, offset_low */
169 { 0xf7396001, 0xffffffff, PIA_SKIP }, /* Lab: addu r25, r25, r1 */
170
171 /* Various branch or jump instructions which have a delay slot -- these
172 do not form part of the prologue, but the instruction in the delay
173 slot might be a store instruction which should be noted. */
174 { 0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END },
175 /* br.n, bsr.n, bb0.n, or bb1.n */
176 { 0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END }, /* bcnd.n */
177 { 0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END } /* jmp.n or jsr.n */
178
179 };
180
181
182 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
183 is not the address of a valid instruction, the address of the next
184 instruction beyond ADDR otherwise. *PWORD1 receives the first word
185 of the instruction. */
186
187 #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \
188 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
189
190 /* Read the m88k instruction at 'memaddr' and return the address of
191 the next instruction after that, or 0 if 'memaddr' is not the
192 address of a valid instruction. The instruction
193 is stored at 'pword1'. */
194
195 CORE_ADDR
196 next_insn (memaddr, pword1)
197 unsigned long *pword1;
198 CORE_ADDR memaddr;
199 {
200 *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
201 return memaddr + BYTES_PER_88K_INSN;
202 }
203
204 /* Read a register from frames called by us (or from the hardware regs). */
205
206 static int
207 read_next_frame_reg(fi, regno)
208 FRAME fi;
209 int regno;
210 {
211 for (; fi; fi = fi->next) {
212 if (regno == SP_REGNUM) return fi->frame;
213 else if (fi->fsr->regs[regno])
214 return read_memory_integer(fi->fsr->regs[regno], 4);
215 }
216 return read_register(regno);
217 }
218
219 /* Examine the prologue of a function. `ip' points to the first instruction.
220 `limit' is the limit of the prologue (e.g. the addr of the first
221 linenumber, or perhaps the program counter if we're stepping through).
222 `frame_sp' is the stack pointer value in use in this frame.
223 `fsr' is a pointer to a frame_saved_regs structure into which we put
224 info about the registers saved by this frame.
225 `fi' is a struct frame_info pointer; we fill in various fields in it
226 to reflect the offsets of the arg pointer and the locals pointer. */
227
228 static CORE_ADDR
229 examine_prologue (ip, limit, frame_sp, fsr, fi)
230 register CORE_ADDR ip;
231 register CORE_ADDR limit;
232 FRAME_ADDR frame_sp;
233 struct frame_saved_regs *fsr;
234 struct frame_info *fi;
235 {
236 register CORE_ADDR next_ip;
237 register int src;
238 unsigned int insn;
239 int size, offset;
240 char must_adjust[32]; /* If set, must adjust offsets in fsr */
241 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
242 int fp_offset = -1; /* -1 means not set */
243 CORE_ADDR frame_fp;
244 CORE_ADDR prologue_end = 0;
245
246 memset (must_adjust, '\0', sizeof (must_adjust));
247 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
248
249 while (next_ip)
250 {
251 struct prologue_insns *pip;
252
253 for (pip=prologue_insn_tbl; (insn & pip->mask) != pip->insn; )
254 if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl)
255 goto end_of_prologue_found; /* not a prologue insn */
256
257 switch (pip->action)
258 {
259 case PIA_NOTE_ST:
260 case PIA_NOTE_STD:
261 if (sp_offset != -1) {
262 src = ST_SRC (insn);
263 offset = ST_OFFSET (insn);
264 must_adjust[src] = 1;
265 fsr->regs[src++] = offset; /* Will be adjusted later */
266 if (pip->action == PIA_NOTE_STD && src < 32)
267 {
268 offset += 4;
269 must_adjust[src] = 1;
270 fsr->regs[src++] = offset;
271 }
272 }
273 else
274 goto end_of_prologue_found;
275 break;
276 case PIA_NOTE_SP_ADJUSTMENT:
277 if (sp_offset == -1)
278 sp_offset = -SUBU_OFFSET (insn);
279 else
280 goto end_of_prologue_found;
281 break;
282 case PIA_NOTE_FP_ASSIGNMENT:
283 if (fp_offset == -1)
284 fp_offset = ADDU_OFFSET (insn);
285 else
286 goto end_of_prologue_found;
287 break;
288 case PIA_NOTE_PROLOGUE_END:
289 if (!prologue_end)
290 prologue_end = ip;
291 break;
292 case PIA_SKIP:
293 default :
294 /* Do nothing */
295 break;
296 }
297
298 ip = next_ip;
299 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
300 }
301
302 end_of_prologue_found:
303
304 if (prologue_end)
305 ip = prologue_end;
306
307 /* We're done with the prologue. If we don't care about the stack
308 frame itself, just return. (Note that fsr->regs has been trashed,
309 but the one caller who calls with fi==0 passes a dummy there.) */
310
311 if (fi == 0)
312 return ip;
313
314 /*
315 OK, now we have:
316
317 sp_offset original (before any alloca calls) displacement of SP
318 (will be negative).
319
320 fp_offset displacement from original SP to the FP for this frame
321 or -1.
322
323 fsr->regs[0..31] displacement from original SP to the stack
324 location where reg[0..31] is stored.
325
326 must_adjust[0..31] set if corresponding offset was set.
327
328 If alloca has been called between the function prologue and the current
329 IP, then the current SP (frame_sp) will not be the original SP as set by
330 the function prologue. If the current SP is not the original SP, then the
331 compiler will have allocated an FP for this frame, fp_offset will be set,
332 and we can use it to calculate the original SP.
333
334 Then, we figure out where the arguments and locals are, and relocate the
335 offsets in fsr->regs to absolute addresses. */
336
337 if (fp_offset != -1) {
338 /* We have a frame pointer, so get it, and base our calc's on it. */
339 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM);
340 frame_sp = frame_fp - fp_offset;
341 } else {
342 /* We have no frame pointer, therefore frame_sp is still the same value
343 as set by prologue. But where is the frame itself? */
344 if (must_adjust[SRP_REGNUM]) {
345 /* Function header saved SRP (r1), the return address. Frame starts
346 4 bytes down from where it was saved. */
347 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
348 fi->locals_pointer = frame_fp;
349 } else {
350 /* Function header didn't save SRP (r1), so we are in a leaf fn or
351 are otherwise confused. */
352 frame_fp = -1;
353 }
354 }
355
356 /* The locals are relative to the FP (whether it exists as an allocated
357 register, or just as an assumed offset from the SP) */
358 fi->locals_pointer = frame_fp;
359
360 /* The arguments are just above the SP as it was before we adjusted it
361 on entry. */
362 fi->args_pointer = frame_sp - sp_offset;
363
364 /* Now that we know the SP value used by the prologue, we know where
365 it saved all the registers. */
366 for (src = 0; src < 32; src++)
367 if (must_adjust[src])
368 fsr->regs[src] += frame_sp;
369
370 /* The saved value of the SP is always known. */
371 /* (we hope...) */
372 if (fsr->regs[SP_REGNUM] != 0
373 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
374 fprintf_unfiltered(gdb_stderr, "Bad saved SP value %x != %x, offset %x!\n",
375 fsr->regs[SP_REGNUM],
376 frame_sp - sp_offset, sp_offset);
377
378 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
379
380 return (ip);
381 }
382
383 /* Given an ip value corresponding to the start of a function,
384 return the ip of the first instruction after the function
385 prologue. */
386
387 CORE_ADDR
388 skip_prologue (ip)
389 CORE_ADDR (ip);
390 {
391 struct frame_saved_regs saved_regs_dummy;
392 struct symtab_and_line sal;
393 CORE_ADDR limit;
394
395 sal = find_pc_line (ip, 0);
396 limit = (sal.end) ? sal.end : 0xffffffff;
397
398 return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
399 (struct frame_info *)0 ));
400 }
401
402 /* Put here the code to store, into a struct frame_saved_regs,
403 the addresses of the saved registers of frame described by FRAME_INFO.
404 This includes special registers such as pc and fp saved in special
405 ways in the stack frame. sp is even more special:
406 the address we return for it IS the sp for the next frame.
407
408 We cache the result of doing this in the frame_cache_obstack, since
409 it is fairly expensive. */
410
411 void
412 frame_find_saved_regs (fi, fsr)
413 struct frame_info *fi;
414 struct frame_saved_regs *fsr;
415 {
416 register struct frame_saved_regs *cache_fsr;
417 extern struct obstack frame_cache_obstack;
418 CORE_ADDR ip;
419 struct symtab_and_line sal;
420 CORE_ADDR limit;
421
422 if (!fi->fsr)
423 {
424 cache_fsr = (struct frame_saved_regs *)
425 obstack_alloc (&frame_cache_obstack,
426 sizeof (struct frame_saved_regs));
427 memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
428 fi->fsr = cache_fsr;
429
430 /* Find the start and end of the function prologue. If the PC
431 is in the function prologue, we only consider the part that
432 has executed already. In the case where the PC is not in
433 the function prologue, we set limit to two instructions beyond
434 where the prologue ends in case if any of the prologue instructions
435 were moved into a delay slot of a branch instruction. */
436
437 ip = get_pc_function_start (fi->pc);
438 sal = find_pc_line (ip, 0);
439 limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN
440 : fi->pc;
441
442 /* This will fill in fields in *fi as well as in cache_fsr. */
443 #ifdef SIGTRAMP_FRAME_FIXUP
444 if (fi->signal_handler_caller)
445 SIGTRAMP_FRAME_FIXUP(fi->frame);
446 #endif
447 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
448 #ifdef SIGTRAMP_SP_FIXUP
449 if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM])
450 SIGTRAMP_SP_FIXUP(fi->fsr->regs[SP_REGNUM]);
451 #endif
452 }
453
454 if (fsr)
455 *fsr = *fi->fsr;
456 }
457
458 /* Return the address of the locals block for the frame
459 described by FI. Returns 0 if the address is unknown.
460 NOTE! Frame locals are referred to by negative offsets from the
461 argument pointer, so this is the same as frame_args_address(). */
462
463 CORE_ADDR
464 frame_locals_address (fi)
465 struct frame_info *fi;
466 {
467 struct frame_saved_regs fsr;
468
469 if (fi->args_pointer) /* Cached value is likely there. */
470 return fi->args_pointer;
471
472 /* Nope, generate it. */
473
474 get_frame_saved_regs (fi, &fsr);
475
476 return fi->args_pointer;
477 }
478
479 /* Return the address of the argument block for the frame
480 described by FI. Returns 0 if the address is unknown. */
481
482 CORE_ADDR
483 frame_args_address (fi)
484 struct frame_info *fi;
485 {
486 struct frame_saved_regs fsr;
487
488 if (fi->args_pointer) /* Cached value is likely there. */
489 return fi->args_pointer;
490
491 /* Nope, generate it. */
492
493 get_frame_saved_regs (fi, &fsr);
494
495 return fi->args_pointer;
496 }
497
498 /* Return the saved PC from this frame.
499
500 If the frame has a memory copy of SRP_REGNUM, use that. If not,
501 just use the register SRP_REGNUM itself. */
502
503 CORE_ADDR
504 frame_saved_pc (frame)
505 FRAME frame;
506 {
507 return read_next_frame_reg(frame, SRP_REGNUM);
508 }
509
510
511 #define DUMMY_FRAME_SIZE 192
512
513 static void
514 write_word (sp, word)
515 CORE_ADDR sp;
516 unsigned LONGEST word;
517 {
518 register int len = REGISTER_SIZE;
519 char buffer[MAX_REGISTER_RAW_SIZE];
520
521 store_unsigned_integer (buffer, len, word);
522 write_memory (sp, buffer, len);
523 }
524
525 void
526 m88k_push_dummy_frame()
527 {
528 register CORE_ADDR sp = read_register (SP_REGNUM);
529 register int rn;
530 int offset;
531
532 sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */
533
534 for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset+=4)
535 write_word (sp+offset, read_register(rn));
536
537 write_word (sp+offset, read_register (SXIP_REGNUM));
538 offset += 4;
539
540 write_word (sp+offset, read_register (SNIP_REGNUM));
541 offset += 4;
542
543 write_word (sp+offset, read_register (SFIP_REGNUM));
544 offset += 4;
545
546 write_word (sp+offset, read_register (PSR_REGNUM));
547 offset += 4;
548
549 write_word (sp+offset, read_register (FPSR_REGNUM));
550 offset += 4;
551
552 write_word (sp+offset, read_register (FPCR_REGNUM));
553 offset += 4;
554
555 write_register (SP_REGNUM, sp);
556 write_register (ACTUAL_FP_REGNUM, sp);
557 }
558
559 void
560 pop_frame ()
561 {
562 register FRAME frame = get_current_frame ();
563 register CORE_ADDR fp;
564 register int regnum;
565 struct frame_saved_regs fsr;
566 struct frame_info *fi;
567
568 fi = get_frame_info (frame);
569 fp = fi -> frame;
570 get_frame_saved_regs (fi, &fsr);
571
572 if (PC_IN_CALL_DUMMY (read_pc(), read_register(SP_REGNUM), FRAME_FP(fi)))
573 {
574 /* FIXME: I think get_frame_saved_regs should be handling this so
575 that we can deal with the saved registers properly (e.g. frame
576 1 is a call dummy, the user types "frame 2" and then "print $ps"). */
577 register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM);
578 int offset;
579
580 for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset+=4)
581 (void) write_register (regnum, read_memory_integer (sp+offset, 4));
582
583 write_register (SXIP_REGNUM, read_memory_integer (sp+offset, 4));
584 offset += 4;
585
586 write_register (SNIP_REGNUM, read_memory_integer (sp+offset, 4));
587 offset += 4;
588
589 write_register (SFIP_REGNUM, read_memory_integer (sp+offset, 4));
590 offset += 4;
591
592 write_register (PSR_REGNUM, read_memory_integer (sp+offset, 4));
593 offset += 4;
594
595 write_register (FPSR_REGNUM, read_memory_integer (sp+offset, 4));
596 offset += 4;
597
598 write_register (FPCR_REGNUM, read_memory_integer (sp+offset, 4));
599 offset += 4;
600
601 }
602 else
603 {
604 for (regnum = FP_REGNUM ; regnum > 0 ; regnum--)
605 if (fsr.regs[regnum])
606 write_register (regnum,
607 read_memory_integer (fsr.regs[regnum], 4));
608 write_pc(frame_saved_pc(frame));
609 }
610 reinit_frame_cache ();
611 }
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