1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
26 #include <sys/types.h>
29 #include <sys/param.h>
34 #ifndef USER /* added to support BCS ptrace_user */
36 #define USER ptrace_user
38 #include <sys/ioctl.h>
48 void frame_find_saved_regs ();
51 /* Given a GDB frame, determine the address of the calling function's frame.
52 This will be used to create a new GDB frame struct, and then
53 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
55 For us, the frame address is its stack pointer value, so we look up
56 the function prologue to determine the caller's sp value, and return it. */
59 frame_chain (thisframe
)
63 frame_find_saved_regs (thisframe
, (struct frame_saved_regs
*) 0);
64 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
65 the ADDRESS, of SP_REGNUM. It also depends on the cache of
66 frame_find_saved_regs results. */
67 if (thisframe
->fsr
->regs
[SP_REGNUM
])
68 return thisframe
->fsr
->regs
[SP_REGNUM
];
70 return thisframe
->frame
; /* Leaf fn -- next frame up has same SP. */
74 frameless_function_invocation (frame
)
78 frame_find_saved_regs (frame
, (struct frame_saved_regs
*) 0);
79 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
80 the ADDRESS, of SP_REGNUM. It also depends on the cache of
81 frame_find_saved_regs results. */
82 if (frame
->fsr
->regs
[SP_REGNUM
])
83 return 0; /* Frameful -- return addr saved somewhere */
85 return 1; /* Frameless -- no saved return address */
89 frame_chain_valid (chain
, thisframe
)
91 struct frame_info
*thisframe
;
94 && outside_startup_file (FRAME_SAVED_PC (thisframe
)));
98 init_extra_frame_info (fromleaf
, fi
)
100 struct frame_info
*fi
;
102 fi
->fsr
= 0; /* Not yet allocated */
103 fi
->args_pointer
= 0; /* Unknown */
104 fi
->locals_pointer
= 0; /* Unknown */
107 /* Examine an m88k function prologue, recording the addresses at which
108 registers are saved explicitly by the prologue code, and returning
109 the address of the first instruction after the prologue (but not
110 after the instruction at address LIMIT, as explained below).
112 LIMIT places an upper bound on addresses of the instructions to be
113 examined. If the prologue code scan reaches LIMIT, the scan is
114 aborted and LIMIT is returned. This is used, when examining the
115 prologue for the current frame, to keep examine_prologue () from
116 claiming that a given register has been saved when in fact the
117 instruction that saves it has not yet been executed. LIMIT is used
118 at other times to stop the scan when we hit code after the true
119 function prologue (e.g. for the first source line) which might
120 otherwise be mistaken for function prologue.
122 The format of the function prologue matched by this routine is
123 derived from examination of the source to gcc 1.95, particularly
124 the routine output_prologue () in config/out-m88k.c.
126 subu r31,r31,n # stack pointer update
128 (st rn,r31,offset)? # save incoming regs
129 (st.d rn,r31,offset)?
131 (addu r30,r31,n)? # frame pointer update
133 (pic sequence)? # PIC code prologue
135 (or rn,rm,0)? # Move parameters to other regs
138 /* Macros for extracting fields from instructions. */
140 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
141 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
143 /* Prologue code that handles position-independent-code setup. */
145 struct pic_prologue_code
{
146 unsigned long insn
, mask
;
149 static struct pic_prologue_code pic_prologue_code
[] = {
150 /* FIXME -- until this is translated to hex, we won't match it... */
152 /* or r10,r1,0 (if not saved) */
154 /* or.u r25,r0,const */
155 /*LabN: or r25,r25,const2 */
157 /* or r1,r10,0 (if not saved) */
160 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
161 is not the address of a valid instruction, the address of the next
162 instruction beyond ADDR otherwise. *PWORD1 receives the first word
163 of the instruction. PWORD2 is ignored -- a remnant of the original
166 #define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
167 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
169 /* Read the m88k instruction at 'memaddr' and return the address of
170 the next instruction after that, or 0 if 'memaddr' is not the
171 address of a valid instruction. The instruction
172 is stored at 'pword1'. */
175 next_insn (memaddr
, pword1
)
176 unsigned long *pword1
;
179 unsigned long buf
[1];
181 read_memory (memaddr
, buf
, sizeof (buf
));
183 SWAP_TARGET_AND_HOST (pword1
, sizeof (long));
188 /* Read a register from frames called by us (or from the hardware regs). */
191 read_next_frame_reg(fi
, regno
)
195 for (; fi
; fi
= fi
->next
) {
196 if (regno
== SP_REGNUM
) return fi
->frame
;
197 else if (fi
->fsr
->regs
[regno
])
198 return read_memory_integer(fi
->fsr
->regs
[regno
], 4);
200 return read_register(regno
);
203 /* Examine the prologue of a function. `ip' points to the first instruction.
204 `limit' is the limit of the prologue (e.g. the addr of the first
205 linenumber, or perhaps the program counter if we're stepping through).
206 `frame_sp' is the stack pointer value in use in this frame.
207 `fsr' is a pointer to a frame_saved_regs structure into which we put
208 info about the registers saved by this frame.
209 `fi' is a struct frame_info pointer; we fill in various fields in it
210 to reflect the offsets of the arg pointer and the locals pointer. */
213 examine_prologue (ip
, limit
, frame_sp
, fsr
, fi
)
214 register CORE_ADDR ip
;
215 register CORE_ADDR limit
;
217 struct frame_saved_regs
*fsr
;
218 struct frame_info
*fi
;
220 register CORE_ADDR next_ip
;
222 register struct pic_prologue_code
*pcode
;
223 unsigned int insn1
, insn2
;
225 char must_adjust
[32]; /* If set, must adjust offsets in fsr */
226 int sp_offset
= -1; /* -1 means not set (valid must be mult of 8) */
227 int fp_offset
= -1; /* -1 means not set */
230 bzero (must_adjust
, sizeof (must_adjust
));
231 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
233 /* Accept move of incoming registers to other registers, using
234 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
235 We don't have to worry about walking into the first lines of code,
236 since the first line number will stop us (assuming we have symbols).
237 What we have actually seen is "or r10,r0,r12". */
239 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
240 #define OR_MOVE_MASK 0xF800FFFF
241 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
242 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
243 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
244 #define OR_REG_MOVE2_MASK 0xFC00FFFF
246 ((insn1
& OR_MOVE_MASK
) == OR_MOVE_INSN
||
247 (insn1
& OR_REG_MOVE1_MASK
) == OR_REG_MOVE1_INSN
||
248 (insn1
& OR_REG_MOVE2_MASK
) == OR_REG_MOVE2_INSN
252 /* We don't care what moves to where. The result of the moves
253 has already been reflected in what the compiler tells us is the
254 location of these parameters. */
256 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
259 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
261 #define SUBU_SP_INSN 0x67ff0000
262 #define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
263 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
265 ((insn1
& SUBU_SP_MASK
) == SUBU_SP_INSN
)) /* subu r31, r31, N */
267 sp_offset
= -SUBU_OFFSET (insn1
);
269 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
272 /* The function must start with a stack-pointer adjustment, or
273 we don't know WHAT'S going on... */
277 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
278 This may cause us to mistake the copying of a register
279 parameter to the frame for the saving of a callee-saved
280 register, but that can't be helped, since with the
281 "-fcall-saved" flag, any register can be made callee-saved.
282 This probably doesn't matter, since the ``saved'' caller's values of
283 non-callee-saved registers are not relevant anyway. */
285 #define STD_STACK_INSN 0x201f0000
286 #define STD_STACK_MASK 0xfc1f0000
287 #define ST_STACK_INSN 0x241f0000
288 #define ST_STACK_MASK 0xfc1f0000
289 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
290 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
294 if ((insn1
& ST_STACK_MASK
) == ST_STACK_INSN
)
296 else if ((insn1
& STD_STACK_MASK
) == STD_STACK_INSN
)
301 src
= ST_SRC (insn1
);
302 offset
= ST_OFFSET (insn1
);
305 must_adjust
[src
] = 1;
306 fsr
->regs
[src
++] = offset
; /* Will be adjusted later */
310 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
313 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
315 #define ADDU_FP_INSN 0x63df0000
316 #define ADDU_FP_MASK 0xffff0000
317 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
319 ((insn1
& ADDU_FP_MASK
) == ADDU_FP_INSN
)) /* addu r30, r31, N */
321 fp_offset
= ADDU_OFFSET (insn1
);
323 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
326 /* Accept the PIC prologue code if present. */
328 pcode
= pic_prologue_code
;
329 size
= sizeof (pic_prologue_code
) / sizeof (*pic_prologue_code
);
330 /* If return addr is saved, we don't use first or last insn of PICstuff. */
331 if (fsr
->regs
[SRP_REGNUM
]) {
336 while (size
-- && next_ip
&& (pcode
->insn
== (pcode
->mask
& insn1
)))
340 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
343 /* Accept moves of parameter registers to other registers, using
344 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
345 We don't have to worry about walking into the first lines of code,
346 since the first line number will stop us (assuming we have symbols).
347 What gcc actually seems to produce is "or rd,r0,rs". */
349 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
350 #define OR_MOVE_MASK 0xF800FFFF
351 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
352 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
353 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
354 #define OR_REG_MOVE2_MASK 0xFC00FFFF
356 ((insn1
& OR_MOVE_MASK
) == OR_MOVE_INSN
||
357 (insn1
& OR_REG_MOVE1_MASK
) == OR_REG_MOVE1_INSN
||
358 (insn1
& OR_REG_MOVE2_MASK
) == OR_REG_MOVE2_INSN
362 /* We don't care what moves to where. The result of the moves
363 has already been reflected in what the compiler tells us is the
364 location of these parameters. */
366 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
369 /* We're done with the prologue. If we don't care about the stack
370 frame itself, just return. (Note that fsr->regs has been trashed,
371 but the one caller who calls with fi==0 passes a dummy there.) */
377 sp_offset original negative displacement of SP
378 fp_offset positive displacement between new SP and new FP, or -1
379 fsr->regs[0..31] offset from original SP where reg is stored
380 must_adjust[0..31] set if corresp. offset was set
382 The current SP (frame_sp) might not be the original new SP as set
383 by the function prologue, if alloca has been called. This can
384 only occur if fp_offset is set, though (the compiler allocates an
385 FP when it sees alloca). In that case, we have the FP,
386 and can calculate the original new SP from the FP.
388 Then, we figure out where the arguments and locals are, and
389 relocate the offsets in fsr->regs to absolute addresses. */
391 if (fp_offset
!= -1) {
392 /* We have a frame pointer, so get it, and base our calc's on it. */
393 frame_fp
= (CORE_ADDR
) read_next_frame_reg (fi
->next
, FP_REGNUM
);
394 frame_sp
= frame_fp
- fp_offset
;
396 /* We have no frame pointer, therefore frame_sp is still the same value
397 as set by prologue. But where is the frame itself? */
398 if (must_adjust
[SRP_REGNUM
]) {
399 /* Function header saved SRP (r1), the return address. Frame starts
400 4 bytes down from where it was saved. */
401 frame_fp
= frame_sp
+ fsr
->regs
[SRP_REGNUM
] - 4;
402 fi
->locals_pointer
= frame_fp
;
404 /* Function header didn't save SRP (r1), so we are in a leaf fn or
405 are otherwise confused. */
410 /* The locals are relative to the FP (whether it exists as an allocated
411 register, or just as an assumed offset from the SP) */
412 fi
->locals_pointer
= frame_fp
;
414 /* The arguments are just above the SP as it was before we adjusted it
416 fi
->args_pointer
= frame_sp
- sp_offset
;
418 /* Now that we know the SP value used by the prologue, we know where
419 it saved all the registers. */
420 for (src
= 0; src
< 32; src
++)
421 if (must_adjust
[src
])
422 fsr
->regs
[src
] += frame_sp
;
424 /* The saved value of the SP is always known. */
426 if (fsr
->regs
[SP_REGNUM
] != 0
427 && fsr
->regs
[SP_REGNUM
] != frame_sp
- sp_offset
)
428 fprintf(stderr
, "Bad saved SP value %x != %x, offset %x!\n",
429 fsr
->regs
[SP_REGNUM
],
430 frame_sp
- sp_offset
, sp_offset
);
432 fsr
->regs
[SP_REGNUM
] = frame_sp
- sp_offset
;
437 /* Given an ip value corresponding to the start of a function,
438 return the ip of the first instruction after the function
445 struct frame_saved_regs saved_regs_dummy
;
446 struct symtab_and_line sal
;
449 sal
= find_pc_line (ip
, 0);
450 limit
= (sal
.end
) ? sal
.end
: 0xffffffff;
452 return (examine_prologue (ip
, limit
, (FRAME_ADDR
) 0, &saved_regs_dummy
,
453 (struct frame_info
*)0 ));
456 /* Put here the code to store, into a struct frame_saved_regs,
457 the addresses of the saved registers of frame described by FRAME_INFO.
458 This includes special registers such as pc and fp saved in special
459 ways in the stack frame. sp is even more special:
460 the address we return for it IS the sp for the next frame.
462 We cache the result of doing this in the frame_cache_obstack, since
463 it is fairly expensive. */
466 frame_find_saved_regs (fi
, fsr
)
467 struct frame_info
*fi
;
468 struct frame_saved_regs
*fsr
;
470 register CORE_ADDR next_addr
;
471 register CORE_ADDR
*saved_regs
;
473 register struct frame_saved_regs
*cache_fsr
;
474 extern struct obstack frame_cache_obstack
;
476 struct symtab_and_line sal
;
481 cache_fsr
= (struct frame_saved_regs
*)
482 obstack_alloc (&frame_cache_obstack
,
483 sizeof (struct frame_saved_regs
));
484 bzero (cache_fsr
, sizeof (struct frame_saved_regs
));
487 /* Find the start and end of the function prologue. If the PC
488 is in the function prologue, we only consider the part that
489 has executed already. */
491 ip
= get_pc_function_start (fi
->pc
);
492 sal
= find_pc_line (ip
, 0);
493 limit
= (sal
.end
&& sal
.end
< fi
->pc
) ? sal
.end
: fi
->pc
;
495 /* This will fill in fields in *fi as well as in cache_fsr. */
496 examine_prologue (ip
, limit
, fi
->frame
, cache_fsr
, fi
);
503 /* Return the address of the locals block for the frame
504 described by FI. Returns 0 if the address is unknown.
505 NOTE! Frame locals are referred to by negative offsets from the
506 argument pointer, so this is the same as frame_args_address(). */
509 frame_locals_address (fi
)
510 struct frame_info
*fi
;
512 register FRAME frame
;
513 struct frame_saved_regs fsr
;
516 if (fi
->args_pointer
) /* Cached value is likely there. */
517 return fi
->args_pointer
;
519 /* Nope, generate it. */
521 get_frame_saved_regs (fi
, &fsr
);
523 return fi
->args_pointer
;
526 /* Return the address of the argument block for the frame
527 described by FI. Returns 0 if the address is unknown. */
530 frame_args_address (fi
)
531 struct frame_info
*fi
;
533 register FRAME frame
;
534 struct frame_saved_regs fsr
;
537 if (fi
->args_pointer
) /* Cached value is likely there. */
538 return fi
->args_pointer
;
540 /* Nope, generate it. */
542 get_frame_saved_regs (fi
, &fsr
);
544 return fi
->args_pointer
;
547 /* Return the saved PC from this frame.
549 If the frame has a memory copy of SRP_REGNUM, use that. If not,
550 just use the register SRP_REGNUM itself. */
553 frame_saved_pc (frame
)
556 return read_next_frame_reg(frame
, SRP_REGNUM
);
560 #if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
562 #else /* Host and target byte order the same. */
563 #define SINGLE_EXP_BITS 8
564 #define DOUBLE_EXP_BITS 11
568 /* fp points to a single precision OR double precision
569 * floating point value; len is the number of bytes, either 4 or 8.
570 * Returns 1 iff fp points to a valid IEEE floating point number.
571 * Returns 0 if fp points to a denormalized number or a NaN
578 exponent
= exponent
<< 1 >> (32 - SINGLE_EXP_BITS
- 1);
579 return ((exponent
== -1) || (! exponent
&& *fp
));
584 exponent
= exponent
<< 1 >> (32 - DOUBLE_EXP_BITS
- 1);
585 return ((exponent
== -1) || (! exponent
&& *fp
* *(fp
+1)));
589 #endif /* Host and target byte order the same. */
592 pushed_size (prev_words
, v
)
596 switch (TYPE_CODE (VALUE_TYPE (v
)))
598 case TYPE_CODE_VOID
: /* Void type (values zero length) */
600 return 0; /* That was easy! */
602 case TYPE_CODE_PTR
: /* Pointer type */
603 case TYPE_CODE_ENUM
: /* Enumeration type */
604 case TYPE_CODE_INT
: /* Integer type */
605 case TYPE_CODE_REF
: /* C++ Reference types */
606 case TYPE_CODE_ARRAY
: /* Array type, lower bound zero */
610 case TYPE_CODE_FLT
: /* Floating type */
612 if (TYPE_LENGTH (VALUE_TYPE (v
)) == 4)
615 /* Assume that it must be a double. */
616 if (prev_words
& 1) /* at an odd-word boundary */
617 return 3; /* round to 8-byte boundary */
621 case TYPE_CODE_STRUCT
: /* C struct or Pascal record */
622 case TYPE_CODE_UNION
: /* C union or Pascal variant part */
624 return (((TYPE_LENGTH (VALUE_TYPE (v
)) + 3) / 4) * 4);
626 case TYPE_CODE_FUNC
: /* Function type */
627 case TYPE_CODE_SET
: /* Pascal sets */
628 case TYPE_CODE_RANGE
: /* Range (integers within bounds) */
629 case TYPE_CODE_PASCAL_ARRAY
: /* Array with explicit type of index */
630 case TYPE_CODE_MEMBER
: /* Member type */
631 case TYPE_CODE_METHOD
: /* Method type */
632 /* Don't know how to pass these yet. */
634 case TYPE_CODE_UNDEF
: /* Not used; catches errors */
641 store_parm_word (address
, val
)
645 write_memory (address
, &val
, 4);
649 store_parm (prev_words
, left_parm_addr
, v
)
650 unsigned int prev_words
;
651 CORE_ADDR left_parm_addr
;
654 CORE_ADDR start
= left_parm_addr
+ (prev_words
* 4);
655 int *val_addr
= (int *)VALUE_CONTENTS(v
);
657 switch (TYPE_CODE (VALUE_TYPE (v
)))
659 case TYPE_CODE_VOID
: /* Void type (values zero length) */
663 case TYPE_CODE_PTR
: /* Pointer type */
664 case TYPE_CODE_ENUM
: /* Enumeration type */
665 case TYPE_CODE_INT
: /* Integer type */
666 case TYPE_CODE_ARRAY
: /* Array type, lower bound zero */
667 case TYPE_CODE_REF
: /* C++ Reference types */
669 store_parm_word (start
, *val_addr
);
672 case TYPE_CODE_FLT
: /* Floating type */
674 if (TYPE_LENGTH (VALUE_TYPE (v
)) == 4)
676 store_parm_word (start
, *val_addr
);
681 store_parm_word (start
+ ((prev_words
& 1) * 4), val_addr
[0]);
682 store_parm_word (start
+ ((prev_words
& 1) * 4) + 4, val_addr
[1]);
683 return 2 + (prev_words
& 1);
686 case TYPE_CODE_STRUCT
: /* C struct or Pascal record */
687 case TYPE_CODE_UNION
: /* C union or Pascal variant part */
690 unsigned int words
= (((TYPE_LENGTH (VALUE_TYPE (v
)) + 3) / 4) * 4);
693 for (word
= 0; word
< words
; word
++)
694 store_parm_word (start
+ (word
* 4), val_addr
[word
]);
703 /* This routine sets up all of the parameter values needed to make a pseudo
704 call. The name "push_parameters" is a misnomer on some archs,
705 because (on the m88k) most parameters generally end up being passed in
706 registers rather than on the stack. In this routine however, we do
707 end up storing *all* parameter values onto the stack (even if we will
708 realize later that some of these stores were unnecessary). */
710 #define FIRST_PARM_REGNUM 2
713 push_parameters (return_type
, struct_conv
, nargs
, args
)
714 struct type
*return_type
;
720 unsigned int p_words
= 0;
721 CORE_ADDR left_parm_addr
;
723 /* Start out by creating a space for the return value (if need be). We
724 only need to do this if the return value is a struct or union. If we
725 do make a space for a struct or union return value, then we must also
726 arrange for the base address of that space to go into r12, which is the
727 standard place to pass the address of the return value area to the
728 callee. Note that only structs and unions are returned in this fashion.
729 Ints, enums, pointers, and floats are returned into r2. Doubles are
730 returned into the register pair {r2,r3}. Note also that the space
731 reserved for a struct or union return value only has to be word aligned
732 (not double-word) but it is double-word aligned here anyway (just in
733 case that becomes important someday). */
735 switch (TYPE_CODE (return_type
))
737 case TYPE_CODE_STRUCT
:
738 case TYPE_CODE_UNION
:
740 int return_bytes
= ((TYPE_LENGTH (return_type
) + 7) / 8) * 8;
743 rv_addr
= read_register (SP_REGNUM
) - return_bytes
;
745 write_register (SP_REGNUM
, rv_addr
); /* push space onto the stack */
746 write_register (SRA_REGNUM
, rv_addr
);/* set return value register */
750 /* Here we make a pre-pass on the whole parameter list to figure out exactly
751 how many words worth of stuff we are going to pass. */
753 for (p_words
= 0, parm_num
= 0; parm_num
< nargs
; parm_num
++)
754 p_words
+= pushed_size (p_words
, value_arg_coerce (args
[parm_num
]));
756 /* Now, check to see if we have to round up the number of parameter words
757 to get up to the next 8-bytes boundary. This may be necessary because
758 of the software convention to always keep the stack aligned on an 8-byte
762 p_words
++; /* round to 8-byte boundary */
764 /* Now figure out the absolute address of the leftmost parameter, and update
765 the stack pointer to point at that address. */
767 left_parm_addr
= read_register (SP_REGNUM
) - (p_words
* 4);
768 write_register (SP_REGNUM
, left_parm_addr
);
770 /* Now we can go through all of the parameters (in left-to-right order)
771 and write them to their parameter stack slots. Note that we are not
772 really "pushing" the parameter values. The stack space for these values
773 was already allocated above. Now we are just filling it up. */
775 for (p_words
= 0, parm_num
= 0; parm_num
< nargs
; parm_num
++)
777 store_parm (p_words
, left_parm_addr
, value_arg_coerce (args
[parm_num
]));
779 /* Now that we are all done storing the parameter values into the stack, we
780 must go back and load up the parameter registers with the values from the
781 corresponding stack slots. Note that in the two cases of (a) gaps in the
782 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
783 slots correcponding to structs or unions, the work we do here in loading
784 some parameter registers may be unnecessary, but who cares? */
786 for (p_words
= 0; p_words
< 8; p_words
++)
788 write_register (FIRST_PARM_REGNUM
+ p_words
,
789 read_memory_integer (left_parm_addr
+ (p_words
* 4), 4));
796 error ("Feature not implemented for the m88k yet.");
801 collect_returned_value (rval
, value_type
, struct_return
, nargs
, args
)
803 struct type
*value_type
;
808 char retbuf
[REGISTER_BYTES
];
810 bcopy (registers
, retbuf
, REGISTER_BYTES
);
811 *rval
= value_being_returned (value_type
, retbuf
, struct_return
);
816 /* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
817 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
818 is not a good place for it). Return the address at which the instruction
819 got stuffed, or zero if we were unable to stuff it anywhere. */
824 static char breakpoint_insn
[] = BREAKPOINT
;
825 extern CORE_ADDR text_end
; /* of inferior */
826 static char readback_buffer
[] = BREAKPOINT
;
829 /* With a little bit of luck, we can just stash the breakpoint instruction
830 in the word just beyond the end of normal text space. For systems on
831 which the hardware will not allow us to execute out of the stack segment,
832 we have to hope that we *are* at least allowed to effectively extend the
833 text segment by one word. If the actual end of user's the text segment
834 happens to fall right at a page boundary this trick may fail. Note that
835 we check for this by reading after writing, and comparing in order to
836 be sure that the write worked. */
838 write_memory (text_end
, &breakpoint_insn
, 4);
840 /* Fill the readback buffer with some garbage which is certain to be
841 unequal to the breakpoint insn. That way we can tell if the
842 following read doesn't actually succeed. */
844 for (i
= 0; i
< sizeof (readback_buffer
); i
++)
845 readback_buffer
[i
] = ~ readback_buffer
[i
]; /* Invert the bits */
847 /* Now check that the breakpoint insn was successfully installed. */
849 read_memory (text_end
, readback_buffer
, sizeof (readback_buffer
));
850 for (i
= 0; i
< sizeof (readback_buffer
); i
++)
851 if (readback_buffer
[i
] != breakpoint_insn
[i
])
852 return 0; /* Failed to install! */