1 /* Target-dependent code for the Motorola 88000 series.
3 Copyright (C) 2004-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
24 #include "frame-base.h"
25 #include "frame-unwind.h"
31 #include "trad-frame.h"
35 #include "m88k-tdep.h"
37 /* Fetch the instruction at PC. */
40 m88k_fetch_instruction (CORE_ADDR pc
, enum bfd_endian byte_order
)
42 return read_memory_unsigned_integer (pc
, 4, byte_order
);
45 /* Register information. */
47 /* Return the name of register REGNUM. */
50 m88k_register_name (struct gdbarch
*gdbarch
, int regnum
)
52 static char *register_names
[] =
54 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
55 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
56 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
57 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
58 "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip"
61 if (regnum
>= 0 && regnum
< ARRAY_SIZE (register_names
))
62 return register_names
[regnum
];
67 /* Return the GDB type object for the "standard" data type of data in
71 m88k_register_type (struct gdbarch
*gdbarch
, int regnum
)
73 /* SXIP, SNIP, SFIP and R1 contain code addresses. */
74 if ((regnum
>= M88K_SXIP_REGNUM
&& regnum
<= M88K_SFIP_REGNUM
)
75 || regnum
== M88K_R1_REGNUM
)
76 return builtin_type (gdbarch
)->builtin_func_ptr
;
78 /* R30 and R31 typically contains data addresses. */
79 if (regnum
== M88K_R30_REGNUM
|| regnum
== M88K_R31_REGNUM
)
80 return builtin_type (gdbarch
)->builtin_data_ptr
;
82 return builtin_type (gdbarch
)->builtin_int32
;
87 m88k_addr_bits_remove (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
89 /* All instructures are 4-byte aligned. The lower 2 bits of SXIP,
90 SNIP and SFIP are used for special purposes: bit 0 is the
91 exception bit and bit 1 is the valid bit. */
95 /* Use the program counter to determine the contents and size of a
96 breakpoint instruction. Return a pointer to a string of bytes that
97 encode a breakpoint instruction, store the length of the string in
98 *LEN and optionally adjust *PC to point to the correct memory
99 location for inserting the breakpoint. */
101 static const gdb_byte
*
102 m88k_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
105 static gdb_byte break_insn
[] = { 0xf0, 0x00, 0xd1, 0xff };
107 *len
= sizeof (break_insn
);
112 m88k_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
116 pc
= frame_unwind_register_unsigned (next_frame
, M88K_SXIP_REGNUM
);
117 return m88k_addr_bits_remove (gdbarch
, pc
);
121 m88k_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
123 /* According to the MC88100 RISC Microprocessor User's Manual,
126 "... can be made to return to a particular instruction by placing
127 a valid instruction address in the SNIP and the next sequential
128 instruction address in the SFIP (with V bits set and E bits
129 clear). The rte resumes execution at the instruction pointed to
130 by the SNIP, then the SFIP."
132 The E bit is the least significant bit (bit 0). The V (valid)
133 bit is bit 1. This is why we logical or 2 into the values we are
134 writing below. It turns out that SXIP plays no role when
135 returning from an exception so nothing special has to be done
136 with it. We could even (presumably) give it a totally bogus
139 regcache_cooked_write_unsigned (regcache
, M88K_SXIP_REGNUM
, pc
);
140 regcache_cooked_write_unsigned (regcache
, M88K_SNIP_REGNUM
, pc
| 2);
141 regcache_cooked_write_unsigned (regcache
, M88K_SFIP_REGNUM
, (pc
+ 4) | 2);
145 /* The functions on this page are intended to be used to classify
146 function arguments. */
148 /* Check whether TYPE is "Integral or Pointer". */
151 m88k_integral_or_pointer_p (const struct type
*type
)
153 switch (TYPE_CODE (type
))
159 case TYPE_CODE_RANGE
:
161 /* We have byte, half-word, word and extended-word/doubleword
163 int len
= TYPE_LENGTH (type
);
164 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
170 /* Allow only 32-bit pointers. */
171 return (TYPE_LENGTH (type
) == 4);
181 /* Check whether TYPE is "Floating". */
184 m88k_floating_p (const struct type
*type
)
186 switch (TYPE_CODE (type
))
190 int len
= TYPE_LENGTH (type
);
191 return (len
== 4 || len
== 8);
200 /* Check whether TYPE is "Structure or Union". */
203 m88k_structure_or_union_p (const struct type
*type
)
205 switch (TYPE_CODE (type
))
207 case TYPE_CODE_STRUCT
:
208 case TYPE_CODE_UNION
:
217 /* Check whether TYPE has 8-byte alignment. */
220 m88k_8_byte_align_p (struct type
*type
)
222 if (m88k_structure_or_union_p (type
))
226 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
228 struct type
*subtype
= check_typedef (TYPE_FIELD_TYPE (type
, i
));
230 if (m88k_8_byte_align_p (subtype
))
235 if (m88k_integral_or_pointer_p (type
) || m88k_floating_p (type
))
236 return (TYPE_LENGTH (type
) == 8);
241 /* Check whether TYPE can be passed in a register. */
244 m88k_in_register_p (struct type
*type
)
246 if (m88k_integral_or_pointer_p (type
) || m88k_floating_p (type
))
249 if (m88k_structure_or_union_p (type
) && TYPE_LENGTH (type
) == 4)
256 m88k_store_arguments (struct regcache
*regcache
, int nargs
,
257 struct value
**args
, CORE_ADDR sp
)
259 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
260 int num_register_words
= 0;
261 int num_stack_words
= 0;
264 for (i
= 0; i
< nargs
; i
++)
266 struct type
*type
= value_type (args
[i
]);
267 int len
= TYPE_LENGTH (type
);
269 if (m88k_integral_or_pointer_p (type
) && len
< 4)
271 args
[i
] = value_cast (builtin_type (gdbarch
)->builtin_int32
,
273 type
= value_type (args
[i
]);
274 len
= TYPE_LENGTH (type
);
277 if (m88k_in_register_p (type
))
281 if (num_register_words
% 2 == 1 && m88k_8_byte_align_p (type
))
284 num_words
+= ((len
+ 3) / 4);
285 if (num_register_words
+ num_words
<= 8)
287 num_register_words
+= num_words
;
291 /* We've run out of available registers. Pass the argument
295 if (num_stack_words
% 2 == 1 && m88k_8_byte_align_p (type
))
298 num_stack_words
+= ((len
+ 3) / 4);
301 /* Allocate stack space. */
302 sp
= align_down (sp
- 32 - num_stack_words
* 4, 16);
303 num_stack_words
= num_register_words
= 0;
305 for (i
= 0; i
< nargs
; i
++)
307 const bfd_byte
*valbuf
= value_contents (args
[i
]);
308 struct type
*type
= value_type (args
[i
]);
309 int len
= TYPE_LENGTH (type
);
310 int stack_word
= num_stack_words
;
312 if (m88k_in_register_p (type
))
314 int register_word
= num_register_words
;
316 if (register_word
% 2 == 1 && m88k_8_byte_align_p (type
))
319 gdb_assert (len
== 4 || len
== 8);
321 if (register_word
+ len
/ 8 < 8)
323 int regnum
= M88K_R2_REGNUM
+ register_word
;
325 regcache_raw_write (regcache
, regnum
, valbuf
);
327 regcache_raw_write (regcache
, regnum
+ 1, valbuf
+ 4);
329 num_register_words
= (register_word
+ len
/ 4);
334 if (stack_word
% 2 == -1 && m88k_8_byte_align_p (type
))
337 write_memory (sp
+ stack_word
* 4, valbuf
, len
);
338 num_stack_words
= (stack_word
+ (len
+ 3) / 4);
345 m88k_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
346 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
347 struct value
**args
, CORE_ADDR sp
, int struct_return
,
348 CORE_ADDR struct_addr
)
350 /* Set up the function arguments. */
351 sp
= m88k_store_arguments (regcache
, nargs
, args
, sp
);
352 gdb_assert (sp
% 16 == 0);
354 /* Store return value address. */
356 regcache_raw_write_unsigned (regcache
, M88K_R12_REGNUM
, struct_addr
);
358 /* Store the stack pointer and return address in the appropriate
360 regcache_raw_write_unsigned (regcache
, M88K_R31_REGNUM
, sp
);
361 regcache_raw_write_unsigned (regcache
, M88K_R1_REGNUM
, bp_addr
);
363 /* Return the stack pointer. */
367 static struct frame_id
368 m88k_dummy_id (struct gdbarch
*arch
, struct frame_info
*this_frame
)
372 sp
= get_frame_register_unsigned (this_frame
, M88K_R31_REGNUM
);
373 return frame_id_build (sp
, get_frame_pc (this_frame
));
377 /* Determine, for architecture GDBARCH, how a return value of TYPE
378 should be returned. If it is supposed to be returned in registers,
379 and READBUF is non-zero, read the appropriate value from REGCACHE,
380 and copy it into READBUF. If WRITEBUF is non-zero, write the value
381 from WRITEBUF into REGCACHE. */
383 static enum return_value_convention
384 m88k_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
385 struct type
*type
, struct regcache
*regcache
,
386 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
388 int len
= TYPE_LENGTH (type
);
391 if (!m88k_integral_or_pointer_p (type
) && !m88k_floating_p (type
))
392 return RETURN_VALUE_STRUCT_CONVENTION
;
396 /* Read the contents of R2 and (if necessary) R3. */
397 regcache_cooked_read (regcache
, M88K_R2_REGNUM
, buf
);
400 regcache_cooked_read (regcache
, M88K_R3_REGNUM
, buf
+ 4);
401 gdb_assert (len
== 8);
402 memcpy (readbuf
, buf
, len
);
406 /* Just stripping off any unused bytes should preserve the
407 signed-ness just fine. */
408 memcpy (readbuf
, buf
+ 4 - len
, len
);
414 /* Read the contents to R2 and (if necessary) R3. */
417 gdb_assert (len
== 8);
418 memcpy (buf
, writebuf
, 8);
419 regcache_cooked_write (regcache
, M88K_R3_REGNUM
, buf
+ 4);
423 /* ??? Do we need to do any sign-extension here? */
424 memcpy (buf
+ 4 - len
, writebuf
, len
);
426 regcache_cooked_write (regcache
, M88K_R2_REGNUM
, buf
);
429 return RETURN_VALUE_REGISTER_CONVENTION
;
432 /* Default frame unwinder. */
434 struct m88k_frame_cache
443 /* Table of saved registers. */
444 struct trad_frame_saved_reg
*saved_regs
;
447 /* Prologue analysis. */
449 /* Macros for extracting fields from instructions. */
451 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
452 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
453 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
454 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
455 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
456 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
458 /* Possible actions to be taken by the prologue analyzer for the
459 instructions it encounters. */
461 enum m88k_prologue_insn_action
463 M88K_PIA_SKIP
, /* Ignore. */
464 M88K_PIA_NOTE_ST
, /* Note register store. */
465 M88K_PIA_NOTE_STD
, /* Note register pair store. */
466 M88K_PIA_NOTE_SP_ADJUSTMENT
, /* Note stack pointer adjustment. */
467 M88K_PIA_NOTE_FP_ASSIGNMENT
, /* Note frame pointer assignment. */
468 M88K_PIA_NOTE_BRANCH
, /* Note branch. */
469 M88K_PIA_NOTE_PROLOGUE_END
/* Note end of prologue. */
472 /* Table of instructions that may comprise a function prologue. */
474 struct m88k_prologue_insn
478 enum m88k_prologue_insn_action action
;
481 struct m88k_prologue_insn m88k_prologue_insn_table
[] =
483 /* Various register move instructions. */
484 { 0x58000000, 0xf800ffff, M88K_PIA_SKIP
}, /* or/or.u with immed of 0 */
485 { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP
}, /* or rd,r0,rs */
486 { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP
}, /* or rd,rs,r0 */
488 /* Various other instructions. */
489 { 0x58000000, 0xf8000000, M88K_PIA_SKIP
}, /* or/or.u */
491 /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */
492 { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT
},
494 /* Frame pointer assignment: "addu r30,r31,n". */
495 { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT
},
497 /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */
498 { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST
}, /* st rx,sp,n */
499 { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD
}, /* st.d rs,sp,n */
501 /* Instructions needed for setting up r25 for pic code. */
502 { 0x5f200000, 0xffff0000, M88K_PIA_SKIP
}, /* or.u r25,r0,offset_high */
503 { 0xcc000002, 0xffffffff, M88K_PIA_SKIP
}, /* bsr.n Lab */
504 { 0x5b390000, 0xffff0000, M88K_PIA_SKIP
}, /* or r25,r25,offset_low */
505 { 0xf7396001, 0xffffffff, M88K_PIA_SKIP
}, /* Lab: addu r25,r25,r1 */
507 /* Various branch or jump instructions which have a delay slot --
508 these do not form part of the prologue, but the instruction in
509 the delay slot might be a store instruction which should be
511 { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH
},
512 /* br.n, bsr.n, bb0.n, or bb1.n */
513 { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH
}, /* bcnd.n */
514 { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH
}, /* jmp.n or jsr.n */
516 /* Catch all. Ends prologue analysis. */
517 { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END
}
520 /* Do a full analysis of the function prologue at PC and update CACHE
521 accordingly. Bail out early if LIMIT is reached. Return the
522 address where the analysis stopped. If LIMIT points beyond the
523 function prologue, the return address should be the end of the
527 m88k_analyze_prologue (struct gdbarch
*gdbarch
,
528 CORE_ADDR pc
, CORE_ADDR limit
,
529 struct m88k_frame_cache
*cache
)
531 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
532 CORE_ADDR end
= limit
;
534 /* Provide a dummy cache if necessary. */
537 cache
= XALLOCA (struct m88k_frame_cache
);
539 XALLOCAVEC (struct trad_frame_saved_reg
, M88K_R31_REGNUM
+ 1);
541 /* We only initialize the members we care about. */
542 cache
->saved_regs
[M88K_R1_REGNUM
].addr
= -1;
543 cache
->fp_offset
= -1;
548 struct m88k_prologue_insn
*pi
= m88k_prologue_insn_table
;
549 unsigned long insn
= m88k_fetch_instruction (pc
, byte_order
);
551 while ((insn
& pi
->mask
) != pi
->insn
)
557 /* If we have a frame pointer, and R1 has been saved,
558 consider this instruction as not being part of the
560 if (cache
->fp_offset
!= -1
561 && cache
->saved_regs
[M88K_R1_REGNUM
].addr
!= -1)
562 return std::min (pc
, end
);
565 case M88K_PIA_NOTE_ST
:
566 case M88K_PIA_NOTE_STD
:
567 /* If no frame has been allocated, the stores aren't part of
569 if (cache
->sp_offset
== 0)
570 return std::min (pc
, end
);
572 /* Record location of saved registers. */
574 int regnum
= ST_SRC (insn
) + M88K_R0_REGNUM
;
575 ULONGEST offset
= ST_OFFSET (insn
);
577 cache
->saved_regs
[regnum
].addr
= offset
;
578 if (pi
->action
== M88K_PIA_NOTE_STD
&& regnum
< M88K_R31_REGNUM
)
579 cache
->saved_regs
[regnum
+ 1].addr
= offset
+ 4;
583 case M88K_PIA_NOTE_SP_ADJUSTMENT
:
584 /* A second stack pointer adjustment isn't part of the
586 if (cache
->sp_offset
!= 0)
587 return std::min (pc
, end
);
589 /* Store stack pointer adjustment. */
590 cache
->sp_offset
= -SUBU_OFFSET (insn
);
593 case M88K_PIA_NOTE_FP_ASSIGNMENT
:
594 /* A second frame pointer assignment isn't part of the
596 if (cache
->fp_offset
!= -1)
597 return std::min (pc
, end
);
599 /* Record frame pointer assignment. */
600 cache
->fp_offset
= ADDU_OFFSET (insn
);
603 case M88K_PIA_NOTE_BRANCH
:
604 /* The branch instruction isn't part of the prologue, but
605 the instruction in the delay slot might be. Limit the
606 prologue analysis to the delay slot and record the branch
607 instruction as the end of the prologue. */
608 limit
= std::min (limit
, pc
+ 2 * M88K_INSN_SIZE
);
612 case M88K_PIA_NOTE_PROLOGUE_END
:
613 return std::min (pc
, end
);
616 pc
+= M88K_INSN_SIZE
;
622 /* An upper limit to the size of the prologue. */
623 const int m88k_max_prologue_size
= 128 * M88K_INSN_SIZE
;
625 /* Return the address of first real instruction of the function
629 m88k_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
631 struct symtab_and_line sal
;
632 CORE_ADDR func_start
, func_end
;
634 /* This is the preferred method, find the end of the prologue by
635 using the debugging information. */
636 if (find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
638 sal
= find_pc_line (func_start
, 0);
640 if (sal
.end
< func_end
&& pc
<= sal
.end
)
644 return m88k_analyze_prologue (gdbarch
, pc
, pc
+ m88k_max_prologue_size
,
648 static struct m88k_frame_cache
*
649 m88k_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
651 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
652 struct m88k_frame_cache
*cache
;
656 return (struct m88k_frame_cache
*) *this_cache
;
658 cache
= FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache
);
659 cache
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
660 cache
->fp_offset
= -1;
662 cache
->pc
= get_frame_func (this_frame
);
664 m88k_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
667 /* Calculate the stack pointer used in the prologue. */
668 if (cache
->fp_offset
!= -1)
672 fp
= get_frame_register_unsigned (this_frame
, M88K_R30_REGNUM
);
673 frame_sp
= fp
- cache
->fp_offset
;
677 /* If we know where the return address is saved, we can take a
678 solid guess at what the frame pointer should be. */
679 if (cache
->saved_regs
[M88K_R1_REGNUM
].addr
!= -1)
680 cache
->fp_offset
= cache
->saved_regs
[M88K_R1_REGNUM
].addr
- 4;
681 frame_sp
= get_frame_register_unsigned (this_frame
, M88K_R31_REGNUM
);
684 /* Now that we know the stack pointer, adjust the location of the
689 for (regnum
= M88K_R0_REGNUM
; regnum
< M88K_R31_REGNUM
; regnum
++)
690 if (cache
->saved_regs
[regnum
].addr
!= -1)
691 cache
->saved_regs
[regnum
].addr
+= frame_sp
;
694 /* Calculate the frame's base. */
695 cache
->base
= frame_sp
- cache
->sp_offset
;
696 trad_frame_set_value (cache
->saved_regs
, M88K_R31_REGNUM
, cache
->base
);
698 /* Identify SXIP with the return address in R1. */
699 cache
->saved_regs
[M88K_SXIP_REGNUM
] = cache
->saved_regs
[M88K_R1_REGNUM
];
706 m88k_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
707 struct frame_id
*this_id
)
709 struct m88k_frame_cache
*cache
= m88k_frame_cache (this_frame
, this_cache
);
711 /* This marks the outermost frame. */
712 if (cache
->base
== 0)
715 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
718 static struct value
*
719 m88k_frame_prev_register (struct frame_info
*this_frame
,
720 void **this_cache
, int regnum
)
722 struct m88k_frame_cache
*cache
= m88k_frame_cache (this_frame
, this_cache
);
724 if (regnum
== M88K_SNIP_REGNUM
|| regnum
== M88K_SFIP_REGNUM
)
729 value
= trad_frame_get_prev_register (this_frame
, cache
->saved_regs
,
731 pc
= value_as_long (value
);
732 release_value (value
);
735 if (regnum
== M88K_SFIP_REGNUM
)
738 return frame_unwind_got_constant (this_frame
, regnum
, pc
+ 4);
741 return trad_frame_get_prev_register (this_frame
, cache
->saved_regs
, regnum
);
744 static const struct frame_unwind m88k_frame_unwind
=
747 default_frame_unwind_stop_reason
,
749 m88k_frame_prev_register
,
751 default_frame_sniffer
756 m88k_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
758 struct m88k_frame_cache
*cache
= m88k_frame_cache (this_frame
, this_cache
);
760 if (cache
->fp_offset
!= -1)
761 return cache
->base
+ cache
->sp_offset
+ cache
->fp_offset
;
766 static const struct frame_base m88k_frame_base
=
769 m88k_frame_base_address
,
770 m88k_frame_base_address
,
771 m88k_frame_base_address
775 /* Core file support. */
777 /* Supply register REGNUM from the buffer specified by GREGS and LEN
778 in the general-purpose register set REGSET to register cache
779 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
782 m88k_supply_gregset (const struct regset
*regset
,
783 struct regcache
*regcache
,
784 int regnum
, const void *gregs
, size_t len
)
786 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
789 for (i
= 0; i
< M88K_NUM_REGS
; i
++)
791 if (regnum
== i
|| regnum
== -1)
792 regcache_raw_supply (regcache
, i
, regs
+ i
* 4);
796 /* Motorola 88000 register set. */
798 static const struct regset m88k_gregset
=
804 /* Iterate over supported core file register note sections. */
807 m88k_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
808 iterate_over_regset_sections_cb
*cb
,
810 const struct regcache
*regcache
)
812 cb (".reg", M88K_NUM_REGS
* 4, &m88k_gregset
, NULL
, cb_data
);
816 static struct gdbarch
*
817 m88k_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
819 struct gdbarch
*gdbarch
;
821 /* If there is already a candidate, use it. */
822 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
824 return arches
->gdbarch
;
826 /* Allocate space for the new architecture. */
827 gdbarch
= gdbarch_alloc (&info
, NULL
);
829 /* There is no real `long double'. */
830 set_gdbarch_long_double_bit (gdbarch
, 64);
831 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
833 set_gdbarch_num_regs (gdbarch
, M88K_NUM_REGS
);
834 set_gdbarch_register_name (gdbarch
, m88k_register_name
);
835 set_gdbarch_register_type (gdbarch
, m88k_register_type
);
837 /* Register numbers of various important registers. */
838 set_gdbarch_sp_regnum (gdbarch
, M88K_R31_REGNUM
);
839 set_gdbarch_pc_regnum (gdbarch
, M88K_SXIP_REGNUM
);
841 /* Core file support. */
842 set_gdbarch_iterate_over_regset_sections
843 (gdbarch
, m88k_iterate_over_regset_sections
);
845 set_gdbarch_print_insn (gdbarch
, print_insn_m88k
);
847 set_gdbarch_skip_prologue (gdbarch
, m88k_skip_prologue
);
849 /* Stack grows downward. */
850 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
852 /* Call dummy code. */
853 set_gdbarch_push_dummy_call (gdbarch
, m88k_push_dummy_call
);
854 set_gdbarch_dummy_id (gdbarch
, m88k_dummy_id
);
856 /* Return value info. */
857 set_gdbarch_return_value (gdbarch
, m88k_return_value
);
859 set_gdbarch_addr_bits_remove (gdbarch
, m88k_addr_bits_remove
);
860 set_gdbarch_breakpoint_from_pc (gdbarch
, m88k_breakpoint_from_pc
);
861 set_gdbarch_unwind_pc (gdbarch
, m88k_unwind_pc
);
862 set_gdbarch_write_pc (gdbarch
, m88k_write_pc
);
864 frame_base_set_default (gdbarch
, &m88k_frame_base
);
865 frame_unwind_append_unwinder (gdbarch
, &m88k_frame_unwind
);
871 /* Provide a prototype to silence -Wmissing-prototypes. */
872 void _initialize_m88k_tdep (void);
875 _initialize_m88k_tdep (void)
877 gdbarch_register (bfd_arch_m88k
, m88k_gdbarch_init
, NULL
);