1 /* Target-dependent code for the Motorola 88000 series.
3 Copyright (C) 2004-2016 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
24 #include "frame-base.h"
25 #include "frame-unwind.h"
31 #include "trad-frame.h"
35 #include "m88k-tdep.h"
37 /* Fetch the instruction at PC. */
40 m88k_fetch_instruction (CORE_ADDR pc
, enum bfd_endian byte_order
)
42 return read_memory_unsigned_integer (pc
, 4, byte_order
);
45 /* Register information. */
47 /* Return the name of register REGNUM. */
50 m88k_register_name (struct gdbarch
*gdbarch
, int regnum
)
52 static char *register_names
[] =
54 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
55 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
56 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
57 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
58 "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip"
61 if (regnum
>= 0 && regnum
< ARRAY_SIZE (register_names
))
62 return register_names
[regnum
];
67 /* Return the GDB type object for the "standard" data type of data in
71 m88k_register_type (struct gdbarch
*gdbarch
, int regnum
)
73 /* SXIP, SNIP, SFIP and R1 contain code addresses. */
74 if ((regnum
>= M88K_SXIP_REGNUM
&& regnum
<= M88K_SFIP_REGNUM
)
75 || regnum
== M88K_R1_REGNUM
)
76 return builtin_type (gdbarch
)->builtin_func_ptr
;
78 /* R30 and R31 typically contains data addresses. */
79 if (regnum
== M88K_R30_REGNUM
|| regnum
== M88K_R31_REGNUM
)
80 return builtin_type (gdbarch
)->builtin_data_ptr
;
82 return builtin_type (gdbarch
)->builtin_int32
;
87 m88k_addr_bits_remove (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
89 /* All instructures are 4-byte aligned. The lower 2 bits of SXIP,
90 SNIP and SFIP are used for special purposes: bit 0 is the
91 exception bit and bit 1 is the valid bit. */
95 /* Use the program counter to determine the contents and size of a
96 breakpoint instruction. Return a pointer to a string of bytes that
97 encode a breakpoint instruction, store the length of the string in
98 *LEN and optionally adjust *PC to point to the correct memory
99 location for inserting the breakpoint. */
102 constexpr gdb_byte m88k_break_insn
[] = { 0xf0, 0x00, 0xd1, 0xff };
104 typedef BP_MANIPULATION (m88k_break_insn
) m88k_breakpoint
;
107 m88k_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
111 pc
= frame_unwind_register_unsigned (next_frame
, M88K_SXIP_REGNUM
);
112 return m88k_addr_bits_remove (gdbarch
, pc
);
116 m88k_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
118 /* According to the MC88100 RISC Microprocessor User's Manual,
121 "... can be made to return to a particular instruction by placing
122 a valid instruction address in the SNIP and the next sequential
123 instruction address in the SFIP (with V bits set and E bits
124 clear). The rte resumes execution at the instruction pointed to
125 by the SNIP, then the SFIP."
127 The E bit is the least significant bit (bit 0). The V (valid)
128 bit is bit 1. This is why we logical or 2 into the values we are
129 writing below. It turns out that SXIP plays no role when
130 returning from an exception so nothing special has to be done
131 with it. We could even (presumably) give it a totally bogus
134 regcache_cooked_write_unsigned (regcache
, M88K_SXIP_REGNUM
, pc
);
135 regcache_cooked_write_unsigned (regcache
, M88K_SNIP_REGNUM
, pc
| 2);
136 regcache_cooked_write_unsigned (regcache
, M88K_SFIP_REGNUM
, (pc
+ 4) | 2);
140 /* The functions on this page are intended to be used to classify
141 function arguments. */
143 /* Check whether TYPE is "Integral or Pointer". */
146 m88k_integral_or_pointer_p (const struct type
*type
)
148 switch (TYPE_CODE (type
))
154 case TYPE_CODE_RANGE
:
156 /* We have byte, half-word, word and extended-word/doubleword
158 int len
= TYPE_LENGTH (type
);
159 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
165 /* Allow only 32-bit pointers. */
166 return (TYPE_LENGTH (type
) == 4);
176 /* Check whether TYPE is "Floating". */
179 m88k_floating_p (const struct type
*type
)
181 switch (TYPE_CODE (type
))
185 int len
= TYPE_LENGTH (type
);
186 return (len
== 4 || len
== 8);
195 /* Check whether TYPE is "Structure or Union". */
198 m88k_structure_or_union_p (const struct type
*type
)
200 switch (TYPE_CODE (type
))
202 case TYPE_CODE_STRUCT
:
203 case TYPE_CODE_UNION
:
212 /* Check whether TYPE has 8-byte alignment. */
215 m88k_8_byte_align_p (struct type
*type
)
217 if (m88k_structure_or_union_p (type
))
221 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
223 struct type
*subtype
= check_typedef (TYPE_FIELD_TYPE (type
, i
));
225 if (m88k_8_byte_align_p (subtype
))
230 if (m88k_integral_or_pointer_p (type
) || m88k_floating_p (type
))
231 return (TYPE_LENGTH (type
) == 8);
236 /* Check whether TYPE can be passed in a register. */
239 m88k_in_register_p (struct type
*type
)
241 if (m88k_integral_or_pointer_p (type
) || m88k_floating_p (type
))
244 if (m88k_structure_or_union_p (type
) && TYPE_LENGTH (type
) == 4)
251 m88k_store_arguments (struct regcache
*regcache
, int nargs
,
252 struct value
**args
, CORE_ADDR sp
)
254 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
255 int num_register_words
= 0;
256 int num_stack_words
= 0;
259 for (i
= 0; i
< nargs
; i
++)
261 struct type
*type
= value_type (args
[i
]);
262 int len
= TYPE_LENGTH (type
);
264 if (m88k_integral_or_pointer_p (type
) && len
< 4)
266 args
[i
] = value_cast (builtin_type (gdbarch
)->builtin_int32
,
268 type
= value_type (args
[i
]);
269 len
= TYPE_LENGTH (type
);
272 if (m88k_in_register_p (type
))
276 if (num_register_words
% 2 == 1 && m88k_8_byte_align_p (type
))
279 num_words
+= ((len
+ 3) / 4);
280 if (num_register_words
+ num_words
<= 8)
282 num_register_words
+= num_words
;
286 /* We've run out of available registers. Pass the argument
290 if (num_stack_words
% 2 == 1 && m88k_8_byte_align_p (type
))
293 num_stack_words
+= ((len
+ 3) / 4);
296 /* Allocate stack space. */
297 sp
= align_down (sp
- 32 - num_stack_words
* 4, 16);
298 num_stack_words
= num_register_words
= 0;
300 for (i
= 0; i
< nargs
; i
++)
302 const bfd_byte
*valbuf
= value_contents (args
[i
]);
303 struct type
*type
= value_type (args
[i
]);
304 int len
= TYPE_LENGTH (type
);
305 int stack_word
= num_stack_words
;
307 if (m88k_in_register_p (type
))
309 int register_word
= num_register_words
;
311 if (register_word
% 2 == 1 && m88k_8_byte_align_p (type
))
314 gdb_assert (len
== 4 || len
== 8);
316 if (register_word
+ len
/ 8 < 8)
318 int regnum
= M88K_R2_REGNUM
+ register_word
;
320 regcache_raw_write (regcache
, regnum
, valbuf
);
322 regcache_raw_write (regcache
, regnum
+ 1, valbuf
+ 4);
324 num_register_words
= (register_word
+ len
/ 4);
329 if (stack_word
% 2 == -1 && m88k_8_byte_align_p (type
))
332 write_memory (sp
+ stack_word
* 4, valbuf
, len
);
333 num_stack_words
= (stack_word
+ (len
+ 3) / 4);
340 m88k_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
341 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
342 struct value
**args
, CORE_ADDR sp
, int struct_return
,
343 CORE_ADDR struct_addr
)
345 /* Set up the function arguments. */
346 sp
= m88k_store_arguments (regcache
, nargs
, args
, sp
);
347 gdb_assert (sp
% 16 == 0);
349 /* Store return value address. */
351 regcache_raw_write_unsigned (regcache
, M88K_R12_REGNUM
, struct_addr
);
353 /* Store the stack pointer and return address in the appropriate
355 regcache_raw_write_unsigned (regcache
, M88K_R31_REGNUM
, sp
);
356 regcache_raw_write_unsigned (regcache
, M88K_R1_REGNUM
, bp_addr
);
358 /* Return the stack pointer. */
362 static struct frame_id
363 m88k_dummy_id (struct gdbarch
*arch
, struct frame_info
*this_frame
)
367 sp
= get_frame_register_unsigned (this_frame
, M88K_R31_REGNUM
);
368 return frame_id_build (sp
, get_frame_pc (this_frame
));
372 /* Determine, for architecture GDBARCH, how a return value of TYPE
373 should be returned. If it is supposed to be returned in registers,
374 and READBUF is non-zero, read the appropriate value from REGCACHE,
375 and copy it into READBUF. If WRITEBUF is non-zero, write the value
376 from WRITEBUF into REGCACHE. */
378 static enum return_value_convention
379 m88k_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
380 struct type
*type
, struct regcache
*regcache
,
381 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
383 int len
= TYPE_LENGTH (type
);
386 if (!m88k_integral_or_pointer_p (type
) && !m88k_floating_p (type
))
387 return RETURN_VALUE_STRUCT_CONVENTION
;
391 /* Read the contents of R2 and (if necessary) R3. */
392 regcache_cooked_read (regcache
, M88K_R2_REGNUM
, buf
);
395 regcache_cooked_read (regcache
, M88K_R3_REGNUM
, buf
+ 4);
396 gdb_assert (len
== 8);
397 memcpy (readbuf
, buf
, len
);
401 /* Just stripping off any unused bytes should preserve the
402 signed-ness just fine. */
403 memcpy (readbuf
, buf
+ 4 - len
, len
);
409 /* Read the contents to R2 and (if necessary) R3. */
412 gdb_assert (len
== 8);
413 memcpy (buf
, writebuf
, 8);
414 regcache_cooked_write (regcache
, M88K_R3_REGNUM
, buf
+ 4);
418 /* ??? Do we need to do any sign-extension here? */
419 memcpy (buf
+ 4 - len
, writebuf
, len
);
421 regcache_cooked_write (regcache
, M88K_R2_REGNUM
, buf
);
424 return RETURN_VALUE_REGISTER_CONVENTION
;
427 /* Default frame unwinder. */
429 struct m88k_frame_cache
438 /* Table of saved registers. */
439 struct trad_frame_saved_reg
*saved_regs
;
442 /* Prologue analysis. */
444 /* Macros for extracting fields from instructions. */
446 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
447 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
448 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
449 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
450 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
451 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
453 /* Possible actions to be taken by the prologue analyzer for the
454 instructions it encounters. */
456 enum m88k_prologue_insn_action
458 M88K_PIA_SKIP
, /* Ignore. */
459 M88K_PIA_NOTE_ST
, /* Note register store. */
460 M88K_PIA_NOTE_STD
, /* Note register pair store. */
461 M88K_PIA_NOTE_SP_ADJUSTMENT
, /* Note stack pointer adjustment. */
462 M88K_PIA_NOTE_FP_ASSIGNMENT
, /* Note frame pointer assignment. */
463 M88K_PIA_NOTE_BRANCH
, /* Note branch. */
464 M88K_PIA_NOTE_PROLOGUE_END
/* Note end of prologue. */
467 /* Table of instructions that may comprise a function prologue. */
469 struct m88k_prologue_insn
473 enum m88k_prologue_insn_action action
;
476 struct m88k_prologue_insn m88k_prologue_insn_table
[] =
478 /* Various register move instructions. */
479 { 0x58000000, 0xf800ffff, M88K_PIA_SKIP
}, /* or/or.u with immed of 0 */
480 { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP
}, /* or rd,r0,rs */
481 { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP
}, /* or rd,rs,r0 */
483 /* Various other instructions. */
484 { 0x58000000, 0xf8000000, M88K_PIA_SKIP
}, /* or/or.u */
486 /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */
487 { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT
},
489 /* Frame pointer assignment: "addu r30,r31,n". */
490 { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT
},
492 /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */
493 { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST
}, /* st rx,sp,n */
494 { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD
}, /* st.d rs,sp,n */
496 /* Instructions needed for setting up r25 for pic code. */
497 { 0x5f200000, 0xffff0000, M88K_PIA_SKIP
}, /* or.u r25,r0,offset_high */
498 { 0xcc000002, 0xffffffff, M88K_PIA_SKIP
}, /* bsr.n Lab */
499 { 0x5b390000, 0xffff0000, M88K_PIA_SKIP
}, /* or r25,r25,offset_low */
500 { 0xf7396001, 0xffffffff, M88K_PIA_SKIP
}, /* Lab: addu r25,r25,r1 */
502 /* Various branch or jump instructions which have a delay slot --
503 these do not form part of the prologue, but the instruction in
504 the delay slot might be a store instruction which should be
506 { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH
},
507 /* br.n, bsr.n, bb0.n, or bb1.n */
508 { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH
}, /* bcnd.n */
509 { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH
}, /* jmp.n or jsr.n */
511 /* Catch all. Ends prologue analysis. */
512 { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END
}
515 /* Do a full analysis of the function prologue at PC and update CACHE
516 accordingly. Bail out early if LIMIT is reached. Return the
517 address where the analysis stopped. If LIMIT points beyond the
518 function prologue, the return address should be the end of the
522 m88k_analyze_prologue (struct gdbarch
*gdbarch
,
523 CORE_ADDR pc
, CORE_ADDR limit
,
524 struct m88k_frame_cache
*cache
)
526 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
527 CORE_ADDR end
= limit
;
529 /* Provide a dummy cache if necessary. */
532 cache
= XALLOCA (struct m88k_frame_cache
);
534 XALLOCAVEC (struct trad_frame_saved_reg
, M88K_R31_REGNUM
+ 1);
536 /* We only initialize the members we care about. */
537 cache
->saved_regs
[M88K_R1_REGNUM
].addr
= -1;
538 cache
->fp_offset
= -1;
543 struct m88k_prologue_insn
*pi
= m88k_prologue_insn_table
;
544 unsigned long insn
= m88k_fetch_instruction (pc
, byte_order
);
546 while ((insn
& pi
->mask
) != pi
->insn
)
552 /* If we have a frame pointer, and R1 has been saved,
553 consider this instruction as not being part of the
555 if (cache
->fp_offset
!= -1
556 && cache
->saved_regs
[M88K_R1_REGNUM
].addr
!= -1)
557 return std::min (pc
, end
);
560 case M88K_PIA_NOTE_ST
:
561 case M88K_PIA_NOTE_STD
:
562 /* If no frame has been allocated, the stores aren't part of
564 if (cache
->sp_offset
== 0)
565 return std::min (pc
, end
);
567 /* Record location of saved registers. */
569 int regnum
= ST_SRC (insn
) + M88K_R0_REGNUM
;
570 ULONGEST offset
= ST_OFFSET (insn
);
572 cache
->saved_regs
[regnum
].addr
= offset
;
573 if (pi
->action
== M88K_PIA_NOTE_STD
&& regnum
< M88K_R31_REGNUM
)
574 cache
->saved_regs
[regnum
+ 1].addr
= offset
+ 4;
578 case M88K_PIA_NOTE_SP_ADJUSTMENT
:
579 /* A second stack pointer adjustment isn't part of the
581 if (cache
->sp_offset
!= 0)
582 return std::min (pc
, end
);
584 /* Store stack pointer adjustment. */
585 cache
->sp_offset
= -SUBU_OFFSET (insn
);
588 case M88K_PIA_NOTE_FP_ASSIGNMENT
:
589 /* A second frame pointer assignment isn't part of the
591 if (cache
->fp_offset
!= -1)
592 return std::min (pc
, end
);
594 /* Record frame pointer assignment. */
595 cache
->fp_offset
= ADDU_OFFSET (insn
);
598 case M88K_PIA_NOTE_BRANCH
:
599 /* The branch instruction isn't part of the prologue, but
600 the instruction in the delay slot might be. Limit the
601 prologue analysis to the delay slot and record the branch
602 instruction as the end of the prologue. */
603 limit
= std::min (limit
, pc
+ 2 * M88K_INSN_SIZE
);
607 case M88K_PIA_NOTE_PROLOGUE_END
:
608 return std::min (pc
, end
);
611 pc
+= M88K_INSN_SIZE
;
617 /* An upper limit to the size of the prologue. */
618 const int m88k_max_prologue_size
= 128 * M88K_INSN_SIZE
;
620 /* Return the address of first real instruction of the function
624 m88k_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
626 struct symtab_and_line sal
;
627 CORE_ADDR func_start
, func_end
;
629 /* This is the preferred method, find the end of the prologue by
630 using the debugging information. */
631 if (find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
633 sal
= find_pc_line (func_start
, 0);
635 if (sal
.end
< func_end
&& pc
<= sal
.end
)
639 return m88k_analyze_prologue (gdbarch
, pc
, pc
+ m88k_max_prologue_size
,
643 static struct m88k_frame_cache
*
644 m88k_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
646 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
647 struct m88k_frame_cache
*cache
;
651 return (struct m88k_frame_cache
*) *this_cache
;
653 cache
= FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache
);
654 cache
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
655 cache
->fp_offset
= -1;
657 cache
->pc
= get_frame_func (this_frame
);
659 m88k_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
662 /* Calculate the stack pointer used in the prologue. */
663 if (cache
->fp_offset
!= -1)
667 fp
= get_frame_register_unsigned (this_frame
, M88K_R30_REGNUM
);
668 frame_sp
= fp
- cache
->fp_offset
;
672 /* If we know where the return address is saved, we can take a
673 solid guess at what the frame pointer should be. */
674 if (cache
->saved_regs
[M88K_R1_REGNUM
].addr
!= -1)
675 cache
->fp_offset
= cache
->saved_regs
[M88K_R1_REGNUM
].addr
- 4;
676 frame_sp
= get_frame_register_unsigned (this_frame
, M88K_R31_REGNUM
);
679 /* Now that we know the stack pointer, adjust the location of the
684 for (regnum
= M88K_R0_REGNUM
; regnum
< M88K_R31_REGNUM
; regnum
++)
685 if (cache
->saved_regs
[regnum
].addr
!= -1)
686 cache
->saved_regs
[regnum
].addr
+= frame_sp
;
689 /* Calculate the frame's base. */
690 cache
->base
= frame_sp
- cache
->sp_offset
;
691 trad_frame_set_value (cache
->saved_regs
, M88K_R31_REGNUM
, cache
->base
);
693 /* Identify SXIP with the return address in R1. */
694 cache
->saved_regs
[M88K_SXIP_REGNUM
] = cache
->saved_regs
[M88K_R1_REGNUM
];
701 m88k_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
702 struct frame_id
*this_id
)
704 struct m88k_frame_cache
*cache
= m88k_frame_cache (this_frame
, this_cache
);
706 /* This marks the outermost frame. */
707 if (cache
->base
== 0)
710 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
713 static struct value
*
714 m88k_frame_prev_register (struct frame_info
*this_frame
,
715 void **this_cache
, int regnum
)
717 struct m88k_frame_cache
*cache
= m88k_frame_cache (this_frame
, this_cache
);
719 if (regnum
== M88K_SNIP_REGNUM
|| regnum
== M88K_SFIP_REGNUM
)
724 value
= trad_frame_get_prev_register (this_frame
, cache
->saved_regs
,
726 pc
= value_as_long (value
);
727 release_value (value
);
730 if (regnum
== M88K_SFIP_REGNUM
)
733 return frame_unwind_got_constant (this_frame
, regnum
, pc
+ 4);
736 return trad_frame_get_prev_register (this_frame
, cache
->saved_regs
, regnum
);
739 static const struct frame_unwind m88k_frame_unwind
=
742 default_frame_unwind_stop_reason
,
744 m88k_frame_prev_register
,
746 default_frame_sniffer
751 m88k_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
753 struct m88k_frame_cache
*cache
= m88k_frame_cache (this_frame
, this_cache
);
755 if (cache
->fp_offset
!= -1)
756 return cache
->base
+ cache
->sp_offset
+ cache
->fp_offset
;
761 static const struct frame_base m88k_frame_base
=
764 m88k_frame_base_address
,
765 m88k_frame_base_address
,
766 m88k_frame_base_address
770 /* Core file support. */
772 /* Supply register REGNUM from the buffer specified by GREGS and LEN
773 in the general-purpose register set REGSET to register cache
774 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
777 m88k_supply_gregset (const struct regset
*regset
,
778 struct regcache
*regcache
,
779 int regnum
, const void *gregs
, size_t len
)
781 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
784 for (i
= 0; i
< M88K_NUM_REGS
; i
++)
786 if (regnum
== i
|| regnum
== -1)
787 regcache_raw_supply (regcache
, i
, regs
+ i
* 4);
791 /* Motorola 88000 register set. */
793 static const struct regset m88k_gregset
=
799 /* Iterate over supported core file register note sections. */
802 m88k_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
803 iterate_over_regset_sections_cb
*cb
,
805 const struct regcache
*regcache
)
807 cb (".reg", M88K_NUM_REGS
* 4, &m88k_gregset
, NULL
, cb_data
);
811 static struct gdbarch
*
812 m88k_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
814 struct gdbarch
*gdbarch
;
816 /* If there is already a candidate, use it. */
817 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
819 return arches
->gdbarch
;
821 /* Allocate space for the new architecture. */
822 gdbarch
= gdbarch_alloc (&info
, NULL
);
824 /* There is no real `long double'. */
825 set_gdbarch_long_double_bit (gdbarch
, 64);
826 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
828 set_gdbarch_num_regs (gdbarch
, M88K_NUM_REGS
);
829 set_gdbarch_register_name (gdbarch
, m88k_register_name
);
830 set_gdbarch_register_type (gdbarch
, m88k_register_type
);
832 /* Register numbers of various important registers. */
833 set_gdbarch_sp_regnum (gdbarch
, M88K_R31_REGNUM
);
834 set_gdbarch_pc_regnum (gdbarch
, M88K_SXIP_REGNUM
);
836 /* Core file support. */
837 set_gdbarch_iterate_over_regset_sections
838 (gdbarch
, m88k_iterate_over_regset_sections
);
840 set_gdbarch_print_insn (gdbarch
, print_insn_m88k
);
842 set_gdbarch_skip_prologue (gdbarch
, m88k_skip_prologue
);
844 /* Stack grows downward. */
845 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
847 /* Call dummy code. */
848 set_gdbarch_push_dummy_call (gdbarch
, m88k_push_dummy_call
);
849 set_gdbarch_dummy_id (gdbarch
, m88k_dummy_id
);
851 /* Return value info. */
852 set_gdbarch_return_value (gdbarch
, m88k_return_value
);
854 set_gdbarch_addr_bits_remove (gdbarch
, m88k_addr_bits_remove
);
855 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, m88k_breakpoint::kind_from_pc
);
856 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, m88k_breakpoint::bp_from_kind
);
857 set_gdbarch_unwind_pc (gdbarch
, m88k_unwind_pc
);
858 set_gdbarch_write_pc (gdbarch
, m88k_write_pc
);
860 frame_base_set_default (gdbarch
, &m88k_frame_base
);
861 frame_unwind_append_unwinder (gdbarch
, &m88k_frame_unwind
);
867 /* Provide a prototype to silence -Wmissing-prototypes. */
868 void _initialize_m88k_tdep (void);
871 _initialize_m88k_tdep (void)
873 gdbarch_register (bfd_arch_m88k
, m88k_gdbarch_init
, NULL
);