Rename 'descr' field in regset structure to 'regmap'.
[deliverable/binutils-gdb.git] / gdb / mips-irix-tdep.c
1 /* Target-dependent code for the MIPS architecture running on IRIX,
2 for GDB, the GNU Debugger.
3
4 Copyright (C) 2002-2014 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "osabi.h"
23 #include "solib.h"
24 #include "solib-irix.h"
25 #include "elf-bfd.h"
26 #include "mips-tdep.h"
27 #include "trad-frame.h"
28 #include "tramp-frame.h"
29
30 static void
31 mips_irix_elf_osabi_sniff_abi_tag_sections (bfd *abfd, asection *sect,
32 void *obj)
33 {
34 enum gdb_osabi *os_ident_ptr = obj;
35 const char *name;
36 unsigned int sectsize;
37
38 name = bfd_get_section_name (abfd, sect);
39 sectsize = bfd_section_size (abfd, sect);
40
41 if (strncmp (name, ".MIPS.", 6) == 0 && sectsize > 0)
42 {
43 /* The presence of a section named with a ".MIPS." prefix is
44 indicative of an IRIX binary. */
45 *os_ident_ptr = GDB_OSABI_IRIX;
46 }
47 }
48
49 static enum gdb_osabi
50 mips_irix_elf_osabi_sniffer (bfd *abfd)
51 {
52 unsigned int elfosabi;
53 enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
54
55 /* If the generic sniffer gets a hit, return and let other sniffers
56 get a crack at it. */
57 bfd_map_over_sections (abfd,
58 generic_elf_osabi_sniff_abi_tag_sections,
59 &osabi);
60 if (osabi != GDB_OSABI_UNKNOWN)
61 return GDB_OSABI_UNKNOWN;
62
63 elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
64
65 if (elfosabi == ELFOSABI_NONE)
66 {
67 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
68 file are conforming to the base specification for that machine
69 (there are no OS-specific extensions). In order to determine the
70 real OS in use we must look for OS notes that have been added.
71
72 For IRIX, we simply look for sections named with .MIPS. as
73 prefixes. */
74 bfd_map_over_sections (abfd,
75 mips_irix_elf_osabi_sniff_abi_tag_sections,
76 &osabi);
77 }
78 return osabi;
79 }
80
81 /* Unwinding past the signal handler on mips-irix.
82
83 Note: The following has only been tested with N32, but can probably
84 be made to work with a small number of adjustments.
85
86 On mips-irix, the sigcontext_t structure is stored at the base
87 of the frame established by the _sigtramp function. The definition
88 of this structure can be found in <sys/signal.h> (comments have been
89 C++'ified to avoid a collision with the C-style comment delimiters
90 used by this comment):
91
92 typedef struct sigcontext {
93 __uint32_t sc_regmask; // regs to restore in sigcleanup
94 __uint32_t sc_status; // cp0 status register
95 __uint64_t sc_pc; // pc at time of signal
96 // General purpose registers
97 __uint64_t sc_regs[32]; // processor regs 0 to 31
98 // Floating point coprocessor state
99 __uint64_t sc_fpregs[32]; // fp regs 0 to 31
100 __uint32_t sc_ownedfp; // fp has been used
101 __uint32_t sc_fpc_csr; // fpu control and status reg
102 __uint32_t sc_fpc_eir; // fpu exception instruction reg
103 // implementation/revision
104 __uint32_t sc_ssflags; // signal stack state to restore
105 __uint64_t sc_mdhi; // Multiplier hi and low regs
106 __uint64_t sc_mdlo;
107 // System coprocessor registers at time of signal
108 __uint64_t sc_cause; // cp0 cause register
109 __uint64_t sc_badvaddr; // cp0 bad virtual address
110 __uint64_t sc_triggersave; // state of graphics trigger (SGI)
111 sigset_t sc_sigset; // signal mask to restore
112 __uint64_t sc_fp_rounded_result; // for Ieee 754 support
113 __uint64_t sc_pad[31];
114 } sigcontext_t;
115
116 The following macros provide the offset of some of the fields
117 used to retrieve the value of the registers before the signal
118 was raised. */
119
120 /* The size of the sigtramp frame. The sigtramp frame base can then
121 be computed by adding this size to the SP. */
122 #define SIGTRAMP_FRAME_SIZE 48
123 /* The offset in sigcontext_t where the PC is saved. */
124 #define SIGCONTEXT_PC_OFF 8
125 /* The offset in sigcontext_t where the GP registers are saved. */
126 #define SIGCONTEXT_REGS_OFF (SIGCONTEXT_PC_OFF + 8)
127 /* The offset in sigcontext_t where the FP regsiters are saved. */
128 #define SIGCONTEXT_FPREGS_OFF (SIGCONTEXT_REGS_OFF + 32 * 8)
129 /* The offset in sigcontext_t where the FP CSR register is saved. */
130 #define SIGCONTEXT_FPCSR_OFF (SIGCONTEXT_FPREGS_OFF + 32 * 8 + 4)
131 /* The offset in sigcontext_t where the multiplier hi register is saved. */
132 #define SIGCONTEXT_HI_OFF (SIGCONTEXT_FPCSR_OFF + 2 * 4)
133 /* The offset in sigcontext_t where the multiplier lo register is saved. */
134 #define SIGCONTEXT_LO_OFF (SIGCONTEXT_HI_OFF + 4)
135
136 /* Implement the "init" routine in struct tramp_frame for the N32 ABI
137 on mips-irix. */
138 static void
139 mips_irix_n32_tramp_frame_init (const struct tramp_frame *self,
140 struct frame_info *this_frame,
141 struct trad_frame_cache *this_cache,
142 CORE_ADDR func)
143 {
144 struct gdbarch *gdbarch = get_frame_arch (this_frame);
145 const int num_regs = gdbarch_num_regs (gdbarch);
146 int sp_cooked_regno = num_regs + MIPS_SP_REGNUM;
147 const CORE_ADDR sp = get_frame_register_signed (this_frame, sp_cooked_regno);
148 const CORE_ADDR sigcontext_base = sp + 48;
149 const struct mips_regnum *regs = mips_regnum (gdbarch);
150 int ireg;
151
152 trad_frame_set_reg_addr (this_cache, regs->pc + gdbarch_num_regs (gdbarch),
153 sigcontext_base + SIGCONTEXT_PC_OFF);
154
155 for (ireg = 1; ireg < 32; ireg++)
156 trad_frame_set_reg_addr (this_cache, ireg + MIPS_ZERO_REGNUM + num_regs,
157 sigcontext_base + SIGCONTEXT_REGS_OFF + ireg * 8);
158
159 for (ireg = 0; ireg < 32; ireg++)
160 trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + num_regs,
161 sigcontext_base + SIGCONTEXT_FPREGS_OFF
162 + ireg * 8);
163
164 trad_frame_set_reg_addr (this_cache, regs->fp_control_status + num_regs,
165 sigcontext_base + SIGCONTEXT_FPCSR_OFF);
166
167 trad_frame_set_reg_addr (this_cache, regs->hi + num_regs,
168 sigcontext_base + SIGCONTEXT_HI_OFF);
169
170 trad_frame_set_reg_addr (this_cache, regs->lo + num_regs,
171 sigcontext_base + SIGCONTEXT_LO_OFF);
172
173 trad_frame_set_id (this_cache, frame_id_build (sigcontext_base, func));
174 }
175
176 /* The tramp_frame structure describing sigtramp frames on mips-irix N32.
177
178 Note that the list of instructions below is pretty much a pure dump
179 of function _sigtramp on mips-irix. A few instructions are actually
180 not tested (mask set to 0), because a portion of these instructions
181 contain an address which changes due to relocation. We could use
182 a smarter mask that checks the instrutction code alone, but given
183 the number of instructions already being checked, this seemed
184 unnecessary. */
185
186 static const struct tramp_frame mips_irix_n32_tramp_frame =
187 {
188 SIGTRAMP_FRAME,
189 4,
190 {
191 { 0x3c0c8000, -1 }, /* lui t0,0x8000 */
192 { 0x27bdffd0, -1 }, /* addiu sp,sp,-48 */
193 { 0x008c6024, -1 }, /* and t0,a0,t0 */
194 { 0xffa40018, -1 }, /* sd a0,24(sp) */
195 { 0x00000000, 0 }, /* beqz t0,0xfaefcb8 <_sigtramp+40> */
196 { 0xffa60028, -1 }, /* sd a2,40(sp) */
197 { 0x01806027, -1 }, /* nor t0,t0,zero */
198 { 0xffa00020, -1 }, /* sd zero,32(sp) */
199 { 0x00000000, 0 }, /* b 0xfaefcbc <_sigtramp+44> */
200 { 0x008c2024, -1 }, /* and a0,a0,t0 */
201 { 0xffa60020, -1 }, /* sd a2,32(sp) */
202 { 0x03e0c025, -1 }, /* move t8,ra */
203 { 0x00000000, 0 }, /* bal 0xfaefcc8 <_sigtramp+56> */
204 { 0x00000000, -1 }, /* nop */
205 { 0x3c0c0007, -1 }, /* lui t0,0x7 */
206 { 0x00e0c825, -1 }, /* move t9,a3 */
207 { 0x658c80fc, -1 }, /* daddiu t0,t0,-32516 */
208 { 0x019f602d, -1 }, /* daddu t0,t0,ra */
209 { 0x0300f825, -1 }, /* move ra,t8 */
210 { 0x8d8c9880, -1 }, /* lw t0,-26496(t0) */
211 { 0x8d8c0000, -1 }, /* lw t0,0(t0) */
212 { 0x8d8d0000, -1 }, /* lw t1,0(t0) */
213 { 0xffac0008, -1 }, /* sd t0,8(sp) */
214 { 0x0320f809, -1 }, /* jalr t9 */
215 { 0xffad0010, -1 }, /* sd t1,16(sp) */
216 { 0xdfad0010, -1 }, /* ld t1,16(sp) */
217 { 0xdfac0008, -1 }, /* ld t0,8(sp) */
218 { 0xad8d0000, -1 }, /* sw t1,0(t0) */
219 { 0xdfa40020, -1 }, /* ld a0,32(sp) */
220 { 0xdfa50028, -1 }, /* ld a1,40(sp) */
221 { 0xdfa60018, -1 }, /* ld a2,24(sp) */
222 { 0x24020440, -1 }, /* li v0,1088 */
223 { 0x0000000c, -1 }, /* syscall */
224 { TRAMP_SENTINEL_INSN, -1 }
225 },
226 mips_irix_n32_tramp_frame_init
227 };
228
229 /* Implement the "init" routine in struct tramp_frame for the stack-based
230 trampolines used on mips-irix. */
231
232 static void
233 mips_irix_n32_stack_tramp_frame_init (const struct tramp_frame *self,
234 struct frame_info *this_frame,
235 struct trad_frame_cache *this_cache,
236 CORE_ADDR func)
237 {
238 struct gdbarch *gdbarch = get_frame_arch (this_frame);
239 const int num_regs = gdbarch_num_regs (gdbarch);
240 int sp_cooked_regno = num_regs + MIPS_SP_REGNUM;
241 const CORE_ADDR sp = get_frame_register_signed (this_frame, sp_cooked_regno);
242
243 /* The previous frame's PC is stored in RA. */
244 trad_frame_set_reg_realreg (this_cache, gdbarch_pc_regnum (gdbarch),
245 num_regs + MIPS_RA_REGNUM);
246
247 trad_frame_set_id (this_cache, frame_id_build (sp, func));
248 }
249
250 /* A tramp_frame structure describing the stack-based trampoline
251 used on mips-irix. These trampolines are created on the stack
252 before being called. */
253
254 static const struct tramp_frame mips_irix_n32_stack_tramp_frame =
255 {
256 SIGTRAMP_FRAME,
257 4,
258 {
259 { 0x8f210000, 0xffff0000 }, /* lw at, N(t9) */
260 { 0x8f2f0000, 0xffff0000 }, /* lw t3, M(t9) */
261 { 0x00200008, 0xffffffff }, /* jr at */
262 { 0x0020c82d, 0xffffffff }, /* move t9, at */
263 { TRAMP_SENTINEL_INSN, -1 }
264 },
265 mips_irix_n32_stack_tramp_frame_init
266 };
267
268 static void
269 mips_irix_init_abi (struct gdbarch_info info,
270 struct gdbarch *gdbarch)
271 {
272 set_solib_ops (gdbarch, &irix_so_ops);
273 tramp_frame_prepend_unwinder (gdbarch, &mips_irix_n32_stack_tramp_frame);
274 tramp_frame_prepend_unwinder (gdbarch, &mips_irix_n32_tramp_frame);
275 }
276
277 /* Provide a prototype to silence -Wmissing-prototypes. */
278 extern initialize_file_ftype _initialize_mips_irix_tdep;
279
280 void
281 _initialize_mips_irix_tdep (void)
282 {
283 /* Register an ELF OS ABI sniffer for IRIX binaries. */
284 gdbarch_register_osabi_sniffer (bfd_arch_mips,
285 bfd_target_elf_flavour,
286 mips_irix_elf_osabi_sniffer);
287
288 gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_IRIX,
289 mips_irix_init_abi);
290 }
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