1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2012 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdb_assert.h"
25 #include "mips-tdep.h"
28 #include "linux-nat.h"
29 #include "mips-linux-tdep.h"
30 #include "target-descriptions.h"
32 #include "gdb_proc_service.h"
36 #include <sys/ptrace.h>
38 #include "features/mips-linux.c"
39 #include "features/mips64-linux.c"
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
45 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
46 we'll clear this and use PTRACE_PEEKUSER instead. */
47 static int have_ptrace_regsets
= 1;
49 /* Whether or not to print the mirrored debug registers. */
51 static int maint_show_dr
;
53 /* Saved function pointers to fetch and store a single register using
54 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
56 static void (*super_fetch_registers
) (struct target_ops
*,
57 struct regcache
*, int);
58 static void (*super_store_registers
) (struct target_ops
*,
59 struct regcache
*, int);
61 static void (*super_close
) (int);
63 /* Map gdb internal register number to ptrace ``address''.
64 These ``addresses'' are normally defined in <asm/ptrace.h>.
66 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
67 and there's no point in reading or setting MIPS_ZERO_REGNUM.
68 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
71 mips_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
75 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
76 error (_("Bogon register number %d."), regno
);
78 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
80 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
81 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
82 regaddr
= FPR_BASE
+ (regno
- mips_regnum (gdbarch
)->fp0
);
83 else if (regno
== mips_regnum (gdbarch
)->pc
)
85 else if (regno
== mips_regnum (gdbarch
)->cause
)
86 regaddr
= store
? (CORE_ADDR
) -1 : CAUSE
;
87 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
88 regaddr
= store
? (CORE_ADDR
) -1 : BADVADDR
;
89 else if (regno
== mips_regnum (gdbarch
)->lo
)
91 else if (regno
== mips_regnum (gdbarch
)->hi
)
93 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
95 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
96 regaddr
= store
? (CORE_ADDR
) -1 : FPC_EIR
;
97 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
100 regaddr
= (CORE_ADDR
) -1;
106 mips64_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
110 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
111 error (_("Bogon register number %d."), regno
);
113 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
115 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
116 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
117 regaddr
= MIPS64_FPR_BASE
+ (regno
- gdbarch_fp0_regnum (gdbarch
));
118 else if (regno
== mips_regnum (gdbarch
)->pc
)
120 else if (regno
== mips_regnum (gdbarch
)->cause
)
121 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_CAUSE
;
122 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
123 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_BADVADDR
;
124 else if (regno
== mips_regnum (gdbarch
)->lo
)
125 regaddr
= MIPS64_MMLO
;
126 else if (regno
== mips_regnum (gdbarch
)->hi
)
127 regaddr
= MIPS64_MMHI
;
128 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
129 regaddr
= MIPS64_FPC_CSR
;
130 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
131 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_FPC_EIR
;
132 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
135 regaddr
= (CORE_ADDR
) -1;
140 /* Fetch the thread-local storage pointer for libthread_db. */
143 ps_get_thread_area (const struct ps_prochandle
*ph
,
144 lwpid_t lwpid
, int idx
, void **base
)
146 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
149 /* IDX is the bias from the thread pointer to the beginning of the
150 thread descriptor. It has to be subtracted due to implementation
151 quirks in libthread_db. */
152 *base
= (void *) ((char *)*base
- idx
);
157 /* Wrapper functions. These are only used by libthread_db. */
160 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
162 if (mips_isa_regsize (get_regcache_arch (regcache
)) == 4)
163 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*) gregsetp
);
165 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*) gregsetp
);
169 fill_gregset (const struct regcache
*regcache
,
170 gdb_gregset_t
*gregsetp
, int regno
)
172 if (mips_isa_regsize (get_regcache_arch (regcache
)) == 4)
173 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*) gregsetp
, regno
);
175 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*) gregsetp
, regno
);
179 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
181 if (mips_isa_regsize (get_regcache_arch (regcache
)) == 4)
182 mips_supply_fpregset (regcache
, (const mips_elf_fpregset_t
*) fpregsetp
);
184 mips64_supply_fpregset (regcache
,
185 (const mips64_elf_fpregset_t
*) fpregsetp
);
189 fill_fpregset (const struct regcache
*regcache
,
190 gdb_fpregset_t
*fpregsetp
, int regno
)
192 if (mips_isa_regsize (get_regcache_arch (regcache
)) == 4)
193 mips_fill_fpregset (regcache
, (mips_elf_fpregset_t
*) fpregsetp
, regno
);
195 mips64_fill_fpregset (regcache
,
196 (mips64_elf_fpregset_t
*) fpregsetp
, regno
);
200 /* Fetch REGNO (or all registers if REGNO == -1) from the target
201 using PTRACE_GETREGS et al. */
204 mips64_linux_regsets_fetch_registers (struct regcache
*regcache
, int regno
)
206 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
210 if (regno
>= mips_regnum (gdbarch
)->fp0
211 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
213 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
215 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
220 tid
= ptid_get_lwp (inferior_ptid
);
222 tid
= ptid_get_pid (inferior_ptid
);
224 if (regno
== -1 || !is_fp
)
226 mips64_elf_gregset_t regs
;
228 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
232 have_ptrace_regsets
= 0;
235 perror_with_name (_("Couldn't get registers"));
238 mips64_supply_gregset (regcache
,
239 (const mips64_elf_gregset_t
*) ®s
);
242 if (regno
== -1 || is_fp
)
244 mips64_elf_fpregset_t fp_regs
;
246 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
247 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
251 have_ptrace_regsets
= 0;
254 perror_with_name (_("Couldn't get FP registers"));
257 mips64_supply_fpregset (regcache
,
258 (const mips64_elf_fpregset_t
*) &fp_regs
);
262 /* Store REGNO (or all registers if REGNO == -1) to the target
263 using PTRACE_SETREGS et al. */
266 mips64_linux_regsets_store_registers (const struct regcache
*regcache
,
269 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
273 if (regno
>= mips_regnum (gdbarch
)->fp0
274 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
276 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
278 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
283 tid
= ptid_get_lwp (inferior_ptid
);
285 tid
= ptid_get_pid (inferior_ptid
);
287 if (regno
== -1 || !is_fp
)
289 mips64_elf_gregset_t regs
;
291 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
292 perror_with_name (_("Couldn't get registers"));
294 mips64_fill_gregset (regcache
, ®s
, regno
);
296 if (ptrace (PTRACE_SETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
297 perror_with_name (_("Couldn't set registers"));
300 if (regno
== -1 || is_fp
)
302 mips64_elf_fpregset_t fp_regs
;
304 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
305 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
306 perror_with_name (_("Couldn't get FP registers"));
308 mips64_fill_fpregset (regcache
, &fp_regs
, regno
);
310 if (ptrace (PTRACE_SETFPREGS
, tid
, 0L,
311 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
312 perror_with_name (_("Couldn't set FP registers"));
316 /* Fetch REGNO (or all registers if REGNO == -1) from the target
317 using any working method. */
320 mips64_linux_fetch_registers (struct target_ops
*ops
,
321 struct regcache
*regcache
, int regnum
)
323 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
324 if (have_ptrace_regsets
)
325 mips64_linux_regsets_fetch_registers (regcache
, regnum
);
327 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
328 back to PTRACE_PEEKUSER. */
329 if (!have_ptrace_regsets
)
330 super_fetch_registers (ops
, regcache
, regnum
);
333 /* Store REGNO (or all registers if REGNO == -1) to the target
334 using any working method. */
337 mips64_linux_store_registers (struct target_ops
*ops
,
338 struct regcache
*regcache
, int regnum
)
340 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
341 if (have_ptrace_regsets
)
342 mips64_linux_regsets_store_registers (regcache
, regnum
);
344 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
345 back to PTRACE_PEEKUSER. */
346 if (!have_ptrace_regsets
)
347 super_store_registers (ops
, regcache
, regnum
);
350 /* Return the address in the core dump or inferior of register
354 mips_linux_register_u_offset (struct gdbarch
*gdbarch
, int regno
, int store_p
)
356 if (mips_abi_regsize (gdbarch
) == 8)
357 return mips64_linux_register_addr (gdbarch
, regno
, store_p
);
359 return mips_linux_register_addr (gdbarch
, regno
, store_p
);
362 static const struct target_desc
*
363 mips_linux_read_description (struct target_ops
*ops
)
365 /* Report that target registers are a size we know for sure
366 that we can get from ptrace. */
367 if (_MIPS_SIM
== _ABIO32
)
368 return tdesc_mips_linux
;
370 return tdesc_mips64_linux
;
373 #ifndef PTRACE_GET_WATCH_REGS
374 # define PTRACE_GET_WATCH_REGS 0xd0
377 #ifndef PTRACE_SET_WATCH_REGS
378 # define PTRACE_SET_WATCH_REGS 0xd1
385 #define W_MASK (1 << W_BIT)
386 #define R_MASK (1 << R_BIT)
387 #define I_MASK (1 << I_BIT)
389 #define IRW_MASK (I_MASK | R_MASK | W_MASK)
391 enum pt_watch_style
{
392 pt_watch_style_mips32
,
393 pt_watch_style_mips64
396 #define MAX_DEBUG_REGISTER 8
398 /* A value of zero in a watchlo indicates that it is available. */
400 struct mips32_watch_regs
402 uint32_t watchlo
[MAX_DEBUG_REGISTER
];
403 /* Lower 16 bits of watchhi. */
404 uint16_t watchhi
[MAX_DEBUG_REGISTER
];
405 /* Valid mask and I R W bits.
406 * bit 0 -- 1 if W bit is usable.
407 * bit 1 -- 1 if R bit is usable.
408 * bit 2 -- 1 if I bit is usable.
409 * bits 3 - 11 -- Valid watchhi mask bits.
411 uint16_t watch_masks
[MAX_DEBUG_REGISTER
];
412 /* The number of valid watch register pairs. */
414 /* There is confusion across gcc versions about structure alignment,
415 so we force 8 byte alignment for these structures so they match
416 the kernel even if it was build with a different gcc version. */
417 } __attribute__ ((aligned (8)));
419 struct mips64_watch_regs
421 uint64_t watchlo
[MAX_DEBUG_REGISTER
];
422 uint16_t watchhi
[MAX_DEBUG_REGISTER
];
423 uint16_t watch_masks
[MAX_DEBUG_REGISTER
];
425 } __attribute__ ((aligned (8)));
429 enum pt_watch_style style
;
432 struct mips32_watch_regs mips32
;
433 struct mips64_watch_regs mips64
;
437 /* -1 if the kernel and/or CPU do not support watch registers.
438 1 if watch_readback is valid and we can read style, num_valid
440 0 if we need to read the watch_readback. */
442 static int watch_readback_valid
;
444 /* Cached watch register read values. */
446 static struct pt_watch_regs watch_readback
;
448 /* We keep list of all watchpoints we should install and calculate the
449 watch register values each time the list changes. This allows for
450 easy sharing of watch registers for more than one watchpoint. */
452 struct mips_watchpoint
457 struct mips_watchpoint
*next
;
460 static struct mips_watchpoint
*current_watches
;
462 /* The current set of watch register values for writing the
465 static struct pt_watch_regs watch_mirror
;
467 /* Assuming usable watch registers, return the irw_mask. */
470 get_irw_mask (struct pt_watch_regs
*regs
, int set
)
474 case pt_watch_style_mips32
:
475 return regs
->mips32
.watch_masks
[set
] & IRW_MASK
;
476 case pt_watch_style_mips64
:
477 return regs
->mips64
.watch_masks
[set
] & IRW_MASK
;
479 internal_error (__FILE__
, __LINE__
,
480 _("Unrecognized watch register style"));
484 /* Assuming usable watch registers, return the reg_mask. */
487 get_reg_mask (struct pt_watch_regs
*regs
, int set
)
491 case pt_watch_style_mips32
:
492 return regs
->mips32
.watch_masks
[set
] & ~IRW_MASK
;
493 case pt_watch_style_mips64
:
494 return regs
->mips64
.watch_masks
[set
] & ~IRW_MASK
;
496 internal_error (__FILE__
, __LINE__
,
497 _("Unrecognized watch register style"));
501 /* Assuming usable watch registers, return the num_valid. */
504 get_num_valid (struct pt_watch_regs
*regs
)
508 case pt_watch_style_mips32
:
509 return regs
->mips32
.num_valid
;
510 case pt_watch_style_mips64
:
511 return regs
->mips64
.num_valid
;
513 internal_error (__FILE__
, __LINE__
,
514 _("Unrecognized watch register style"));
518 /* Assuming usable watch registers, return the watchlo. */
521 get_watchlo (struct pt_watch_regs
*regs
, int set
)
525 case pt_watch_style_mips32
:
526 return regs
->mips32
.watchlo
[set
];
527 case pt_watch_style_mips64
:
528 return regs
->mips64
.watchlo
[set
];
530 internal_error (__FILE__
, __LINE__
,
531 _("Unrecognized watch register style"));
535 /* Assuming usable watch registers, set a watchlo value. */
538 set_watchlo (struct pt_watch_regs
*regs
, int set
, CORE_ADDR value
)
542 case pt_watch_style_mips32
:
543 /* The cast will never throw away bits as 64 bit addresses can
544 never be used on a 32 bit kernel. */
545 regs
->mips32
.watchlo
[set
] = (uint32_t)value
;
547 case pt_watch_style_mips64
:
548 regs
->mips64
.watchlo
[set
] = value
;
551 internal_error (__FILE__
, __LINE__
,
552 _("Unrecognized watch register style"));
556 /* Assuming usable watch registers, return the watchhi. */
559 get_watchhi (struct pt_watch_regs
*regs
, int n
)
563 case pt_watch_style_mips32
:
564 return regs
->mips32
.watchhi
[n
];
565 case pt_watch_style_mips64
:
566 return regs
->mips64
.watchhi
[n
];
568 internal_error (__FILE__
, __LINE__
,
569 _("Unrecognized watch register style"));
573 /* Assuming usable watch registers, set a watchhi value. */
576 set_watchhi (struct pt_watch_regs
*regs
, int n
, uint16_t value
)
580 case pt_watch_style_mips32
:
581 regs
->mips32
.watchhi
[n
] = value
;
583 case pt_watch_style_mips64
:
584 regs
->mips64
.watchhi
[n
] = value
;
587 internal_error (__FILE__
, __LINE__
,
588 _("Unrecognized watch register style"));
593 mips_show_dr (const char *func
, CORE_ADDR addr
,
594 int len
, enum target_hw_bp_type type
)
598 puts_unfiltered (func
);
600 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
601 paddress (target_gdbarch
, addr
), len
,
602 type
== hw_write
? "data-write"
603 : (type
== hw_read
? "data-read"
604 : (type
== hw_access
? "data-read/write"
605 : (type
== hw_execute
? "instruction-execute"
607 puts_unfiltered (":\n");
609 for (i
= 0; i
< MAX_DEBUG_REGISTER
; i
++)
610 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i
,
611 paddress (target_gdbarch
,
612 get_watchlo (&watch_mirror
, i
)),
613 paddress (target_gdbarch
,
614 get_watchhi (&watch_mirror
, i
)));
617 /* Return 1 if watch registers are usable. Cached information is used
618 unless force is true. */
621 mips_linux_read_watch_registers (int force
)
625 if (force
|| watch_readback_valid
== 0)
627 tid
= ptid_get_lwp (inferior_ptid
);
628 if (ptrace (PTRACE_GET_WATCH_REGS
, tid
, &watch_readback
) == -1)
630 watch_readback_valid
= -1;
633 switch (watch_readback
.style
)
635 case pt_watch_style_mips32
:
636 if (watch_readback
.mips32
.num_valid
== 0)
638 watch_readback_valid
= -1;
642 case pt_watch_style_mips64
:
643 if (watch_readback
.mips64
.num_valid
== 0)
645 watch_readback_valid
= -1;
650 watch_readback_valid
= -1;
653 /* Watch registers appear to be usable. */
654 watch_readback_valid
= 1;
656 return (watch_readback_valid
== 1) ? 1 : 0;
659 /* Convert GDB's type to an IRW mask. */
662 type_to_irw (int type
)
671 return (W_MASK
| R_MASK
);
677 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
678 handle the specified watch type. */
681 mips_linux_can_use_hw_breakpoint (int type
, int cnt
, int ot
)
684 uint32_t wanted_mask
, irw_mask
;
686 if (!mips_linux_read_watch_registers (0))
691 case bp_hardware_watchpoint
:
692 wanted_mask
= W_MASK
;
694 case bp_read_watchpoint
:
695 wanted_mask
= R_MASK
;
697 case bp_access_watchpoint
:
698 wanted_mask
= R_MASK
| W_MASK
;
704 for (i
= 0; i
< get_num_valid (&watch_readback
) && cnt
; i
++)
706 irw_mask
= get_irw_mask (&watch_readback
, i
);
707 if ((irw_mask
& wanted_mask
) == wanted_mask
)
710 return (cnt
== 0) ? 1 : 0;
713 /* Target to_stopped_by_watchpoint implementation. Return 1 if
714 stopped by watchpoint. The watchhi R and W bits indicate the watch
715 register triggered. */
718 mips_linux_stopped_by_watchpoint (void)
723 if (!mips_linux_read_watch_registers (1))
726 num_valid
= get_num_valid (&watch_readback
);
728 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
729 if (get_watchhi (&watch_readback
, n
) & (R_MASK
| W_MASK
))
735 /* Target to_stopped_data_address implementation. Set the address
736 where the watch triggered (if known). Return 1 if the address was
740 mips_linux_stopped_data_address (struct target_ops
*t
, CORE_ADDR
*paddr
)
742 /* On mips we don't know the low order 3 bits of the data address,
743 so we must return false. */
747 /* Set any low order bits in mask that are not set. */
750 fill_mask (CORE_ADDR mask
)
753 while (f
&& f
< mask
)
761 /* Try to add a single watch to the specified registers. Return 1 on
762 success, 0 on failure. */
765 try_one_watch (struct pt_watch_regs
*regs
, CORE_ADDR addr
,
766 int len
, unsigned irw
)
768 CORE_ADDR base_addr
, last_byte
, break_addr
, segment_len
;
769 CORE_ADDR mask_bits
, t_low
, t_low_end
;
772 struct pt_watch_regs regs_copy
;
777 last_byte
= addr
+ len
- 1;
778 mask_bits
= fill_mask (addr
^ last_byte
) | IRW_MASK
;
779 base_addr
= addr
& ~mask_bits
;
781 /* Check to see if it is covered by current registers. */
782 for (i
= 0; i
< get_num_valid (regs
); i
++)
784 t_low
= get_watchlo (regs
, i
);
785 if (t_low
!= 0 && irw
== ((unsigned)t_low
& irw
))
787 t_hi
= get_watchhi (regs
, i
) | IRW_MASK
;
788 t_low
&= ~(CORE_ADDR
)t_hi
;
789 if (addr
>= t_low
&& last_byte
<= (t_low
+ t_hi
))
793 /* Try to find an empty register. */
795 for (i
= 0; i
< get_num_valid (regs
); i
++)
797 t_low
= get_watchlo (regs
, i
);
798 if (t_low
== 0 && irw
== (get_irw_mask (regs
, i
) & irw
))
800 if (mask_bits
<= (get_reg_mask (regs
, i
) | IRW_MASK
))
802 /* It fits, we'll take it. */
803 set_watchlo (regs
, i
, base_addr
| irw
);
804 set_watchhi (regs
, i
, mask_bits
& ~IRW_MASK
);
809 /* It doesn't fit, but has the proper IRW capabilities. */
814 if (free_watches
> 1)
816 /* Try to split it across several registers. */
818 for (i
= 0; i
< get_num_valid (®s_copy
); i
++)
820 t_low
= get_watchlo (®s_copy
, i
);
821 t_hi
= get_reg_mask (®s_copy
, i
) | IRW_MASK
;
822 if (t_low
== 0 && irw
== (t_hi
& irw
))
824 t_low
= addr
& ~(CORE_ADDR
)t_hi
;
825 break_addr
= t_low
+ t_hi
+ 1;
826 if (break_addr
>= addr
+ len
)
829 segment_len
= break_addr
- addr
;
830 mask_bits
= fill_mask (addr
^ (addr
+ segment_len
- 1));
831 set_watchlo (®s_copy
, i
, (addr
& ~mask_bits
) | irw
);
832 set_watchhi (®s_copy
, i
, mask_bits
& ~IRW_MASK
);
833 if (break_addr
>= addr
+ len
)
838 len
= addr
+ len
- break_addr
;
843 /* It didn't fit anywhere, we failed. */
847 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
848 the specified region can be covered by the watch registers. */
851 mips_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
853 struct pt_watch_regs dummy_regs
;
856 if (!mips_linux_read_watch_registers (0))
859 dummy_regs
= watch_readback
;
860 /* Clear them out. */
861 for (i
= 0; i
< get_num_valid (&dummy_regs
); i
++)
862 set_watchlo (&dummy_regs
, i
, 0);
863 return try_one_watch (&dummy_regs
, addr
, len
, 0);
867 /* Write the mirrored watch register values for each thread. */
870 write_watchpoint_regs (void)
877 tid
= ptid_get_lwp (lp
->ptid
);
878 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
) == -1)
879 perror_with_name (_("Couldn't write debug register"));
884 /* linux_nat new_thread implementation. Write the mirrored watch
885 register values for the new thread. */
888 mips_linux_new_thread (struct lwp_info
*lp
)
892 if (!mips_linux_read_watch_registers (0))
895 tid
= ptid_get_lwp (lp
->ptid
);
896 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
) == -1)
897 perror_with_name (_("Couldn't write debug register"));
900 /* Fill in the watch registers with the currently cached watches. */
903 populate_regs_from_watches (struct pt_watch_regs
*regs
)
905 struct mips_watchpoint
*w
;
908 /* Clear them out. */
909 for (i
= 0; i
< get_num_valid (regs
); i
++)
911 set_watchlo (regs
, i
, 0);
912 set_watchhi (regs
, i
, 0);
918 i
= try_one_watch (regs
, w
->addr
, w
->len
, type_to_irw (w
->type
));
919 /* They must all fit, because we previously calculated that they
926 /* Target to_insert_watchpoint implementation. Try to insert a new
927 watch. Return zero on success. */
930 mips_linux_insert_watchpoint (CORE_ADDR addr
, int len
, int type
,
931 struct expression
*cond
)
933 struct pt_watch_regs regs
;
934 struct mips_watchpoint
*new_watch
;
935 struct mips_watchpoint
**pw
;
940 if (!mips_linux_read_watch_registers (0))
946 regs
= watch_readback
;
947 /* Add the current watches. */
948 populate_regs_from_watches (®s
);
950 /* Now try to add the new watch. */
951 if (!try_one_watch (®s
, addr
, len
, type_to_irw (type
)))
954 /* It fit. Stick it on the end of the list. */
955 new_watch
= (struct mips_watchpoint
*)
956 xmalloc (sizeof (struct mips_watchpoint
));
957 new_watch
->addr
= addr
;
958 new_watch
->len
= len
;
959 new_watch
->type
= type
;
960 new_watch
->next
= NULL
;
962 pw
= ¤t_watches
;
968 retval
= write_watchpoint_regs ();
971 mips_show_dr ("insert_watchpoint", addr
, len
, type
);
976 /* Target to_remove_watchpoint implementation. Try to remove a watch.
977 Return zero on success. */
980 mips_linux_remove_watchpoint (CORE_ADDR addr
, int len
, int type
,
981 struct expression
*cond
)
986 struct mips_watchpoint
**pw
;
987 struct mips_watchpoint
*w
;
989 /* Search for a known watch that matches. Then unlink and free
992 pw
= ¤t_watches
;
995 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== type
)
1006 return -1; /* We don't know about it, fail doing nothing. */
1008 /* At this point watch_readback is known to be valid because we
1009 could not have added the watch without reading it. */
1010 gdb_assert (watch_readback_valid
== 1);
1012 watch_mirror
= watch_readback
;
1013 populate_regs_from_watches (&watch_mirror
);
1015 retval
= write_watchpoint_regs ();
1018 mips_show_dr ("remove_watchpoint", addr
, len
, type
);
1023 /* Target to_close implementation. Free any watches and call the
1024 super implementation. */
1027 mips_linux_close (int quitting
)
1029 struct mips_watchpoint
*w
;
1030 struct mips_watchpoint
*nw
;
1032 /* Clean out the current_watches list. */
1033 w
= current_watches
;
1040 current_watches
= NULL
;
1043 super_close (quitting
);
1046 void _initialize_mips_linux_nat (void);
1049 _initialize_mips_linux_nat (void)
1051 struct target_ops
*t
;
1053 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
1054 &maint_show_dr
, _("\
1055 Set whether to show variables that mirror the mips debug registers."), _("\
1056 Show whether to show variables that mirror the mips debug registers."), _("\
1057 Use \"on\" to enable, \"off\" to disable.\n\
1058 If enabled, the debug registers values are shown when GDB inserts\n\
1059 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
1060 triggers a breakpoint or watchpoint."),
1063 &maintenance_set_cmdlist
,
1064 &maintenance_show_cmdlist
);
1066 t
= linux_trad_target (mips_linux_register_u_offset
);
1068 super_close
= t
->to_close
;
1069 t
->to_close
= mips_linux_close
;
1071 super_fetch_registers
= t
->to_fetch_registers
;
1072 super_store_registers
= t
->to_store_registers
;
1074 t
->to_fetch_registers
= mips64_linux_fetch_registers
;
1075 t
->to_store_registers
= mips64_linux_store_registers
;
1077 t
->to_can_use_hw_breakpoint
= mips_linux_can_use_hw_breakpoint
;
1078 t
->to_remove_watchpoint
= mips_linux_remove_watchpoint
;
1079 t
->to_insert_watchpoint
= mips_linux_insert_watchpoint
;
1080 t
->to_stopped_by_watchpoint
= mips_linux_stopped_by_watchpoint
;
1081 t
->to_stopped_data_address
= mips_linux_stopped_data_address
;
1082 t
->to_region_ok_for_hw_watchpoint
= mips_linux_region_ok_for_hw_watchpoint
;
1084 t
->to_read_description
= mips_linux_read_description
;
1086 linux_nat_add_target (t
);
1087 linux_nat_set_new_thread (t
, mips_linux_new_thread
);
1089 /* Initialize the standard target descriptions. */
1090 initialize_tdesc_mips_linux ();
1091 initialize_tdesc_mips64_linux ();