1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
37 #include "inf-ptrace.h"
39 #include "nat/mips-linux-watch.h"
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
45 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
46 we'll clear this and use PTRACE_PEEKUSER instead. */
47 static int have_ptrace_regsets
= 1;
49 /* Saved function pointers to fetch and store a single register using
50 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
52 static void (*super_fetch_registers
) (struct target_ops
*,
53 struct regcache
*, int);
54 static void (*super_store_registers
) (struct target_ops
*,
55 struct regcache
*, int);
57 static void (*super_close
) (struct target_ops
*);
59 /* Map gdb internal register number to ptrace ``address''.
60 These ``addresses'' are normally defined in <asm/ptrace.h>.
62 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
63 and there's no point in reading or setting MIPS_ZERO_REGNUM.
64 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
67 mips_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
71 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
72 error (_("Bogon register number %d."), regno
);
74 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
76 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
77 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
78 regaddr
= FPR_BASE
+ (regno
- mips_regnum (gdbarch
)->fp0
);
79 else if (regno
== mips_regnum (gdbarch
)->pc
)
81 else if (regno
== mips_regnum (gdbarch
)->cause
)
82 regaddr
= store
? (CORE_ADDR
) -1 : CAUSE
;
83 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
84 regaddr
= store
? (CORE_ADDR
) -1 : BADVADDR
;
85 else if (regno
== mips_regnum (gdbarch
)->lo
)
87 else if (regno
== mips_regnum (gdbarch
)->hi
)
89 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
91 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
92 regaddr
= store
? (CORE_ADDR
) -1 : FPC_EIR
;
93 else if (mips_regnum (gdbarch
)->dspacc
!= -1
94 && regno
>= mips_regnum (gdbarch
)->dspacc
95 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
96 regaddr
= DSP_BASE
+ (regno
- mips_regnum (gdbarch
)->dspacc
);
97 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
98 regaddr
= DSP_CONTROL
;
99 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
102 regaddr
= (CORE_ADDR
) -1;
108 mips64_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
112 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
113 error (_("Bogon register number %d."), regno
);
115 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
117 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
118 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
119 regaddr
= MIPS64_FPR_BASE
+ (regno
- gdbarch_fp0_regnum (gdbarch
));
120 else if (regno
== mips_regnum (gdbarch
)->pc
)
122 else if (regno
== mips_regnum (gdbarch
)->cause
)
123 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_CAUSE
;
124 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
125 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_BADVADDR
;
126 else if (regno
== mips_regnum (gdbarch
)->lo
)
127 regaddr
= MIPS64_MMLO
;
128 else if (regno
== mips_regnum (gdbarch
)->hi
)
129 regaddr
= MIPS64_MMHI
;
130 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
131 regaddr
= MIPS64_FPC_CSR
;
132 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
133 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_FPC_EIR
;
134 else if (mips_regnum (gdbarch
)->dspacc
!= -1
135 && regno
>= mips_regnum (gdbarch
)->dspacc
136 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
137 regaddr
= DSP_BASE
+ (regno
- mips_regnum (gdbarch
)->dspacc
);
138 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
139 regaddr
= DSP_CONTROL
;
140 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
143 regaddr
= (CORE_ADDR
) -1;
148 /* Fetch the thread-local storage pointer for libthread_db. */
151 ps_get_thread_area (struct ps_prochandle
*ph
,
152 lwpid_t lwpid
, int idx
, void **base
)
154 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
157 /* IDX is the bias from the thread pointer to the beginning of the
158 thread descriptor. It has to be subtracted due to implementation
159 quirks in libthread_db. */
160 *base
= (void *) ((char *)*base
- idx
);
165 /* Wrapper functions. These are only used by libthread_db. */
168 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
170 if (mips_isa_regsize (regcache
->arch ()) == 4)
171 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*) gregsetp
);
173 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*) gregsetp
);
177 fill_gregset (const struct regcache
*regcache
,
178 gdb_gregset_t
*gregsetp
, int regno
)
180 if (mips_isa_regsize (regcache
->arch ()) == 4)
181 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*) gregsetp
, regno
);
183 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*) gregsetp
, regno
);
187 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
189 if (mips_isa_regsize (regcache
->arch ()) == 4)
190 mips_supply_fpregset (regcache
, (const mips_elf_fpregset_t
*) fpregsetp
);
192 mips64_supply_fpregset (regcache
,
193 (const mips64_elf_fpregset_t
*) fpregsetp
);
197 fill_fpregset (const struct regcache
*regcache
,
198 gdb_fpregset_t
*fpregsetp
, int regno
)
200 if (mips_isa_regsize (regcache
->arch ()) == 4)
201 mips_fill_fpregset (regcache
, (mips_elf_fpregset_t
*) fpregsetp
, regno
);
203 mips64_fill_fpregset (regcache
,
204 (mips64_elf_fpregset_t
*) fpregsetp
, regno
);
208 /* Fetch REGNO (or all registers if REGNO == -1) from the target
209 using PTRACE_GETREGS et al. */
212 mips64_linux_regsets_fetch_registers (struct target_ops
*ops
,
213 struct regcache
*regcache
, int regno
)
215 struct gdbarch
*gdbarch
= regcache
->arch ();
221 if (regno
>= mips_regnum (gdbarch
)->fp0
222 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
224 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
226 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
231 /* DSP registers are optional and not a part of any set. */
232 have_dsp
= mips_regnum (gdbarch
)->dspctl
!= -1;
235 else if (regno
>= mips_regnum (gdbarch
)->dspacc
236 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
238 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
243 tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
245 if (regno
== -1 || (!is_fp
&& !is_dsp
))
247 mips64_elf_gregset_t regs
;
249 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
253 have_ptrace_regsets
= 0;
256 perror_with_name (_("Couldn't get registers"));
259 mips64_supply_gregset (regcache
,
260 (const mips64_elf_gregset_t
*) ®s
);
263 if (regno
== -1 || is_fp
)
265 mips64_elf_fpregset_t fp_regs
;
267 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
268 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
272 have_ptrace_regsets
= 0;
275 perror_with_name (_("Couldn't get FP registers"));
278 mips64_supply_fpregset (regcache
,
279 (const mips64_elf_fpregset_t
*) &fp_regs
);
283 super_fetch_registers (ops
, regcache
, regno
);
284 else if (regno
== -1 && have_dsp
)
286 for (regi
= mips_regnum (gdbarch
)->dspacc
;
287 regi
< mips_regnum (gdbarch
)->dspacc
+ 6;
289 super_fetch_registers (ops
, regcache
, regi
);
290 super_fetch_registers (ops
, regcache
, mips_regnum (gdbarch
)->dspctl
);
294 /* Store REGNO (or all registers if REGNO == -1) to the target
295 using PTRACE_SETREGS et al. */
298 mips64_linux_regsets_store_registers (struct target_ops
*ops
,
299 struct regcache
*regcache
, int regno
)
301 struct gdbarch
*gdbarch
= regcache
->arch ();
307 if (regno
>= mips_regnum (gdbarch
)->fp0
308 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
310 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
312 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
317 /* DSP registers are optional and not a part of any set. */
318 have_dsp
= mips_regnum (gdbarch
)->dspctl
!= -1;
321 else if (regno
>= mips_regnum (gdbarch
)->dspacc
322 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
324 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
329 tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
331 if (regno
== -1 || (!is_fp
&& !is_dsp
))
333 mips64_elf_gregset_t regs
;
335 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
336 perror_with_name (_("Couldn't get registers"));
338 mips64_fill_gregset (regcache
, ®s
, regno
);
340 if (ptrace (PTRACE_SETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
341 perror_with_name (_("Couldn't set registers"));
344 if (regno
== -1 || is_fp
)
346 mips64_elf_fpregset_t fp_regs
;
348 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
349 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
350 perror_with_name (_("Couldn't get FP registers"));
352 mips64_fill_fpregset (regcache
, &fp_regs
, regno
);
354 if (ptrace (PTRACE_SETFPREGS
, tid
, 0L,
355 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
356 perror_with_name (_("Couldn't set FP registers"));
360 super_store_registers (ops
, regcache
, regno
);
361 else if (regno
== -1 && have_dsp
)
363 for (regi
= mips_regnum (gdbarch
)->dspacc
;
364 regi
< mips_regnum (gdbarch
)->dspacc
+ 6;
366 super_store_registers (ops
, regcache
, regi
);
367 super_store_registers (ops
, regcache
, mips_regnum (gdbarch
)->dspctl
);
371 /* Fetch REGNO (or all registers if REGNO == -1) from the target
372 using any working method. */
375 mips64_linux_fetch_registers (struct target_ops
*ops
,
376 struct regcache
*regcache
, int regnum
)
378 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
379 if (have_ptrace_regsets
)
380 mips64_linux_regsets_fetch_registers (ops
, regcache
, regnum
);
382 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
383 back to PTRACE_PEEKUSER. */
384 if (!have_ptrace_regsets
)
385 super_fetch_registers (ops
, regcache
, regnum
);
388 /* Store REGNO (or all registers if REGNO == -1) to the target
389 using any working method. */
392 mips64_linux_store_registers (struct target_ops
*ops
,
393 struct regcache
*regcache
, int regnum
)
395 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
396 if (have_ptrace_regsets
)
397 mips64_linux_regsets_store_registers (ops
, regcache
, regnum
);
399 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
400 back to PTRACE_PEEKUSER. */
401 if (!have_ptrace_regsets
)
402 super_store_registers (ops
, regcache
, regnum
);
405 /* Return the address in the core dump or inferior of register
409 mips_linux_register_u_offset (struct gdbarch
*gdbarch
, int regno
, int store_p
)
411 if (mips_abi_regsize (gdbarch
) == 8)
412 return mips64_linux_register_addr (gdbarch
, regno
, store_p
);
414 return mips_linux_register_addr (gdbarch
, regno
, store_p
);
417 static const struct target_desc
*
418 mips_linux_read_description (struct target_ops
*ops
)
420 static int have_dsp
= -1;
426 tid
= ptid_get_lwp (inferior_ptid
);
428 tid
= ptid_get_pid (inferior_ptid
);
431 ptrace (PTRACE_PEEKUSER
, tid
, DSP_CONTROL
, 0);
441 perror_with_name (_("Couldn't check DSP support"));
446 /* Report that target registers are a size we know for sure
447 that we can get from ptrace. */
448 if (_MIPS_SIM
== _ABIO32
)
449 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
451 return have_dsp
? tdesc_mips64_dsp_linux
: tdesc_mips64_linux
;
454 /* -1 if the kernel and/or CPU do not support watch registers.
455 1 if watch_readback is valid and we can read style, num_valid
457 0 if we need to read the watch_readback. */
459 static int watch_readback_valid
;
461 /* Cached watch register read values. */
463 static struct pt_watch_regs watch_readback
;
465 static struct mips_watchpoint
*current_watches
;
467 /* The current set of watch register values for writing the
470 static struct pt_watch_regs watch_mirror
;
473 mips_show_dr (const char *func
, CORE_ADDR addr
,
474 int len
, enum target_hw_bp_type type
)
478 puts_unfiltered (func
);
480 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
481 paddress (target_gdbarch (), addr
), len
,
482 type
== hw_write
? "data-write"
483 : (type
== hw_read
? "data-read"
484 : (type
== hw_access
? "data-read/write"
485 : (type
== hw_execute
? "instruction-execute"
487 puts_unfiltered (":\n");
489 for (i
= 0; i
< MAX_DEBUG_REGISTER
; i
++)
490 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i
,
491 paddress (target_gdbarch (),
492 mips_linux_watch_get_watchlo (&watch_mirror
,
494 paddress (target_gdbarch (),
495 mips_linux_watch_get_watchhi (&watch_mirror
,
499 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
500 handle the specified watch type. */
503 mips_linux_can_use_hw_breakpoint (struct target_ops
*self
,
508 uint32_t wanted_mask
, irw_mask
;
510 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
512 &watch_readback_valid
, 0))
517 case bp_hardware_watchpoint
:
518 wanted_mask
= W_MASK
;
520 case bp_read_watchpoint
:
521 wanted_mask
= R_MASK
;
523 case bp_access_watchpoint
:
524 wanted_mask
= R_MASK
| W_MASK
;
531 i
< mips_linux_watch_get_num_valid (&watch_readback
) && cnt
;
534 irw_mask
= mips_linux_watch_get_irw_mask (&watch_readback
, i
);
535 if ((irw_mask
& wanted_mask
) == wanted_mask
)
538 return (cnt
== 0) ? 1 : 0;
541 /* Target to_stopped_by_watchpoint implementation. Return 1 if
542 stopped by watchpoint. The watchhi R and W bits indicate the watch
543 register triggered. */
546 mips_linux_stopped_by_watchpoint (struct target_ops
*ops
)
551 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
553 &watch_readback_valid
, 1))
556 num_valid
= mips_linux_watch_get_num_valid (&watch_readback
);
558 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
559 if (mips_linux_watch_get_watchhi (&watch_readback
, n
) & (R_MASK
| W_MASK
))
565 /* Target to_stopped_data_address implementation. Set the address
566 where the watch triggered (if known). Return 1 if the address was
570 mips_linux_stopped_data_address (struct target_ops
*t
, CORE_ADDR
*paddr
)
572 /* On mips we don't know the low order 3 bits of the data address,
573 so we must return false. */
577 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
578 the specified region can be covered by the watch registers. */
581 mips_linux_region_ok_for_hw_watchpoint (struct target_ops
*self
,
582 CORE_ADDR addr
, int len
)
584 struct pt_watch_regs dummy_regs
;
587 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
589 &watch_readback_valid
, 0))
592 dummy_regs
= watch_readback
;
593 /* Clear them out. */
594 for (i
= 0; i
< mips_linux_watch_get_num_valid (&dummy_regs
); i
++)
595 mips_linux_watch_set_watchlo (&dummy_regs
, i
, 0);
596 return mips_linux_watch_try_one_watch (&dummy_regs
, addr
, len
, 0);
599 /* Write the mirrored watch register values for each thread. */
602 write_watchpoint_regs (void)
609 tid
= ptid_get_lwp (lp
->ptid
);
610 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
, NULL
) == -1)
611 perror_with_name (_("Couldn't write debug register"));
616 /* linux_nat new_thread implementation. Write the mirrored watch
617 register values for the new thread. */
620 mips_linux_new_thread (struct lwp_info
*lp
)
622 long tid
= lp
->ptid
.lwp ();
624 if (!mips_linux_read_watch_registers (tid
,
626 &watch_readback_valid
, 0))
629 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
, NULL
) == -1)
630 perror_with_name (_("Couldn't write debug register"));
633 /* Target to_insert_watchpoint implementation. Try to insert a new
634 watch. Return zero on success. */
637 mips_linux_insert_watchpoint (struct target_ops
*self
,
638 CORE_ADDR addr
, int len
,
639 enum target_hw_bp_type type
,
640 struct expression
*cond
)
642 struct pt_watch_regs regs
;
643 struct mips_watchpoint
*new_watch
;
644 struct mips_watchpoint
**pw
;
649 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid
),
651 &watch_readback_valid
, 0))
657 regs
= watch_readback
;
658 /* Add the current watches. */
659 mips_linux_watch_populate_regs (current_watches
, ®s
);
661 /* Now try to add the new watch. */
662 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
,
663 mips_linux_watch_type_to_irw (type
)))
666 /* It fit. Stick it on the end of the list. */
667 new_watch
= XNEW (struct mips_watchpoint
);
668 new_watch
->addr
= addr
;
669 new_watch
->len
= len
;
670 new_watch
->type
= type
;
671 new_watch
->next
= NULL
;
673 pw
= ¤t_watches
;
679 retval
= write_watchpoint_regs ();
682 mips_show_dr ("insert_watchpoint", addr
, len
, type
);
687 /* Target to_remove_watchpoint implementation. Try to remove a watch.
688 Return zero on success. */
691 mips_linux_remove_watchpoint (struct target_ops
*self
,
692 CORE_ADDR addr
, int len
,
693 enum target_hw_bp_type type
,
694 struct expression
*cond
)
699 struct mips_watchpoint
**pw
;
700 struct mips_watchpoint
*w
;
702 /* Search for a known watch that matches. Then unlink and free
705 pw
= ¤t_watches
;
708 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== type
)
719 return -1; /* We don't know about it, fail doing nothing. */
721 /* At this point watch_readback is known to be valid because we
722 could not have added the watch without reading it. */
723 gdb_assert (watch_readback_valid
== 1);
725 watch_mirror
= watch_readback
;
726 mips_linux_watch_populate_regs (current_watches
, &watch_mirror
);
728 retval
= write_watchpoint_regs ();
731 mips_show_dr ("remove_watchpoint", addr
, len
, type
);
736 /* Target to_close implementation. Free any watches and call the
737 super implementation. */
740 mips_linux_close (struct target_ops
*self
)
742 struct mips_watchpoint
*w
;
743 struct mips_watchpoint
*nw
;
745 /* Clean out the current_watches list. */
753 current_watches
= NULL
;
760 _initialize_mips_linux_nat (void)
762 struct target_ops
*t
;
764 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
765 &show_debug_regs
, _("\
766 Set whether to show variables that mirror the mips debug registers."), _("\
767 Show whether to show variables that mirror the mips debug registers."), _("\
768 Use \"on\" to enable, \"off\" to disable.\n\
769 If enabled, the debug registers values are shown when GDB inserts\n\
770 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
771 triggers a breakpoint or watchpoint."),
774 &maintenance_set_cmdlist
,
775 &maintenance_show_cmdlist
);
777 t
= linux_trad_target (mips_linux_register_u_offset
);
779 super_close
= t
->to_close
;
780 t
->to_close
= mips_linux_close
;
782 super_fetch_registers
= t
->to_fetch_registers
;
783 super_store_registers
= t
->to_store_registers
;
785 t
->to_fetch_registers
= mips64_linux_fetch_registers
;
786 t
->to_store_registers
= mips64_linux_store_registers
;
788 t
->to_can_use_hw_breakpoint
= mips_linux_can_use_hw_breakpoint
;
789 t
->to_remove_watchpoint
= mips_linux_remove_watchpoint
;
790 t
->to_insert_watchpoint
= mips_linux_insert_watchpoint
;
791 t
->to_stopped_by_watchpoint
= mips_linux_stopped_by_watchpoint
;
792 t
->to_stopped_data_address
= mips_linux_stopped_data_address
;
793 t
->to_region_ok_for_hw_watchpoint
= mips_linux_region_ok_for_hw_watchpoint
;
795 t
->to_read_description
= mips_linux_read_description
;
797 linux_nat_add_target (t
);
798 linux_nat_set_new_thread (t
, mips_linux_new_thread
);