1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2002, 2004-2012 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
30 #include "trad-frame.h"
31 #include "tramp-frame.h"
34 #include "solib-svr4.h"
37 #include "target-descriptions.h"
39 #include "mips-linux-tdep.h"
40 #include "glibc-tdep.h"
41 #include "linux-tdep.h"
42 #include "xml-syscall.h"
44 static struct target_so_ops mips_svr4_so_ops
;
46 /* Figure out where the longjmp will land.
47 We expect the first arg to be a pointer to the jmp_buf structure
48 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
49 at. The pc is copied into PC. This routine returns 1 on
52 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
53 #define MIPS_LINUX_JB_PC 0
56 mips_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
59 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
60 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
61 char buf
[gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
];
63 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
65 if (target_read_memory (jb_addr
66 + MIPS_LINUX_JB_PC
* MIPS_LINUX_JB_ELEMENT_SIZE
,
67 buf
, gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
70 *pc
= extract_unsigned_integer (buf
,
71 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
77 /* Transform the bits comprising a 32-bit register to the right size
78 for regcache_raw_supply(). This is needed when mips_isa_regsize()
82 supply_32bit_reg (struct regcache
*regcache
, int regnum
, const void *addr
)
84 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
85 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
86 gdb_byte buf
[MAX_REGISTER_SIZE
];
87 store_signed_integer (buf
, register_size (gdbarch
, regnum
), byte_order
,
88 extract_signed_integer (addr
, 4, byte_order
));
89 regcache_raw_supply (regcache
, regnum
, buf
);
92 /* Unpack an elf_gregset_t into GDB's register cache. */
95 mips_supply_gregset (struct regcache
*regcache
,
96 const mips_elf_gregset_t
*gregsetp
)
99 const mips_elf_greg_t
*regp
= *gregsetp
;
100 char zerobuf
[MAX_REGISTER_SIZE
];
101 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
103 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
105 for (regi
= EF_REG0
+ 1; regi
<= EF_REG31
; regi
++)
106 supply_32bit_reg (regcache
, regi
- EF_REG0
, regp
+ regi
);
108 if (mips_linux_restart_reg_p (gdbarch
))
109 supply_32bit_reg (regcache
, MIPS_RESTART_REGNUM
, regp
+ EF_REG0
);
111 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->lo
, regp
+ EF_LO
);
112 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->hi
, regp
+ EF_HI
);
114 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
116 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
117 regp
+ EF_CP0_BADVADDR
);
118 supply_32bit_reg (regcache
, MIPS_PS_REGNUM
, regp
+ EF_CP0_STATUS
);
119 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
120 regp
+ EF_CP0_CAUSE
);
122 /* Fill inaccessible registers with zero. */
123 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
124 regcache_raw_supply (regcache
, MIPS_UNUSED_REGNUM
, zerobuf
);
125 for (regi
= MIPS_FIRST_EMBED_REGNUM
;
126 regi
<= MIPS_LAST_EMBED_REGNUM
;
128 regcache_raw_supply (regcache
, regi
, zerobuf
);
132 mips_supply_gregset_wrapper (const struct regset
*regset
,
133 struct regcache
*regcache
,
134 int regnum
, const void *gregs
, size_t len
)
136 gdb_assert (len
== sizeof (mips_elf_gregset_t
));
138 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*)gregs
);
141 /* Pack our registers (or one register) into an elf_gregset_t. */
144 mips_fill_gregset (const struct regcache
*regcache
,
145 mips_elf_gregset_t
*gregsetp
, int regno
)
147 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
149 mips_elf_greg_t
*regp
= *gregsetp
;
154 memset (regp
, 0, sizeof (mips_elf_gregset_t
));
155 for (regi
= 1; regi
< 32; regi
++)
156 mips_fill_gregset (regcache
, gregsetp
, regi
);
157 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
158 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
159 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
160 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->badvaddr
);
161 mips_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
162 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
163 mips_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
167 if (regno
> 0 && regno
< 32)
169 dst
= regp
+ regno
+ EF_REG0
;
170 regcache_raw_collect (regcache
, regno
, dst
);
174 if (regno
== mips_regnum (gdbarch
)->lo
)
176 else if (regno
== mips_regnum (gdbarch
)->hi
)
178 else if (regno
== mips_regnum (gdbarch
)->pc
)
179 regaddr
= EF_CP0_EPC
;
180 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
181 regaddr
= EF_CP0_BADVADDR
;
182 else if (regno
== MIPS_PS_REGNUM
)
183 regaddr
= EF_CP0_STATUS
;
184 else if (regno
== mips_regnum (gdbarch
)->cause
)
185 regaddr
= EF_CP0_CAUSE
;
186 else if (mips_linux_restart_reg_p (gdbarch
)
187 && regno
== MIPS_RESTART_REGNUM
)
194 dst
= regp
+ regaddr
;
195 regcache_raw_collect (regcache
, regno
, dst
);
200 mips_fill_gregset_wrapper (const struct regset
*regset
,
201 const struct regcache
*regcache
,
202 int regnum
, void *gregs
, size_t len
)
204 gdb_assert (len
== sizeof (mips_elf_gregset_t
));
206 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*)gregs
, regnum
);
209 /* Likewise, unpack an elf_fpregset_t. */
212 mips_supply_fpregset (struct regcache
*regcache
,
213 const mips_elf_fpregset_t
*fpregsetp
)
215 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
217 char zerobuf
[MAX_REGISTER_SIZE
];
219 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
221 for (regi
= 0; regi
< 32; regi
++)
222 regcache_raw_supply (regcache
,
223 gdbarch_fp0_regnum (gdbarch
) + regi
,
226 regcache_raw_supply (regcache
,
227 mips_regnum (gdbarch
)->fp_control_status
,
230 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
231 regcache_raw_supply (regcache
,
232 mips_regnum (gdbarch
)->fp_implementation_revision
,
237 mips_supply_fpregset_wrapper (const struct regset
*regset
,
238 struct regcache
*regcache
,
239 int regnum
, const void *gregs
, size_t len
)
241 gdb_assert (len
== sizeof (mips_elf_fpregset_t
));
243 mips_supply_fpregset (regcache
, (const mips_elf_fpregset_t
*)gregs
);
246 /* Likewise, pack one or all floating point registers into an
250 mips_fill_fpregset (const struct regcache
*regcache
,
251 mips_elf_fpregset_t
*fpregsetp
, int regno
)
253 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
256 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
257 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
259 to
= (char *) (*fpregsetp
+ regno
- gdbarch_fp0_regnum (gdbarch
));
260 regcache_raw_collect (regcache
, regno
, to
);
262 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
264 to
= (char *) (*fpregsetp
+ 32);
265 regcache_raw_collect (regcache
, regno
, to
);
267 else if (regno
== -1)
271 for (regi
= 0; regi
< 32; regi
++)
272 mips_fill_fpregset (regcache
, fpregsetp
,
273 gdbarch_fp0_regnum (gdbarch
) + regi
);
274 mips_fill_fpregset (regcache
, fpregsetp
,
275 mips_regnum (gdbarch
)->fp_control_status
);
280 mips_fill_fpregset_wrapper (const struct regset
*regset
,
281 const struct regcache
*regcache
,
282 int regnum
, void *gregs
, size_t len
)
284 gdb_assert (len
== sizeof (mips_elf_fpregset_t
));
286 mips_fill_fpregset (regcache
, (mips_elf_fpregset_t
*)gregs
, regnum
);
289 /* Support for 64-bit ABIs. */
291 /* Figure out where the longjmp will land.
292 We expect the first arg to be a pointer to the jmp_buf structure
293 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
294 at. The pc is copied into PC. This routine returns 1 on
297 /* Details about jmp_buf. */
299 #define MIPS64_LINUX_JB_PC 0
302 mips64_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
305 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
306 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
307 void *buf
= alloca (gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
);
308 int element_size
= gdbarch_ptr_bit (gdbarch
) == 32 ? 4 : 8;
310 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
312 if (target_read_memory (jb_addr
+ MIPS64_LINUX_JB_PC
* element_size
,
314 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
317 *pc
= extract_unsigned_integer (buf
,
318 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
324 /* Register set support functions. These operate on standard 64-bit
325 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
326 target will still use the 64-bit format for PTRACE_GETREGS. */
328 /* Supply a 64-bit register. */
331 supply_64bit_reg (struct regcache
*regcache
, int regnum
,
334 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
335 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
336 && register_size (gdbarch
, regnum
) == 4)
337 regcache_raw_supply (regcache
, regnum
, buf
+ 4);
339 regcache_raw_supply (regcache
, regnum
, buf
);
342 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
345 mips64_supply_gregset (struct regcache
*regcache
,
346 const mips64_elf_gregset_t
*gregsetp
)
349 const mips64_elf_greg_t
*regp
= *gregsetp
;
350 gdb_byte zerobuf
[MAX_REGISTER_SIZE
];
351 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
353 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
355 for (regi
= MIPS64_EF_REG0
+ 1; regi
<= MIPS64_EF_REG31
; regi
++)
356 supply_64bit_reg (regcache
, regi
- MIPS64_EF_REG0
,
357 (const gdb_byte
*)(regp
+ regi
));
359 if (mips_linux_restart_reg_p (gdbarch
))
360 supply_64bit_reg (regcache
, MIPS_RESTART_REGNUM
,
361 (const gdb_byte
*)(regp
+ MIPS64_EF_REG0
));
363 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->lo
,
364 (const gdb_byte
*) (regp
+ MIPS64_EF_LO
));
365 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->hi
,
366 (const gdb_byte
*) (regp
+ MIPS64_EF_HI
));
368 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
369 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_EPC
));
370 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
371 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_BADVADDR
));
372 supply_64bit_reg (regcache
, MIPS_PS_REGNUM
,
373 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_STATUS
));
374 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
375 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_CAUSE
));
377 /* Fill inaccessible registers with zero. */
378 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
379 regcache_raw_supply (regcache
, MIPS_UNUSED_REGNUM
, zerobuf
);
380 for (regi
= MIPS_FIRST_EMBED_REGNUM
;
381 regi
<= MIPS_LAST_EMBED_REGNUM
;
383 regcache_raw_supply (regcache
, regi
, zerobuf
);
387 mips64_supply_gregset_wrapper (const struct regset
*regset
,
388 struct regcache
*regcache
,
389 int regnum
, const void *gregs
, size_t len
)
391 gdb_assert (len
== sizeof (mips64_elf_gregset_t
));
393 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*)gregs
);
396 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
399 mips64_fill_gregset (const struct regcache
*regcache
,
400 mips64_elf_gregset_t
*gregsetp
, int regno
)
402 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
403 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
405 mips64_elf_greg_t
*regp
= *gregsetp
;
410 memset (regp
, 0, sizeof (mips64_elf_gregset_t
));
411 for (regi
= 1; regi
< 32; regi
++)
412 mips64_fill_gregset (regcache
, gregsetp
, regi
);
413 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
414 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
415 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
416 mips64_fill_gregset (regcache
, gregsetp
,
417 mips_regnum (gdbarch
)->badvaddr
);
418 mips64_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
419 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
420 mips64_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
424 if (regno
> 0 && regno
< 32)
425 regaddr
= regno
+ MIPS64_EF_REG0
;
426 else if (regno
== mips_regnum (gdbarch
)->lo
)
427 regaddr
= MIPS64_EF_LO
;
428 else if (regno
== mips_regnum (gdbarch
)->hi
)
429 regaddr
= MIPS64_EF_HI
;
430 else if (regno
== mips_regnum (gdbarch
)->pc
)
431 regaddr
= MIPS64_EF_CP0_EPC
;
432 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
433 regaddr
= MIPS64_EF_CP0_BADVADDR
;
434 else if (regno
== MIPS_PS_REGNUM
)
435 regaddr
= MIPS64_EF_CP0_STATUS
;
436 else if (regno
== mips_regnum (gdbarch
)->cause
)
437 regaddr
= MIPS64_EF_CP0_CAUSE
;
438 else if (mips_linux_restart_reg_p (gdbarch
)
439 && regno
== MIPS_RESTART_REGNUM
)
440 regaddr
= MIPS64_EF_REG0
;
446 gdb_byte buf
[MAX_REGISTER_SIZE
];
449 regcache_raw_collect (regcache
, regno
, buf
);
450 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
452 dst
= regp
+ regaddr
;
453 store_signed_integer (dst
, 8, byte_order
, val
);
458 mips64_fill_gregset_wrapper (const struct regset
*regset
,
459 const struct regcache
*regcache
,
460 int regnum
, void *gregs
, size_t len
)
462 gdb_assert (len
== sizeof (mips64_elf_gregset_t
));
464 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*)gregs
, regnum
);
467 /* Likewise, unpack an elf_fpregset_t. */
470 mips64_supply_fpregset (struct regcache
*regcache
,
471 const mips64_elf_fpregset_t
*fpregsetp
)
473 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
476 /* See mips_linux_o32_sigframe_init for a description of the
477 peculiar FP register layout. */
478 if (register_size (gdbarch
, gdbarch_fp0_regnum (gdbarch
)) == 4)
479 for (regi
= 0; regi
< 32; regi
++)
481 const gdb_byte
*reg_ptr
= (const gdb_byte
*)(*fpregsetp
+ (regi
& ~1));
482 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
484 regcache_raw_supply (regcache
,
485 gdbarch_fp0_regnum (gdbarch
) + regi
,
489 for (regi
= 0; regi
< 32; regi
++)
490 regcache_raw_supply (regcache
,
491 gdbarch_fp0_regnum (gdbarch
) + regi
,
492 (const char *)(*fpregsetp
+ regi
));
494 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->fp_control_status
,
495 (const gdb_byte
*)(*fpregsetp
+ 32));
497 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
498 include it - but the result of PTRACE_GETFPREGS does. The best we
499 can do is to assume that its value is present. */
500 supply_32bit_reg (regcache
,
501 mips_regnum (gdbarch
)->fp_implementation_revision
,
502 (const gdb_byte
*)(*fpregsetp
+ 32) + 4);
506 mips64_supply_fpregset_wrapper (const struct regset
*regset
,
507 struct regcache
*regcache
,
508 int regnum
, const void *gregs
, size_t len
)
510 gdb_assert (len
== sizeof (mips64_elf_fpregset_t
));
512 mips64_supply_fpregset (regcache
, (const mips64_elf_fpregset_t
*)gregs
);
515 /* Likewise, pack one or all floating point registers into an
519 mips64_fill_fpregset (const struct regcache
*regcache
,
520 mips64_elf_fpregset_t
*fpregsetp
, int regno
)
522 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
523 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
526 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
527 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
529 /* See mips_linux_o32_sigframe_init for a description of the
530 peculiar FP register layout. */
531 if (register_size (gdbarch
, regno
) == 4)
533 int regi
= regno
- gdbarch_fp0_regnum (gdbarch
);
535 to
= (gdb_byte
*) (*fpregsetp
+ (regi
& ~1));
536 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
538 regcache_raw_collect (regcache
, regno
, to
);
542 to
= (gdb_byte
*) (*fpregsetp
+ regno
543 - gdbarch_fp0_regnum (gdbarch
));
544 regcache_raw_collect (regcache
, regno
, to
);
547 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
549 gdb_byte buf
[MAX_REGISTER_SIZE
];
552 regcache_raw_collect (regcache
, regno
, buf
);
553 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
555 to
= (gdb_byte
*) (*fpregsetp
+ 32);
556 store_signed_integer (to
, 4, byte_order
, val
);
558 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
560 gdb_byte buf
[MAX_REGISTER_SIZE
];
563 regcache_raw_collect (regcache
, regno
, buf
);
564 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
566 to
= (gdb_byte
*) (*fpregsetp
+ 32) + 4;
567 store_signed_integer (to
, 4, byte_order
, val
);
569 else if (regno
== -1)
573 for (regi
= 0; regi
< 32; regi
++)
574 mips64_fill_fpregset (regcache
, fpregsetp
,
575 gdbarch_fp0_regnum (gdbarch
) + regi
);
576 mips64_fill_fpregset (regcache
, fpregsetp
,
577 mips_regnum (gdbarch
)->fp_control_status
);
578 mips64_fill_fpregset (regcache
, fpregsetp
,
579 (mips_regnum (gdbarch
)
580 ->fp_implementation_revision
));
585 mips64_fill_fpregset_wrapper (const struct regset
*regset
,
586 const struct regcache
*regcache
,
587 int regnum
, void *gregs
, size_t len
)
589 gdb_assert (len
== sizeof (mips64_elf_fpregset_t
));
591 mips64_fill_fpregset (regcache
, (mips64_elf_fpregset_t
*)gregs
, regnum
);
594 const struct regset
*
595 mips_linux_regset_from_core_section (struct gdbarch
*gdbarch
,
596 const char *sect_name
, size_t sect_size
)
598 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
599 mips_elf_gregset_t gregset
;
600 mips_elf_fpregset_t fpregset
;
601 mips64_elf_gregset_t gregset64
;
602 mips64_elf_fpregset_t fpregset64
;
604 if (strcmp (sect_name
, ".reg") == 0)
606 if (sect_size
== sizeof (gregset
))
608 if (tdep
->gregset
== NULL
)
609 tdep
->gregset
= regset_alloc (gdbarch
,
610 mips_supply_gregset_wrapper
,
611 mips_fill_gregset_wrapper
);
612 return tdep
->gregset
;
614 else if (sect_size
== sizeof (gregset64
))
616 if (tdep
->gregset64
== NULL
)
617 tdep
->gregset64
= regset_alloc (gdbarch
,
618 mips64_supply_gregset_wrapper
,
619 mips64_fill_gregset_wrapper
);
620 return tdep
->gregset64
;
624 warning (_("wrong size gregset struct in core file"));
627 else if (strcmp (sect_name
, ".reg2") == 0)
629 if (sect_size
== sizeof (fpregset
))
631 if (tdep
->fpregset
== NULL
)
632 tdep
->fpregset
= regset_alloc (gdbarch
,
633 mips_supply_fpregset_wrapper
,
634 mips_fill_fpregset_wrapper
);
635 return tdep
->fpregset
;
637 else if (sect_size
== sizeof (fpregset64
))
639 if (tdep
->fpregset64
== NULL
)
640 tdep
->fpregset64
= regset_alloc (gdbarch
,
641 mips64_supply_fpregset_wrapper
,
642 mips64_fill_fpregset_wrapper
);
643 return tdep
->fpregset64
;
647 warning (_("wrong size fpregset struct in core file"));
654 static const struct target_desc
*
655 mips_linux_core_read_description (struct gdbarch
*gdbarch
,
656 struct target_ops
*target
,
659 asection
*section
= bfd_get_section_by_name (abfd
, ".reg");
663 switch (bfd_section_size (abfd
, section
))
665 case sizeof (mips_elf_gregset_t
):
666 return mips_tdesc_gp32
;
668 case sizeof (mips64_elf_gregset_t
):
669 return mips_tdesc_gp64
;
677 /* Check the code at PC for a dynamic linker lazy resolution stub.
678 Because they aren't in the .plt section, we pattern-match on the
679 code generated by GNU ld. They look like this:
686 (with the appropriate doubleword instructions for N64). Also
687 return the dynamic symbol index used in the last instruction. */
690 mips_linux_in_dynsym_stub (CORE_ADDR pc
, char *name
)
692 unsigned char buf
[28], *p
;
693 ULONGEST insn
, insn1
;
694 int n64
= (mips_abi (target_gdbarch
) == MIPS_ABI_N64
);
695 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch
);
697 read_memory (pc
- 12, buf
, 28);
701 /* ld t9,0x8010(gp) */
706 /* lw t9,0x8010(gp) */
713 insn
= extract_unsigned_integer (p
, 4, byte_order
);
721 insn
= extract_unsigned_integer (p
+ 4, 4, byte_order
);
725 if (insn
!= 0x03e0782d)
731 if (insn
!= 0x03e07821)
735 insn
= extract_unsigned_integer (p
+ 8, 4, byte_order
);
737 if (insn
!= 0x0320f809)
740 insn
= extract_unsigned_integer (p
+ 12, 4, byte_order
);
743 /* daddiu t8,zero,0 */
744 if ((insn
& 0xffff0000) != 0x64180000)
749 /* addiu t8,zero,0 */
750 if ((insn
& 0xffff0000) != 0x24180000)
754 return (insn
& 0xffff);
757 /* Return non-zero iff PC belongs to the dynamic linker resolution
758 code, a PLT entry, or a lazy binding stub. */
761 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc
)
763 /* Check whether PC is in the dynamic linker. This also checks
764 whether it is in the .plt section, used by non-PIC executables. */
765 if (svr4_in_dynsym_resolve_code (pc
))
768 /* Pattern match for the stub. It would be nice if there were a
769 more efficient way to avoid this check. */
770 if (mips_linux_in_dynsym_stub (pc
, NULL
))
776 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
777 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
778 implementation of this triggers at "fixup" from the same objfile as
779 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
780 "__dl_runtime_resolve" directly. An unresolved lazy binding
781 stub will point to _dl_runtime_resolve, which will first call
782 __dl_runtime_resolve, and then pass control to the resolved
786 mips_linux_skip_resolver (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
788 struct minimal_symbol
*resolver
;
790 resolver
= lookup_minimal_symbol ("__dl_runtime_resolve", NULL
, NULL
);
792 if (resolver
&& SYMBOL_VALUE_ADDRESS (resolver
) == pc
)
793 return frame_unwind_caller_pc (get_current_frame ());
795 return glibc_skip_solib_resolver (gdbarch
, pc
);
798 /* Signal trampoline support. There are four supported layouts for a
799 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
800 n64 rt_sigframe. We handle them all independently; not the most
801 efficient way, but simplest. First, declare all the unwinders. */
803 static void mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
804 struct frame_info
*this_frame
,
805 struct trad_frame_cache
*this_cache
,
808 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
809 struct frame_info
*this_frame
,
810 struct trad_frame_cache
*this_cache
,
813 #define MIPS_NR_LINUX 4000
814 #define MIPS_NR_N64_LINUX 5000
815 #define MIPS_NR_N32_LINUX 6000
817 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
818 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
819 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
820 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
822 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
823 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
824 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
825 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
826 #define MIPS_INST_SYSCALL 0x0000000c
828 static const struct tramp_frame mips_linux_o32_sigframe
= {
832 { MIPS_INST_LI_V0_SIGRETURN
, -1 },
833 { MIPS_INST_SYSCALL
, -1 },
834 { TRAMP_SENTINEL_INSN
, -1 }
836 mips_linux_o32_sigframe_init
839 static const struct tramp_frame mips_linux_o32_rt_sigframe
= {
843 { MIPS_INST_LI_V0_RT_SIGRETURN
, -1 },
844 { MIPS_INST_SYSCALL
, -1 },
845 { TRAMP_SENTINEL_INSN
, -1 } },
846 mips_linux_o32_sigframe_init
849 static const struct tramp_frame mips_linux_n32_rt_sigframe
= {
853 { MIPS_INST_LI_V0_N32_RT_SIGRETURN
, -1 },
854 { MIPS_INST_SYSCALL
, -1 },
855 { TRAMP_SENTINEL_INSN
, -1 }
857 mips_linux_n32n64_sigframe_init
860 static const struct tramp_frame mips_linux_n64_rt_sigframe
= {
864 { MIPS_INST_LI_V0_N64_RT_SIGRETURN
, -1 },
865 { MIPS_INST_SYSCALL
, -1 },
866 { TRAMP_SENTINEL_INSN
, -1 }
868 mips_linux_n32n64_sigframe_init
872 /* The unwinder for o32 signal frames. The legacy structures look
876 u32 sf_ass[4]; [argument save space for o32]
877 u32 sf_code[2]; [signal trampoline or fill]
878 struct sigcontext sf_sc;
883 unsigned int sc_regmask; [Unused]
884 unsigned int sc_status;
885 unsigned long long sc_pc;
886 unsigned long long sc_regs[32];
887 unsigned long long sc_fpregs[32];
888 unsigned int sc_ownedfp;
889 unsigned int sc_fpc_csr;
890 unsigned int sc_fpc_eir; [Unused]
891 unsigned int sc_used_math;
892 unsigned int sc_ssflags; [Unused]
893 [Alignment hole of four bytes]
894 unsigned long long sc_mdhi;
895 unsigned long long sc_mdlo;
897 unsigned int sc_cause; [Unused]
898 unsigned int sc_badvaddr; [Unused]
900 unsigned long sc_sigset[4]; [kernel's sigset_t]
903 The RT signal frames look like this:
906 u32 rs_ass[4]; [argument save space for o32]
907 u32 rs_code[2] [signal trampoline or fill]
908 struct siginfo rs_info;
909 struct ucontext rs_uc;
913 unsigned long uc_flags;
914 struct ucontext *uc_link;
916 [Alignment hole of four bytes]
917 struct sigcontext uc_mcontext;
922 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
924 #define RTSIGFRAME_SIGINFO_SIZE 128
925 #define STACK_T_SIZE (3 * 4)
926 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
927 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
928 + RTSIGFRAME_SIGINFO_SIZE \
929 + UCONTEXT_SIGCONTEXT_OFFSET)
931 #define SIGCONTEXT_PC (1 * 8)
932 #define SIGCONTEXT_REGS (2 * 8)
933 #define SIGCONTEXT_FPREGS (34 * 8)
934 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
935 #define SIGCONTEXT_HI (69 * 8)
936 #define SIGCONTEXT_LO (70 * 8)
937 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
938 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
940 #define SIGCONTEXT_REG_SIZE 8
943 mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
944 struct frame_info
*this_frame
,
945 struct trad_frame_cache
*this_cache
,
948 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
949 int ireg
, reg_position
;
950 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
951 CORE_ADDR sigcontext_base
;
952 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
955 if (self
== &mips_linux_o32_sigframe
)
956 sigcontext_base
= frame_sp
+ SIGFRAME_SIGCONTEXT_OFFSET
;
958 sigcontext_base
= frame_sp
+ RTSIGFRAME_SIGCONTEXT_OFFSET
;
960 /* I'm not proud of this hack. Eventually we will have the
961 infrastructure to indicate the size of saved registers on a
962 per-frame basis, but right now we don't; the kernel saves eight
963 bytes but we only want four. Use regs_base to access any
965 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
966 regs_base
= sigcontext_base
+ 4;
968 regs_base
= sigcontext_base
;
970 if (mips_linux_restart_reg_p (gdbarch
))
971 trad_frame_set_reg_addr (this_cache
,
973 + gdbarch_num_regs (gdbarch
)),
974 regs_base
+ SIGCONTEXT_REGS
);
976 for (ireg
= 1; ireg
< 32; ireg
++)
977 trad_frame_set_reg_addr (this_cache
,
978 ireg
+ MIPS_ZERO_REGNUM
979 + gdbarch_num_regs (gdbarch
),
980 regs_base
+ SIGCONTEXT_REGS
981 + ireg
* SIGCONTEXT_REG_SIZE
);
983 /* The way that floating point registers are saved, unfortunately,
984 depends on the architecture the kernel is built for. For the r3000 and
985 tx39, four bytes of each register are at the beginning of each of the
986 32 eight byte slots. For everything else, the registers are saved
987 using double precision; only the even-numbered slots are initialized,
988 and the high bits are the odd-numbered register. Assume the latter
989 layout, since we can't tell, and it's much more common. Which bits are
990 the "high" bits depends on endianness. */
991 for (ireg
= 0; ireg
< 32; ireg
++)
992 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (ireg
& 1))
993 trad_frame_set_reg_addr (this_cache
,
995 gdbarch_num_regs (gdbarch
),
996 sigcontext_base
+ SIGCONTEXT_FPREGS
+ 4
997 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
999 trad_frame_set_reg_addr (this_cache
,
1001 + gdbarch_num_regs (gdbarch
),
1002 sigcontext_base
+ SIGCONTEXT_FPREGS
1003 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
1005 trad_frame_set_reg_addr (this_cache
,
1006 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1007 regs_base
+ SIGCONTEXT_PC
);
1009 trad_frame_set_reg_addr (this_cache
,
1010 regs
->fp_control_status
1011 + gdbarch_num_regs (gdbarch
),
1012 sigcontext_base
+ SIGCONTEXT_FPCSR
);
1013 trad_frame_set_reg_addr (this_cache
,
1014 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1015 regs_base
+ SIGCONTEXT_HI
);
1016 trad_frame_set_reg_addr (this_cache
,
1017 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1018 regs_base
+ SIGCONTEXT_LO
);
1019 trad_frame_set_reg_addr (this_cache
,
1020 regs
->cause
+ gdbarch_num_regs (gdbarch
),
1021 sigcontext_base
+ SIGCONTEXT_CAUSE
);
1022 trad_frame_set_reg_addr (this_cache
,
1023 regs
->badvaddr
+ gdbarch_num_regs (gdbarch
),
1024 sigcontext_base
+ SIGCONTEXT_BADVADDR
);
1026 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1027 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1031 /* For N32/N64 things look different. There is no non-rt signal frame.
1033 struct rt_sigframe_n32 {
1034 u32 rs_ass[4]; [ argument save space for o32 ]
1035 u32 rs_code[2]; [ signal trampoline or fill ]
1036 struct siginfo rs_info;
1037 struct ucontextn32 rs_uc;
1040 struct ucontextn32 {
1044 struct sigcontext uc_mcontext;
1045 sigset_t uc_sigmask; [ mask last for extensibility ]
1048 struct rt_sigframe {
1049 u32 rs_ass[4]; [ argument save space for o32 ]
1050 u32 rs_code[2]; [ signal trampoline ]
1051 struct siginfo rs_info;
1052 struct ucontext rs_uc;
1056 unsigned long uc_flags;
1057 struct ucontext *uc_link;
1059 struct sigcontext uc_mcontext;
1060 sigset_t uc_sigmask; [ mask last for extensibility ]
1063 And the sigcontext is different (this is for both n32 and n64):
1066 unsigned long long sc_regs[32];
1067 unsigned long long sc_fpregs[32];
1068 unsigned long long sc_mdhi;
1069 unsigned long long sc_hi1;
1070 unsigned long long sc_hi2;
1071 unsigned long long sc_hi3;
1072 unsigned long long sc_mdlo;
1073 unsigned long long sc_lo1;
1074 unsigned long long sc_lo2;
1075 unsigned long long sc_lo3;
1076 unsigned long long sc_pc;
1077 unsigned int sc_fpc_csr;
1078 unsigned int sc_used_math;
1079 unsigned int sc_dsp;
1080 unsigned int sc_reserved;
1083 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1084 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1088 #define N32_STACK_T_SIZE STACK_T_SIZE
1089 #define N64_STACK_T_SIZE (2 * 8 + 4)
1090 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1091 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1092 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1093 + RTSIGFRAME_SIGINFO_SIZE \
1094 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1095 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1096 + RTSIGFRAME_SIGINFO_SIZE \
1097 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1099 #define N64_SIGCONTEXT_REGS (0 * 8)
1100 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1101 #define N64_SIGCONTEXT_HI (64 * 8)
1102 #define N64_SIGCONTEXT_LO (68 * 8)
1103 #define N64_SIGCONTEXT_PC (72 * 8)
1104 #define N64_SIGCONTEXT_FPCSR (73 * 8)
1106 #define N64_SIGCONTEXT_REG_SIZE 8
1109 mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
1110 struct frame_info
*this_frame
,
1111 struct trad_frame_cache
*this_cache
,
1114 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1115 int ireg
, reg_position
;
1116 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
1117 CORE_ADDR sigcontext_base
;
1118 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
1120 if (self
== &mips_linux_n32_rt_sigframe
)
1121 sigcontext_base
= frame_sp
+ N32_SIGFRAME_SIGCONTEXT_OFFSET
;
1123 sigcontext_base
= frame_sp
+ N64_SIGFRAME_SIGCONTEXT_OFFSET
;
1125 if (mips_linux_restart_reg_p (gdbarch
))
1126 trad_frame_set_reg_addr (this_cache
,
1127 (MIPS_RESTART_REGNUM
1128 + gdbarch_num_regs (gdbarch
)),
1129 sigcontext_base
+ N64_SIGCONTEXT_REGS
);
1131 for (ireg
= 1; ireg
< 32; ireg
++)
1132 trad_frame_set_reg_addr (this_cache
,
1133 ireg
+ MIPS_ZERO_REGNUM
1134 + gdbarch_num_regs (gdbarch
),
1135 sigcontext_base
+ N64_SIGCONTEXT_REGS
1136 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1138 for (ireg
= 0; ireg
< 32; ireg
++)
1139 trad_frame_set_reg_addr (this_cache
,
1141 + gdbarch_num_regs (gdbarch
),
1142 sigcontext_base
+ N64_SIGCONTEXT_FPREGS
1143 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1145 trad_frame_set_reg_addr (this_cache
,
1146 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1147 sigcontext_base
+ N64_SIGCONTEXT_PC
);
1149 trad_frame_set_reg_addr (this_cache
,
1150 regs
->fp_control_status
1151 + gdbarch_num_regs (gdbarch
),
1152 sigcontext_base
+ N64_SIGCONTEXT_FPCSR
);
1153 trad_frame_set_reg_addr (this_cache
,
1154 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1155 sigcontext_base
+ N64_SIGCONTEXT_HI
);
1156 trad_frame_set_reg_addr (this_cache
,
1157 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1158 sigcontext_base
+ N64_SIGCONTEXT_LO
);
1160 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1161 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1165 mips_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1167 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1168 regcache_cooked_write_unsigned (regcache
, gdbarch_pc_regnum (gdbarch
), pc
);
1170 /* Clear the syscall restart flag. */
1171 if (mips_linux_restart_reg_p (gdbarch
))
1172 regcache_cooked_write_unsigned (regcache
, MIPS_RESTART_REGNUM
, 0);
1175 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1178 mips_linux_restart_reg_p (struct gdbarch
*gdbarch
)
1180 /* If we do not have a target description with registers, then
1181 MIPS_RESTART_REGNUM will not be included in the register set. */
1182 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
1185 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1186 either be GPR-sized or missing. */
1187 return register_size (gdbarch
, MIPS_RESTART_REGNUM
) > 0;
1190 /* When FRAME is at a syscall instruction, return the PC of the next
1191 instruction to be executed. */
1194 mips_linux_syscall_next_pc (struct frame_info
*frame
)
1196 CORE_ADDR pc
= get_frame_pc (frame
);
1197 ULONGEST v0
= get_frame_register_unsigned (frame
, MIPS_V0_REGNUM
);
1199 /* If we are about to make a sigreturn syscall, use the unwinder to
1200 decode the signal frame. */
1201 if (v0
== MIPS_NR_sigreturn
1202 || v0
== MIPS_NR_rt_sigreturn
1203 || v0
== MIPS_NR_N64_rt_sigreturn
1204 || v0
== MIPS_NR_N32_rt_sigreturn
)
1205 return frame_unwind_caller_pc (get_current_frame ());
1210 /* Return the current system call's number present in the
1211 v0 register. When the function fails, it returns -1. */
1214 mips_linux_get_syscall_number (struct gdbarch
*gdbarch
,
1217 struct regcache
*regcache
= get_thread_regcache (ptid
);
1218 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1219 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1220 int regsize
= register_size (gdbarch
, MIPS_V0_REGNUM
);
1221 /* The content of a register */
1226 /* Make sure we're in a known ABI */
1227 gdb_assert (tdep
->mips_abi
== MIPS_ABI_O32
1228 || tdep
->mips_abi
== MIPS_ABI_N32
1229 || tdep
->mips_abi
== MIPS_ABI_N64
);
1231 gdb_assert (regsize
<= sizeof (buf
));
1233 /* Getting the system call number from the register.
1234 syscall number is in v0 or $2. */
1235 regcache_cooked_read (regcache
, MIPS_V0_REGNUM
, buf
);
1237 ret
= extract_signed_integer (buf
, regsize
, byte_order
);
1242 /* Initialize one of the GNU/Linux OS ABIs. */
1245 mips_linux_init_abi (struct gdbarch_info info
,
1246 struct gdbarch
*gdbarch
)
1248 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1249 enum mips_abi abi
= mips_abi (gdbarch
);
1250 struct tdesc_arch_data
*tdesc_data
= (void *) info
.tdep_info
;
1252 linux_init_abi (info
, gdbarch
);
1254 /* Get the syscall number from the arch's register. */
1255 set_gdbarch_get_syscall_number (gdbarch
, mips_linux_get_syscall_number
);
1260 set_gdbarch_get_longjmp_target (gdbarch
,
1261 mips_linux_get_longjmp_target
);
1262 set_solib_svr4_fetch_link_map_offsets
1263 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1264 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_sigframe
);
1265 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_rt_sigframe
);
1266 set_xml_syscall_file_name ("syscalls/mips-o32-linux.xml");
1269 set_gdbarch_get_longjmp_target (gdbarch
,
1270 mips_linux_get_longjmp_target
);
1271 set_solib_svr4_fetch_link_map_offsets
1272 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1273 set_gdbarch_long_double_bit (gdbarch
, 128);
1274 /* These floatformats should probably be renamed. MIPS uses
1275 the same 128-bit IEEE floating point format that IA-64 uses,
1276 except that the quiet/signalling NaN bit is reversed (GDB
1277 does not distinguish between quiet and signalling NaNs). */
1278 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1279 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n32_rt_sigframe
);
1280 set_xml_syscall_file_name ("syscalls/mips-n32-linux.xml");
1283 set_gdbarch_get_longjmp_target (gdbarch
,
1284 mips64_linux_get_longjmp_target
);
1285 set_solib_svr4_fetch_link_map_offsets
1286 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1287 set_gdbarch_long_double_bit (gdbarch
, 128);
1288 /* These floatformats should probably be renamed. MIPS uses
1289 the same 128-bit IEEE floating point format that IA-64 uses,
1290 except that the quiet/signalling NaN bit is reversed (GDB
1291 does not distinguish between quiet and signalling NaNs). */
1292 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1293 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n64_rt_sigframe
);
1294 set_xml_syscall_file_name ("syscalls/mips-n64-linux.xml");
1300 set_gdbarch_skip_solib_resolver (gdbarch
, mips_linux_skip_resolver
);
1302 set_gdbarch_software_single_step (gdbarch
, mips_software_single_step
);
1304 /* Enable TLS support. */
1305 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1306 svr4_fetch_objfile_link_map
);
1308 /* Initialize this lazily, to avoid an initialization order
1309 dependency on solib-svr4.c's _initialize routine. */
1310 if (mips_svr4_so_ops
.in_dynsym_resolve_code
== NULL
)
1312 mips_svr4_so_ops
= svr4_so_ops
;
1313 mips_svr4_so_ops
.in_dynsym_resolve_code
1314 = mips_linux_in_dynsym_resolve_code
;
1316 set_solib_ops (gdbarch
, &mips_svr4_so_ops
);
1318 set_gdbarch_write_pc (gdbarch
, mips_linux_write_pc
);
1320 set_gdbarch_core_read_description (gdbarch
,
1321 mips_linux_core_read_description
);
1323 set_gdbarch_regset_from_core_section (gdbarch
,
1324 mips_linux_regset_from_core_section
);
1326 tdep
->syscall_next_pc
= mips_linux_syscall_next_pc
;
1330 const struct tdesc_feature
*feature
;
1332 /* If we have target-described registers, then we can safely
1333 reserve a number for MIPS_RESTART_REGNUM (whether it is
1334 described or not). */
1335 gdb_assert (gdbarch_num_regs (gdbarch
) <= MIPS_RESTART_REGNUM
);
1336 set_gdbarch_num_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1338 /* If it's present, then assign it to the reserved number. */
1339 feature
= tdesc_find_feature (info
.target_desc
,
1340 "org.gnu.gdb.mips.linux");
1341 if (feature
!= NULL
)
1342 tdesc_numbered_register (feature
, tdesc_data
, MIPS_RESTART_REGNUM
,
1347 /* Provide a prototype to silence -Wmissing-prototypes. */
1348 extern initialize_file_ftype _initialize_mips_linux_tdep
;
1351 _initialize_mips_linux_tdep (void)
1353 const struct bfd_arch_info
*arch_info
;
1355 for (arch_info
= bfd_lookup_arch (bfd_arch_mips
, 0);
1357 arch_info
= arch_info
->next
)
1359 gdbarch_register_osabi (bfd_arch_mips
, arch_info
->mach
,
1361 mips_linux_init_abi
);