1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2002, 2004-2012 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "solib-svr4.h"
25 #include "mips-tdep.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
30 #include "trad-frame.h"
31 #include "tramp-frame.h"
34 #include "solib-svr4.h"
37 #include "target-descriptions.h"
39 #include "mips-linux-tdep.h"
40 #include "glibc-tdep.h"
41 #include "linux-tdep.h"
42 #include "xml-syscall.h"
44 static struct target_so_ops mips_svr4_so_ops
;
46 /* Figure out where the longjmp will land.
47 We expect the first arg to be a pointer to the jmp_buf structure
48 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
49 at. The pc is copied into PC. This routine returns 1 on
52 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
53 #define MIPS_LINUX_JB_PC 0
56 mips_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
59 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
60 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
61 char buf
[gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
];
63 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
65 if (target_read_memory (jb_addr
66 + MIPS_LINUX_JB_PC
* MIPS_LINUX_JB_ELEMENT_SIZE
,
67 buf
, gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
70 *pc
= extract_unsigned_integer (buf
,
71 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
77 /* Transform the bits comprising a 32-bit register to the right size
78 for regcache_raw_supply(). This is needed when mips_isa_regsize()
82 supply_32bit_reg (struct regcache
*regcache
, int regnum
, const void *addr
)
84 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
85 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
86 gdb_byte buf
[MAX_REGISTER_SIZE
];
87 store_signed_integer (buf
, register_size (gdbarch
, regnum
), byte_order
,
88 extract_signed_integer (addr
, 4, byte_order
));
89 regcache_raw_supply (regcache
, regnum
, buf
);
92 /* Unpack an elf_gregset_t into GDB's register cache. */
95 mips_supply_gregset (struct regcache
*regcache
,
96 const mips_elf_gregset_t
*gregsetp
)
99 const mips_elf_greg_t
*regp
= *gregsetp
;
100 char zerobuf
[MAX_REGISTER_SIZE
];
101 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
103 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
105 for (regi
= EF_REG0
+ 1; regi
<= EF_REG31
; regi
++)
106 supply_32bit_reg (regcache
, regi
- EF_REG0
, regp
+ regi
);
108 if (mips_linux_restart_reg_p (gdbarch
))
109 supply_32bit_reg (regcache
, MIPS_RESTART_REGNUM
, regp
+ EF_REG0
);
111 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->lo
, regp
+ EF_LO
);
112 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->hi
, regp
+ EF_HI
);
114 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
116 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
117 regp
+ EF_CP0_BADVADDR
);
118 supply_32bit_reg (regcache
, MIPS_PS_REGNUM
, regp
+ EF_CP0_STATUS
);
119 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
120 regp
+ EF_CP0_CAUSE
);
122 /* Fill the inaccessible zero register with zero. */
123 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
127 mips_supply_gregset_wrapper (const struct regset
*regset
,
128 struct regcache
*regcache
,
129 int regnum
, const void *gregs
, size_t len
)
131 gdb_assert (len
== sizeof (mips_elf_gregset_t
));
133 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*)gregs
);
136 /* Pack our registers (or one register) into an elf_gregset_t. */
139 mips_fill_gregset (const struct regcache
*regcache
,
140 mips_elf_gregset_t
*gregsetp
, int regno
)
142 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
144 mips_elf_greg_t
*regp
= *gregsetp
;
149 memset (regp
, 0, sizeof (mips_elf_gregset_t
));
150 for (regi
= 1; regi
< 32; regi
++)
151 mips_fill_gregset (regcache
, gregsetp
, regi
);
152 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
153 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
154 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
155 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->badvaddr
);
156 mips_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
157 mips_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
158 mips_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
162 if (regno
> 0 && regno
< 32)
164 dst
= regp
+ regno
+ EF_REG0
;
165 regcache_raw_collect (regcache
, regno
, dst
);
169 if (regno
== mips_regnum (gdbarch
)->lo
)
171 else if (regno
== mips_regnum (gdbarch
)->hi
)
173 else if (regno
== mips_regnum (gdbarch
)->pc
)
174 regaddr
= EF_CP0_EPC
;
175 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
176 regaddr
= EF_CP0_BADVADDR
;
177 else if (regno
== MIPS_PS_REGNUM
)
178 regaddr
= EF_CP0_STATUS
;
179 else if (regno
== mips_regnum (gdbarch
)->cause
)
180 regaddr
= EF_CP0_CAUSE
;
181 else if (mips_linux_restart_reg_p (gdbarch
)
182 && regno
== MIPS_RESTART_REGNUM
)
189 dst
= regp
+ regaddr
;
190 regcache_raw_collect (regcache
, regno
, dst
);
195 mips_fill_gregset_wrapper (const struct regset
*regset
,
196 const struct regcache
*regcache
,
197 int regnum
, void *gregs
, size_t len
)
199 gdb_assert (len
== sizeof (mips_elf_gregset_t
));
201 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*)gregs
, regnum
);
204 /* Likewise, unpack an elf_fpregset_t. */
207 mips_supply_fpregset (struct regcache
*regcache
,
208 const mips_elf_fpregset_t
*fpregsetp
)
210 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
212 char zerobuf
[MAX_REGISTER_SIZE
];
214 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
216 for (regi
= 0; regi
< 32; regi
++)
217 regcache_raw_supply (regcache
,
218 gdbarch_fp0_regnum (gdbarch
) + regi
,
221 regcache_raw_supply (regcache
,
222 mips_regnum (gdbarch
)->fp_control_status
,
225 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
226 regcache_raw_supply (regcache
,
227 mips_regnum (gdbarch
)->fp_implementation_revision
,
232 mips_supply_fpregset_wrapper (const struct regset
*regset
,
233 struct regcache
*regcache
,
234 int regnum
, const void *gregs
, size_t len
)
236 gdb_assert (len
== sizeof (mips_elf_fpregset_t
));
238 mips_supply_fpregset (regcache
, (const mips_elf_fpregset_t
*)gregs
);
241 /* Likewise, pack one or all floating point registers into an
245 mips_fill_fpregset (const struct regcache
*regcache
,
246 mips_elf_fpregset_t
*fpregsetp
, int regno
)
248 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
251 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
252 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
254 to
= (char *) (*fpregsetp
+ regno
- gdbarch_fp0_regnum (gdbarch
));
255 regcache_raw_collect (regcache
, regno
, to
);
257 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
259 to
= (char *) (*fpregsetp
+ 32);
260 regcache_raw_collect (regcache
, regno
, to
);
262 else if (regno
== -1)
266 for (regi
= 0; regi
< 32; regi
++)
267 mips_fill_fpregset (regcache
, fpregsetp
,
268 gdbarch_fp0_regnum (gdbarch
) + regi
);
269 mips_fill_fpregset (regcache
, fpregsetp
,
270 mips_regnum (gdbarch
)->fp_control_status
);
275 mips_fill_fpregset_wrapper (const struct regset
*regset
,
276 const struct regcache
*regcache
,
277 int regnum
, void *gregs
, size_t len
)
279 gdb_assert (len
== sizeof (mips_elf_fpregset_t
));
281 mips_fill_fpregset (regcache
, (mips_elf_fpregset_t
*)gregs
, regnum
);
284 /* Support for 64-bit ABIs. */
286 /* Figure out where the longjmp will land.
287 We expect the first arg to be a pointer to the jmp_buf structure
288 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
289 at. The pc is copied into PC. This routine returns 1 on
292 /* Details about jmp_buf. */
294 #define MIPS64_LINUX_JB_PC 0
297 mips64_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
300 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
301 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
302 void *buf
= alloca (gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
);
303 int element_size
= gdbarch_ptr_bit (gdbarch
) == 32 ? 4 : 8;
305 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
307 if (target_read_memory (jb_addr
+ MIPS64_LINUX_JB_PC
* element_size
,
309 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
))
312 *pc
= extract_unsigned_integer (buf
,
313 gdbarch_ptr_bit (gdbarch
) / TARGET_CHAR_BIT
,
319 /* Register set support functions. These operate on standard 64-bit
320 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
321 target will still use the 64-bit format for PTRACE_GETREGS. */
323 /* Supply a 64-bit register. */
326 supply_64bit_reg (struct regcache
*regcache
, int regnum
,
329 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
330 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
331 && register_size (gdbarch
, regnum
) == 4)
332 regcache_raw_supply (regcache
, regnum
, buf
+ 4);
334 regcache_raw_supply (regcache
, regnum
, buf
);
337 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
340 mips64_supply_gregset (struct regcache
*regcache
,
341 const mips64_elf_gregset_t
*gregsetp
)
344 const mips64_elf_greg_t
*regp
= *gregsetp
;
345 gdb_byte zerobuf
[MAX_REGISTER_SIZE
];
346 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
348 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
350 for (regi
= MIPS64_EF_REG0
+ 1; regi
<= MIPS64_EF_REG31
; regi
++)
351 supply_64bit_reg (regcache
, regi
- MIPS64_EF_REG0
,
352 (const gdb_byte
*)(regp
+ regi
));
354 if (mips_linux_restart_reg_p (gdbarch
))
355 supply_64bit_reg (regcache
, MIPS_RESTART_REGNUM
,
356 (const gdb_byte
*)(regp
+ MIPS64_EF_REG0
));
358 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->lo
,
359 (const gdb_byte
*) (regp
+ MIPS64_EF_LO
));
360 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->hi
,
361 (const gdb_byte
*) (regp
+ MIPS64_EF_HI
));
363 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->pc
,
364 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_EPC
));
365 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->badvaddr
,
366 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_BADVADDR
));
367 supply_64bit_reg (regcache
, MIPS_PS_REGNUM
,
368 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_STATUS
));
369 supply_64bit_reg (regcache
, mips_regnum (gdbarch
)->cause
,
370 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_CAUSE
));
372 /* Fill the inaccessible zero register with zero. */
373 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
377 mips64_supply_gregset_wrapper (const struct regset
*regset
,
378 struct regcache
*regcache
,
379 int regnum
, const void *gregs
, size_t len
)
381 gdb_assert (len
== sizeof (mips64_elf_gregset_t
));
383 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*)gregs
);
386 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
389 mips64_fill_gregset (const struct regcache
*regcache
,
390 mips64_elf_gregset_t
*gregsetp
, int regno
)
392 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
393 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
395 mips64_elf_greg_t
*regp
= *gregsetp
;
400 memset (regp
, 0, sizeof (mips64_elf_gregset_t
));
401 for (regi
= 1; regi
< 32; regi
++)
402 mips64_fill_gregset (regcache
, gregsetp
, regi
);
403 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->lo
);
404 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->hi
);
405 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->pc
);
406 mips64_fill_gregset (regcache
, gregsetp
,
407 mips_regnum (gdbarch
)->badvaddr
);
408 mips64_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
409 mips64_fill_gregset (regcache
, gregsetp
, mips_regnum (gdbarch
)->cause
);
410 mips64_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
414 if (regno
> 0 && regno
< 32)
415 regaddr
= regno
+ MIPS64_EF_REG0
;
416 else if (regno
== mips_regnum (gdbarch
)->lo
)
417 regaddr
= MIPS64_EF_LO
;
418 else if (regno
== mips_regnum (gdbarch
)->hi
)
419 regaddr
= MIPS64_EF_HI
;
420 else if (regno
== mips_regnum (gdbarch
)->pc
)
421 regaddr
= MIPS64_EF_CP0_EPC
;
422 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
423 regaddr
= MIPS64_EF_CP0_BADVADDR
;
424 else if (regno
== MIPS_PS_REGNUM
)
425 regaddr
= MIPS64_EF_CP0_STATUS
;
426 else if (regno
== mips_regnum (gdbarch
)->cause
)
427 regaddr
= MIPS64_EF_CP0_CAUSE
;
428 else if (mips_linux_restart_reg_p (gdbarch
)
429 && regno
== MIPS_RESTART_REGNUM
)
430 regaddr
= MIPS64_EF_REG0
;
436 gdb_byte buf
[MAX_REGISTER_SIZE
];
439 regcache_raw_collect (regcache
, regno
, buf
);
440 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
442 dst
= regp
+ regaddr
;
443 store_signed_integer (dst
, 8, byte_order
, val
);
448 mips64_fill_gregset_wrapper (const struct regset
*regset
,
449 const struct regcache
*regcache
,
450 int regnum
, void *gregs
, size_t len
)
452 gdb_assert (len
== sizeof (mips64_elf_gregset_t
));
454 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*)gregs
, regnum
);
457 /* Likewise, unpack an elf_fpregset_t. */
460 mips64_supply_fpregset (struct regcache
*regcache
,
461 const mips64_elf_fpregset_t
*fpregsetp
)
463 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
466 /* See mips_linux_o32_sigframe_init for a description of the
467 peculiar FP register layout. */
468 if (register_size (gdbarch
, gdbarch_fp0_regnum (gdbarch
)) == 4)
469 for (regi
= 0; regi
< 32; regi
++)
471 const gdb_byte
*reg_ptr
= (const gdb_byte
*)(*fpregsetp
+ (regi
& ~1));
472 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
474 regcache_raw_supply (regcache
,
475 gdbarch_fp0_regnum (gdbarch
) + regi
,
479 for (regi
= 0; regi
< 32; regi
++)
480 regcache_raw_supply (regcache
,
481 gdbarch_fp0_regnum (gdbarch
) + regi
,
482 (const char *)(*fpregsetp
+ regi
));
484 supply_32bit_reg (regcache
, mips_regnum (gdbarch
)->fp_control_status
,
485 (const gdb_byte
*)(*fpregsetp
+ 32));
487 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
488 include it - but the result of PTRACE_GETFPREGS does. The best we
489 can do is to assume that its value is present. */
490 supply_32bit_reg (regcache
,
491 mips_regnum (gdbarch
)->fp_implementation_revision
,
492 (const gdb_byte
*)(*fpregsetp
+ 32) + 4);
496 mips64_supply_fpregset_wrapper (const struct regset
*regset
,
497 struct regcache
*regcache
,
498 int regnum
, const void *gregs
, size_t len
)
500 gdb_assert (len
== sizeof (mips64_elf_fpregset_t
));
502 mips64_supply_fpregset (regcache
, (const mips64_elf_fpregset_t
*)gregs
);
505 /* Likewise, pack one or all floating point registers into an
509 mips64_fill_fpregset (const struct regcache
*regcache
,
510 mips64_elf_fpregset_t
*fpregsetp
, int regno
)
512 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
513 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
516 if ((regno
>= gdbarch_fp0_regnum (gdbarch
))
517 && (regno
< gdbarch_fp0_regnum (gdbarch
) + 32))
519 /* See mips_linux_o32_sigframe_init for a description of the
520 peculiar FP register layout. */
521 if (register_size (gdbarch
, regno
) == 4)
523 int regi
= regno
- gdbarch_fp0_regnum (gdbarch
);
525 to
= (gdb_byte
*) (*fpregsetp
+ (regi
& ~1));
526 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (regi
& 1))
528 regcache_raw_collect (regcache
, regno
, to
);
532 to
= (gdb_byte
*) (*fpregsetp
+ regno
533 - gdbarch_fp0_regnum (gdbarch
));
534 regcache_raw_collect (regcache
, regno
, to
);
537 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
539 gdb_byte buf
[MAX_REGISTER_SIZE
];
542 regcache_raw_collect (regcache
, regno
, buf
);
543 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
545 to
= (gdb_byte
*) (*fpregsetp
+ 32);
546 store_signed_integer (to
, 4, byte_order
, val
);
548 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
550 gdb_byte buf
[MAX_REGISTER_SIZE
];
553 regcache_raw_collect (regcache
, regno
, buf
);
554 val
= extract_signed_integer (buf
, register_size (gdbarch
, regno
),
556 to
= (gdb_byte
*) (*fpregsetp
+ 32) + 4;
557 store_signed_integer (to
, 4, byte_order
, val
);
559 else if (regno
== -1)
563 for (regi
= 0; regi
< 32; regi
++)
564 mips64_fill_fpregset (regcache
, fpregsetp
,
565 gdbarch_fp0_regnum (gdbarch
) + regi
);
566 mips64_fill_fpregset (regcache
, fpregsetp
,
567 mips_regnum (gdbarch
)->fp_control_status
);
568 mips64_fill_fpregset (regcache
, fpregsetp
,
569 (mips_regnum (gdbarch
)
570 ->fp_implementation_revision
));
575 mips64_fill_fpregset_wrapper (const struct regset
*regset
,
576 const struct regcache
*regcache
,
577 int regnum
, void *gregs
, size_t len
)
579 gdb_assert (len
== sizeof (mips64_elf_fpregset_t
));
581 mips64_fill_fpregset (regcache
, (mips64_elf_fpregset_t
*)gregs
, regnum
);
584 static const struct regset
*
585 mips_linux_regset_from_core_section (struct gdbarch
*gdbarch
,
586 const char *sect_name
, size_t sect_size
)
588 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
589 mips_elf_gregset_t gregset
;
590 mips_elf_fpregset_t fpregset
;
591 mips64_elf_gregset_t gregset64
;
592 mips64_elf_fpregset_t fpregset64
;
594 if (strcmp (sect_name
, ".reg") == 0)
596 if (sect_size
== sizeof (gregset
))
598 if (tdep
->gregset
== NULL
)
599 tdep
->gregset
= regset_alloc (gdbarch
,
600 mips_supply_gregset_wrapper
,
601 mips_fill_gregset_wrapper
);
602 return tdep
->gregset
;
604 else if (sect_size
== sizeof (gregset64
))
606 if (tdep
->gregset64
== NULL
)
607 tdep
->gregset64
= regset_alloc (gdbarch
,
608 mips64_supply_gregset_wrapper
,
609 mips64_fill_gregset_wrapper
);
610 return tdep
->gregset64
;
614 warning (_("wrong size gregset struct in core file"));
617 else if (strcmp (sect_name
, ".reg2") == 0)
619 if (sect_size
== sizeof (fpregset
))
621 if (tdep
->fpregset
== NULL
)
622 tdep
->fpregset
= regset_alloc (gdbarch
,
623 mips_supply_fpregset_wrapper
,
624 mips_fill_fpregset_wrapper
);
625 return tdep
->fpregset
;
627 else if (sect_size
== sizeof (fpregset64
))
629 if (tdep
->fpregset64
== NULL
)
630 tdep
->fpregset64
= regset_alloc (gdbarch
,
631 mips64_supply_fpregset_wrapper
,
632 mips64_fill_fpregset_wrapper
);
633 return tdep
->fpregset64
;
637 warning (_("wrong size fpregset struct in core file"));
644 static const struct target_desc
*
645 mips_linux_core_read_description (struct gdbarch
*gdbarch
,
646 struct target_ops
*target
,
649 asection
*section
= bfd_get_section_by_name (abfd
, ".reg");
653 switch (bfd_section_size (abfd
, section
))
655 case sizeof (mips_elf_gregset_t
):
656 return mips_tdesc_gp32
;
658 case sizeof (mips64_elf_gregset_t
):
659 return mips_tdesc_gp64
;
667 /* Check the code at PC for a dynamic linker lazy resolution stub.
668 Because they aren't in the .plt section, we pattern-match on the
669 code generated by GNU ld. They look like this:
676 (with the appropriate doubleword instructions for N64). Also
677 return the dynamic symbol index used in the last instruction. */
680 mips_linux_in_dynsym_stub (CORE_ADDR pc
, char *name
)
682 unsigned char buf
[28], *p
;
683 ULONGEST insn
, insn1
;
684 int n64
= (mips_abi (target_gdbarch
) == MIPS_ABI_N64
);
685 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch
);
687 read_memory (pc
- 12, buf
, 28);
691 /* ld t9,0x8010(gp) */
696 /* lw t9,0x8010(gp) */
703 insn
= extract_unsigned_integer (p
, 4, byte_order
);
711 insn
= extract_unsigned_integer (p
+ 4, 4, byte_order
);
715 if (insn
!= 0x03e0782d)
721 if (insn
!= 0x03e07821)
725 insn
= extract_unsigned_integer (p
+ 8, 4, byte_order
);
727 if (insn
!= 0x0320f809)
730 insn
= extract_unsigned_integer (p
+ 12, 4, byte_order
);
733 /* daddiu t8,zero,0 */
734 if ((insn
& 0xffff0000) != 0x64180000)
739 /* addiu t8,zero,0 */
740 if ((insn
& 0xffff0000) != 0x24180000)
744 return (insn
& 0xffff);
747 /* Return non-zero iff PC belongs to the dynamic linker resolution
748 code, a PLT entry, or a lazy binding stub. */
751 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc
)
753 /* Check whether PC is in the dynamic linker. This also checks
754 whether it is in the .plt section, used by non-PIC executables. */
755 if (svr4_in_dynsym_resolve_code (pc
))
758 /* Pattern match for the stub. It would be nice if there were a
759 more efficient way to avoid this check. */
760 if (mips_linux_in_dynsym_stub (pc
, NULL
))
766 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
767 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
768 implementation of this triggers at "fixup" from the same objfile as
769 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
770 "__dl_runtime_resolve" directly. An unresolved lazy binding
771 stub will point to _dl_runtime_resolve, which will first call
772 __dl_runtime_resolve, and then pass control to the resolved
776 mips_linux_skip_resolver (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
778 struct minimal_symbol
*resolver
;
780 resolver
= lookup_minimal_symbol ("__dl_runtime_resolve", NULL
, NULL
);
782 if (resolver
&& SYMBOL_VALUE_ADDRESS (resolver
) == pc
)
783 return frame_unwind_caller_pc (get_current_frame ());
785 return glibc_skip_solib_resolver (gdbarch
, pc
);
788 /* Signal trampoline support. There are four supported layouts for a
789 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
790 n64 rt_sigframe. We handle them all independently; not the most
791 efficient way, but simplest. First, declare all the unwinders. */
793 static void mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
794 struct frame_info
*this_frame
,
795 struct trad_frame_cache
*this_cache
,
798 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
799 struct frame_info
*this_frame
,
800 struct trad_frame_cache
*this_cache
,
803 #define MIPS_NR_LINUX 4000
804 #define MIPS_NR_N64_LINUX 5000
805 #define MIPS_NR_N32_LINUX 6000
807 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
808 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
809 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
810 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
812 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
813 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
814 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
815 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
816 #define MIPS_INST_SYSCALL 0x0000000c
818 static const struct tramp_frame mips_linux_o32_sigframe
= {
822 { MIPS_INST_LI_V0_SIGRETURN
, -1 },
823 { MIPS_INST_SYSCALL
, -1 },
824 { TRAMP_SENTINEL_INSN
, -1 }
826 mips_linux_o32_sigframe_init
829 static const struct tramp_frame mips_linux_o32_rt_sigframe
= {
833 { MIPS_INST_LI_V0_RT_SIGRETURN
, -1 },
834 { MIPS_INST_SYSCALL
, -1 },
835 { TRAMP_SENTINEL_INSN
, -1 } },
836 mips_linux_o32_sigframe_init
839 static const struct tramp_frame mips_linux_n32_rt_sigframe
= {
843 { MIPS_INST_LI_V0_N32_RT_SIGRETURN
, -1 },
844 { MIPS_INST_SYSCALL
, -1 },
845 { TRAMP_SENTINEL_INSN
, -1 }
847 mips_linux_n32n64_sigframe_init
850 static const struct tramp_frame mips_linux_n64_rt_sigframe
= {
854 { MIPS_INST_LI_V0_N64_RT_SIGRETURN
, -1 },
855 { MIPS_INST_SYSCALL
, -1 },
856 { TRAMP_SENTINEL_INSN
, -1 }
858 mips_linux_n32n64_sigframe_init
862 /* The unwinder for o32 signal frames. The legacy structures look
866 u32 sf_ass[4]; [argument save space for o32]
867 u32 sf_code[2]; [signal trampoline or fill]
868 struct sigcontext sf_sc;
872 Pre-2.6.12 sigcontext:
875 unsigned int sc_regmask; [Unused]
876 unsigned int sc_status;
877 unsigned long long sc_pc;
878 unsigned long long sc_regs[32];
879 unsigned long long sc_fpregs[32];
880 unsigned int sc_ownedfp;
881 unsigned int sc_fpc_csr;
882 unsigned int sc_fpc_eir; [Unused]
883 unsigned int sc_used_math;
884 unsigned int sc_ssflags; [Unused]
885 [Alignment hole of four bytes]
886 unsigned long long sc_mdhi;
887 unsigned long long sc_mdlo;
889 unsigned int sc_cause; [Unused]
890 unsigned int sc_badvaddr; [Unused]
892 unsigned long sc_sigset[4]; [kernel's sigset_t]
895 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
898 unsigned int sc_regmask; [Unused]
899 unsigned int sc_status; [Unused]
900 unsigned long long sc_pc;
901 unsigned long long sc_regs[32];
902 unsigned long long sc_fpregs[32];
904 unsigned int sc_fpc_csr;
905 unsigned int sc_fpc_eir; [Unused]
906 unsigned int sc_used_math;
908 [Alignment hole of four bytes]
909 unsigned long long sc_mdhi;
910 unsigned long long sc_mdlo;
911 unsigned long sc_hi1;
912 unsigned long sc_lo1;
913 unsigned long sc_hi2;
914 unsigned long sc_lo2;
915 unsigned long sc_hi3;
916 unsigned long sc_lo3;
919 The RT signal frames look like this:
922 u32 rs_ass[4]; [argument save space for o32]
923 u32 rs_code[2] [signal trampoline or fill]
924 struct siginfo rs_info;
925 struct ucontext rs_uc;
929 unsigned long uc_flags;
930 struct ucontext *uc_link;
932 [Alignment hole of four bytes]
933 struct sigcontext uc_mcontext;
938 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
940 #define RTSIGFRAME_SIGINFO_SIZE 128
941 #define STACK_T_SIZE (3 * 4)
942 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
943 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
944 + RTSIGFRAME_SIGINFO_SIZE \
945 + UCONTEXT_SIGCONTEXT_OFFSET)
947 #define SIGCONTEXT_PC (1 * 8)
948 #define SIGCONTEXT_REGS (2 * 8)
949 #define SIGCONTEXT_FPREGS (34 * 8)
950 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
951 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
952 #define SIGCONTEXT_HI (69 * 8)
953 #define SIGCONTEXT_LO (70 * 8)
954 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
955 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
956 #define SIGCONTEXT_HI1 (71 * 8 + 0)
957 #define SIGCONTEXT_LO1 (71 * 8 + 4)
958 #define SIGCONTEXT_HI2 (72 * 8 + 0)
959 #define SIGCONTEXT_LO2 (72 * 8 + 4)
960 #define SIGCONTEXT_HI3 (73 * 8 + 0)
961 #define SIGCONTEXT_LO3 (73 * 8 + 4)
963 #define SIGCONTEXT_REG_SIZE 8
966 mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
967 struct frame_info
*this_frame
,
968 struct trad_frame_cache
*this_cache
,
971 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
973 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
974 CORE_ADDR sigcontext_base
;
975 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
978 if (self
== &mips_linux_o32_sigframe
)
979 sigcontext_base
= frame_sp
+ SIGFRAME_SIGCONTEXT_OFFSET
;
981 sigcontext_base
= frame_sp
+ RTSIGFRAME_SIGCONTEXT_OFFSET
;
983 /* I'm not proud of this hack. Eventually we will have the
984 infrastructure to indicate the size of saved registers on a
985 per-frame basis, but right now we don't; the kernel saves eight
986 bytes but we only want four. Use regs_base to access any
988 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
989 regs_base
= sigcontext_base
+ 4;
991 regs_base
= sigcontext_base
;
993 if (mips_linux_restart_reg_p (gdbarch
))
994 trad_frame_set_reg_addr (this_cache
,
996 + gdbarch_num_regs (gdbarch
)),
997 regs_base
+ SIGCONTEXT_REGS
);
999 for (ireg
= 1; ireg
< 32; ireg
++)
1000 trad_frame_set_reg_addr (this_cache
,
1001 ireg
+ MIPS_ZERO_REGNUM
1002 + gdbarch_num_regs (gdbarch
),
1003 regs_base
+ SIGCONTEXT_REGS
1004 + ireg
* SIGCONTEXT_REG_SIZE
);
1006 /* The way that floating point registers are saved, unfortunately,
1007 depends on the architecture the kernel is built for. For the r3000 and
1008 tx39, four bytes of each register are at the beginning of each of the
1009 32 eight byte slots. For everything else, the registers are saved
1010 using double precision; only the even-numbered slots are initialized,
1011 and the high bits are the odd-numbered register. Assume the latter
1012 layout, since we can't tell, and it's much more common. Which bits are
1013 the "high" bits depends on endianness. */
1014 for (ireg
= 0; ireg
< 32; ireg
++)
1015 if ((gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
) != (ireg
& 1))
1016 trad_frame_set_reg_addr (this_cache
,
1018 gdbarch_num_regs (gdbarch
),
1019 sigcontext_base
+ SIGCONTEXT_FPREGS
+ 4
1020 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
1022 trad_frame_set_reg_addr (this_cache
,
1024 + gdbarch_num_regs (gdbarch
),
1025 sigcontext_base
+ SIGCONTEXT_FPREGS
1026 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
1028 trad_frame_set_reg_addr (this_cache
,
1029 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1030 regs_base
+ SIGCONTEXT_PC
);
1032 trad_frame_set_reg_addr (this_cache
,
1033 regs
->fp_control_status
1034 + gdbarch_num_regs (gdbarch
),
1035 sigcontext_base
+ SIGCONTEXT_FPCSR
);
1037 if (regs
->dspctl
!= -1)
1038 trad_frame_set_reg_addr (this_cache
,
1039 regs
->dspctl
+ gdbarch_num_regs (gdbarch
),
1040 sigcontext_base
+ SIGCONTEXT_DSPCTL
);
1042 trad_frame_set_reg_addr (this_cache
,
1043 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1044 regs_base
+ SIGCONTEXT_HI
);
1045 trad_frame_set_reg_addr (this_cache
,
1046 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1047 regs_base
+ SIGCONTEXT_LO
);
1049 if (regs
->dspacc
!= -1)
1051 trad_frame_set_reg_addr (this_cache
,
1052 regs
->dspacc
+ 0 + gdbarch_num_regs (gdbarch
),
1053 sigcontext_base
+ SIGCONTEXT_HI1
);
1054 trad_frame_set_reg_addr (this_cache
,
1055 regs
->dspacc
+ 1 + gdbarch_num_regs (gdbarch
),
1056 sigcontext_base
+ SIGCONTEXT_LO1
);
1057 trad_frame_set_reg_addr (this_cache
,
1058 regs
->dspacc
+ 2 + gdbarch_num_regs (gdbarch
),
1059 sigcontext_base
+ SIGCONTEXT_HI2
);
1060 trad_frame_set_reg_addr (this_cache
,
1061 regs
->dspacc
+ 3 + gdbarch_num_regs (gdbarch
),
1062 sigcontext_base
+ SIGCONTEXT_LO2
);
1063 trad_frame_set_reg_addr (this_cache
,
1064 regs
->dspacc
+ 4 + gdbarch_num_regs (gdbarch
),
1065 sigcontext_base
+ SIGCONTEXT_HI3
);
1066 trad_frame_set_reg_addr (this_cache
,
1067 regs
->dspacc
+ 5 + gdbarch_num_regs (gdbarch
),
1068 sigcontext_base
+ SIGCONTEXT_LO3
);
1072 trad_frame_set_reg_addr (this_cache
,
1073 regs
->cause
+ gdbarch_num_regs (gdbarch
),
1074 sigcontext_base
+ SIGCONTEXT_CAUSE
);
1075 trad_frame_set_reg_addr (this_cache
,
1076 regs
->badvaddr
+ gdbarch_num_regs (gdbarch
),
1077 sigcontext_base
+ SIGCONTEXT_BADVADDR
);
1080 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1081 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1085 /* For N32/N64 things look different. There is no non-rt signal frame.
1087 struct rt_sigframe_n32 {
1088 u32 rs_ass[4]; [ argument save space for o32 ]
1089 u32 rs_code[2]; [ signal trampoline or fill ]
1090 struct siginfo rs_info;
1091 struct ucontextn32 rs_uc;
1094 struct ucontextn32 {
1098 struct sigcontext uc_mcontext;
1099 sigset_t uc_sigmask; [ mask last for extensibility ]
1102 struct rt_sigframe {
1103 u32 rs_ass[4]; [ argument save space for o32 ]
1104 u32 rs_code[2]; [ signal trampoline ]
1105 struct siginfo rs_info;
1106 struct ucontext rs_uc;
1110 unsigned long uc_flags;
1111 struct ucontext *uc_link;
1113 struct sigcontext uc_mcontext;
1114 sigset_t uc_sigmask; [ mask last for extensibility ]
1117 And the sigcontext is different (this is for both n32 and n64):
1120 unsigned long long sc_regs[32];
1121 unsigned long long sc_fpregs[32];
1122 unsigned long long sc_mdhi;
1123 unsigned long long sc_hi1;
1124 unsigned long long sc_hi2;
1125 unsigned long long sc_hi3;
1126 unsigned long long sc_mdlo;
1127 unsigned long long sc_lo1;
1128 unsigned long long sc_lo2;
1129 unsigned long long sc_lo3;
1130 unsigned long long sc_pc;
1131 unsigned int sc_fpc_csr;
1132 unsigned int sc_used_math;
1133 unsigned int sc_dsp;
1134 unsigned int sc_reserved;
1137 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1138 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1142 #define N32_STACK_T_SIZE STACK_T_SIZE
1143 #define N64_STACK_T_SIZE (2 * 8 + 4)
1144 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1145 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1146 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1147 + RTSIGFRAME_SIGINFO_SIZE \
1148 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1149 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1150 + RTSIGFRAME_SIGINFO_SIZE \
1151 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1153 #define N64_SIGCONTEXT_REGS (0 * 8)
1154 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1155 #define N64_SIGCONTEXT_HI (64 * 8)
1156 #define N64_SIGCONTEXT_HI1 (65 * 8)
1157 #define N64_SIGCONTEXT_HI2 (66 * 8)
1158 #define N64_SIGCONTEXT_HI3 (67 * 8)
1159 #define N64_SIGCONTEXT_LO (68 * 8)
1160 #define N64_SIGCONTEXT_LO1 (69 * 8)
1161 #define N64_SIGCONTEXT_LO2 (70 * 8)
1162 #define N64_SIGCONTEXT_LO3 (71 * 8)
1163 #define N64_SIGCONTEXT_PC (72 * 8)
1164 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1165 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1167 #define N64_SIGCONTEXT_REG_SIZE 8
1170 mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
1171 struct frame_info
*this_frame
,
1172 struct trad_frame_cache
*this_cache
,
1175 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1177 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
1178 CORE_ADDR sigcontext_base
;
1179 const struct mips_regnum
*regs
= mips_regnum (gdbarch
);
1181 if (self
== &mips_linux_n32_rt_sigframe
)
1182 sigcontext_base
= frame_sp
+ N32_SIGFRAME_SIGCONTEXT_OFFSET
;
1184 sigcontext_base
= frame_sp
+ N64_SIGFRAME_SIGCONTEXT_OFFSET
;
1186 if (mips_linux_restart_reg_p (gdbarch
))
1187 trad_frame_set_reg_addr (this_cache
,
1188 (MIPS_RESTART_REGNUM
1189 + gdbarch_num_regs (gdbarch
)),
1190 sigcontext_base
+ N64_SIGCONTEXT_REGS
);
1192 for (ireg
= 1; ireg
< 32; ireg
++)
1193 trad_frame_set_reg_addr (this_cache
,
1194 ireg
+ MIPS_ZERO_REGNUM
1195 + gdbarch_num_regs (gdbarch
),
1196 sigcontext_base
+ N64_SIGCONTEXT_REGS
1197 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1199 for (ireg
= 0; ireg
< 32; ireg
++)
1200 trad_frame_set_reg_addr (this_cache
,
1202 + gdbarch_num_regs (gdbarch
),
1203 sigcontext_base
+ N64_SIGCONTEXT_FPREGS
1204 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1206 trad_frame_set_reg_addr (this_cache
,
1207 regs
->pc
+ gdbarch_num_regs (gdbarch
),
1208 sigcontext_base
+ N64_SIGCONTEXT_PC
);
1210 trad_frame_set_reg_addr (this_cache
,
1211 regs
->fp_control_status
1212 + gdbarch_num_regs (gdbarch
),
1213 sigcontext_base
+ N64_SIGCONTEXT_FPCSR
);
1215 trad_frame_set_reg_addr (this_cache
,
1216 regs
->hi
+ gdbarch_num_regs (gdbarch
),
1217 sigcontext_base
+ N64_SIGCONTEXT_HI
);
1218 trad_frame_set_reg_addr (this_cache
,
1219 regs
->lo
+ gdbarch_num_regs (gdbarch
),
1220 sigcontext_base
+ N64_SIGCONTEXT_LO
);
1222 if (regs
->dspacc
!= -1)
1224 trad_frame_set_reg_addr (this_cache
,
1225 regs
->dspacc
+ 0 + gdbarch_num_regs (gdbarch
),
1226 sigcontext_base
+ N64_SIGCONTEXT_HI1
);
1227 trad_frame_set_reg_addr (this_cache
,
1228 regs
->dspacc
+ 1 + gdbarch_num_regs (gdbarch
),
1229 sigcontext_base
+ N64_SIGCONTEXT_LO1
);
1230 trad_frame_set_reg_addr (this_cache
,
1231 regs
->dspacc
+ 2 + gdbarch_num_regs (gdbarch
),
1232 sigcontext_base
+ N64_SIGCONTEXT_HI2
);
1233 trad_frame_set_reg_addr (this_cache
,
1234 regs
->dspacc
+ 3 + gdbarch_num_regs (gdbarch
),
1235 sigcontext_base
+ N64_SIGCONTEXT_LO2
);
1236 trad_frame_set_reg_addr (this_cache
,
1237 regs
->dspacc
+ 4 + gdbarch_num_regs (gdbarch
),
1238 sigcontext_base
+ N64_SIGCONTEXT_HI3
);
1239 trad_frame_set_reg_addr (this_cache
,
1240 regs
->dspacc
+ 5 + gdbarch_num_regs (gdbarch
),
1241 sigcontext_base
+ N64_SIGCONTEXT_LO3
);
1243 if (regs
->dspctl
!= -1)
1244 trad_frame_set_reg_addr (this_cache
,
1245 regs
->dspctl
+ gdbarch_num_regs (gdbarch
),
1246 sigcontext_base
+ N64_SIGCONTEXT_DSPCTL
);
1248 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1249 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
1252 /* Implement the "write_pc" gdbarch method. */
1255 mips_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1257 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1259 mips_write_pc (regcache
, pc
);
1261 /* Clear the syscall restart flag. */
1262 if (mips_linux_restart_reg_p (gdbarch
))
1263 regcache_cooked_write_unsigned (regcache
, MIPS_RESTART_REGNUM
, 0);
1266 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1269 mips_linux_restart_reg_p (struct gdbarch
*gdbarch
)
1271 /* If we do not have a target description with registers, then
1272 MIPS_RESTART_REGNUM will not be included in the register set. */
1273 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
1276 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1277 either be GPR-sized or missing. */
1278 return register_size (gdbarch
, MIPS_RESTART_REGNUM
) > 0;
1281 /* When FRAME is at a syscall instruction, return the PC of the next
1282 instruction to be executed. */
1285 mips_linux_syscall_next_pc (struct frame_info
*frame
)
1287 CORE_ADDR pc
= get_frame_pc (frame
);
1288 ULONGEST v0
= get_frame_register_unsigned (frame
, MIPS_V0_REGNUM
);
1290 /* If we are about to make a sigreturn syscall, use the unwinder to
1291 decode the signal frame. */
1292 if (v0
== MIPS_NR_sigreturn
1293 || v0
== MIPS_NR_rt_sigreturn
1294 || v0
== MIPS_NR_N64_rt_sigreturn
1295 || v0
== MIPS_NR_N32_rt_sigreturn
)
1296 return frame_unwind_caller_pc (get_current_frame ());
1301 /* Return the current system call's number present in the
1302 v0 register. When the function fails, it returns -1. */
1305 mips_linux_get_syscall_number (struct gdbarch
*gdbarch
,
1308 struct regcache
*regcache
= get_thread_regcache (ptid
);
1309 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1310 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1311 int regsize
= register_size (gdbarch
, MIPS_V0_REGNUM
);
1312 /* The content of a register */
1317 /* Make sure we're in a known ABI */
1318 gdb_assert (tdep
->mips_abi
== MIPS_ABI_O32
1319 || tdep
->mips_abi
== MIPS_ABI_N32
1320 || tdep
->mips_abi
== MIPS_ABI_N64
);
1322 gdb_assert (regsize
<= sizeof (buf
));
1324 /* Getting the system call number from the register.
1325 syscall number is in v0 or $2. */
1326 regcache_cooked_read (regcache
, MIPS_V0_REGNUM
, buf
);
1328 ret
= extract_signed_integer (buf
, regsize
, byte_order
);
1333 /* Initialize one of the GNU/Linux OS ABIs. */
1336 mips_linux_init_abi (struct gdbarch_info info
,
1337 struct gdbarch
*gdbarch
)
1339 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1340 enum mips_abi abi
= mips_abi (gdbarch
);
1341 struct tdesc_arch_data
*tdesc_data
= (void *) info
.tdep_info
;
1343 linux_init_abi (info
, gdbarch
);
1345 /* Get the syscall number from the arch's register. */
1346 set_gdbarch_get_syscall_number (gdbarch
, mips_linux_get_syscall_number
);
1351 set_gdbarch_get_longjmp_target (gdbarch
,
1352 mips_linux_get_longjmp_target
);
1353 set_solib_svr4_fetch_link_map_offsets
1354 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1355 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_sigframe
);
1356 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_rt_sigframe
);
1357 set_xml_syscall_file_name ("syscalls/mips-o32-linux.xml");
1360 set_gdbarch_get_longjmp_target (gdbarch
,
1361 mips_linux_get_longjmp_target
);
1362 set_solib_svr4_fetch_link_map_offsets
1363 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1364 set_gdbarch_long_double_bit (gdbarch
, 128);
1365 /* These floatformats should probably be renamed. MIPS uses
1366 the same 128-bit IEEE floating point format that IA-64 uses,
1367 except that the quiet/signalling NaN bit is reversed (GDB
1368 does not distinguish between quiet and signalling NaNs). */
1369 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1370 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n32_rt_sigframe
);
1371 set_xml_syscall_file_name ("syscalls/mips-n32-linux.xml");
1374 set_gdbarch_get_longjmp_target (gdbarch
,
1375 mips64_linux_get_longjmp_target
);
1376 set_solib_svr4_fetch_link_map_offsets
1377 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1378 set_gdbarch_long_double_bit (gdbarch
, 128);
1379 /* These floatformats should probably be renamed. MIPS uses
1380 the same 128-bit IEEE floating point format that IA-64 uses,
1381 except that the quiet/signalling NaN bit is reversed (GDB
1382 does not distinguish between quiet and signalling NaNs). */
1383 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1384 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n64_rt_sigframe
);
1385 set_xml_syscall_file_name ("syscalls/mips-n64-linux.xml");
1391 set_gdbarch_skip_solib_resolver (gdbarch
, mips_linux_skip_resolver
);
1393 set_gdbarch_software_single_step (gdbarch
, mips_software_single_step
);
1395 /* Enable TLS support. */
1396 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1397 svr4_fetch_objfile_link_map
);
1399 /* Initialize this lazily, to avoid an initialization order
1400 dependency on solib-svr4.c's _initialize routine. */
1401 if (mips_svr4_so_ops
.in_dynsym_resolve_code
== NULL
)
1403 mips_svr4_so_ops
= svr4_so_ops
;
1404 mips_svr4_so_ops
.in_dynsym_resolve_code
1405 = mips_linux_in_dynsym_resolve_code
;
1407 set_solib_ops (gdbarch
, &mips_svr4_so_ops
);
1409 set_gdbarch_write_pc (gdbarch
, mips_linux_write_pc
);
1411 set_gdbarch_core_read_description (gdbarch
,
1412 mips_linux_core_read_description
);
1414 set_gdbarch_regset_from_core_section (gdbarch
,
1415 mips_linux_regset_from_core_section
);
1417 tdep
->syscall_next_pc
= mips_linux_syscall_next_pc
;
1421 const struct tdesc_feature
*feature
;
1423 /* If we have target-described registers, then we can safely
1424 reserve a number for MIPS_RESTART_REGNUM (whether it is
1425 described or not). */
1426 gdb_assert (gdbarch_num_regs (gdbarch
) <= MIPS_RESTART_REGNUM
);
1427 set_gdbarch_num_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1428 set_gdbarch_num_pseudo_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1430 /* If it's present, then assign it to the reserved number. */
1431 feature
= tdesc_find_feature (info
.target_desc
,
1432 "org.gnu.gdb.mips.linux");
1433 if (feature
!= NULL
)
1434 tdesc_numbered_register (feature
, tdesc_data
, MIPS_RESTART_REGNUM
,
1439 /* Provide a prototype to silence -Wmissing-prototypes. */
1440 extern initialize_file_ftype _initialize_mips_linux_tdep
;
1443 _initialize_mips_linux_tdep (void)
1445 const struct bfd_arch_info
*arch_info
;
1447 for (arch_info
= bfd_lookup_arch (bfd_arch_mips
, 0);
1449 arch_info
= arch_info
->next
)
1451 gdbarch_register_osabi (bfd_arch_mips
, arch_info
->mach
,
1453 mips_linux_init_abi
);