mips: fix void*/gdb_byte* compilation errors
[deliverable/binutils-gdb.git] / gdb / mips-linux-tdep.c
1 /* Target-dependent code for GNU/Linux on MIPS processors.
2
3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "gdbcore.h"
22 #include "target.h"
23 #include "solib-svr4.h"
24 #include "osabi.h"
25 #include "mips-tdep.h"
26 #include "frame.h"
27 #include "regcache.h"
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
30 #include "gdbtypes.h"
31 #include "objfiles.h"
32 #include "solib.h"
33 #include "solist.h"
34 #include "symtab.h"
35 #include "target-descriptions.h"
36 #include "regset.h"
37 #include "mips-linux-tdep.h"
38 #include "glibc-tdep.h"
39 #include "linux-tdep.h"
40 #include "xml-syscall.h"
41 #include "gdb_signals.h"
42
43 static struct target_so_ops mips_svr4_so_ops;
44
45 /* This enum represents the signals' numbers on the MIPS
46 architecture. It just contains the signal definitions which are
47 different from the generic implementation.
48
49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
50 from the Linux kernel tree. */
51
52 enum
53 {
54 MIPS_LINUX_SIGEMT = 7,
55 MIPS_LINUX_SIGBUS = 10,
56 MIPS_LINUX_SIGSYS = 12,
57 MIPS_LINUX_SIGUSR1 = 16,
58 MIPS_LINUX_SIGUSR2 = 17,
59 MIPS_LINUX_SIGCHLD = 18,
60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
61 MIPS_LINUX_SIGPWR = 19,
62 MIPS_LINUX_SIGWINCH = 20,
63 MIPS_LINUX_SIGURG = 21,
64 MIPS_LINUX_SIGIO = 22,
65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
66 MIPS_LINUX_SIGSTOP = 23,
67 MIPS_LINUX_SIGTSTP = 24,
68 MIPS_LINUX_SIGCONT = 25,
69 MIPS_LINUX_SIGTTIN = 26,
70 MIPS_LINUX_SIGTTOU = 27,
71 MIPS_LINUX_SIGVTALRM = 28,
72 MIPS_LINUX_SIGPROF = 29,
73 MIPS_LINUX_SIGXCPU = 30,
74 MIPS_LINUX_SIGXFSZ = 31,
75
76 MIPS_LINUX_SIGRTMIN = 32,
77 MIPS_LINUX_SIGRT64 = 64,
78 MIPS_LINUX_SIGRTMAX = 127,
79 };
80
81 /* Figure out where the longjmp will land.
82 We expect the first arg to be a pointer to the jmp_buf structure
83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
84 at. The pc is copied into PC. This routine returns 1 on
85 success. */
86
87 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
88 #define MIPS_LINUX_JB_PC 0
89
90 static int
91 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
92 {
93 CORE_ADDR jb_addr;
94 struct gdbarch *gdbarch = get_frame_arch (frame);
95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
97
98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
99
100 if (target_read_memory ((jb_addr
101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
103 return 0;
104
105 *pc = extract_unsigned_integer (buf,
106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
107 byte_order);
108
109 return 1;
110 }
111
112 /* Transform the bits comprising a 32-bit register to the right size
113 for regcache_raw_supply(). This is needed when mips_isa_regsize()
114 is 8. */
115
116 static void
117 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
118 {
119 struct gdbarch *gdbarch = get_regcache_arch (regcache);
120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
121 gdb_byte buf[MAX_REGISTER_SIZE];
122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
123 extract_signed_integer ((const gdb_byte *) addr, 4,
124 byte_order));
125 regcache_raw_supply (regcache, regnum, buf);
126 }
127
128 /* Unpack an elf_gregset_t into GDB's register cache. */
129
130 void
131 mips_supply_gregset (struct regcache *regcache,
132 const mips_elf_gregset_t *gregsetp)
133 {
134 int regi;
135 const mips_elf_greg_t *regp = *gregsetp;
136 char zerobuf[MAX_REGISTER_SIZE];
137 struct gdbarch *gdbarch = get_regcache_arch (regcache);
138
139 memset (zerobuf, 0, MAX_REGISTER_SIZE);
140
141 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
142 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
143
144 if (mips_linux_restart_reg_p (gdbarch))
145 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
146
147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
148 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
149
150 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
151 regp + EF_CP0_EPC);
152 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
153 regp + EF_CP0_BADVADDR);
154 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
155 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
156 regp + EF_CP0_CAUSE);
157
158 /* Fill the inaccessible zero register with zero. */
159 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
160 }
161
162 static void
163 mips_supply_gregset_wrapper (const struct regset *regset,
164 struct regcache *regcache,
165 int regnum, const void *gregs, size_t len)
166 {
167 gdb_assert (len >= sizeof (mips_elf_gregset_t));
168
169 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
170 }
171
172 /* Pack our registers (or one register) into an elf_gregset_t. */
173
174 void
175 mips_fill_gregset (const struct regcache *regcache,
176 mips_elf_gregset_t *gregsetp, int regno)
177 {
178 struct gdbarch *gdbarch = get_regcache_arch (regcache);
179 int regaddr, regi;
180 mips_elf_greg_t *regp = *gregsetp;
181 void *dst;
182
183 if (regno == -1)
184 {
185 memset (regp, 0, sizeof (mips_elf_gregset_t));
186 for (regi = 1; regi < 32; regi++)
187 mips_fill_gregset (regcache, gregsetp, regi);
188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
191 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
192 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
193 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
194 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
195 return;
196 }
197
198 if (regno > 0 && regno < 32)
199 {
200 dst = regp + regno + EF_REG0;
201 regcache_raw_collect (regcache, regno, dst);
202 return;
203 }
204
205 if (regno == mips_regnum (gdbarch)->lo)
206 regaddr = EF_LO;
207 else if (regno == mips_regnum (gdbarch)->hi)
208 regaddr = EF_HI;
209 else if (regno == mips_regnum (gdbarch)->pc)
210 regaddr = EF_CP0_EPC;
211 else if (regno == mips_regnum (gdbarch)->badvaddr)
212 regaddr = EF_CP0_BADVADDR;
213 else if (regno == MIPS_PS_REGNUM)
214 regaddr = EF_CP0_STATUS;
215 else if (regno == mips_regnum (gdbarch)->cause)
216 regaddr = EF_CP0_CAUSE;
217 else if (mips_linux_restart_reg_p (gdbarch)
218 && regno == MIPS_RESTART_REGNUM)
219 regaddr = EF_REG0;
220 else
221 regaddr = -1;
222
223 if (regaddr != -1)
224 {
225 dst = regp + regaddr;
226 regcache_raw_collect (regcache, regno, dst);
227 }
228 }
229
230 static void
231 mips_fill_gregset_wrapper (const struct regset *regset,
232 const struct regcache *regcache,
233 int regnum, void *gregs, size_t len)
234 {
235 gdb_assert (len >= sizeof (mips_elf_gregset_t));
236
237 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
238 }
239
240 /* Likewise, unpack an elf_fpregset_t. */
241
242 void
243 mips_supply_fpregset (struct regcache *regcache,
244 const mips_elf_fpregset_t *fpregsetp)
245 {
246 struct gdbarch *gdbarch = get_regcache_arch (regcache);
247 int regi;
248 char zerobuf[MAX_REGISTER_SIZE];
249
250 memset (zerobuf, 0, MAX_REGISTER_SIZE);
251
252 for (regi = 0; regi < 32; regi++)
253 regcache_raw_supply (regcache,
254 gdbarch_fp0_regnum (gdbarch) + regi,
255 *fpregsetp + regi);
256
257 regcache_raw_supply (regcache,
258 mips_regnum (gdbarch)->fp_control_status,
259 *fpregsetp + 32);
260
261 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
262 regcache_raw_supply (regcache,
263 mips_regnum (gdbarch)->fp_implementation_revision,
264 zerobuf);
265 }
266
267 static void
268 mips_supply_fpregset_wrapper (const struct regset *regset,
269 struct regcache *regcache,
270 int regnum, const void *gregs, size_t len)
271 {
272 gdb_assert (len >= sizeof (mips_elf_fpregset_t));
273
274 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
275 }
276
277 /* Likewise, pack one or all floating point registers into an
278 elf_fpregset_t. */
279
280 void
281 mips_fill_fpregset (const struct regcache *regcache,
282 mips_elf_fpregset_t *fpregsetp, int regno)
283 {
284 struct gdbarch *gdbarch = get_regcache_arch (regcache);
285 char *to;
286
287 if ((regno >= gdbarch_fp0_regnum (gdbarch))
288 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
289 {
290 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
291 regcache_raw_collect (regcache, regno, to);
292 }
293 else if (regno == mips_regnum (gdbarch)->fp_control_status)
294 {
295 to = (char *) (*fpregsetp + 32);
296 regcache_raw_collect (regcache, regno, to);
297 }
298 else if (regno == -1)
299 {
300 int regi;
301
302 for (regi = 0; regi < 32; regi++)
303 mips_fill_fpregset (regcache, fpregsetp,
304 gdbarch_fp0_regnum (gdbarch) + regi);
305 mips_fill_fpregset (regcache, fpregsetp,
306 mips_regnum (gdbarch)->fp_control_status);
307 }
308 }
309
310 static void
311 mips_fill_fpregset_wrapper (const struct regset *regset,
312 const struct regcache *regcache,
313 int regnum, void *gregs, size_t len)
314 {
315 gdb_assert (len >= sizeof (mips_elf_fpregset_t));
316
317 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
318 }
319
320 /* Support for 64-bit ABIs. */
321
322 /* Figure out where the longjmp will land.
323 We expect the first arg to be a pointer to the jmp_buf structure
324 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
325 at. The pc is copied into PC. This routine returns 1 on
326 success. */
327
328 /* Details about jmp_buf. */
329
330 #define MIPS64_LINUX_JB_PC 0
331
332 static int
333 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
334 {
335 CORE_ADDR jb_addr;
336 struct gdbarch *gdbarch = get_frame_arch (frame);
337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
338 gdb_byte *buf
339 = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
340 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
341
342 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
343
344 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
345 buf,
346 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
347 return 0;
348
349 *pc = extract_unsigned_integer (buf,
350 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
351 byte_order);
352
353 return 1;
354 }
355
356 /* Register set support functions. These operate on standard 64-bit
357 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
358 target will still use the 64-bit format for PTRACE_GETREGS. */
359
360 /* Supply a 64-bit register. */
361
362 static void
363 supply_64bit_reg (struct regcache *regcache, int regnum,
364 const gdb_byte *buf)
365 {
366 struct gdbarch *gdbarch = get_regcache_arch (regcache);
367 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
368 && register_size (gdbarch, regnum) == 4)
369 regcache_raw_supply (regcache, regnum, buf + 4);
370 else
371 regcache_raw_supply (regcache, regnum, buf);
372 }
373
374 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
375
376 void
377 mips64_supply_gregset (struct regcache *regcache,
378 const mips64_elf_gregset_t *gregsetp)
379 {
380 int regi;
381 const mips64_elf_greg_t *regp = *gregsetp;
382 gdb_byte zerobuf[MAX_REGISTER_SIZE];
383 struct gdbarch *gdbarch = get_regcache_arch (regcache);
384
385 memset (zerobuf, 0, MAX_REGISTER_SIZE);
386
387 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
388 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
389 (const gdb_byte *) (regp + regi));
390
391 if (mips_linux_restart_reg_p (gdbarch))
392 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
393 (const gdb_byte *) (regp + MIPS64_EF_REG0));
394
395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
396 (const gdb_byte *) (regp + MIPS64_EF_LO));
397 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
398 (const gdb_byte *) (regp + MIPS64_EF_HI));
399
400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
401 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
402 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
403 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
404 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
405 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
406 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
407 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
408
409 /* Fill the inaccessible zero register with zero. */
410 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
411 }
412
413 static void
414 mips64_supply_gregset_wrapper (const struct regset *regset,
415 struct regcache *regcache,
416 int regnum, const void *gregs, size_t len)
417 {
418 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
419
420 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
421 }
422
423 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
424
425 void
426 mips64_fill_gregset (const struct regcache *regcache,
427 mips64_elf_gregset_t *gregsetp, int regno)
428 {
429 struct gdbarch *gdbarch = get_regcache_arch (regcache);
430 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
431 int regaddr, regi;
432 mips64_elf_greg_t *regp = *gregsetp;
433 void *dst;
434
435 if (regno == -1)
436 {
437 memset (regp, 0, sizeof (mips64_elf_gregset_t));
438 for (regi = 1; regi < 32; regi++)
439 mips64_fill_gregset (regcache, gregsetp, regi);
440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
441 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
442 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
443 mips64_fill_gregset (regcache, gregsetp,
444 mips_regnum (gdbarch)->badvaddr);
445 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
446 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
447 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
448 return;
449 }
450
451 if (regno > 0 && regno < 32)
452 regaddr = regno + MIPS64_EF_REG0;
453 else if (regno == mips_regnum (gdbarch)->lo)
454 regaddr = MIPS64_EF_LO;
455 else if (regno == mips_regnum (gdbarch)->hi)
456 regaddr = MIPS64_EF_HI;
457 else if (regno == mips_regnum (gdbarch)->pc)
458 regaddr = MIPS64_EF_CP0_EPC;
459 else if (regno == mips_regnum (gdbarch)->badvaddr)
460 regaddr = MIPS64_EF_CP0_BADVADDR;
461 else if (regno == MIPS_PS_REGNUM)
462 regaddr = MIPS64_EF_CP0_STATUS;
463 else if (regno == mips_regnum (gdbarch)->cause)
464 regaddr = MIPS64_EF_CP0_CAUSE;
465 else if (mips_linux_restart_reg_p (gdbarch)
466 && regno == MIPS_RESTART_REGNUM)
467 regaddr = MIPS64_EF_REG0;
468 else
469 regaddr = -1;
470
471 if (regaddr != -1)
472 {
473 gdb_byte buf[MAX_REGISTER_SIZE];
474 LONGEST val;
475
476 regcache_raw_collect (regcache, regno, buf);
477 val = extract_signed_integer (buf, register_size (gdbarch, regno),
478 byte_order);
479 dst = regp + regaddr;
480 store_signed_integer ((gdb_byte *) dst, 8, byte_order, val);
481 }
482 }
483
484 static void
485 mips64_fill_gregset_wrapper (const struct regset *regset,
486 const struct regcache *regcache,
487 int regnum, void *gregs, size_t len)
488 {
489 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
490
491 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
492 }
493
494 /* Likewise, unpack an elf_fpregset_t. */
495
496 void
497 mips64_supply_fpregset (struct regcache *regcache,
498 const mips64_elf_fpregset_t *fpregsetp)
499 {
500 struct gdbarch *gdbarch = get_regcache_arch (regcache);
501 int regi;
502
503 /* See mips_linux_o32_sigframe_init for a description of the
504 peculiar FP register layout. */
505 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
506 for (regi = 0; regi < 32; regi++)
507 {
508 const gdb_byte *reg_ptr
509 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
510 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
511 reg_ptr += 4;
512 regcache_raw_supply (regcache,
513 gdbarch_fp0_regnum (gdbarch) + regi,
514 reg_ptr);
515 }
516 else
517 for (regi = 0; regi < 32; regi++)
518 regcache_raw_supply (regcache,
519 gdbarch_fp0_regnum (gdbarch) + regi,
520 (const char *) (*fpregsetp + regi));
521
522 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
523 (const gdb_byte *) (*fpregsetp + 32));
524
525 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
526 include it - but the result of PTRACE_GETFPREGS does. The best we
527 can do is to assume that its value is present. */
528 supply_32bit_reg (regcache,
529 mips_regnum (gdbarch)->fp_implementation_revision,
530 (const gdb_byte *) (*fpregsetp + 32) + 4);
531 }
532
533 static void
534 mips64_supply_fpregset_wrapper (const struct regset *regset,
535 struct regcache *regcache,
536 int regnum, const void *gregs, size_t len)
537 {
538 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
539
540 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
541 }
542
543 /* Likewise, pack one or all floating point registers into an
544 elf_fpregset_t. */
545
546 void
547 mips64_fill_fpregset (const struct regcache *regcache,
548 mips64_elf_fpregset_t *fpregsetp, int regno)
549 {
550 struct gdbarch *gdbarch = get_regcache_arch (regcache);
551 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
552 gdb_byte *to;
553
554 if ((regno >= gdbarch_fp0_regnum (gdbarch))
555 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
556 {
557 /* See mips_linux_o32_sigframe_init for a description of the
558 peculiar FP register layout. */
559 if (register_size (gdbarch, regno) == 4)
560 {
561 int regi = regno - gdbarch_fp0_regnum (gdbarch);
562
563 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
564 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
565 to += 4;
566 regcache_raw_collect (regcache, regno, to);
567 }
568 else
569 {
570 to = (gdb_byte *) (*fpregsetp + regno
571 - gdbarch_fp0_regnum (gdbarch));
572 regcache_raw_collect (regcache, regno, to);
573 }
574 }
575 else if (regno == mips_regnum (gdbarch)->fp_control_status)
576 {
577 gdb_byte buf[MAX_REGISTER_SIZE];
578 LONGEST val;
579
580 regcache_raw_collect (regcache, regno, buf);
581 val = extract_signed_integer (buf, register_size (gdbarch, regno),
582 byte_order);
583 to = (gdb_byte *) (*fpregsetp + 32);
584 store_signed_integer (to, 4, byte_order, val);
585 }
586 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
587 {
588 gdb_byte buf[MAX_REGISTER_SIZE];
589 LONGEST val;
590
591 regcache_raw_collect (regcache, regno, buf);
592 val = extract_signed_integer (buf, register_size (gdbarch, regno),
593 byte_order);
594 to = (gdb_byte *) (*fpregsetp + 32) + 4;
595 store_signed_integer (to, 4, byte_order, val);
596 }
597 else if (regno == -1)
598 {
599 int regi;
600
601 for (regi = 0; regi < 32; regi++)
602 mips64_fill_fpregset (regcache, fpregsetp,
603 gdbarch_fp0_regnum (gdbarch) + regi);
604 mips64_fill_fpregset (regcache, fpregsetp,
605 mips_regnum (gdbarch)->fp_control_status);
606 mips64_fill_fpregset (regcache, fpregsetp,
607 mips_regnum (gdbarch)->fp_implementation_revision);
608 }
609 }
610
611 static void
612 mips64_fill_fpregset_wrapper (const struct regset *regset,
613 const struct regcache *regcache,
614 int regnum, void *gregs, size_t len)
615 {
616 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
617
618 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
619 }
620
621 static const struct regset mips_linux_gregset =
622 {
623 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
624 };
625
626 static const struct regset mips64_linux_gregset =
627 {
628 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
629 };
630
631 static const struct regset mips_linux_fpregset =
632 {
633 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper
634 };
635
636 static const struct regset mips64_linux_fpregset =
637 {
638 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
639 };
640
641 static void
642 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
643 iterate_over_regset_sections_cb *cb,
644 void *cb_data,
645 const struct regcache *regcache)
646 {
647 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
648 {
649 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset,
650 NULL, cb_data);
651 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset,
652 NULL, cb_data);
653 }
654 else
655 {
656 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset,
657 NULL, cb_data);
658 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
659 NULL, cb_data);
660 }
661 }
662
663 static const struct target_desc *
664 mips_linux_core_read_description (struct gdbarch *gdbarch,
665 struct target_ops *target,
666 bfd *abfd)
667 {
668 asection *section = bfd_get_section_by_name (abfd, ".reg");
669 if (! section)
670 return NULL;
671
672 switch (bfd_section_size (abfd, section))
673 {
674 case sizeof (mips_elf_gregset_t):
675 return mips_tdesc_gp32;
676
677 case sizeof (mips64_elf_gregset_t):
678 return mips_tdesc_gp64;
679
680 default:
681 return NULL;
682 }
683 }
684
685
686 /* Check the code at PC for a dynamic linker lazy resolution stub.
687 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
688 section uniformly since version 2.15. If the pc is in that section,
689 then we are in such a stub. Before that ".stub" was used in 32-bit
690 ELF binaries, however we do not bother checking for that since we
691 have never had and that case should be extremely rare these days.
692 Instead we pattern-match on the code generated by GNU ld. They look
693 like this:
694
695 lw t9,0x8010(gp)
696 addu t7,ra
697 jalr t9,ra
698 addiu t8,zero,INDEX
699
700 (with the appropriate doubleword instructions for N64). As any lazy
701 resolution stubs in microMIPS binaries will always be in a
702 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
703
704 static int
705 mips_linux_in_dynsym_stub (CORE_ADDR pc)
706 {
707 gdb_byte buf[28], *p;
708 ULONGEST insn, insn1;
709 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
710 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
711
712 if (in_mips_stubs_section (pc))
713 return 1;
714
715 read_memory (pc - 12, buf, 28);
716
717 if (n64)
718 {
719 /* ld t9,0x8010(gp) */
720 insn1 = 0xdf998010;
721 }
722 else
723 {
724 /* lw t9,0x8010(gp) */
725 insn1 = 0x8f998010;
726 }
727
728 p = buf + 12;
729 while (p >= buf)
730 {
731 insn = extract_unsigned_integer (p, 4, byte_order);
732 if (insn == insn1)
733 break;
734 p -= 4;
735 }
736 if (p < buf)
737 return 0;
738
739 insn = extract_unsigned_integer (p + 4, 4, byte_order);
740 if (n64)
741 {
742 /* daddu t7,ra */
743 if (insn != 0x03e0782d)
744 return 0;
745 }
746 else
747 {
748 /* addu t7,ra */
749 if (insn != 0x03e07821)
750 return 0;
751 }
752
753 insn = extract_unsigned_integer (p + 8, 4, byte_order);
754 /* jalr t9,ra */
755 if (insn != 0x0320f809)
756 return 0;
757
758 insn = extract_unsigned_integer (p + 12, 4, byte_order);
759 if (n64)
760 {
761 /* daddiu t8,zero,0 */
762 if ((insn & 0xffff0000) != 0x64180000)
763 return 0;
764 }
765 else
766 {
767 /* addiu t8,zero,0 */
768 if ((insn & 0xffff0000) != 0x24180000)
769 return 0;
770 }
771
772 return 1;
773 }
774
775 /* Return non-zero iff PC belongs to the dynamic linker resolution
776 code, a PLT entry, or a lazy binding stub. */
777
778 static int
779 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
780 {
781 /* Check whether PC is in the dynamic linker. This also checks
782 whether it is in the .plt section, used by non-PIC executables. */
783 if (svr4_in_dynsym_resolve_code (pc))
784 return 1;
785
786 /* Likewise for the stubs. They live in the .MIPS.stubs section these
787 days, so we check if the PC is within, than fall back to a pattern
788 match. */
789 if (mips_linux_in_dynsym_stub (pc))
790 return 1;
791
792 return 0;
793 }
794
795 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
796 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
797 implementation of this triggers at "fixup" from the same objfile as
798 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
799 "__dl_runtime_resolve" directly. An unresolved lazy binding
800 stub will point to _dl_runtime_resolve, which will first call
801 __dl_runtime_resolve, and then pass control to the resolved
802 function. */
803
804 static CORE_ADDR
805 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
806 {
807 struct bound_minimal_symbol resolver;
808
809 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
810
811 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
812 return frame_unwind_caller_pc (get_current_frame ());
813
814 return glibc_skip_solib_resolver (gdbarch, pc);
815 }
816
817 /* Signal trampoline support. There are four supported layouts for a
818 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
819 n64 rt_sigframe. We handle them all independently; not the most
820 efficient way, but simplest. First, declare all the unwinders. */
821
822 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
823 struct frame_info *this_frame,
824 struct trad_frame_cache *this_cache,
825 CORE_ADDR func);
826
827 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
828 struct frame_info *this_frame,
829 struct trad_frame_cache *this_cache,
830 CORE_ADDR func);
831
832 static int mips_linux_sigframe_validate (const struct tramp_frame *self,
833 struct frame_info *this_frame,
834 CORE_ADDR *pc);
835
836 static int micromips_linux_sigframe_validate (const struct tramp_frame *self,
837 struct frame_info *this_frame,
838 CORE_ADDR *pc);
839
840 #define MIPS_NR_LINUX 4000
841 #define MIPS_NR_N64_LINUX 5000
842 #define MIPS_NR_N32_LINUX 6000
843
844 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
845 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
846 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
847 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
848
849 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
850 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
851 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
852 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
853 #define MIPS_INST_SYSCALL 0x0000000c
854
855 #define MICROMIPS_INST_LI_V0 0x3040
856 #define MICROMIPS_INST_POOL32A 0x0000
857 #define MICROMIPS_INST_SYSCALL 0x8b7c
858
859 static const struct tramp_frame mips_linux_o32_sigframe = {
860 SIGTRAMP_FRAME,
861 4,
862 {
863 { MIPS_INST_LI_V0_SIGRETURN, -1 },
864 { MIPS_INST_SYSCALL, -1 },
865 { TRAMP_SENTINEL_INSN, -1 }
866 },
867 mips_linux_o32_sigframe_init,
868 mips_linux_sigframe_validate
869 };
870
871 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
872 SIGTRAMP_FRAME,
873 4,
874 {
875 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
876 { MIPS_INST_SYSCALL, -1 },
877 { TRAMP_SENTINEL_INSN, -1 } },
878 mips_linux_o32_sigframe_init,
879 mips_linux_sigframe_validate
880 };
881
882 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
883 SIGTRAMP_FRAME,
884 4,
885 {
886 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
887 { MIPS_INST_SYSCALL, -1 },
888 { TRAMP_SENTINEL_INSN, -1 }
889 },
890 mips_linux_n32n64_sigframe_init,
891 mips_linux_sigframe_validate
892 };
893
894 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
895 SIGTRAMP_FRAME,
896 4,
897 {
898 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
899 { MIPS_INST_SYSCALL, -1 },
900 { TRAMP_SENTINEL_INSN, -1 }
901 },
902 mips_linux_n32n64_sigframe_init,
903 mips_linux_sigframe_validate
904 };
905
906 static const struct tramp_frame micromips_linux_o32_sigframe = {
907 SIGTRAMP_FRAME,
908 2,
909 {
910 { MICROMIPS_INST_LI_V0, -1 },
911 { MIPS_NR_sigreturn, -1 },
912 { MICROMIPS_INST_POOL32A, -1 },
913 { MICROMIPS_INST_SYSCALL, -1 },
914 { TRAMP_SENTINEL_INSN, -1 }
915 },
916 mips_linux_o32_sigframe_init,
917 micromips_linux_sigframe_validate
918 };
919
920 static const struct tramp_frame micromips_linux_o32_rt_sigframe = {
921 SIGTRAMP_FRAME,
922 2,
923 {
924 { MICROMIPS_INST_LI_V0, -1 },
925 { MIPS_NR_rt_sigreturn, -1 },
926 { MICROMIPS_INST_POOL32A, -1 },
927 { MICROMIPS_INST_SYSCALL, -1 },
928 { TRAMP_SENTINEL_INSN, -1 }
929 },
930 mips_linux_o32_sigframe_init,
931 micromips_linux_sigframe_validate
932 };
933
934 static const struct tramp_frame micromips_linux_n32_rt_sigframe = {
935 SIGTRAMP_FRAME,
936 2,
937 {
938 { MICROMIPS_INST_LI_V0, -1 },
939 { MIPS_NR_N32_rt_sigreturn, -1 },
940 { MICROMIPS_INST_POOL32A, -1 },
941 { MICROMIPS_INST_SYSCALL, -1 },
942 { TRAMP_SENTINEL_INSN, -1 }
943 },
944 mips_linux_n32n64_sigframe_init,
945 micromips_linux_sigframe_validate
946 };
947
948 static const struct tramp_frame micromips_linux_n64_rt_sigframe = {
949 SIGTRAMP_FRAME,
950 2,
951 {
952 { MICROMIPS_INST_LI_V0, -1 },
953 { MIPS_NR_N64_rt_sigreturn, -1 },
954 { MICROMIPS_INST_POOL32A, -1 },
955 { MICROMIPS_INST_SYSCALL, -1 },
956 { TRAMP_SENTINEL_INSN, -1 }
957 },
958 mips_linux_n32n64_sigframe_init,
959 micromips_linux_sigframe_validate
960 };
961
962 /* *INDENT-OFF* */
963 /* The unwinder for o32 signal frames. The legacy structures look
964 like this:
965
966 struct sigframe {
967 u32 sf_ass[4]; [argument save space for o32]
968 u32 sf_code[2]; [signal trampoline or fill]
969 struct sigcontext sf_sc;
970 sigset_t sf_mask;
971 };
972
973 Pre-2.6.12 sigcontext:
974
975 struct sigcontext {
976 unsigned int sc_regmask; [Unused]
977 unsigned int sc_status;
978 unsigned long long sc_pc;
979 unsigned long long sc_regs[32];
980 unsigned long long sc_fpregs[32];
981 unsigned int sc_ownedfp;
982 unsigned int sc_fpc_csr;
983 unsigned int sc_fpc_eir; [Unused]
984 unsigned int sc_used_math;
985 unsigned int sc_ssflags; [Unused]
986 [Alignment hole of four bytes]
987 unsigned long long sc_mdhi;
988 unsigned long long sc_mdlo;
989
990 unsigned int sc_cause; [Unused]
991 unsigned int sc_badvaddr; [Unused]
992
993 unsigned long sc_sigset[4]; [kernel's sigset_t]
994 };
995
996 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
997
998 struct sigcontext {
999 unsigned int sc_regmask; [Unused]
1000 unsigned int sc_status; [Unused]
1001 unsigned long long sc_pc;
1002 unsigned long long sc_regs[32];
1003 unsigned long long sc_fpregs[32];
1004 unsigned int sc_acx;
1005 unsigned int sc_fpc_csr;
1006 unsigned int sc_fpc_eir; [Unused]
1007 unsigned int sc_used_math;
1008 unsigned int sc_dsp;
1009 [Alignment hole of four bytes]
1010 unsigned long long sc_mdhi;
1011 unsigned long long sc_mdlo;
1012 unsigned long sc_hi1;
1013 unsigned long sc_lo1;
1014 unsigned long sc_hi2;
1015 unsigned long sc_lo2;
1016 unsigned long sc_hi3;
1017 unsigned long sc_lo3;
1018 };
1019
1020 The RT signal frames look like this:
1021
1022 struct rt_sigframe {
1023 u32 rs_ass[4]; [argument save space for o32]
1024 u32 rs_code[2] [signal trampoline or fill]
1025 struct siginfo rs_info;
1026 struct ucontext rs_uc;
1027 };
1028
1029 struct ucontext {
1030 unsigned long uc_flags;
1031 struct ucontext *uc_link;
1032 stack_t uc_stack;
1033 [Alignment hole of four bytes]
1034 struct sigcontext uc_mcontext;
1035 sigset_t uc_sigmask;
1036 }; */
1037 /* *INDENT-ON* */
1038
1039 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
1040
1041 #define RTSIGFRAME_SIGINFO_SIZE 128
1042 #define STACK_T_SIZE (3 * 4)
1043 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
1044 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1045 + RTSIGFRAME_SIGINFO_SIZE \
1046 + UCONTEXT_SIGCONTEXT_OFFSET)
1047
1048 #define SIGCONTEXT_PC (1 * 8)
1049 #define SIGCONTEXT_REGS (2 * 8)
1050 #define SIGCONTEXT_FPREGS (34 * 8)
1051 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
1052 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
1053 #define SIGCONTEXT_HI (69 * 8)
1054 #define SIGCONTEXT_LO (70 * 8)
1055 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
1056 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
1057 #define SIGCONTEXT_HI1 (71 * 8 + 0)
1058 #define SIGCONTEXT_LO1 (71 * 8 + 4)
1059 #define SIGCONTEXT_HI2 (72 * 8 + 0)
1060 #define SIGCONTEXT_LO2 (72 * 8 + 4)
1061 #define SIGCONTEXT_HI3 (73 * 8 + 0)
1062 #define SIGCONTEXT_LO3 (73 * 8 + 4)
1063
1064 #define SIGCONTEXT_REG_SIZE 8
1065
1066 static void
1067 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
1068 struct frame_info *this_frame,
1069 struct trad_frame_cache *this_cache,
1070 CORE_ADDR func)
1071 {
1072 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1073 int ireg;
1074 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1075 CORE_ADDR sigcontext_base;
1076 const struct mips_regnum *regs = mips_regnum (gdbarch);
1077 CORE_ADDR regs_base;
1078
1079 if (self == &mips_linux_o32_sigframe
1080 || self == &micromips_linux_o32_sigframe)
1081 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
1082 else
1083 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
1084
1085 /* I'm not proud of this hack. Eventually we will have the
1086 infrastructure to indicate the size of saved registers on a
1087 per-frame basis, but right now we don't; the kernel saves eight
1088 bytes but we only want four. Use regs_base to access any
1089 64-bit fields. */
1090 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1091 regs_base = sigcontext_base + 4;
1092 else
1093 regs_base = sigcontext_base;
1094
1095 if (mips_linux_restart_reg_p (gdbarch))
1096 trad_frame_set_reg_addr (this_cache,
1097 (MIPS_RESTART_REGNUM
1098 + gdbarch_num_regs (gdbarch)),
1099 regs_base + SIGCONTEXT_REGS);
1100
1101 for (ireg = 1; ireg < 32; ireg++)
1102 trad_frame_set_reg_addr (this_cache,
1103 (ireg + MIPS_ZERO_REGNUM
1104 + gdbarch_num_regs (gdbarch)),
1105 (regs_base + SIGCONTEXT_REGS
1106 + ireg * SIGCONTEXT_REG_SIZE));
1107
1108 /* The way that floating point registers are saved, unfortunately,
1109 depends on the architecture the kernel is built for. For the r3000 and
1110 tx39, four bytes of each register are at the beginning of each of the
1111 32 eight byte slots. For everything else, the registers are saved
1112 using double precision; only the even-numbered slots are initialized,
1113 and the high bits are the odd-numbered register. Assume the latter
1114 layout, since we can't tell, and it's much more common. Which bits are
1115 the "high" bits depends on endianness. */
1116 for (ireg = 0; ireg < 32; ireg++)
1117 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1118 trad_frame_set_reg_addr (this_cache,
1119 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1120 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1121 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1122 else
1123 trad_frame_set_reg_addr (this_cache,
1124 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1125 (sigcontext_base + SIGCONTEXT_FPREGS
1126 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1127
1128 trad_frame_set_reg_addr (this_cache,
1129 regs->pc + gdbarch_num_regs (gdbarch),
1130 regs_base + SIGCONTEXT_PC);
1131
1132 trad_frame_set_reg_addr (this_cache,
1133 (regs->fp_control_status
1134 + gdbarch_num_regs (gdbarch)),
1135 sigcontext_base + SIGCONTEXT_FPCSR);
1136
1137 if (regs->dspctl != -1)
1138 trad_frame_set_reg_addr (this_cache,
1139 regs->dspctl + gdbarch_num_regs (gdbarch),
1140 sigcontext_base + SIGCONTEXT_DSPCTL);
1141
1142 trad_frame_set_reg_addr (this_cache,
1143 regs->hi + gdbarch_num_regs (gdbarch),
1144 regs_base + SIGCONTEXT_HI);
1145 trad_frame_set_reg_addr (this_cache,
1146 regs->lo + gdbarch_num_regs (gdbarch),
1147 regs_base + SIGCONTEXT_LO);
1148
1149 if (regs->dspacc != -1)
1150 {
1151 trad_frame_set_reg_addr (this_cache,
1152 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1153 sigcontext_base + SIGCONTEXT_HI1);
1154 trad_frame_set_reg_addr (this_cache,
1155 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1156 sigcontext_base + SIGCONTEXT_LO1);
1157 trad_frame_set_reg_addr (this_cache,
1158 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1159 sigcontext_base + SIGCONTEXT_HI2);
1160 trad_frame_set_reg_addr (this_cache,
1161 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1162 sigcontext_base + SIGCONTEXT_LO2);
1163 trad_frame_set_reg_addr (this_cache,
1164 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1165 sigcontext_base + SIGCONTEXT_HI3);
1166 trad_frame_set_reg_addr (this_cache,
1167 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1168 sigcontext_base + SIGCONTEXT_LO3);
1169 }
1170 else
1171 {
1172 trad_frame_set_reg_addr (this_cache,
1173 regs->cause + gdbarch_num_regs (gdbarch),
1174 sigcontext_base + SIGCONTEXT_CAUSE);
1175 trad_frame_set_reg_addr (this_cache,
1176 regs->badvaddr + gdbarch_num_regs (gdbarch),
1177 sigcontext_base + SIGCONTEXT_BADVADDR);
1178 }
1179
1180 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1181 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1182 }
1183
1184 /* *INDENT-OFF* */
1185 /* For N32/N64 things look different. There is no non-rt signal frame.
1186
1187 struct rt_sigframe_n32 {
1188 u32 rs_ass[4]; [ argument save space for o32 ]
1189 u32 rs_code[2]; [ signal trampoline or fill ]
1190 struct siginfo rs_info;
1191 struct ucontextn32 rs_uc;
1192 };
1193
1194 struct ucontextn32 {
1195 u32 uc_flags;
1196 s32 uc_link;
1197 stack32_t uc_stack;
1198 struct sigcontext uc_mcontext;
1199 sigset_t uc_sigmask; [ mask last for extensibility ]
1200 };
1201
1202 struct rt_sigframe {
1203 u32 rs_ass[4]; [ argument save space for o32 ]
1204 u32 rs_code[2]; [ signal trampoline ]
1205 struct siginfo rs_info;
1206 struct ucontext rs_uc;
1207 };
1208
1209 struct ucontext {
1210 unsigned long uc_flags;
1211 struct ucontext *uc_link;
1212 stack_t uc_stack;
1213 struct sigcontext uc_mcontext;
1214 sigset_t uc_sigmask; [ mask last for extensibility ]
1215 };
1216
1217 And the sigcontext is different (this is for both n32 and n64):
1218
1219 struct sigcontext {
1220 unsigned long long sc_regs[32];
1221 unsigned long long sc_fpregs[32];
1222 unsigned long long sc_mdhi;
1223 unsigned long long sc_hi1;
1224 unsigned long long sc_hi2;
1225 unsigned long long sc_hi3;
1226 unsigned long long sc_mdlo;
1227 unsigned long long sc_lo1;
1228 unsigned long long sc_lo2;
1229 unsigned long long sc_lo3;
1230 unsigned long long sc_pc;
1231 unsigned int sc_fpc_csr;
1232 unsigned int sc_used_math;
1233 unsigned int sc_dsp;
1234 unsigned int sc_reserved;
1235 };
1236
1237 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1238 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1239 included too. */
1240 /* *INDENT-ON* */
1241
1242 #define N32_STACK_T_SIZE STACK_T_SIZE
1243 #define N64_STACK_T_SIZE (2 * 8 + 4)
1244 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1245 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1246 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1247 + RTSIGFRAME_SIGINFO_SIZE \
1248 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1249 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1250 + RTSIGFRAME_SIGINFO_SIZE \
1251 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1252
1253 #define N64_SIGCONTEXT_REGS (0 * 8)
1254 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1255 #define N64_SIGCONTEXT_HI (64 * 8)
1256 #define N64_SIGCONTEXT_HI1 (65 * 8)
1257 #define N64_SIGCONTEXT_HI2 (66 * 8)
1258 #define N64_SIGCONTEXT_HI3 (67 * 8)
1259 #define N64_SIGCONTEXT_LO (68 * 8)
1260 #define N64_SIGCONTEXT_LO1 (69 * 8)
1261 #define N64_SIGCONTEXT_LO2 (70 * 8)
1262 #define N64_SIGCONTEXT_LO3 (71 * 8)
1263 #define N64_SIGCONTEXT_PC (72 * 8)
1264 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1265 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1266
1267 #define N64_SIGCONTEXT_REG_SIZE 8
1268
1269 static void
1270 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1271 struct frame_info *this_frame,
1272 struct trad_frame_cache *this_cache,
1273 CORE_ADDR func)
1274 {
1275 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1276 int ireg;
1277 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1278 CORE_ADDR sigcontext_base;
1279 const struct mips_regnum *regs = mips_regnum (gdbarch);
1280
1281 if (self == &mips_linux_n32_rt_sigframe
1282 || self == &micromips_linux_n32_rt_sigframe)
1283 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1284 else
1285 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1286
1287 if (mips_linux_restart_reg_p (gdbarch))
1288 trad_frame_set_reg_addr (this_cache,
1289 (MIPS_RESTART_REGNUM
1290 + gdbarch_num_regs (gdbarch)),
1291 sigcontext_base + N64_SIGCONTEXT_REGS);
1292
1293 for (ireg = 1; ireg < 32; ireg++)
1294 trad_frame_set_reg_addr (this_cache,
1295 (ireg + MIPS_ZERO_REGNUM
1296 + gdbarch_num_regs (gdbarch)),
1297 (sigcontext_base + N64_SIGCONTEXT_REGS
1298 + ireg * N64_SIGCONTEXT_REG_SIZE));
1299
1300 for (ireg = 0; ireg < 32; ireg++)
1301 trad_frame_set_reg_addr (this_cache,
1302 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1303 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1304 + ireg * N64_SIGCONTEXT_REG_SIZE));
1305
1306 trad_frame_set_reg_addr (this_cache,
1307 regs->pc + gdbarch_num_regs (gdbarch),
1308 sigcontext_base + N64_SIGCONTEXT_PC);
1309
1310 trad_frame_set_reg_addr (this_cache,
1311 (regs->fp_control_status
1312 + gdbarch_num_regs (gdbarch)),
1313 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1314
1315 trad_frame_set_reg_addr (this_cache,
1316 regs->hi + gdbarch_num_regs (gdbarch),
1317 sigcontext_base + N64_SIGCONTEXT_HI);
1318 trad_frame_set_reg_addr (this_cache,
1319 regs->lo + gdbarch_num_regs (gdbarch),
1320 sigcontext_base + N64_SIGCONTEXT_LO);
1321
1322 if (regs->dspacc != -1)
1323 {
1324 trad_frame_set_reg_addr (this_cache,
1325 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1326 sigcontext_base + N64_SIGCONTEXT_HI1);
1327 trad_frame_set_reg_addr (this_cache,
1328 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1329 sigcontext_base + N64_SIGCONTEXT_LO1);
1330 trad_frame_set_reg_addr (this_cache,
1331 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1332 sigcontext_base + N64_SIGCONTEXT_HI2);
1333 trad_frame_set_reg_addr (this_cache,
1334 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1335 sigcontext_base + N64_SIGCONTEXT_LO2);
1336 trad_frame_set_reg_addr (this_cache,
1337 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1338 sigcontext_base + N64_SIGCONTEXT_HI3);
1339 trad_frame_set_reg_addr (this_cache,
1340 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1341 sigcontext_base + N64_SIGCONTEXT_LO3);
1342 }
1343 if (regs->dspctl != -1)
1344 trad_frame_set_reg_addr (this_cache,
1345 regs->dspctl + gdbarch_num_regs (gdbarch),
1346 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1347
1348 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1349 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1350 }
1351
1352 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1353
1354 static int
1355 mips_linux_sigframe_validate (const struct tramp_frame *self,
1356 struct frame_info *this_frame,
1357 CORE_ADDR *pc)
1358 {
1359 return mips_pc_is_mips (*pc);
1360 }
1361
1362 /* Implement struct tramp_frame's "validate" method for microMIPS code. */
1363
1364 static int
1365 micromips_linux_sigframe_validate (const struct tramp_frame *self,
1366 struct frame_info *this_frame,
1367 CORE_ADDR *pc)
1368 {
1369 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc))
1370 {
1371 *pc = mips_unmake_compact_addr (*pc);
1372 return 1;
1373 }
1374 else
1375 return 0;
1376 }
1377
1378 /* Implement the "write_pc" gdbarch method. */
1379
1380 static void
1381 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1382 {
1383 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1384
1385 mips_write_pc (regcache, pc);
1386
1387 /* Clear the syscall restart flag. */
1388 if (mips_linux_restart_reg_p (gdbarch))
1389 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1390 }
1391
1392 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1393
1394 int
1395 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1396 {
1397 /* If we do not have a target description with registers, then
1398 MIPS_RESTART_REGNUM will not be included in the register set. */
1399 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1400 return 0;
1401
1402 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1403 either be GPR-sized or missing. */
1404 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1405 }
1406
1407 /* When FRAME is at a syscall instruction, return the PC of the next
1408 instruction to be executed. */
1409
1410 static CORE_ADDR
1411 mips_linux_syscall_next_pc (struct frame_info *frame)
1412 {
1413 CORE_ADDR pc = get_frame_pc (frame);
1414 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1415
1416 /* If we are about to make a sigreturn syscall, use the unwinder to
1417 decode the signal frame. */
1418 if (v0 == MIPS_NR_sigreturn
1419 || v0 == MIPS_NR_rt_sigreturn
1420 || v0 == MIPS_NR_N64_rt_sigreturn
1421 || v0 == MIPS_NR_N32_rt_sigreturn)
1422 return frame_unwind_caller_pc (get_current_frame ());
1423
1424 return pc + 4;
1425 }
1426
1427 /* Return the current system call's number present in the
1428 v0 register. When the function fails, it returns -1. */
1429
1430 static LONGEST
1431 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1432 ptid_t ptid)
1433 {
1434 struct regcache *regcache = get_thread_regcache (ptid);
1435 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1436 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1437 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1438 /* The content of a register */
1439 gdb_byte buf[8];
1440 /* The result */
1441 LONGEST ret;
1442
1443 /* Make sure we're in a known ABI */
1444 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1445 || tdep->mips_abi == MIPS_ABI_N32
1446 || tdep->mips_abi == MIPS_ABI_N64);
1447
1448 gdb_assert (regsize <= sizeof (buf));
1449
1450 /* Getting the system call number from the register.
1451 syscall number is in v0 or $2. */
1452 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1453
1454 ret = extract_signed_integer (buf, regsize, byte_order);
1455
1456 return ret;
1457 }
1458
1459 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1460 gdbarch.h. */
1461
1462 static int
1463 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1464 enum gdb_signal signal)
1465 {
1466 switch (signal)
1467 {
1468 case GDB_SIGNAL_EMT:
1469 return MIPS_LINUX_SIGEMT;
1470
1471 case GDB_SIGNAL_BUS:
1472 return MIPS_LINUX_SIGBUS;
1473
1474 case GDB_SIGNAL_SYS:
1475 return MIPS_LINUX_SIGSYS;
1476
1477 case GDB_SIGNAL_USR1:
1478 return MIPS_LINUX_SIGUSR1;
1479
1480 case GDB_SIGNAL_USR2:
1481 return MIPS_LINUX_SIGUSR2;
1482
1483 case GDB_SIGNAL_CHLD:
1484 return MIPS_LINUX_SIGCHLD;
1485
1486 case GDB_SIGNAL_PWR:
1487 return MIPS_LINUX_SIGPWR;
1488
1489 case GDB_SIGNAL_WINCH:
1490 return MIPS_LINUX_SIGWINCH;
1491
1492 case GDB_SIGNAL_URG:
1493 return MIPS_LINUX_SIGURG;
1494
1495 case GDB_SIGNAL_IO:
1496 return MIPS_LINUX_SIGIO;
1497
1498 case GDB_SIGNAL_POLL:
1499 return MIPS_LINUX_SIGPOLL;
1500
1501 case GDB_SIGNAL_STOP:
1502 return MIPS_LINUX_SIGSTOP;
1503
1504 case GDB_SIGNAL_TSTP:
1505 return MIPS_LINUX_SIGTSTP;
1506
1507 case GDB_SIGNAL_CONT:
1508 return MIPS_LINUX_SIGCONT;
1509
1510 case GDB_SIGNAL_TTIN:
1511 return MIPS_LINUX_SIGTTIN;
1512
1513 case GDB_SIGNAL_TTOU:
1514 return MIPS_LINUX_SIGTTOU;
1515
1516 case GDB_SIGNAL_VTALRM:
1517 return MIPS_LINUX_SIGVTALRM;
1518
1519 case GDB_SIGNAL_PROF:
1520 return MIPS_LINUX_SIGPROF;
1521
1522 case GDB_SIGNAL_XCPU:
1523 return MIPS_LINUX_SIGXCPU;
1524
1525 case GDB_SIGNAL_XFSZ:
1526 return MIPS_LINUX_SIGXFSZ;
1527
1528 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1529 therefore we have to handle it here. */
1530 case GDB_SIGNAL_REALTIME_32:
1531 return MIPS_LINUX_SIGRTMIN;
1532 }
1533
1534 if (signal >= GDB_SIGNAL_REALTIME_33
1535 && signal <= GDB_SIGNAL_REALTIME_63)
1536 {
1537 int offset = signal - GDB_SIGNAL_REALTIME_33;
1538
1539 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1540 }
1541 else if (signal >= GDB_SIGNAL_REALTIME_64
1542 && signal <= GDB_SIGNAL_REALTIME_127)
1543 {
1544 int offset = signal - GDB_SIGNAL_REALTIME_64;
1545
1546 return MIPS_LINUX_SIGRT64 + offset;
1547 }
1548
1549 return linux_gdb_signal_to_target (gdbarch, signal);
1550 }
1551
1552 /* Translate signals based on MIPS signal values.
1553 Adapted from gdb/common/signals.c. */
1554
1555 static enum gdb_signal
1556 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1557 {
1558 switch (signal)
1559 {
1560 case MIPS_LINUX_SIGEMT:
1561 return GDB_SIGNAL_EMT;
1562
1563 case MIPS_LINUX_SIGBUS:
1564 return GDB_SIGNAL_BUS;
1565
1566 case MIPS_LINUX_SIGSYS:
1567 return GDB_SIGNAL_SYS;
1568
1569 case MIPS_LINUX_SIGUSR1:
1570 return GDB_SIGNAL_USR1;
1571
1572 case MIPS_LINUX_SIGUSR2:
1573 return GDB_SIGNAL_USR2;
1574
1575 case MIPS_LINUX_SIGCHLD:
1576 return GDB_SIGNAL_CHLD;
1577
1578 case MIPS_LINUX_SIGPWR:
1579 return GDB_SIGNAL_PWR;
1580
1581 case MIPS_LINUX_SIGWINCH:
1582 return GDB_SIGNAL_WINCH;
1583
1584 case MIPS_LINUX_SIGURG:
1585 return GDB_SIGNAL_URG;
1586
1587 /* No way to differentiate between SIGIO and SIGPOLL.
1588 Therefore, we just handle the first one. */
1589 case MIPS_LINUX_SIGIO:
1590 return GDB_SIGNAL_IO;
1591
1592 case MIPS_LINUX_SIGSTOP:
1593 return GDB_SIGNAL_STOP;
1594
1595 case MIPS_LINUX_SIGTSTP:
1596 return GDB_SIGNAL_TSTP;
1597
1598 case MIPS_LINUX_SIGCONT:
1599 return GDB_SIGNAL_CONT;
1600
1601 case MIPS_LINUX_SIGTTIN:
1602 return GDB_SIGNAL_TTIN;
1603
1604 case MIPS_LINUX_SIGTTOU:
1605 return GDB_SIGNAL_TTOU;
1606
1607 case MIPS_LINUX_SIGVTALRM:
1608 return GDB_SIGNAL_VTALRM;
1609
1610 case MIPS_LINUX_SIGPROF:
1611 return GDB_SIGNAL_PROF;
1612
1613 case MIPS_LINUX_SIGXCPU:
1614 return GDB_SIGNAL_XCPU;
1615
1616 case MIPS_LINUX_SIGXFSZ:
1617 return GDB_SIGNAL_XFSZ;
1618 }
1619
1620 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1621 {
1622 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1623 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1624 int offset = signal - MIPS_LINUX_SIGRTMIN;
1625
1626 if (offset == 0)
1627 return GDB_SIGNAL_REALTIME_32;
1628 else if (offset < 32)
1629 return (enum gdb_signal) (offset - 1
1630 + (int) GDB_SIGNAL_REALTIME_33);
1631 else
1632 return (enum gdb_signal) (offset - 32
1633 + (int) GDB_SIGNAL_REALTIME_64);
1634 }
1635
1636 return linux_gdb_signal_from_target (gdbarch, signal);
1637 }
1638
1639 /* Initialize one of the GNU/Linux OS ABIs. */
1640
1641 static void
1642 mips_linux_init_abi (struct gdbarch_info info,
1643 struct gdbarch *gdbarch)
1644 {
1645 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1646 enum mips_abi abi = mips_abi (gdbarch);
1647 struct tdesc_arch_data *tdesc_data
1648 = (struct tdesc_arch_data *) info.tdep_info;
1649
1650 linux_init_abi (info, gdbarch);
1651
1652 /* Get the syscall number from the arch's register. */
1653 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1654
1655 switch (abi)
1656 {
1657 case MIPS_ABI_O32:
1658 set_gdbarch_get_longjmp_target (gdbarch,
1659 mips_linux_get_longjmp_target);
1660 set_solib_svr4_fetch_link_map_offsets
1661 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1662 tramp_frame_prepend_unwinder (gdbarch, &micromips_linux_o32_sigframe);
1663 tramp_frame_prepend_unwinder (gdbarch,
1664 &micromips_linux_o32_rt_sigframe);
1665 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1666 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1667 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
1668 break;
1669 case MIPS_ABI_N32:
1670 set_gdbarch_get_longjmp_target (gdbarch,
1671 mips_linux_get_longjmp_target);
1672 set_solib_svr4_fetch_link_map_offsets
1673 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1674 set_gdbarch_long_double_bit (gdbarch, 128);
1675 /* These floatformats should probably be renamed. MIPS uses
1676 the same 128-bit IEEE floating point format that IA-64 uses,
1677 except that the quiet/signalling NaN bit is reversed (GDB
1678 does not distinguish between quiet and signalling NaNs). */
1679 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1680 tramp_frame_prepend_unwinder (gdbarch,
1681 &micromips_linux_n32_rt_sigframe);
1682 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1683 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
1684 break;
1685 case MIPS_ABI_N64:
1686 set_gdbarch_get_longjmp_target (gdbarch,
1687 mips64_linux_get_longjmp_target);
1688 set_solib_svr4_fetch_link_map_offsets
1689 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1690 set_gdbarch_long_double_bit (gdbarch, 128);
1691 /* These floatformats should probably be renamed. MIPS uses
1692 the same 128-bit IEEE floating point format that IA-64 uses,
1693 except that the quiet/signalling NaN bit is reversed (GDB
1694 does not distinguish between quiet and signalling NaNs). */
1695 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1696 tramp_frame_prepend_unwinder (gdbarch,
1697 &micromips_linux_n64_rt_sigframe);
1698 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1699 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
1700 break;
1701 default:
1702 break;
1703 }
1704
1705 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1706
1707 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1708
1709 /* Enable TLS support. */
1710 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1711 svr4_fetch_objfile_link_map);
1712
1713 /* Initialize this lazily, to avoid an initialization order
1714 dependency on solib-svr4.c's _initialize routine. */
1715 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1716 {
1717 mips_svr4_so_ops = svr4_so_ops;
1718 mips_svr4_so_ops.in_dynsym_resolve_code
1719 = mips_linux_in_dynsym_resolve_code;
1720 }
1721 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1722
1723 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1724
1725 set_gdbarch_core_read_description (gdbarch,
1726 mips_linux_core_read_description);
1727
1728 set_gdbarch_iterate_over_regset_sections
1729 (gdbarch, mips_linux_iterate_over_regset_sections);
1730
1731 set_gdbarch_gdb_signal_from_target (gdbarch,
1732 mips_gdb_signal_from_target);
1733
1734 set_gdbarch_gdb_signal_to_target (gdbarch,
1735 mips_gdb_signal_to_target);
1736
1737 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1738
1739 if (tdesc_data)
1740 {
1741 const struct tdesc_feature *feature;
1742
1743 /* If we have target-described registers, then we can safely
1744 reserve a number for MIPS_RESTART_REGNUM (whether it is
1745 described or not). */
1746 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1747 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1748 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1749
1750 /* If it's present, then assign it to the reserved number. */
1751 feature = tdesc_find_feature (info.target_desc,
1752 "org.gnu.gdb.mips.linux");
1753 if (feature != NULL)
1754 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1755 "restart");
1756 }
1757 }
1758
1759 /* Provide a prototype to silence -Wmissing-prototypes. */
1760 extern initialize_file_ftype _initialize_mips_linux_tdep;
1761
1762 void
1763 _initialize_mips_linux_tdep (void)
1764 {
1765 const struct bfd_arch_info *arch_info;
1766
1767 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1768 arch_info != NULL;
1769 arch_info = arch_info->next)
1770 {
1771 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1772 GDB_OSABI_LINUX,
1773 mips_linux_init_abi);
1774 }
1775 }
This page took 0.148487 seconds and 4 git commands to generate.