1 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995
3 Free Software Foundation, Inc.
4 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
5 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #include "gdb_string.h"
36 #include "opcode/mips.h"
38 #define VM_MIN_ADDRESS (unsigned)0x400000
40 /* FIXME: Put this declaration in frame.h. */
41 extern struct obstack frame_cache_obstack
;
44 static int mips_in_lenient_prologue
PARAMS ((CORE_ADDR
, CORE_ADDR
));
47 static void mips_set_fpu_command
PARAMS ((char *, int,
48 struct cmd_list_element
*));
50 static void mips_show_fpu_command
PARAMS ((char *, int,
51 struct cmd_list_element
*));
53 void mips_set_processor_type_command
PARAMS ((char *, int));
55 int mips_set_processor_type
PARAMS ((char *));
57 static void mips_show_processor_type_command
PARAMS ((char *, int));
59 static void reinit_frame_cache_sfunc
PARAMS ((char *, int,
60 struct cmd_list_element
*));
62 /* This value is the model of MIPS in use. It is derived from the value
63 of the PrID register. */
65 char *mips_processor_type
;
67 char *tmp_mips_processor_type
;
69 /* Some MIPS boards don't support floating point, so we permit the
70 user to turn it off. */
72 enum mips_fpu_type mips_fpu
;
74 static char *mips_fpu_string
;
76 /* A set of original names, to be used when restoring back to generic
77 registers from a specific set. */
79 char *mips_generic_reg_names
[] = REGISTER_NAMES
;
81 /* Names of IDT R3041 registers. */
83 char *mips_r3041_reg_names
[] = {
84 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
85 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
86 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
87 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
88 "sr", "lo", "hi", "bad", "cause","pc",
89 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
90 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
91 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
92 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
93 "fsr", "fir", "fp", "",
94 "", "", "bus", "ccfg", "", "", "", "",
95 "", "", "port", "cmp", "", "", "epc", "prid",
98 /* Names of IDT R3051 registers. */
100 char *mips_r3051_reg_names
[] = {
101 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
102 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
103 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
104 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
105 "sr", "lo", "hi", "bad", "cause","pc",
106 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
107 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
108 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
109 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
110 "fsr", "fir", "fp", "",
111 "inx", "rand", "elo", "", "ctxt", "", "", "",
112 "", "", "ehi", "", "", "", "epc", "prid",
115 /* Names of IDT R3081 registers. */
117 char *mips_r3081_reg_names
[] = {
118 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
119 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
120 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
121 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
122 "sr", "lo", "hi", "bad", "cause","pc",
123 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
124 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
125 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
126 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
127 "fsr", "fir", "fp", "",
128 "inx", "rand", "elo", "cfg", "ctxt", "", "", "",
129 "", "", "ehi", "", "", "", "epc", "prid",
132 /* Names of LSI 33k registers. */
134 char *mips_lsi33k_reg_names
[] = {
135 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
136 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
137 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
138 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
139 "epc", "hi", "lo", "sr", "cause","badvaddr",
140 "dcic", "bpc", "bda", "", "", "", "", "",
141 "", "", "", "", "", "", "", "",
142 "", "", "", "", "", "", "", "",
143 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
152 } mips_processor_type_table
[] = {
153 { "generic", mips_generic_reg_names
},
154 { "r3041", mips_r3041_reg_names
},
155 { "r3051", mips_r3051_reg_names
},
156 { "r3071", mips_r3081_reg_names
},
157 { "r3081", mips_r3081_reg_names
},
158 { "lsi33k", mips_lsi33k_reg_names
},
162 /* Heuristic_proc_start may hunt through the text section for a long
163 time across a 2400 baud serial line. Allows the user to limit this
166 static unsigned int heuristic_fence_post
= 0;
168 #define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
169 #define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
170 #define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
171 #define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
172 #define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
173 #define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
174 #define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
175 #define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
176 #define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
177 #define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
178 #define _PROC_MAGIC_ 0x0F0F0F0F
179 #define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
180 #define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
182 struct linked_proc_info
184 struct mips_extra_func_info info
;
185 struct linked_proc_info
*next
;
186 } *linked_proc_desc_table
= NULL
;
189 /* Guaranteed to set fci->saved_regs to some values (it never leaves it
193 mips_find_saved_regs (fci
)
194 struct frame_info
*fci
;
197 CORE_ADDR reg_position
;
198 /* r0 bit means kernel trap */
200 /* What registers have been saved? Bitmasks. */
201 unsigned long gen_mask
, float_mask
;
202 mips_extra_func_info_t proc_desc
;
204 fci
->saved_regs
= (struct frame_saved_regs
*)
205 obstack_alloc (&frame_cache_obstack
, sizeof(struct frame_saved_regs
));
206 memset (fci
->saved_regs
, 0, sizeof (struct frame_saved_regs
));
208 /* If it is the frame for sigtramp, the saved registers are located
209 in a sigcontext structure somewhere on the stack.
210 If the stack layout for sigtramp changes we might have to change these
211 constants and the companion fixup_sigtramp in mdebugread.c */
212 #ifndef SIGFRAME_BASE
213 /* To satisfy alignment restrictions, sigcontext is located 4 bytes
214 above the sigtramp frame. */
215 #define SIGFRAME_BASE 4
216 #define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
217 #define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
218 #define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 4 + 3 * 4)
220 #ifndef SIGFRAME_REG_SIZE
221 #define SIGFRAME_REG_SIZE 4
223 if (fci
->signal_handler_caller
)
225 for (ireg
= 0; ireg
< 32; ireg
++)
227 reg_position
= fci
->frame
+ SIGFRAME_REGSAVE_OFF
228 + ireg
* SIGFRAME_REG_SIZE
;
229 fci
->saved_regs
->regs
[ireg
] = reg_position
;
231 for (ireg
= 0; ireg
< 32; ireg
++)
233 reg_position
= fci
->frame
+ SIGFRAME_FPREGSAVE_OFF
234 + ireg
* SIGFRAME_REG_SIZE
;
235 fci
->saved_regs
->regs
[FP0_REGNUM
+ ireg
] = reg_position
;
237 fci
->saved_regs
->regs
[PC_REGNUM
] = fci
->frame
+ SIGFRAME_PC_OFF
;
241 proc_desc
= fci
->proc_desc
;
242 if (proc_desc
== NULL
)
243 /* I'm not sure how/whether this can happen. Normally when we can't
244 find a proc_desc, we "synthesize" one using heuristic_proc_desc
245 and set the saved_regs right away. */
248 kernel_trap
= PROC_REG_MASK(proc_desc
) & 1;
249 gen_mask
= kernel_trap
? 0xFFFFFFFF : PROC_REG_MASK(proc_desc
);
250 float_mask
= kernel_trap
? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc
);
252 if (/* In any frame other than the innermost, we assume that all
253 registers have been saved. This assumes that all register
254 saves in a function happen before the first function
258 /* In a dummy frame we know exactly where things are saved. */
259 && !PROC_DESC_IS_DUMMY (proc_desc
)
261 /* Not sure exactly what kernel_trap means, but if it means
262 the kernel saves the registers without a prologue doing it,
263 we better not examine the prologue to see whether registers
264 have been saved yet. */
267 /* We need to figure out whether the registers that the proc_desc
268 claims are saved have been saved yet. */
275 /* Bitmasks; set if we have found a save for the register. */
276 unsigned long gen_save_found
= 0;
277 unsigned long float_save_found
= 0;
279 for (addr
= PROC_LOW_ADDR (proc_desc
);
280 addr
< fci
->pc
/*&& (gen_mask != gen_save_found
281 || float_mask != float_save_found)*/;
284 status
= read_memory_nobpt (addr
, buf
, 4);
286 memory_error (status
, addr
);
287 inst
= extract_unsigned_integer (buf
, 4);
288 if (/* sw reg,n($sp) */
289 (inst
& 0xffe00000) == 0xafa00000
292 || (inst
& 0xffe00000) == 0xafc00000
295 || (inst
& 0xffe00000) == 0xffa00000)
297 /* It might be possible to use the instruction to
298 find the offset, rather than the code below which
299 is based on things being in a certain order in the
300 frame, but figuring out what the instruction's offset
301 is relative to might be a little tricky. */
302 int reg
= (inst
& 0x001f0000) >> 16;
303 gen_save_found
|= (1 << reg
);
305 else if (/* swc1 freg,n($sp) */
306 (inst
& 0xffe00000) == 0xe7a00000
308 /* swc1 freg,n($r30) */
309 || (inst
& 0xffe00000) == 0xe7c00000
311 /* sdc1 freg,n($sp) */
312 || (inst
& 0xffe00000) == 0xf7a00000)
315 int reg
= ((inst
& 0x001f0000) >> 16);
316 float_save_found
|= (1 << reg
);
319 gen_mask
= gen_save_found
;
320 float_mask
= float_save_found
;
323 /* Fill in the offsets for the registers which gen_mask says
325 reg_position
= fci
->frame
+ PROC_REG_OFFSET (proc_desc
);
326 for (ireg
= 31; gen_mask
; --ireg
, gen_mask
<<= 1)
327 if (gen_mask
& 0x80000000)
329 fci
->saved_regs
->regs
[ireg
] = reg_position
;
330 reg_position
-= MIPS_REGSIZE
;
332 /* Fill in the offsets for the registers which float_mask says
334 reg_position
= fci
->frame
+ PROC_FREG_OFFSET (proc_desc
);
336 /* The freg_offset points to where the first *double* register
337 is saved. So skip to the high-order word. */
339 for (ireg
= 31; float_mask
; --ireg
, float_mask
<<= 1)
340 if (float_mask
& 0x80000000)
342 fci
->saved_regs
->regs
[FP0_REGNUM
+ireg
] = reg_position
;
343 reg_position
-= MIPS_REGSIZE
;
346 fci
->saved_regs
->regs
[PC_REGNUM
] = fci
->saved_regs
->regs
[RA_REGNUM
];
350 read_next_frame_reg(fi
, regno
)
351 struct frame_info
*fi
;
354 for (; fi
; fi
= fi
->next
)
356 /* We have to get the saved sp from the sigcontext
357 if it is a signal handler frame. */
358 if (regno
== SP_REGNUM
&& !fi
->signal_handler_caller
)
362 if (fi
->saved_regs
== NULL
)
363 mips_find_saved_regs (fi
);
364 if (fi
->saved_regs
->regs
[regno
])
365 return read_memory_integer(fi
->saved_regs
->regs
[regno
], MIPS_REGSIZE
);
368 return read_register (regno
);
372 mips_frame_saved_pc(frame
)
373 struct frame_info
*frame
;
375 mips_extra_func_info_t proc_desc
= frame
->proc_desc
;
376 /* We have to get the saved pc from the sigcontext
377 if it is a signal handler frame. */
378 int pcreg
= frame
->signal_handler_caller
? PC_REGNUM
379 : (proc_desc
? PROC_PC_REG(proc_desc
) : RA_REGNUM
);
381 if (proc_desc
&& PROC_DESC_IS_DUMMY(proc_desc
))
382 return read_memory_integer(frame
->frame
- 4, 4);
384 return read_next_frame_reg(frame
, pcreg
);
387 static struct mips_extra_func_info temp_proc_desc
;
388 static struct frame_saved_regs temp_saved_regs
;
390 /* This fencepost looks highly suspicious to me. Removing it also
391 seems suspicious as it could affect remote debugging across serial
395 heuristic_proc_start(pc
)
398 CORE_ADDR start_pc
= pc
;
399 CORE_ADDR fence
= start_pc
- heuristic_fence_post
;
401 if (start_pc
== 0) return 0;
403 if (heuristic_fence_post
== UINT_MAX
404 || fence
< VM_MIN_ADDRESS
)
405 fence
= VM_MIN_ADDRESS
;
407 /* search back for previous return */
408 for (start_pc
-= 4; ; start_pc
-= 4)
409 if (start_pc
< fence
)
411 /* It's not clear to me why we reach this point when
412 stop_soon_quietly, but with this test, at least we
413 don't print out warnings for every child forked (eg, on
414 decstation). 22apr93 rich@cygnus.com. */
415 if (!stop_soon_quietly
)
417 static int blurb_printed
= 0;
419 if (fence
== VM_MIN_ADDRESS
)
420 warning("Hit beginning of text section without finding");
422 warning("Hit heuristic-fence-post without finding");
424 warning("enclosing function for address 0x%x", pc
);
428 This warning occurs if you are debugging a function without any symbols\n\
429 (for example, in a stripped executable). In that case, you may wish to\n\
430 increase the size of the search with the `set heuristic-fence-post' command.\n\
432 Otherwise, you told GDB there was a function where there isn't one, or\n\
433 (more likely) you have encountered a bug in GDB.\n");
440 else if (ABOUT_TO_RETURN(start_pc
))
443 start_pc
+= 8; /* skip return, and its delay slot */
445 /* skip nops (usually 1) 0 - is this */
446 while (start_pc
< pc
&& read_memory_integer (start_pc
, 4) == 0)
452 static mips_extra_func_info_t
453 heuristic_proc_desc(start_pc
, limit_pc
, next_frame
)
454 CORE_ADDR start_pc
, limit_pc
;
455 struct frame_info
*next_frame
;
457 CORE_ADDR sp
= read_next_frame_reg (next_frame
, SP_REGNUM
);
460 int has_frame_reg
= 0;
461 int reg30
= 0; /* Value of $r30. Used by gcc for frame-pointer */
462 unsigned long reg_mask
= 0;
464 if (start_pc
== 0) return NULL
;
465 memset (&temp_proc_desc
, '\0', sizeof(temp_proc_desc
));
466 memset (&temp_saved_regs
, '\0', sizeof(struct frame_saved_regs
));
467 PROC_LOW_ADDR (&temp_proc_desc
) = start_pc
;
469 if (start_pc
+ 200 < limit_pc
)
470 limit_pc
= start_pc
+ 200;
473 for (cur_pc
= start_pc
; cur_pc
< limit_pc
; cur_pc
+= 4) {
478 status
= read_memory_nobpt (cur_pc
, buf
, 4);
479 if (status
) memory_error (status
, cur_pc
);
480 word
= extract_unsigned_integer (buf
, 4);
482 if ((word
& 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
483 frame_size
+= (-word
) & 0xFFFF;
484 else if ((word
& 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
485 frame_size
+= (-word
) & 0xFFFF;
486 else if ((word
& 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
487 int reg
= (word
& 0x001F0000) >> 16;
488 reg_mask
|= 1 << reg
;
489 temp_saved_regs
.regs
[reg
] = sp
+ (word
& 0xffff);
491 else if ((word
& 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
492 if ((word
& 0xffff) != frame_size
)
493 reg30
= sp
+ (word
& 0xffff);
494 else if (!has_frame_reg
) {
497 reg30
= read_next_frame_reg(next_frame
, 30);
498 alloca_adjust
= reg30
- (sp
+ (word
& 0xffff));
499 if (alloca_adjust
> 0) {
500 /* FP > SP + frame_size. This may be because
501 * of an alloca or somethings similar.
502 * Fix sp to "pre-alloca" value, and try again.
509 else if ((word
& 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
510 int reg
= (word
& 0x001F0000) >> 16;
511 reg_mask
|= 1 << reg
;
512 temp_saved_regs
.regs
[reg
] = reg30
+ (word
& 0xffff);
516 PROC_FRAME_REG(&temp_proc_desc
) = 30;
517 PROC_FRAME_OFFSET(&temp_proc_desc
) = 0;
520 PROC_FRAME_REG(&temp_proc_desc
) = SP_REGNUM
;
521 PROC_FRAME_OFFSET(&temp_proc_desc
) = frame_size
;
523 PROC_REG_MASK(&temp_proc_desc
) = reg_mask
;
524 PROC_PC_REG(&temp_proc_desc
) = RA_REGNUM
;
525 return &temp_proc_desc
;
528 static mips_extra_func_info_t
529 find_proc_desc (pc
, next_frame
)
531 struct frame_info
*next_frame
;
533 mips_extra_func_info_t proc_desc
;
534 struct block
*b
= block_for_pc(pc
);
538 find_pc_partial_function (pc
, NULL
, &startaddr
, NULL
);
543 if (startaddr
> BLOCK_START (b
))
544 /* This is the "pathological" case referred to in a comment in
545 print_frame_info. It might be better to move this check into
549 sym
= lookup_symbol (MIPS_EFI_SYMBOL_NAME
, b
, LABEL_NAMESPACE
,
553 /* If we never found a PDR for this function in symbol reading, then
554 examine prologues to find the information. */
555 if (sym
&& ((mips_extra_func_info_t
) SYMBOL_VALUE (sym
))->pdr
.framereg
== -1)
560 /* IF this is the topmost frame AND
561 * (this proc does not have debugging information OR
562 * the PC is in the procedure prologue)
563 * THEN create a "heuristic" proc_desc (by analyzing
564 * the actual code) to replace the "official" proc_desc.
566 proc_desc
= (mips_extra_func_info_t
) SYMBOL_VALUE (sym
);
567 if (next_frame
== NULL
) {
568 struct symtab_and_line val
;
569 struct symbol
*proc_symbol
=
570 PROC_DESC_IS_DUMMY(proc_desc
) ? 0 : PROC_SYMBOL(proc_desc
);
573 val
= find_pc_line (BLOCK_START
574 (SYMBOL_BLOCK_VALUE(proc_symbol
)),
576 val
.pc
= val
.end
? val
.end
: pc
;
578 if (!proc_symbol
|| pc
< val
.pc
) {
579 mips_extra_func_info_t found_heuristic
=
580 heuristic_proc_desc (PROC_LOW_ADDR (proc_desc
),
583 proc_desc
= found_heuristic
;
589 /* Is linked_proc_desc_table really necessary? It only seems to be used
590 by procedure call dummys. However, the procedures being called ought
591 to have their own proc_descs, and even if they don't,
592 heuristic_proc_desc knows how to create them! */
594 register struct linked_proc_info
*link
;
596 for (link
= linked_proc_desc_table
; link
; link
= link
->next
)
597 if (PROC_LOW_ADDR(&link
->info
) <= pc
598 && PROC_HIGH_ADDR(&link
->info
) > pc
)
602 startaddr
= heuristic_proc_start (pc
);
605 heuristic_proc_desc (startaddr
, pc
, next_frame
);
610 mips_extra_func_info_t cached_proc_desc
;
613 mips_frame_chain(frame
)
614 struct frame_info
*frame
;
616 mips_extra_func_info_t proc_desc
;
617 CORE_ADDR saved_pc
= FRAME_SAVED_PC(frame
);
619 if (saved_pc
== 0 || inside_entry_file (saved_pc
))
622 proc_desc
= find_proc_desc(saved_pc
, frame
);
626 cached_proc_desc
= proc_desc
;
628 /* If no frame pointer and frame size is zero, we must be at end
629 of stack (or otherwise hosed). If we don't check frame size,
630 we loop forever if we see a zero size frame. */
631 if (PROC_FRAME_REG (proc_desc
) == SP_REGNUM
632 && PROC_FRAME_OFFSET (proc_desc
) == 0
633 /* The previous frame from a sigtramp frame might be frameless
634 and have frame size zero. */
635 && !frame
->signal_handler_caller
)
638 return read_next_frame_reg(frame
, PROC_FRAME_REG(proc_desc
))
639 + PROC_FRAME_OFFSET(proc_desc
);
643 init_extra_frame_info(fci
)
644 struct frame_info
*fci
;
646 /* Use proc_desc calculated in frame_chain */
647 mips_extra_func_info_t proc_desc
=
648 fci
->next
? cached_proc_desc
: find_proc_desc(fci
->pc
, fci
->next
);
650 fci
->saved_regs
= NULL
;
652 proc_desc
== &temp_proc_desc
? 0 : proc_desc
;
655 /* Fixup frame-pointer - only needed for top frame */
656 /* This may not be quite right, if proc has a real frame register.
657 Get the value of the frame relative sp, procedure might have been
658 interrupted by a signal at it's very start. */
659 if (fci
->pc
== PROC_LOW_ADDR (proc_desc
)
660 && !PROC_DESC_IS_DUMMY (proc_desc
))
661 fci
->frame
= read_next_frame_reg (fci
->next
, SP_REGNUM
);
664 read_next_frame_reg (fci
->next
, PROC_FRAME_REG (proc_desc
))
665 + PROC_FRAME_OFFSET (proc_desc
);
667 if (proc_desc
== &temp_proc_desc
)
671 /* Do not set the saved registers for a sigtramp frame,
672 mips_find_saved_registers will do that for us.
673 We can't use fci->signal_handler_caller, it is not yet set. */
674 find_pc_partial_function (fci
->pc
, &name
,
675 (CORE_ADDR
*)NULL
,(CORE_ADDR
*)NULL
);
676 if (!IN_SIGTRAMP (fci
->pc
, name
))
678 fci
->saved_regs
= (struct frame_saved_regs
*)
679 obstack_alloc (&frame_cache_obstack
,
680 sizeof (struct frame_saved_regs
));
681 *fci
->saved_regs
= temp_saved_regs
;
682 fci
->saved_regs
->regs
[PC_REGNUM
]
683 = fci
->saved_regs
->regs
[RA_REGNUM
];
687 /* hack: if argument regs are saved, guess these contain args */
688 if ((PROC_REG_MASK(proc_desc
) & 0xF0) == 0) fci
->num_args
= -1;
689 else if ((PROC_REG_MASK(proc_desc
) & 0x80) == 0) fci
->num_args
= 4;
690 else if ((PROC_REG_MASK(proc_desc
) & 0x40) == 0) fci
->num_args
= 3;
691 else if ((PROC_REG_MASK(proc_desc
) & 0x20) == 0) fci
->num_args
= 2;
692 else if ((PROC_REG_MASK(proc_desc
) & 0x10) == 0) fci
->num_args
= 1;
696 /* MIPS stack frames are almost impenetrable. When execution stops,
697 we basically have to look at symbol information for the function
698 that we stopped in, which tells us *which* register (if any) is
699 the base of the frame pointer, and what offset from that register
700 the frame itself is at.
702 This presents a problem when trying to examine a stack in memory
703 (that isn't executing at the moment), using the "frame" command. We
704 don't have a PC, nor do we have any registers except SP.
706 This routine takes two arguments, SP and PC, and tries to make the
707 cached frames look as if these two arguments defined a frame on the
708 cache. This allows the rest of info frame to extract the important
709 arguments without difficulty. */
712 setup_arbitrary_frame (argc
, argv
)
717 error ("MIPS frame specifications require two arguments: sp and pc");
719 return create_new_frame (argv
[0], argv
[1]);
724 mips_push_arguments(nargs
, args
, sp
, struct_return
, struct_addr
)
729 CORE_ADDR struct_addr
;
732 int accumulate_size
= struct_return
? MIPS_REGSIZE
: 0;
733 struct mips_arg
{ char *contents
; int len
; int offset
; };
734 struct mips_arg
*mips_args
=
735 (struct mips_arg
*)alloca((nargs
+ 4) * sizeof(struct mips_arg
));
736 register struct mips_arg
*m_arg
;
739 for (i
= 0, m_arg
= mips_args
; i
< nargs
; i
++, m_arg
++) {
740 value_ptr arg
= args
[i
];
741 m_arg
->len
= TYPE_LENGTH (VALUE_TYPE (arg
));
742 /* This entire mips-specific routine is because doubles must be aligned
743 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
744 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
745 * breaks their varargs implementation...). A correct solution
746 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
747 * in stdarg.h/varargs.h).
748 * On the 64 bit r4000 we always pass the first four arguments
749 * using eight bytes each, so that we can load them up correctly
753 accumulate_size
= (accumulate_size
+ 7) & -8;
754 m_arg
->offset
= accumulate_size
;
755 m_arg
->contents
= VALUE_CONTENTS(arg
);
756 if (! GDB_TARGET_IS_MIPS64
)
757 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & -4;
760 if (accumulate_size
>= 4 * MIPS_REGSIZE
)
761 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) &~ 4;
764 static char zeroes
[8] = { 0 };
765 int len
= m_arg
->len
;
769 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
770 m_arg
->offset
+= 8 - len
;
772 m_arg
->len
= 8 - len
;
773 m_arg
->contents
= zeroes
;
774 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
775 m_arg
->offset
= accumulate_size
;
777 m_arg
->offset
= accumulate_size
+ len
;
780 accumulate_size
= (accumulate_size
+ len
+ 7) & ~8;
784 accumulate_size
= (accumulate_size
+ 7) & (-8);
785 if (accumulate_size
< 4 * MIPS_REGSIZE
)
786 accumulate_size
= 4 * MIPS_REGSIZE
;
787 sp
-= accumulate_size
;
788 for (i
= nargs
+ fake_args
; m_arg
--, --i
>= 0; )
789 write_memory(sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
792 char buf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
794 store_address (buf
, sizeof buf
, struct_addr
);
795 write_memory (sp
, buf
, sizeof buf
);
800 /* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
801 #define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
804 mips_push_dummy_frame()
806 char buffer
[MAX_REGISTER_RAW_SIZE
];
808 struct linked_proc_info
*link
= (struct linked_proc_info
*)
809 xmalloc(sizeof(struct linked_proc_info
));
810 mips_extra_func_info_t proc_desc
= &link
->info
;
811 CORE_ADDR sp
= read_register (SP_REGNUM
);
812 CORE_ADDR save_address
;
813 link
->next
= linked_proc_desc_table
;
814 linked_proc_desc_table
= link
;
815 #define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
816 #define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
817 #define GEN_REG_SAVE_COUNT 22
818 #define FLOAT_REG_SAVE_MASK MASK(0,19)
819 #define FLOAT_REG_SAVE_COUNT 20
820 #define FLOAT_SINGLE_REG_SAVE_MASK \
821 ((1<<18)|(1<<16)|(1<<14)|(1<<12)|(1<<10)|(1<<8)|(1<<6)|(1<<4)|(1<<2)|(1<<0))
822 #define FLOAT_SINGLE_REG_SAVE_COUNT 10
823 #define SPECIAL_REG_SAVE_COUNT 4
825 * The registers we must save are all those not preserved across
826 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
827 * In addition, we must save the PC, and PUSH_FP_REGNUM.
828 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
830 * Dummy frame layout:
833 * Saved MMHI, MMLO, FPC_CSR
838 * Saved D18 (i.e. F19, F18)
840 * Saved D0 (i.e. F1, F0)
841 * CALL_DUMMY (subroutine stub; see tm-mips.h)
842 * Parameter build area (not yet implemented)
845 PROC_REG_MASK(proc_desc
) = GEN_REG_SAVE_MASK
;
848 case MIPS_FPU_DOUBLE
:
849 PROC_FREG_MASK(proc_desc
) = FLOAT_REG_SAVE_MASK
;
851 case MIPS_FPU_SINGLE
:
852 PROC_FREG_MASK(proc_desc
) = FLOAT_SINGLE_REG_SAVE_MASK
;
855 PROC_FREG_MASK(proc_desc
) = 0;
858 PROC_REG_OFFSET(proc_desc
) = /* offset of (Saved R31) from FP */
859 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT
;
860 PROC_FREG_OFFSET(proc_desc
) = /* offset of (Saved D18) from FP */
861 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT
+ GEN_REG_SAVE_COUNT
);
862 /* save general registers */
863 save_address
= sp
+ PROC_REG_OFFSET(proc_desc
);
864 for (ireg
= 32; --ireg
>= 0; )
865 if (PROC_REG_MASK(proc_desc
) & (1 << ireg
))
867 read_register_gen (ireg
, buffer
);
869 /* Need to fix the save_address decrement below, and also make sure
870 that we don't run into problems with the size of the dummy frame
871 or any of the offsets within it. */
872 if (REGISTER_RAW_SIZE (ireg
) > 4)
873 error ("Cannot call functions on mips64");
875 write_memory (save_address
, buffer
, REGISTER_RAW_SIZE (ireg
));
878 /* save floating-points registers starting with high order word */
879 save_address
= sp
+ PROC_FREG_OFFSET(proc_desc
) + 4;
880 for (ireg
= 32; --ireg
>= 0; )
881 if (PROC_FREG_MASK(proc_desc
) & (1 << ireg
))
883 read_register_gen (ireg
+ FP0_REGNUM
, buffer
);
885 if (REGISTER_RAW_SIZE (ireg
+ FP0_REGNUM
) > 4)
886 error ("Cannot call functions on mips64");
888 write_memory (save_address
, buffer
,
889 REGISTER_RAW_SIZE (ireg
+ FP0_REGNUM
));
892 write_register (PUSH_FP_REGNUM
, sp
);
893 PROC_FRAME_REG(proc_desc
) = PUSH_FP_REGNUM
;
894 PROC_FRAME_OFFSET(proc_desc
) = 0;
895 read_register_gen (PC_REGNUM
, buffer
);
896 write_memory (sp
- 4, buffer
, REGISTER_RAW_SIZE (PC_REGNUM
));
897 read_register_gen (HI_REGNUM
, buffer
);
898 write_memory (sp
- 8, buffer
, REGISTER_RAW_SIZE (HI_REGNUM
));
899 read_register_gen (LO_REGNUM
, buffer
);
900 write_memory (sp
- 12, buffer
, REGISTER_RAW_SIZE (LO_REGNUM
));
901 if (mips_fpu
!= MIPS_FPU_NONE
)
902 read_register_gen (FCRCS_REGNUM
, buffer
);
904 memset (buffer
, 0, REGISTER_RAW_SIZE (FCRCS_REGNUM
));
905 write_memory (sp
- 16, buffer
, REGISTER_RAW_SIZE (FCRCS_REGNUM
));
906 sp
-= 4 * (GEN_REG_SAVE_COUNT
+ SPECIAL_REG_SAVE_COUNT
);
907 if (mips_fpu
== MIPS_FPU_DOUBLE
)
908 sp
-= 4 * FLOAT_REG_SAVE_COUNT
;
909 else if (mips_fpu
== MIPS_FPU_SINGLE
)
910 sp
-= 4 * FLOAT_SINGLE_REG_SAVE_COUNT
;
911 write_register (SP_REGNUM
, sp
);
912 PROC_LOW_ADDR(proc_desc
) = sp
- CALL_DUMMY_SIZE
+ CALL_DUMMY_START_OFFSET
;
913 PROC_HIGH_ADDR(proc_desc
) = sp
;
914 SET_PROC_DESC_IS_DUMMY(proc_desc
);
915 PROC_PC_REG(proc_desc
) = RA_REGNUM
;
922 struct frame_info
*frame
= get_current_frame ();
923 CORE_ADDR new_sp
= FRAME_FP (frame
);
925 mips_extra_func_info_t proc_desc
= frame
->proc_desc
;
927 write_register (PC_REGNUM
, FRAME_SAVED_PC(frame
));
928 if (frame
->saved_regs
== NULL
)
929 mips_find_saved_regs (frame
);
932 for (regnum
= 32; --regnum
>= 0; )
933 if (PROC_REG_MASK(proc_desc
) & (1 << regnum
))
934 write_register (regnum
,
935 read_memory_integer (frame
->saved_regs
->regs
[regnum
],
937 for (regnum
= 32; --regnum
>= 0; )
938 if (PROC_FREG_MASK(proc_desc
) & (1 << regnum
))
939 write_register (regnum
+ FP0_REGNUM
,
940 read_memory_integer (frame
->saved_regs
->regs
[regnum
+ FP0_REGNUM
], 4));
942 write_register (SP_REGNUM
, new_sp
);
943 flush_cached_frames ();
945 if (proc_desc
&& PROC_DESC_IS_DUMMY(proc_desc
))
947 struct linked_proc_info
*pi_ptr
, *prev_ptr
;
949 for (pi_ptr
= linked_proc_desc_table
, prev_ptr
= NULL
;
951 prev_ptr
= pi_ptr
, pi_ptr
= pi_ptr
->next
)
953 if (&pi_ptr
->info
== proc_desc
)
958 error ("Can't locate dummy extra frame info\n");
960 if (prev_ptr
!= NULL
)
961 prev_ptr
->next
= pi_ptr
->next
;
963 linked_proc_desc_table
= pi_ptr
->next
;
967 write_register (HI_REGNUM
, read_memory_integer(new_sp
- 8, 4));
968 write_register (LO_REGNUM
, read_memory_integer(new_sp
- 12, 4));
969 if (mips_fpu
!= MIPS_FPU_NONE
)
970 write_register (FCRCS_REGNUM
, read_memory_integer(new_sp
- 16, 4));
975 mips_print_register (regnum
, all
)
978 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
980 /* Get the data in raw format. */
981 if (read_relative_register_raw_bytes (regnum
, raw_buffer
))
983 printf_filtered ("%s: [Invalid]", reg_names
[regnum
]);
987 /* If an even floating pointer register, also print as double. */
988 if (regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+32
989 && !((regnum
-FP0_REGNUM
) & 1))
991 char dbuffer
[MAX_REGISTER_RAW_SIZE
];
993 read_relative_register_raw_bytes (regnum
, dbuffer
);
994 read_relative_register_raw_bytes (regnum
+1, dbuffer
+4);
995 #ifdef REGISTER_CONVERT_TO_TYPE
996 REGISTER_CONVERT_TO_TYPE(regnum
, builtin_type_double
, dbuffer
);
998 printf_filtered ("(d%d: ", regnum
-FP0_REGNUM
);
999 val_print (builtin_type_double
, dbuffer
, 0,
1000 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1001 printf_filtered ("); ");
1003 fputs_filtered (reg_names
[regnum
], gdb_stdout
);
1005 /* The problem with printing numeric register names (r26, etc.) is that
1006 the user can't use them on input. Probably the best solution is to
1007 fix it so that either the numeric or the funky (a2, etc.) names
1008 are accepted on input. */
1010 printf_filtered ("(r%d): ", regnum
);
1012 printf_filtered (": ");
1014 /* If virtual format is floating, print it that way. */
1015 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
1016 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0,
1017 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1018 /* Else print as integer in hex. */
1020 print_scalar_formatted (raw_buffer
, REGISTER_VIRTUAL_TYPE (regnum
),
1021 'x', 0, gdb_stdout
);
1024 /* Replacement for generic do_registers_info. */
1027 mips_do_registers_info (regnum
, fpregs
)
1033 if (*(reg_names
[regnum
]) == '\0')
1034 error ("Not a valid register for the current processor type");
1036 mips_print_register (regnum
, 0);
1037 printf_filtered ("\n");
1041 int did_newline
= 0;
1043 for (regnum
= 0; regnum
< NUM_REGS
; )
1045 if (((!fpregs
) && regnum
>= FP0_REGNUM
&& regnum
<= FCRIR_REGNUM
)
1046 || *(reg_names
[regnum
]) == '\0')
1051 mips_print_register (regnum
, 1);
1053 printf_filtered ("; ");
1055 if ((regnum
& 3) == 0)
1057 printf_filtered ("\n");
1062 printf_filtered ("\n");
1066 /* Return number of args passed to a frame. described by FIP.
1067 Can return -1, meaning no way to tell. */
1070 mips_frame_num_args (frame
)
1071 struct frame_info
*frame
;
1073 #if 0 /* FIXME Use or lose this! */
1074 struct chain_info_t
*p
;
1076 p
= mips_find_cached_frame (FRAME_FP (frame
));
1078 return p
->the_info
.numargs
;
1083 /* Is this a branch with a delay slot? */
1085 static int is_delayed
PARAMS ((unsigned long));
1092 for (i
= 0; i
< NUMOPCODES
; ++i
)
1093 if (mips_opcodes
[i
].pinfo
!= INSN_MACRO
1094 && (insn
& mips_opcodes
[i
].mask
) == mips_opcodes
[i
].match
)
1096 return (i
< NUMOPCODES
1097 && (mips_opcodes
[i
].pinfo
& (INSN_UNCOND_BRANCH_DELAY
1098 | INSN_COND_BRANCH_DELAY
1099 | INSN_COND_BRANCH_LIKELY
)));
1103 mips_step_skips_delay (pc
)
1108 if (target_read_memory (pc
, buf
, 4) != 0)
1109 /* If error reading memory, guess that it is not a delayed branch. */
1111 return is_delayed (extract_unsigned_integer (buf
, 4));
1114 /* To skip prologues, I use this predicate. Returns either PC itself
1115 if the code at PC does not look like a function prologue; otherwise
1116 returns an address that (if we're lucky) follows the prologue. If
1117 LENIENT, then we must skip everything which is involved in setting
1118 up the frame (it's OK to skip more, just so long as we don't skip
1119 anything which might clobber the registers which are being saved.
1120 We must skip more in the case where part of the prologue is in the
1121 delay slot of a non-prologue instruction). */
1124 mips_skip_prologue (pc
, lenient
)
1130 int seen_sp_adjust
= 0;
1131 int load_immediate_bytes
= 0;
1133 /* Skip the typical prologue instructions. These are the stack adjustment
1134 instruction and the instructions that save registers on the stack
1135 or in the gcc frame. */
1136 for (offset
= 0; offset
< 100; offset
+= 4)
1141 status
= read_memory_nobpt (pc
+ offset
, buf
, 4);
1143 memory_error (status
, pc
+ offset
);
1144 inst
= extract_unsigned_integer (buf
, 4);
1147 if (lenient
&& is_delayed (inst
))
1151 if ((inst
& 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
1153 else if (inst
== 0x03a1e823 || /* subu $sp,$sp,$at */
1154 inst
== 0x03a8e823) /* subu $sp,$sp,$t0 */
1156 else if ((inst
& 0xFFE00000) == 0xAFA00000 && (inst
& 0x001F0000))
1157 continue; /* sw reg,n($sp) */
1159 else if ((inst
& 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
1161 else if ((inst
& 0xF3E00000) == 0xA3C00000 && (inst
& 0x001F0000))
1163 continue; /* reg != $zero */
1165 /* move $s8,$sp. With different versions of gas this will be either
1166 `addu $s8,$sp,$zero' or `or $s8,$sp,$zero'. Accept either. */
1167 else if (inst
== 0x03A0F021 || inst
== 0x03a0f025)
1170 else if ((inst
& 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
1172 else if ((inst
& 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
1174 else if ((inst
& 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
1176 else if (inst
== 0x0399e021 /* addu $gp,$gp,$t9 */
1177 || inst
== 0x033ce021) /* addu $gp,$t9,$gp */
1179 /* The following instructions load $at or $t0 with an immediate
1180 value in preparation for a stack adjustment via
1181 subu $sp,$sp,[$at,$t0]. These instructions could also initialize
1182 a local variable, so we accept them only before a stack adjustment
1183 instruction was seen. */
1184 else if (!seen_sp_adjust
)
1186 if ((inst
& 0xffff0000) == 0x3c010000 || /* lui $at,n */
1187 (inst
& 0xffff0000) == 0x3c080000) /* lui $t0,n */
1189 load_immediate_bytes
+= 4;
1192 else if ((inst
& 0xffff0000) == 0x34210000 || /* ori $at,$at,n */
1193 (inst
& 0xffff0000) == 0x35080000 || /* ori $t0,$t0,n */
1194 (inst
& 0xffff0000) == 0x34010000 || /* ori $at,$zero,n */
1195 (inst
& 0xffff0000) == 0x34080000) /* ori $t0,$zero,n */
1197 load_immediate_bytes
+= 4;
1207 /* In a frameless function, we might have incorrectly
1208 skipped some load immediate instructions. Undo the skipping
1209 if the load immediate was not followed by a stack adjustment. */
1210 if (load_immediate_bytes
&& !seen_sp_adjust
)
1211 offset
-= load_immediate_bytes
;
1216 /* The lenient prologue stuff should be superceded by the code in
1217 init_extra_frame_info which looks to see whether the stores mentioned
1218 in the proc_desc have actually taken place. */
1220 /* Is address PC in the prologue (loosely defined) for function at
1224 mips_in_lenient_prologue (startaddr
, pc
)
1225 CORE_ADDR startaddr
;
1228 CORE_ADDR end_prologue
= mips_skip_prologue (startaddr
, 1);
1229 return pc
>= startaddr
&& pc
< end_prologue
;
1233 /* Given a return value in `regbuf' with a type `valtype',
1234 extract and copy its value into `valbuf'. */
1236 mips_extract_return_value (valtype
, regbuf
, valbuf
)
1237 struct type
*valtype
;
1238 char regbuf
[REGISTER_BYTES
];
1245 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
1246 && (mips_fpu
== MIPS_FPU_DOUBLE
1247 || (mips_fpu
== MIPS_FPU_SINGLE
&& TYPE_LENGTH (valtype
) <= 4)))
1248 regnum
= FP0_REGNUM
;
1250 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
1251 && TYPE_CODE (valtype
) != TYPE_CODE_FLT
1252 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (regnum
))
1253 offset
= REGISTER_RAW_SIZE (regnum
) - TYPE_LENGTH (valtype
);
1255 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (regnum
) + offset
,
1256 TYPE_LENGTH (valtype
));
1257 #ifdef REGISTER_CONVERT_TO_TYPE
1258 REGISTER_CONVERT_TO_TYPE(regnum
, valtype
, valbuf
);
1262 /* Given a return value in `regbuf' with a type `valtype',
1263 write it's value into the appropriate register. */
1265 mips_store_return_value (valtype
, valbuf
)
1266 struct type
*valtype
;
1270 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1273 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
1274 && (mips_fpu
== MIPS_FPU_DOUBLE
1275 || (mips_fpu
== MIPS_FPU_SINGLE
&& TYPE_LENGTH (valtype
) <= 4)))
1276 regnum
= FP0_REGNUM
;
1278 memcpy(raw_buffer
, valbuf
, TYPE_LENGTH (valtype
));
1280 #ifdef REGISTER_CONVERT_FROM_TYPE
1281 REGISTER_CONVERT_FROM_TYPE(regnum
, valtype
, raw_buffer
);
1284 write_register_bytes(REGISTER_BYTE (regnum
), raw_buffer
, TYPE_LENGTH (valtype
));
1287 /* These exist in mdebugread.c. */
1288 extern CORE_ADDR sigtramp_address
, sigtramp_end
;
1289 extern void fixup_sigtramp
PARAMS ((void));
1291 /* Exported procedure: Is PC in the signal trampoline code */
1294 in_sigtramp (pc
, ignore
)
1296 char *ignore
; /* function name */
1298 if (sigtramp_address
== 0)
1300 return (pc
>= sigtramp_address
&& pc
< sigtramp_end
);
1303 /* Command to set FPU type. mips_fpu_string will have been set to the
1304 user's argument. Set mips_fpu based on mips_fpu_string, and then
1305 canonicalize mips_fpu_string. */
1309 mips_set_fpu_command (args
, from_tty
, c
)
1312 struct cmd_list_element
*c
;
1316 if (mips_fpu_string
== NULL
|| *mips_fpu_string
== '\0')
1317 mips_fpu
= MIPS_FPU_DOUBLE
;
1318 else if (strcasecmp (mips_fpu_string
, "double") == 0
1319 || strcasecmp (mips_fpu_string
, "on") == 0
1320 || strcasecmp (mips_fpu_string
, "1") == 0
1321 || strcasecmp (mips_fpu_string
, "yes") == 0)
1322 mips_fpu
= MIPS_FPU_DOUBLE
;
1323 else if (strcasecmp (mips_fpu_string
, "none") == 0
1324 || strcasecmp (mips_fpu_string
, "off") == 0
1325 || strcasecmp (mips_fpu_string
, "0") == 0
1326 || strcasecmp (mips_fpu_string
, "no") == 0)
1327 mips_fpu
= MIPS_FPU_NONE
;
1328 else if (strcasecmp (mips_fpu_string
, "single") == 0)
1329 mips_fpu
= MIPS_FPU_SINGLE
;
1331 err
= strsave (mips_fpu_string
);
1333 if (mips_fpu_string
!= NULL
)
1334 free (mips_fpu_string
);
1338 case MIPS_FPU_DOUBLE
:
1339 mips_fpu_string
= strsave ("double");
1341 case MIPS_FPU_SINGLE
:
1342 mips_fpu_string
= strsave ("single");
1345 mips_fpu_string
= strsave ("none");
1351 struct cleanup
*cleanups
= make_cleanup (free
, err
);
1352 error ("Unknown FPU type `%s'. Use `double', `none', or `single'.",
1354 do_cleanups (cleanups
);
1359 mips_show_fpu_command (args
, from_tty
, c
)
1362 struct cmd_list_element
*c
;
1366 /* Command to set the processor type. */
1369 mips_set_processor_type_command (args
, from_tty
)
1375 if (tmp_mips_processor_type
== NULL
|| *tmp_mips_processor_type
== '\0')
1377 printf_unfiltered ("The known MIPS processor types are as follows:\n\n");
1378 for (i
= 0; mips_processor_type_table
[i
].name
!= NULL
; ++i
)
1379 printf_unfiltered ("%s\n", mips_processor_type_table
[i
].name
);
1381 /* Restore the value. */
1382 tmp_mips_processor_type
= strsave (mips_processor_type
);
1387 if (!mips_set_processor_type (tmp_mips_processor_type
))
1389 error ("Unknown processor type `%s'.", tmp_mips_processor_type
);
1390 /* Restore its value. */
1391 tmp_mips_processor_type
= strsave (mips_processor_type
);
1396 mips_show_processor_type_command (args
, from_tty
)
1402 /* Modify the actual processor type. */
1405 mips_set_processor_type (str
)
1413 for (i
= 0; mips_processor_type_table
[i
].name
!= NULL
; ++i
)
1415 if (strcasecmp (str
, mips_processor_type_table
[i
].name
) == 0)
1417 mips_processor_type
= str
;
1419 for (j
= 0; j
< NUM_REGS
; ++j
)
1420 reg_names
[j
] = mips_processor_type_table
[i
].regnames
[j
];
1424 /* FIXME tweak fpu flag too */
1431 /* Attempt to identify the particular processor model by reading the
1435 mips_read_processor_type ()
1439 prid
= read_register (PRID_REGNUM
);
1441 if (prid
& ~0xf == 0x700)
1442 return savestring ("r3041", strlen("r3041"));
1447 /* Just like reinit_frame_cache, but with the right arguments to be
1448 callable as an sfunc. */
1451 reinit_frame_cache_sfunc (args
, from_tty
, c
)
1454 struct cmd_list_element
*c
;
1456 reinit_frame_cache ();
1460 gdb_print_insn_mips (memaddr
, info
)
1462 disassemble_info
*info
;
1464 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1465 return print_insn_big_mips (memaddr
, info
);
1467 return print_insn_little_mips (memaddr
, info
);
1471 _initialize_mips_tdep ()
1473 struct cmd_list_element
*c
;
1475 tm_print_insn
= gdb_print_insn_mips
;
1477 /* Let the user turn off floating point and set the fence post for
1478 heuristic_proc_start. */
1480 c
= add_set_cmd ("mipsfpu", class_support
, var_string_noescape
,
1481 (char *) &mips_fpu_string
,
1482 "Set use of floating point coprocessor.\n\
1483 Set to `none' to avoid using floating point instructions when calling\n\
1484 functions or dealing with return values. Set to `single' to use only\n\
1485 single precision floating point as on the R4650. Set to `double' for\n\
1486 normal floating point support.",
1488 c
->function
.sfunc
= mips_set_fpu_command
;
1489 c
= add_show_from_set (c
, &showlist
);
1490 c
->function
.sfunc
= mips_show_fpu_command
;
1492 mips_fpu
= MIPS_FPU_DOUBLE
;
1493 mips_fpu_string
= strsave ("double");
1495 c
= add_set_cmd ("processor", class_support
, var_string_noescape
,
1496 (char *) &tmp_mips_processor_type
,
1497 "Set the type of MIPS processor in use.\n\
1498 Set this to be able to access processor-type-specific registers.\n\
1501 c
->function
.cfunc
= mips_set_processor_type_command
;
1502 c
= add_show_from_set (c
, &showlist
);
1503 c
->function
.cfunc
= mips_show_processor_type_command
;
1505 tmp_mips_processor_type
= strsave (DEFAULT_MIPS_TYPE
);
1506 mips_set_processor_type_command (strsave (DEFAULT_MIPS_TYPE
), 0);
1508 /* We really would like to have both "0" and "unlimited" work, but
1509 command.c doesn't deal with that. So make it a var_zinteger
1510 because the user can always use "999999" or some such for unlimited. */
1511 c
= add_set_cmd ("heuristic-fence-post", class_support
, var_zinteger
,
1512 (char *) &heuristic_fence_post
,
1514 Set the distance searched for the start of a function.\n\
1515 If you are debugging a stripped executable, GDB needs to search through the\n\
1516 program for the start of a function. This command sets the distance of the\n\
1517 search. The only need to set it is when debugging a stripped executable.",
1519 /* We need to throw away the frame cache when we set this, since it
1520 might change our ability to get backtraces. */
1521 c
->function
.sfunc
= reinit_frame_cache_sfunc
;
1522 add_show_from_set (c
, &showlist
);