cc0f9ea70eb7acfd8f3bde6035d9a06115c1f52f
[deliverable/binutils-gdb.git] / gdb / mips-tdep.c
1 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
4 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "inferior.h"
25 #include "symtab.h"
26 #include "value.h"
27 #include "gdbcmd.h"
28 #include "language.h"
29 #include "gdbcore.h"
30 #include "symfile.h"
31 #include "objfiles.h"
32
33 #include "opcode/mips.h"
34
35 #define VM_MIN_ADDRESS (unsigned)0x400000
36 \f
37 static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
38
39 /* Some MIPS boards don't support floating point, so we permit the
40 user to turn it off. */
41 int mips_fpu = 1;
42
43 /* Heuristic_proc_start may hunt through the text section for a long
44 time across a 2400 baud serial line. Allows the user to limit this
45 search. */
46 static unsigned int heuristic_fence_post = 0;
47
48 #define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
49 #define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
50 #define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
51 #define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
52 #define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
53 #define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
54 #define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
55 #define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
56 #define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
57 #define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
58 #define _PROC_MAGIC_ 0x0F0F0F0F
59 #define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
60 #define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
61
62 struct linked_proc_info
63 {
64 struct mips_extra_func_info info;
65 struct linked_proc_info *next;
66 } *linked_proc_desc_table = NULL;
67
68 \f
69 #define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno)
70
71 static int
72 read_next_frame_reg(fi, regno)
73 FRAME fi;
74 int regno;
75 {
76 /* If it is the frame for sigtramp we have a complete sigcontext
77 immediately below the frame and we get the saved registers from there.
78 If the stack layout for sigtramp changes we might have to change these
79 constants and the companion fixup_sigtramp in mipsread.c */
80 #ifndef SIGFRAME_BASE
81 #define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */
82 #define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4)
83 #define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4)
84 #endif
85 for (; fi; fi = fi->next)
86 if (in_sigtramp(fi->pc, 0)) {
87 int offset;
88 if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF;
89 else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4;
90 else return 0;
91 return read_memory_integer(fi->frame + offset, 4);
92 }
93 else if (regno == SP_REGNUM) return fi->frame;
94 else if (fi->saved_regs->regs[regno])
95 return read_memory_integer(fi->saved_regs->regs[regno], 4);
96 return read_register(regno);
97 }
98
99 int
100 mips_frame_saved_pc(frame)
101 FRAME frame;
102 {
103 mips_extra_func_info_t proc_desc = frame->proc_desc;
104 int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM;
105
106 if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc))
107 return read_memory_integer(frame->frame - 4, 4);
108
109 return read_next_frame_reg(frame, pcreg);
110 }
111
112 static struct mips_extra_func_info temp_proc_desc;
113 static struct frame_saved_regs temp_saved_regs;
114
115 /* This fencepost looks highly suspicious to me. Removing it also
116 seems suspicious as it could affect remote debugging across serial
117 lines. */
118
119 static CORE_ADDR
120 heuristic_proc_start(pc)
121 CORE_ADDR pc;
122 {
123 CORE_ADDR start_pc = pc;
124 CORE_ADDR fence = start_pc - heuristic_fence_post;
125
126 if (start_pc == 0) return 0;
127
128 if (heuristic_fence_post == UINT_MAX
129 || fence < VM_MIN_ADDRESS)
130 fence = VM_MIN_ADDRESS;
131
132 /* search back for previous return */
133 for (start_pc -= 4; ; start_pc -= 4)
134 if (start_pc < fence)
135 {
136 /* It's not clear to me why we reach this point when
137 stop_soon_quietly, but with this test, at least we
138 don't print out warnings for every child forked (eg, on
139 decstation). 22apr93 rich@cygnus.com. */
140 if (!stop_soon_quietly)
141 {
142 static int blurb_printed = 0;
143
144 if (fence == VM_MIN_ADDRESS)
145 warning("Hit beginning of text section without finding");
146 else
147 warning("Hit heuristic-fence-post without finding");
148
149 warning("enclosing function for address 0x%x", pc);
150 if (!blurb_printed)
151 {
152 printf_filtered ("\
153 This warning occurs if you are debugging a function without any symbols\n\
154 (for example, in a stripped executable). In that case, you may wish to\n\
155 increase the size of the search with the `set heuristic-fence-post' command.\n\
156 \n\
157 Otherwise, you told GDB there was a function where there isn't one, or\n\
158 (more likely) you have encountered a bug in GDB.\n");
159 blurb_printed = 1;
160 }
161 }
162
163 return 0;
164 }
165 else if (ABOUT_TO_RETURN(start_pc))
166 break;
167
168 start_pc += 8; /* skip return, and its delay slot */
169 #if 0
170 /* skip nops (usually 1) 0 - is this */
171 while (start_pc < pc && read_memory_integer (start_pc, 4) == 0)
172 start_pc += 4;
173 #endif
174 return start_pc;
175 }
176
177 static mips_extra_func_info_t
178 heuristic_proc_desc(start_pc, limit_pc, next_frame)
179 CORE_ADDR start_pc, limit_pc;
180 FRAME next_frame;
181 {
182 CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM);
183 CORE_ADDR cur_pc;
184 int frame_size;
185 int has_frame_reg = 0;
186 int reg30; /* Value of $r30. Used by gcc for frame-pointer */
187 unsigned long reg_mask = 0;
188
189 if (start_pc == 0) return NULL;
190 bzero(&temp_proc_desc, sizeof(temp_proc_desc));
191 bzero(&temp_saved_regs, sizeof(struct frame_saved_regs));
192 PROC_LOW_ADDR(&temp_proc_desc) = start_pc;
193
194 if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200;
195 restart:
196 frame_size = 0;
197 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) {
198 char buf[4];
199 unsigned long word;
200 int status;
201
202 status = read_memory_nobpt (cur_pc, buf, 4);
203 if (status) memory_error (status, cur_pc);
204 word = extract_unsigned_integer (buf, 4);
205
206 if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
207 frame_size += (-word) & 0xFFFF;
208 else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
209 frame_size += (-word) & 0xFFFF;
210 else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
211 int reg = (word & 0x001F0000) >> 16;
212 reg_mask |= 1 << reg;
213 temp_saved_regs.regs[reg] = sp + (short)word;
214 }
215 else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
216 if ((unsigned short)word != frame_size)
217 reg30 = sp + (unsigned short)word;
218 else if (!has_frame_reg) {
219 int alloca_adjust;
220 has_frame_reg = 1;
221 reg30 = read_next_frame_reg(next_frame, 30);
222 alloca_adjust = reg30 - (sp + (unsigned short)word);
223 if (alloca_adjust > 0) {
224 /* FP > SP + frame_size. This may be because
225 /* of an alloca or somethings similar.
226 * Fix sp to "pre-alloca" value, and try again.
227 */
228 sp += alloca_adjust;
229 goto restart;
230 }
231 }
232 }
233 else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
234 int reg = (word & 0x001F0000) >> 16;
235 reg_mask |= 1 << reg;
236 temp_saved_regs.regs[reg] = reg30 + (short)word;
237 }
238 }
239 if (has_frame_reg) {
240 PROC_FRAME_REG(&temp_proc_desc) = 30;
241 PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
242 }
243 else {
244 PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
245 PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
246 }
247 PROC_REG_MASK(&temp_proc_desc) = reg_mask;
248 PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
249 return &temp_proc_desc;
250 }
251
252 static mips_extra_func_info_t
253 find_proc_desc(pc, next_frame)
254 CORE_ADDR pc;
255 FRAME next_frame;
256 {
257 mips_extra_func_info_t proc_desc;
258 struct block *b = block_for_pc(pc);
259 struct symbol *sym =
260 b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL;
261
262 if (sym)
263 {
264 /* IF this is the topmost frame AND
265 * (this proc does not have debugging information OR
266 * the PC is in the procedure prologue)
267 * THEN create a "heuristic" proc_desc (by analyzing
268 * the actual code) to replace the "official" proc_desc.
269 */
270 proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym);
271 if (next_frame == NULL) {
272 struct symtab_and_line val;
273 struct symbol *proc_symbol =
274 PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc);
275
276 if (proc_symbol) {
277 val = find_pc_line (BLOCK_START
278 (SYMBOL_BLOCK_VALUE(proc_symbol)),
279 0);
280 val.pc = val.end ? val.end : pc;
281 }
282 if (!proc_symbol || pc < val.pc) {
283 mips_extra_func_info_t found_heuristic =
284 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc),
285 pc, next_frame);
286 if (found_heuristic) proc_desc = found_heuristic;
287 }
288 }
289 }
290 else
291 {
292 /* Is linked_proc_desc_table really necessary? It only seems to be used
293 by procedure call dummys. However, the procedures being called ought
294 to have their own proc_descs, and even if they don't,
295 heuristic_proc_desc knows how to create them! */
296
297 register struct linked_proc_info *link;
298 for (link = linked_proc_desc_table; link; link = link->next)
299 if (PROC_LOW_ADDR(&link->info) <= pc
300 && PROC_HIGH_ADDR(&link->info) > pc)
301 return &link->info;
302
303 proc_desc =
304 heuristic_proc_desc (heuristic_proc_start (pc), pc, next_frame);
305 }
306 return proc_desc;
307 }
308
309 mips_extra_func_info_t cached_proc_desc;
310
311 FRAME_ADDR
312 mips_frame_chain(frame)
313 FRAME frame;
314 {
315 mips_extra_func_info_t proc_desc;
316 CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
317
318 if (saved_pc == 0 || inside_entry_file (saved_pc))
319 return 0;
320
321 proc_desc = find_proc_desc(saved_pc, frame);
322 if (!proc_desc)
323 return 0;
324
325 cached_proc_desc = proc_desc;
326 return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc))
327 + PROC_FRAME_OFFSET(proc_desc);
328 }
329
330 void
331 init_extra_frame_info(fci)
332 struct frame_info *fci;
333 {
334 extern struct obstack frame_cache_obstack;
335 /* Use proc_desc calculated in frame_chain */
336 mips_extra_func_info_t proc_desc =
337 fci->next ? cached_proc_desc : find_proc_desc(fci->pc, fci->next);
338
339 fci->saved_regs = (struct frame_saved_regs*)
340 obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs));
341 memset (fci->saved_regs, 0, sizeof (struct frame_saved_regs));
342 fci->proc_desc =
343 proc_desc == &temp_proc_desc ? 0 : proc_desc;
344 if (proc_desc)
345 {
346 int ireg;
347 CORE_ADDR reg_position;
348 unsigned long mask;
349 /* r0 bit means kernel trap */
350 int kernel_trap = PROC_REG_MASK(proc_desc) & 1;
351
352 /* Fixup frame-pointer - only needed for top frame */
353 /* This may not be quite right, if proc has a real frame register */
354 if (fci->pc == PROC_LOW_ADDR(proc_desc) && !PROC_DESC_IS_DUMMY(proc_desc))
355 fci->frame = read_register (SP_REGNUM);
356 else
357 fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc))
358 + PROC_FRAME_OFFSET(proc_desc);
359
360 /* If this is the innermost frame, and we are still in the
361 prologue (loosely defined), then the registers may not have
362 been saved yet. But they haven't been clobbered either, so
363 it's fine to say they have not been saved. */
364 if (fci->next == NULL
365 && !PROC_DESC_IS_DUMMY(proc_desc)
366 && mips_in_lenient_prologue (PROC_LOW_ADDR (proc_desc), fci->pc))
367 /* We already zeroed the saved regs. */
368 ;
369 else if (proc_desc == &temp_proc_desc)
370 *fci->saved_regs = temp_saved_regs;
371 else
372 {
373 /* find which general-purpose registers were saved */
374 reg_position = fci->frame + PROC_REG_OFFSET(proc_desc);
375 mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc);
376 for (ireg= 31; mask; --ireg, mask <<= 1)
377 if (mask & 0x80000000)
378 {
379 fci->saved_regs->regs[ireg] = reg_position;
380 reg_position -= 4;
381 }
382 /* find which floating-point registers were saved */
383 reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc);
384
385 /* The freg_offset points to where the first *double* register
386 is saved. So skip to the high-order word. */
387 reg_position += 4;
388 mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc);
389 for (ireg = 31; mask; --ireg, mask <<= 1)
390 if (mask & 0x80000000)
391 {
392 fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position;
393 reg_position -= 4;
394 }
395 }
396
397 /* hack: if argument regs are saved, guess these contain args */
398 if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1;
399 else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4;
400 else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3;
401 else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2;
402 else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1;
403
404 fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM];
405 }
406 }
407
408 /* MIPS stack frames are almost impenetrable. When execution stops,
409 we basically have to look at symbol information for the function
410 that we stopped in, which tells us *which* register (if any) is
411 the base of the frame pointer, and what offset from that register
412 the frame itself is at.
413
414 This presents a problem when trying to examine a stack in memory
415 (that isn't executing at the moment), using the "frame" command. We
416 don't have a PC, nor do we have any registers except SP.
417
418 This routine takes two arguments, SP and PC, and tries to make the
419 cached frames look as if these two arguments defined a frame on the
420 cache. This allows the rest of info frame to extract the important
421 arguments without difficulty. */
422
423 FRAME
424 setup_arbitrary_frame (argc, argv)
425 int argc;
426 FRAME_ADDR *argv;
427 {
428 if (argc != 2)
429 error ("MIPS frame specifications require two arguments: sp and pc");
430
431 return create_new_frame (argv[0], argv[1]);
432 }
433
434
435 CORE_ADDR
436 mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
437 int nargs;
438 value *args;
439 CORE_ADDR sp;
440 int struct_return;
441 CORE_ADDR struct_addr;
442 {
443 CORE_ADDR buf;
444 register i;
445 int accumulate_size = struct_return ? 4 : 0;
446 struct mips_arg { char *contents; int len; int offset; };
447 struct mips_arg *mips_args =
448 (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg));
449 register struct mips_arg *m_arg;
450 for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) {
451 extern value value_arg_coerce();
452 value arg = value_arg_coerce (args[i]);
453 m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg));
454 /* This entire mips-specific routine is because doubles must be aligned
455 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
456 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
457 * breaks their varargs implementation...). A correct solution
458 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
459 * in stdarg.h/varargs.h).
460 */
461 if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8;
462 m_arg->offset = accumulate_size;
463 accumulate_size = (accumulate_size + m_arg->len + 3) & -4;
464 m_arg->contents = VALUE_CONTENTS(arg);
465 }
466 accumulate_size = (accumulate_size + 7) & (-8);
467 if (accumulate_size < 16) accumulate_size = 16;
468 sp -= accumulate_size;
469 for (i = nargs; m_arg--, --i >= 0; )
470 write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len);
471 if (struct_return) {
472 buf = struct_addr;
473 write_memory(sp, (char *)&buf, sizeof(CORE_ADDR));
474 }
475 return sp;
476 }
477
478 /* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
479 #define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1)
480
481 void
482 mips_push_dummy_frame()
483 {
484 int ireg;
485 struct linked_proc_info *link = (struct linked_proc_info*)
486 xmalloc(sizeof(struct linked_proc_info));
487 mips_extra_func_info_t proc_desc = &link->info;
488 CORE_ADDR sp = read_register (SP_REGNUM);
489 CORE_ADDR save_address;
490 REGISTER_TYPE buffer;
491 link->next = linked_proc_desc_table;
492 linked_proc_desc_table = link;
493 #define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
494 #define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
495 #define GEN_REG_SAVE_COUNT 22
496 #define FLOAT_REG_SAVE_MASK MASK(0,19)
497 #define FLOAT_REG_SAVE_COUNT 20
498 #define SPECIAL_REG_SAVE_COUNT 4
499 /*
500 * The registers we must save are all those not preserved across
501 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
502 * In addition, we must save the PC, and PUSH_FP_REGNUM.
503 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
504 *
505 * Dummy frame layout:
506 * (high memory)
507 * Saved PC
508 * Saved MMHI, MMLO, FPC_CSR
509 * Saved R31
510 * Saved R28
511 * ...
512 * Saved R1
513 * Saved D18 (i.e. F19, F18)
514 * ...
515 * Saved D0 (i.e. F1, F0)
516 * CALL_DUMMY (subroutine stub; see tm-mips.h)
517 * Parameter build area (not yet implemented)
518 * (low memory)
519 */
520 PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK;
521 PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0;
522 PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */
523 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT;
524 PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */
525 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT);
526 /* save general registers */
527 save_address = sp + PROC_REG_OFFSET(proc_desc);
528 for (ireg = 32; --ireg >= 0; )
529 if (PROC_REG_MASK(proc_desc) & (1 << ireg))
530 {
531 buffer = read_register (ireg);
532 write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE));
533 save_address -= 4;
534 }
535 /* save floating-points registers starting with high order word */
536 save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4;
537 for (ireg = 32; --ireg >= 0; )
538 if (PROC_FREG_MASK(proc_desc) & (1 << ireg))
539 {
540 buffer = read_register (ireg + FP0_REGNUM);
541 write_memory (save_address, (char *)&buffer, 4);
542 save_address -= 4;
543 }
544 write_register (PUSH_FP_REGNUM, sp);
545 PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM;
546 PROC_FRAME_OFFSET(proc_desc) = 0;
547 buffer = read_register (PC_REGNUM);
548 write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE));
549 buffer = read_register (HI_REGNUM);
550 write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE));
551 buffer = read_register (LO_REGNUM);
552 write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE));
553 buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM);
554 write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE));
555 sp -= 4 * (GEN_REG_SAVE_COUNT
556 + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0)
557 + SPECIAL_REG_SAVE_COUNT);
558 write_register (SP_REGNUM, sp);
559 PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET;
560 PROC_HIGH_ADDR(proc_desc) = sp;
561 SET_PROC_DESC_IS_DUMMY(proc_desc);
562 PROC_PC_REG(proc_desc) = RA_REGNUM;
563 }
564
565 void
566 mips_pop_frame()
567 {
568 register int regnum;
569 FRAME frame = get_current_frame ();
570 CORE_ADDR new_sp = frame->frame;
571
572 mips_extra_func_info_t proc_desc = frame->proc_desc;
573
574 write_register (PC_REGNUM, FRAME_SAVED_PC(frame));
575 if (proc_desc)
576 {
577 for (regnum = 32; --regnum >= 0; )
578 if (PROC_REG_MASK(proc_desc) & (1 << regnum))
579 write_register (regnum,
580 read_memory_integer (frame->saved_regs->regs[regnum],
581 4));
582 for (regnum = 32; --regnum >= 0; )
583 if (PROC_FREG_MASK(proc_desc) & (1 << regnum))
584 write_register (regnum + FP0_REGNUM,
585 read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4));
586 }
587 write_register (SP_REGNUM, new_sp);
588 flush_cached_frames ();
589 /* We let mips_init_extra_frame_info figure out the frame pointer */
590 set_current_frame (create_new_frame (0, read_pc ()));
591
592 if (PROC_DESC_IS_DUMMY(proc_desc))
593 {
594 struct linked_proc_info *pi_ptr, *prev_ptr;
595
596 for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
597 pi_ptr != NULL;
598 prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
599 {
600 if (&pi_ptr->info == proc_desc)
601 break;
602 }
603
604 if (pi_ptr == NULL)
605 error ("Can't locate dummy extra frame info\n");
606
607 if (prev_ptr != NULL)
608 prev_ptr->next = pi_ptr->next;
609 else
610 linked_proc_desc_table = pi_ptr->next;
611
612 free (pi_ptr);
613
614 write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4));
615 write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4));
616 if (mips_fpu)
617 write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4));
618 }
619 }
620
621 static void
622 mips_print_register (regnum, all)
623 int regnum, all;
624 {
625 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
626 REGISTER_TYPE val;
627
628 /* Get the data in raw format. */
629 if (read_relative_register_raw_bytes (regnum, raw_buffer))
630 {
631 printf_filtered ("%s: [Invalid]", reg_names[regnum]);
632 return;
633 }
634
635 /* If an even floating pointer register, also print as double. */
636 if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32
637 && !((regnum-FP0_REGNUM) & 1)) {
638 char dbuffer[MAX_REGISTER_RAW_SIZE];
639
640 read_relative_register_raw_bytes (regnum, dbuffer);
641 read_relative_register_raw_bytes (regnum+1, dbuffer+4);
642 #ifdef REGISTER_CONVERT_TO_TYPE
643 REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer);
644 #endif
645 printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
646 val_print (builtin_type_double, dbuffer, 0,
647 stdout, 0, 1, 0, Val_pretty_default);
648 printf_filtered ("); ");
649 }
650 fputs_filtered (reg_names[regnum], stdout);
651 #ifndef NUMERIC_REG_NAMES
652 if (regnum < 32)
653 printf_filtered ("(r%d): ", regnum);
654 else
655 #endif
656 printf_filtered (": ");
657
658 /* If virtual format is floating, print it that way. */
659 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT
660 && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) {
661 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0,
662 stdout, 0, 1, 0, Val_pretty_default);
663 }
664 /* Else print as integer in hex. */
665 else
666 {
667 long val;
668
669 val = extract_signed_integer (raw_buffer,
670 REGISTER_RAW_SIZE (regnum));
671
672 if (val == 0)
673 printf_filtered ("0");
674 else if (all)
675 printf_filtered (local_hex_format(), val);
676 else
677 printf_filtered ("%s=%d", local_hex_string(val), val);
678 }
679 }
680
681 /* Replacement for generic do_registers_info. */
682 void
683 mips_do_registers_info (regnum, fpregs)
684 int regnum;
685 int fpregs;
686 {
687 if (regnum != -1) {
688 mips_print_register (regnum, 0);
689 printf_filtered ("\n");
690 }
691 else {
692 for (regnum = 0; regnum < NUM_REGS; ) {
693 if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) {
694 regnum++;
695 continue;
696 }
697 mips_print_register (regnum, 1);
698 regnum++;
699 if ((regnum & 3) == 0 || regnum == NUM_REGS)
700 printf_filtered (";\n");
701 else
702 printf_filtered ("; ");
703 }
704 }
705 }
706 /* Return number of args passed to a frame. described by FIP.
707 Can return -1, meaning no way to tell. */
708
709 int
710 mips_frame_num_args(fip)
711 FRAME fip;
712 {
713 #if 0
714 struct chain_info_t *p;
715
716 p = mips_find_cached_frame(FRAME_FP(fip));
717 if (p->valid)
718 return p->the_info.numargs;
719 #endif
720 return -1;
721 }
722 \f
723 /* Does this instruction involve use of a delay slot? */
724 static int
725 is_delayed (insn)
726 unsigned long insn;
727 {
728 int i;
729 for (i = 0; i < NUMOPCODES; ++i)
730 if (mips_opcodes[i].pinfo != INSN_MACRO
731 && (insn & mips_opcodes[i].mask) == mips_opcodes[i].match)
732 break;
733 return i < NUMOPCODES && (mips_opcodes[i].pinfo & ANY_DELAY);
734 }
735
736 /* To skip prologues, I use this predicate. Returns either PC itself
737 if the code at PC does not look like a function prologue; otherwise
738 returns an address that (if we're lucky) follows the prologue. If
739 LENIENT, then we must skip everything which is involved in setting
740 up the frame (it's OK to skip more, just so long as we don't skip
741 anything which might clobber the registers which are being saved.
742 We must skip more in the case where part of the prologue is in the
743 delay slot of a non-prologue instruction). */
744
745 CORE_ADDR
746 mips_skip_prologue (pc, lenient)
747 CORE_ADDR pc;
748 int lenient;
749 {
750 struct symbol *f;
751 struct block *b;
752 unsigned long inst;
753 int offset;
754 int seen_sp_adjust = 0;
755
756 /* Skip the typical prologue instructions. These are the stack adjustment
757 instruction and the instructions that save registers on the stack
758 or in the gcc frame. */
759 for (offset = 0; offset < 100; offset += 4)
760 {
761 char buf[4];
762 int status;
763
764 status = read_memory_nobpt (pc + offset, buf, 4);
765 if (status)
766 memory_error (status, pc + offset);
767 inst = extract_unsigned_integer (buf, 4);
768
769 if (lenient && is_delayed (inst))
770 continue;
771
772 if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
773 seen_sp_adjust = 1;
774 else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000))
775 continue; /* sw reg,n($sp) */
776 /* reg != $zero */
777 else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
778 continue;
779 else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000))
780 /* sx reg,n($s8) */
781 continue; /* reg != $zero */
782 else if (inst == 0x03A0F021) /* move $s8,$sp */
783 continue;
784 else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
785 continue;
786 else
787 break;
788 }
789 return pc + offset;
790
791 /* FIXME schauer. The following code seems no longer necessary if we
792 always skip the typical prologue instructions. */
793
794 #if 0
795 if (seen_sp_adjust)
796 return pc + offset;
797
798 /* Well, it looks like a frameless. Let's make sure.
799 Note that we are not called on the current PC,
800 but on the function`s start PC, and I have definitely
801 seen optimized code that adjusts the SP quite later */
802 b = block_for_pc(pc);
803 if (!b) return pc;
804
805 f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL);
806 if (!f) return pc;
807 /* Ideally, I would like to use the adjusted info
808 from mips_frame_info(), but for all practical
809 purposes it will not matter (and it would require
810 a different definition of SKIP_PROLOGUE())
811
812 Actually, it would not hurt to skip the storing
813 of arguments on the stack as well. */
814 if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset)
815 return pc + 4;
816
817 return pc;
818 #endif
819 }
820
821 /* Is address PC in the prologue (loosely defined) for function at
822 STARTADDR? */
823
824 static int
825 mips_in_lenient_prologue (startaddr, pc)
826 CORE_ADDR startaddr;
827 CORE_ADDR pc;
828 {
829 CORE_ADDR end_prologue = mips_skip_prologue (startaddr, 1);
830 return pc >= startaddr && pc < end_prologue;
831 }
832
833 /* Given a return value in `regbuf' with a type `valtype',
834 extract and copy its value into `valbuf'. */
835 void
836 mips_extract_return_value (valtype, regbuf, valbuf)
837 struct type *valtype;
838 char regbuf[REGISTER_BYTES];
839 char *valbuf;
840 {
841 int regnum;
842
843 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
844
845 memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype));
846 #ifdef REGISTER_CONVERT_TO_TYPE
847 REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf);
848 #endif
849 }
850
851 /* Given a return value in `regbuf' with a type `valtype',
852 write it's value into the appropriate register. */
853 void
854 mips_store_return_value (valtype, valbuf)
855 struct type *valtype;
856 char *valbuf;
857 {
858 int regnum;
859 char raw_buffer[MAX_REGISTER_RAW_SIZE];
860
861 regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2;
862 memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
863
864 #ifdef REGISTER_CONVERT_FROM_TYPE
865 REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
866 #endif
867
868 write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
869 }
870
871 /* Let the user turn off floating point and set the fence post for
872 heuristic_proc_start. */
873
874 void
875 _initialize_mips_tdep ()
876 {
877 add_show_from_set
878 (add_set_cmd ("mipsfpu", class_support, var_boolean,
879 (char *) &mips_fpu,
880 "Set use of floating point coprocessor.\n\
881 Turn off to avoid using floating point instructions when calling functions\n\
882 or dealing with return values.", &setlist),
883 &showlist);
884
885 add_show_from_set
886 (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger,
887 (char *) &heuristic_fence_post,
888 "\
889 Set the distance searched for the start of a function.\n\
890 If you are debugging a stripped executable, GDB needs to search through the\n\
891 program for the start of a function. This command sets the distance of the\n\
892 search. The only need to set it is when debugging a stripped executable.",
893 &setlist),
894 &showlist);
895 }
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