1 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994
3 Free Software Foundation, Inc.
4 Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
5 and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
35 #include "opcode/mips.h"
37 #define VM_MIN_ADDRESS (unsigned)0x400000
39 /* FIXME: Put this declaration in frame.h. */
40 extern struct obstack frame_cache_obstack
;
43 static int mips_in_lenient_prologue
PARAMS ((CORE_ADDR
, CORE_ADDR
));
46 /* Some MIPS boards don't support floating point, so we permit the
47 user to turn it off. */
50 /* Heuristic_proc_start may hunt through the text section for a long
51 time across a 2400 baud serial line. Allows the user to limit this
53 static unsigned int heuristic_fence_post
= 0;
55 #define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */
56 #define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */
57 #define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset)
58 #define PROC_FRAME_REG(proc) ((proc)->pdr.framereg)
59 #define PROC_REG_MASK(proc) ((proc)->pdr.regmask)
60 #define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask)
61 #define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset)
62 #define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset)
63 #define PROC_PC_REG(proc) ((proc)->pdr.pcreg)
64 #define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym)
65 #define _PROC_MAGIC_ 0x0F0F0F0F
66 #define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_)
67 #define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_)
69 struct linked_proc_info
71 struct mips_extra_func_info info
;
72 struct linked_proc_info
*next
;
73 } *linked_proc_desc_table
= NULL
;
76 /* Guaranteed to set fci->saved_regs to some values (it never leaves it
80 mips_find_saved_regs (fci
)
84 CORE_ADDR reg_position
;
85 /* r0 bit means kernel trap */
87 /* What registers have been saved? Bitmasks. */
88 unsigned long gen_mask
, float_mask
;
89 mips_extra_func_info_t proc_desc
;
91 fci
->saved_regs
= (struct frame_saved_regs
*)
92 obstack_alloc (&frame_cache_obstack
, sizeof(struct frame_saved_regs
));
93 memset (fci
->saved_regs
, 0, sizeof (struct frame_saved_regs
));
95 proc_desc
= fci
->proc_desc
;
96 if (proc_desc
== NULL
)
97 /* I'm not sure how/whether this can happen. Normally when we can't
98 find a proc_desc, we "synthesize" one using heuristic_proc_desc
99 and set the saved_regs right away. */
102 kernel_trap
= PROC_REG_MASK(proc_desc
) & 1;
103 gen_mask
= kernel_trap
? 0xFFFFFFFF : PROC_REG_MASK(proc_desc
);
104 float_mask
= kernel_trap
? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc
);
106 if (/* In any frame other than the innermost, we assume that all
107 registers have been saved. This assumes that all register
108 saves in a function happen before the first function
112 /* In a dummy frame we know exactly where things are saved. */
113 && !PROC_DESC_IS_DUMMY (proc_desc
)
115 /* Not sure exactly what kernel_trap means, but if it means
116 the kernel saves the registers without a prologue doing it,
117 we better not examine the prologue to see whether registers
118 have been saved yet. */
121 /* We need to figure out whether the registers that the proc_desc
122 claims are saved have been saved yet. */
129 /* Bitmasks; set if we have found a save for the register. */
130 unsigned long gen_save_found
= 0;
131 unsigned long float_save_found
= 0;
133 for (addr
= PROC_LOW_ADDR (proc_desc
);
134 addr
< fci
->pc
/*&& (gen_mask != gen_save_found
135 || float_mask != float_save_found)*/;
138 status
= read_memory_nobpt (addr
, buf
, 4);
140 memory_error (status
, addr
);
141 inst
= extract_unsigned_integer (buf
, 4);
142 if (/* sw reg,n($sp) */
143 (inst
& 0xffe00000) == 0xafa00000
146 || (inst
& 0xffe00000) == 0xafc00000
149 || (inst
& 0xffe00000) == 0xffa00000)
151 /* It might be possible to use the instruction to
152 find the offset, rather than the code below which
153 is based on things being in a certain order in the
154 frame, but figuring out what the instruction's offset
155 is relative to might be a little tricky. */
156 int reg
= (inst
& 0x001f0000) >> 16;
157 gen_save_found
|= (1 << reg
);
159 else if (/* swc1 freg,n($sp) */
160 (inst
& 0xffe00000) == 0xe7a00000
162 /* swc1 freg,n($r30) */
163 || (inst
& 0xffe00000) == 0xe7c00000
165 /* sdc1 freg,n($sp) */
166 || (inst
& 0xffe00000) == 0xf7a00000)
169 int reg
= ((inst
& 0x001f0000) >> 16);
170 float_save_found
|= (1 << reg
);
173 gen_mask
= gen_save_found
;
174 float_mask
= float_save_found
;
177 /* Fill in the offsets for the registers which gen_mask says
179 reg_position
= fci
->frame
+ PROC_REG_OFFSET (proc_desc
);
180 for (ireg
= 31; gen_mask
; --ireg
, gen_mask
<<= 1)
181 if (gen_mask
& 0x80000000)
183 fci
->saved_regs
->regs
[ireg
] = reg_position
;
184 reg_position
-= MIPS_REGSIZE
;
186 /* Fill in the offsets for the registers which float_mask says
188 reg_position
= fci
->frame
+ PROC_FREG_OFFSET (proc_desc
);
190 /* The freg_offset points to where the first *double* register
191 is saved. So skip to the high-order word. */
193 for (ireg
= 31; float_mask
; --ireg
, float_mask
<<= 1)
194 if (float_mask
& 0x80000000)
196 fci
->saved_regs
->regs
[FP0_REGNUM
+ireg
] = reg_position
;
197 reg_position
-= MIPS_REGSIZE
;
200 fci
->saved_regs
->regs
[PC_REGNUM
] = fci
->saved_regs
->regs
[RA_REGNUM
];
204 read_next_frame_reg(fi
, regno
)
208 /* If it is the frame for sigtramp we have a complete sigcontext
209 somewhere above the frame and we get the saved registers from there.
210 If the stack layout for sigtramp changes we might have to change these
211 constants and the companion fixup_sigtramp in mdebugread.c */
212 #ifndef SIGFRAME_BASE
213 /* To satisfy alignment restrictions the sigcontext is located 4 bytes
214 above the sigtramp frame. */
215 #define SIGFRAME_BASE 4
216 #define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
217 #define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
219 #ifndef SIGFRAME_REG_SIZE
220 #define SIGFRAME_REG_SIZE 4
222 for (; fi
; fi
= fi
->next
)
224 if (fi
->signal_handler_caller
)
227 if (regno
== PC_REGNUM
) offset
= SIGFRAME_PC_OFF
;
228 else if (regno
< 32) offset
= (SIGFRAME_REGSAVE_OFF
229 + regno
* SIGFRAME_REG_SIZE
);
231 return read_memory_integer(fi
->frame
+ offset
, MIPS_REGSIZE
);
233 else if (regno
== SP_REGNUM
) return fi
->frame
;
236 if (fi
->saved_regs
== NULL
)
237 mips_find_saved_regs (fi
);
238 if (fi
->saved_regs
->regs
[regno
])
239 return read_memory_integer(fi
->saved_regs
->regs
[regno
], MIPS_REGSIZE
);
242 return read_register (regno
);
246 mips_frame_saved_pc(frame
)
249 mips_extra_func_info_t proc_desc
= frame
->proc_desc
;
250 /* We have to get the saved pc from the sigcontext
251 if it is a signal handler frame. */
252 int pcreg
= frame
->signal_handler_caller
? PC_REGNUM
253 : (proc_desc
? PROC_PC_REG(proc_desc
) : RA_REGNUM
);
255 if (proc_desc
&& PROC_DESC_IS_DUMMY(proc_desc
))
256 return read_memory_integer(frame
->frame
- 4, 4);
258 return read_next_frame_reg(frame
, pcreg
);
261 static struct mips_extra_func_info temp_proc_desc
;
262 static struct frame_saved_regs temp_saved_regs
;
264 /* This fencepost looks highly suspicious to me. Removing it also
265 seems suspicious as it could affect remote debugging across serial
269 heuristic_proc_start(pc
)
272 CORE_ADDR start_pc
= pc
;
273 CORE_ADDR fence
= start_pc
- heuristic_fence_post
;
275 if (start_pc
== 0) return 0;
277 if (heuristic_fence_post
== UINT_MAX
278 || fence
< VM_MIN_ADDRESS
)
279 fence
= VM_MIN_ADDRESS
;
281 /* search back for previous return */
282 for (start_pc
-= 4; ; start_pc
-= 4)
283 if (start_pc
< fence
)
285 /* It's not clear to me why we reach this point when
286 stop_soon_quietly, but with this test, at least we
287 don't print out warnings for every child forked (eg, on
288 decstation). 22apr93 rich@cygnus.com. */
289 if (!stop_soon_quietly
)
291 static int blurb_printed
= 0;
293 if (fence
== VM_MIN_ADDRESS
)
294 warning("Hit beginning of text section without finding");
296 warning("Hit heuristic-fence-post without finding");
298 warning("enclosing function for address 0x%x", pc
);
302 This warning occurs if you are debugging a function without any symbols\n\
303 (for example, in a stripped executable). In that case, you may wish to\n\
304 increase the size of the search with the `set heuristic-fence-post' command.\n\
306 Otherwise, you told GDB there was a function where there isn't one, or\n\
307 (more likely) you have encountered a bug in GDB.\n");
314 else if (ABOUT_TO_RETURN(start_pc
))
317 start_pc
+= 8; /* skip return, and its delay slot */
319 /* skip nops (usually 1) 0 - is this */
320 while (start_pc
< pc
&& read_memory_integer (start_pc
, 4) == 0)
326 static mips_extra_func_info_t
327 heuristic_proc_desc(start_pc
, limit_pc
, next_frame
)
328 CORE_ADDR start_pc
, limit_pc
;
331 CORE_ADDR sp
= read_next_frame_reg (next_frame
, SP_REGNUM
);
334 int has_frame_reg
= 0;
335 int reg30
= 0; /* Value of $r30. Used by gcc for frame-pointer */
336 unsigned long reg_mask
= 0;
338 if (start_pc
== 0) return NULL
;
339 memset(&temp_proc_desc
, '\0', sizeof(temp_proc_desc
));
340 memset(&temp_saved_regs
, '\0', sizeof(struct frame_saved_regs
));
341 PROC_LOW_ADDR(&temp_proc_desc
) = start_pc
;
343 if (start_pc
+ 200 < limit_pc
) limit_pc
= start_pc
+ 200;
346 for (cur_pc
= start_pc
; cur_pc
< limit_pc
; cur_pc
+= 4) {
351 status
= read_memory_nobpt (cur_pc
, buf
, 4);
352 if (status
) memory_error (status
, cur_pc
);
353 word
= extract_unsigned_integer (buf
, 4);
355 if ((word
& 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */
356 frame_size
+= (-word
) & 0xFFFF;
357 else if ((word
& 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */
358 frame_size
+= (-word
) & 0xFFFF;
359 else if ((word
& 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
360 int reg
= (word
& 0x001F0000) >> 16;
361 reg_mask
|= 1 << reg
;
362 temp_saved_regs
.regs
[reg
] = sp
+ (word
& 0xffff);
364 else if ((word
& 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
365 if ((word
& 0xffff) != frame_size
)
366 reg30
= sp
+ (word
& 0xffff);
367 else if (!has_frame_reg
) {
370 reg30
= read_next_frame_reg(next_frame
, 30);
371 alloca_adjust
= reg30
- (sp
+ (word
& 0xffff));
372 if (alloca_adjust
> 0) {
373 /* FP > SP + frame_size. This may be because
374 * of an alloca or somethings similar.
375 * Fix sp to "pre-alloca" value, and try again.
382 else if ((word
& 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
383 int reg
= (word
& 0x001F0000) >> 16;
384 reg_mask
|= 1 << reg
;
385 temp_saved_regs
.regs
[reg
] = reg30
+ (word
& 0xffff);
389 PROC_FRAME_REG(&temp_proc_desc
) = 30;
390 PROC_FRAME_OFFSET(&temp_proc_desc
) = 0;
393 PROC_FRAME_REG(&temp_proc_desc
) = SP_REGNUM
;
394 PROC_FRAME_OFFSET(&temp_proc_desc
) = frame_size
;
396 PROC_REG_MASK(&temp_proc_desc
) = reg_mask
;
397 PROC_PC_REG(&temp_proc_desc
) = RA_REGNUM
;
398 return &temp_proc_desc
;
401 static mips_extra_func_info_t
402 find_proc_desc(pc
, next_frame
)
406 mips_extra_func_info_t proc_desc
;
407 struct block
*b
= block_for_pc(pc
);
411 find_pc_partial_function (pc
, NULL
, &startaddr
, NULL
);
416 if (startaddr
> BLOCK_START (b
))
417 /* This is the "pathological" case referred to in a comment in
418 print_frame_info. It might be better to move this check into
422 sym
= lookup_symbol (MIPS_EFI_SYMBOL_NAME
, b
, LABEL_NAMESPACE
,
428 /* IF this is the topmost frame AND
429 * (this proc does not have debugging information OR
430 * the PC is in the procedure prologue)
431 * THEN create a "heuristic" proc_desc (by analyzing
432 * the actual code) to replace the "official" proc_desc.
434 proc_desc
= (mips_extra_func_info_t
)SYMBOL_VALUE(sym
);
435 if (next_frame
== NULL
) {
436 struct symtab_and_line val
;
437 struct symbol
*proc_symbol
=
438 PROC_DESC_IS_DUMMY(proc_desc
) ? 0 : PROC_SYMBOL(proc_desc
);
441 val
= find_pc_line (BLOCK_START
442 (SYMBOL_BLOCK_VALUE(proc_symbol
)),
444 val
.pc
= val
.end
? val
.end
: pc
;
446 if (!proc_symbol
|| pc
< val
.pc
) {
447 mips_extra_func_info_t found_heuristic
=
448 heuristic_proc_desc(PROC_LOW_ADDR(proc_desc
),
450 if (found_heuristic
) proc_desc
= found_heuristic
;
456 /* Is linked_proc_desc_table really necessary? It only seems to be used
457 by procedure call dummys. However, the procedures being called ought
458 to have their own proc_descs, and even if they don't,
459 heuristic_proc_desc knows how to create them! */
461 register struct linked_proc_info
*link
;
462 for (link
= linked_proc_desc_table
; link
; link
= link
->next
)
463 if (PROC_LOW_ADDR(&link
->info
) <= pc
464 && PROC_HIGH_ADDR(&link
->info
) > pc
)
468 startaddr
= heuristic_proc_start (pc
);
471 heuristic_proc_desc (startaddr
, pc
, next_frame
);
476 mips_extra_func_info_t cached_proc_desc
;
479 mips_frame_chain(frame
)
482 mips_extra_func_info_t proc_desc
;
483 CORE_ADDR saved_pc
= FRAME_SAVED_PC(frame
);
485 if (saved_pc
== 0 || inside_entry_file (saved_pc
))
488 proc_desc
= find_proc_desc(saved_pc
, frame
);
492 cached_proc_desc
= proc_desc
;
494 /* If no frame pointer and frame size is zero, we must be at end
495 of stack (or otherwise hosed). If we don't check frame size,
496 we loop forever if we see a zero size frame. */
497 if (PROC_FRAME_REG (proc_desc
) == SP_REGNUM
498 && PROC_FRAME_OFFSET (proc_desc
) == 0
499 /* The previous frame from a sigtramp frame might be frameless
500 and have frame size zero. */
501 && !frame
->signal_handler_caller
)
504 return read_next_frame_reg(frame
, PROC_FRAME_REG(proc_desc
))
505 + PROC_FRAME_OFFSET(proc_desc
);
509 init_extra_frame_info(fci
)
510 struct frame_info
*fci
;
512 /* Use proc_desc calculated in frame_chain */
513 mips_extra_func_info_t proc_desc
=
514 fci
->next
? cached_proc_desc
: find_proc_desc(fci
->pc
, fci
->next
);
516 fci
->saved_regs
= NULL
;
518 proc_desc
== &temp_proc_desc
? 0 : proc_desc
;
521 /* Fixup frame-pointer - only needed for top frame */
522 /* This may not be quite right, if proc has a real frame register.
523 Get the value of the frame relative sp, procedure might have been
524 interrupted by a signal at it's very start. */
525 if (fci
->pc
== PROC_LOW_ADDR (proc_desc
)
526 && !PROC_DESC_IS_DUMMY (proc_desc
))
527 fci
->frame
= read_next_frame_reg (fci
->next
, SP_REGNUM
);
530 read_next_frame_reg (fci
->next
, PROC_FRAME_REG (proc_desc
))
531 + PROC_FRAME_OFFSET (proc_desc
);
533 if (proc_desc
== &temp_proc_desc
)
535 fci
->saved_regs
= (struct frame_saved_regs
*)
536 obstack_alloc (&frame_cache_obstack
,
537 sizeof (struct frame_saved_regs
));
538 *fci
->saved_regs
= temp_saved_regs
;
539 fci
->saved_regs
->regs
[PC_REGNUM
] = fci
->saved_regs
->regs
[RA_REGNUM
];
542 /* hack: if argument regs are saved, guess these contain args */
543 if ((PROC_REG_MASK(proc_desc
) & 0xF0) == 0) fci
->num_args
= -1;
544 else if ((PROC_REG_MASK(proc_desc
) & 0x80) == 0) fci
->num_args
= 4;
545 else if ((PROC_REG_MASK(proc_desc
) & 0x40) == 0) fci
->num_args
= 3;
546 else if ((PROC_REG_MASK(proc_desc
) & 0x20) == 0) fci
->num_args
= 2;
547 else if ((PROC_REG_MASK(proc_desc
) & 0x10) == 0) fci
->num_args
= 1;
551 /* MIPS stack frames are almost impenetrable. When execution stops,
552 we basically have to look at symbol information for the function
553 that we stopped in, which tells us *which* register (if any) is
554 the base of the frame pointer, and what offset from that register
555 the frame itself is at.
557 This presents a problem when trying to examine a stack in memory
558 (that isn't executing at the moment), using the "frame" command. We
559 don't have a PC, nor do we have any registers except SP.
561 This routine takes two arguments, SP and PC, and tries to make the
562 cached frames look as if these two arguments defined a frame on the
563 cache. This allows the rest of info frame to extract the important
564 arguments without difficulty. */
567 setup_arbitrary_frame (argc
, argv
)
572 error ("MIPS frame specifications require two arguments: sp and pc");
574 return create_new_frame (argv
[0], argv
[1]);
579 mips_push_arguments(nargs
, args
, sp
, struct_return
, struct_addr
)
584 CORE_ADDR struct_addr
;
587 int accumulate_size
= struct_return
? MIPS_REGSIZE
: 0;
588 struct mips_arg
{ char *contents
; int len
; int offset
; };
589 struct mips_arg
*mips_args
=
590 (struct mips_arg
*)alloca((nargs
+ 4) * sizeof(struct mips_arg
));
591 register struct mips_arg
*m_arg
;
594 for (i
= 0, m_arg
= mips_args
; i
< nargs
; i
++, m_arg
++) {
595 value_ptr arg
= value_arg_coerce (args
[i
]);
596 m_arg
->len
= TYPE_LENGTH (VALUE_TYPE (arg
));
597 /* This entire mips-specific routine is because doubles must be aligned
598 * on 8-byte boundaries. It still isn't quite right, because MIPS decided
599 * to align 'struct {int a, b}' on 4-byte boundaries (even though this
600 * breaks their varargs implementation...). A correct solution
601 * requires an simulation of gcc's 'alignof' (and use of 'alignof'
602 * in stdarg.h/varargs.h).
603 * On the 64 bit r4000 we always pass the first four arguments
604 * using eight bytes each, so that we can load them up correctly
608 accumulate_size
= (accumulate_size
+ 7) & -8;
609 m_arg
->offset
= accumulate_size
;
610 m_arg
->contents
= VALUE_CONTENTS(arg
);
611 #ifndef GDB_TARGET_IS_MIPS64
612 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & -4;
614 if (accumulate_size
>= 4 * MIPS_REGSIZE
)
615 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) &~ 4;
618 static char zeroes
[8] = { 0 };
619 int len
= m_arg
->len
;
623 #if TARGET_BYTE_ORDER == BIG_ENDIAN
624 m_arg
->offset
+= 8 - len
;
627 m_arg
->len
= 8 - len
;
628 m_arg
->contents
= zeroes
;
629 #if TARGET_BYTE_ORDER == BIG_ENDIAN
630 m_arg
->offset
= accumulate_size
;
632 m_arg
->offset
= accumulate_size
+ len
;
636 accumulate_size
= (accumulate_size
+ len
+ 7) & ~8;
640 accumulate_size
= (accumulate_size
+ 7) & (-8);
641 if (accumulate_size
< 4 * MIPS_REGSIZE
)
642 accumulate_size
= 4 * MIPS_REGSIZE
;
643 sp
-= accumulate_size
;
644 for (i
= nargs
+ fake_args
; m_arg
--, --i
>= 0; )
645 write_memory(sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
648 char buf
[TARGET_PTR_BIT
/ HOST_CHAR_BIT
];
650 store_address (buf
, sizeof buf
, struct_addr
);
651 write_memory (sp
, buf
, sizeof buf
);
656 /* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */
657 #define MASK(i,j) (((1 << ((j)+1))-1) ^ ((1 << (i))-1))
660 mips_push_dummy_frame()
662 char buffer
[MAX_REGISTER_RAW_SIZE
];
664 struct linked_proc_info
*link
= (struct linked_proc_info
*)
665 xmalloc(sizeof(struct linked_proc_info
));
666 mips_extra_func_info_t proc_desc
= &link
->info
;
667 CORE_ADDR sp
= read_register (SP_REGNUM
);
668 CORE_ADDR save_address
;
669 link
->next
= linked_proc_desc_table
;
670 linked_proc_desc_table
= link
;
671 #define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */
672 #define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31)
673 #define GEN_REG_SAVE_COUNT 22
674 #define FLOAT_REG_SAVE_MASK MASK(0,19)
675 #define FLOAT_REG_SAVE_COUNT 20
676 #define SPECIAL_REG_SAVE_COUNT 4
678 * The registers we must save are all those not preserved across
679 * procedure calls. Dest_Reg (see tm-mips.h) must also be saved.
680 * In addition, we must save the PC, and PUSH_FP_REGNUM.
681 * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.)
683 * Dummy frame layout:
686 * Saved MMHI, MMLO, FPC_CSR
691 * Saved D18 (i.e. F19, F18)
693 * Saved D0 (i.e. F1, F0)
694 * CALL_DUMMY (subroutine stub; see tm-mips.h)
695 * Parameter build area (not yet implemented)
698 PROC_REG_MASK(proc_desc
) = GEN_REG_SAVE_MASK
;
699 PROC_FREG_MASK(proc_desc
) = mips_fpu
? FLOAT_REG_SAVE_MASK
: 0;
700 PROC_REG_OFFSET(proc_desc
) = /* offset of (Saved R31) from FP */
701 -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT
;
702 PROC_FREG_OFFSET(proc_desc
) = /* offset of (Saved D18) from FP */
703 -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT
+ GEN_REG_SAVE_COUNT
);
704 /* save general registers */
705 save_address
= sp
+ PROC_REG_OFFSET(proc_desc
);
706 for (ireg
= 32; --ireg
>= 0; )
707 if (PROC_REG_MASK(proc_desc
) & (1 << ireg
))
709 read_register_gen (ireg
, buffer
);
711 /* Need to fix the save_address decrement below, and also make sure
712 that we don't run into problems with the size of the dummy frame
713 or any of the offsets within it. */
714 if (REGISTER_RAW_SIZE (ireg
) > 4)
715 error ("Cannot call functions on mips64");
717 write_memory (save_address
, buffer
, REGISTER_RAW_SIZE (ireg
));
720 /* save floating-points registers starting with high order word */
721 save_address
= sp
+ PROC_FREG_OFFSET(proc_desc
) + 4;
722 for (ireg
= 32; --ireg
>= 0; )
723 if (PROC_FREG_MASK(proc_desc
) & (1 << ireg
))
725 read_register_gen (ireg
+ FP0_REGNUM
, buffer
);
727 if (REGISTER_RAW_SIZE (ireg
+ FP0_REGNUM
) > 4)
728 error ("Cannot call functions on mips64");
730 write_memory (save_address
, buffer
,
731 REGISTER_RAW_SIZE (ireg
+ FP0_REGNUM
));
734 write_register (PUSH_FP_REGNUM
, sp
);
735 PROC_FRAME_REG(proc_desc
) = PUSH_FP_REGNUM
;
736 PROC_FRAME_OFFSET(proc_desc
) = 0;
737 read_register_gen (PC_REGNUM
, buffer
);
738 write_memory (sp
- 4, buffer
, REGISTER_RAW_SIZE (PC_REGNUM
));
739 read_register_gen (HI_REGNUM
, buffer
);
740 write_memory (sp
- 8, buffer
, REGISTER_RAW_SIZE (HI_REGNUM
));
741 read_register_gen (LO_REGNUM
, buffer
);
742 write_memory (sp
- 12, buffer
, REGISTER_RAW_SIZE (LO_REGNUM
));
744 read_register_gen (FCRCS_REGNUM
, buffer
);
746 memset (buffer
, 0, REGISTER_RAW_SIZE (FCRCS_REGNUM
));
747 write_memory (sp
- 16, buffer
, REGISTER_RAW_SIZE (FCRCS_REGNUM
));
748 sp
-= 4 * (GEN_REG_SAVE_COUNT
749 + (mips_fpu
? FLOAT_REG_SAVE_COUNT
: 0)
750 + SPECIAL_REG_SAVE_COUNT
);
751 write_register (SP_REGNUM
, sp
);
752 PROC_LOW_ADDR(proc_desc
) = sp
- CALL_DUMMY_SIZE
+ CALL_DUMMY_START_OFFSET
;
753 PROC_HIGH_ADDR(proc_desc
) = sp
;
754 SET_PROC_DESC_IS_DUMMY(proc_desc
);
755 PROC_PC_REG(proc_desc
) = RA_REGNUM
;
762 FRAME frame
= get_current_frame ();
763 CORE_ADDR new_sp
= frame
->frame
;
765 mips_extra_func_info_t proc_desc
= frame
->proc_desc
;
767 write_register (PC_REGNUM
, FRAME_SAVED_PC(frame
));
768 if (frame
->saved_regs
== NULL
)
769 mips_find_saved_regs (frame
);
772 for (regnum
= 32; --regnum
>= 0; )
773 if (PROC_REG_MASK(proc_desc
) & (1 << regnum
))
774 write_register (regnum
,
775 read_memory_integer (frame
->saved_regs
->regs
[regnum
],
777 for (regnum
= 32; --regnum
>= 0; )
778 if (PROC_FREG_MASK(proc_desc
) & (1 << regnum
))
779 write_register (regnum
+ FP0_REGNUM
,
780 read_memory_integer (frame
->saved_regs
->regs
[regnum
+ FP0_REGNUM
], 4));
782 write_register (SP_REGNUM
, new_sp
);
783 flush_cached_frames ();
784 /* We let mips_init_extra_frame_info figure out the frame pointer */
785 set_current_frame (create_new_frame (0, read_pc ()));
787 if (proc_desc
&& PROC_DESC_IS_DUMMY(proc_desc
))
789 struct linked_proc_info
*pi_ptr
, *prev_ptr
;
791 for (pi_ptr
= linked_proc_desc_table
, prev_ptr
= NULL
;
793 prev_ptr
= pi_ptr
, pi_ptr
= pi_ptr
->next
)
795 if (&pi_ptr
->info
== proc_desc
)
800 error ("Can't locate dummy extra frame info\n");
802 if (prev_ptr
!= NULL
)
803 prev_ptr
->next
= pi_ptr
->next
;
805 linked_proc_desc_table
= pi_ptr
->next
;
809 write_register (HI_REGNUM
, read_memory_integer(new_sp
- 8, 4));
810 write_register (LO_REGNUM
, read_memory_integer(new_sp
- 12, 4));
812 write_register (FCRCS_REGNUM
, read_memory_integer(new_sp
- 16, 4));
817 mips_print_register (regnum
, all
)
820 unsigned char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
821 struct type
*our_type
=
822 init_type (TYPE_CODE_INT
,
823 /* We will fill in the length for each register. */
829 /* Get the data in raw format. */
830 if (read_relative_register_raw_bytes (regnum
, raw_buffer
))
832 printf_filtered ("%s: [Invalid]", reg_names
[regnum
]);
836 /* If an even floating pointer register, also print as double. */
837 if (regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+32
838 && !((regnum
-FP0_REGNUM
) & 1)) {
839 char dbuffer
[MAX_REGISTER_RAW_SIZE
];
841 read_relative_register_raw_bytes (regnum
, dbuffer
);
842 read_relative_register_raw_bytes (regnum
+1, dbuffer
+4);
843 #ifdef REGISTER_CONVERT_TO_TYPE
844 REGISTER_CONVERT_TO_TYPE(regnum
, builtin_type_double
, dbuffer
);
846 printf_filtered ("(d%d: ", regnum
-FP0_REGNUM
);
847 val_print (builtin_type_double
, dbuffer
, 0,
848 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
849 printf_filtered ("); ");
851 fputs_filtered (reg_names
[regnum
], gdb_stdout
);
853 /* The problem with printing numeric register names (r26, etc.) is that
854 the user can't use them on input. Probably the best solution is to
855 fix it so that either the numeric or the funky (a2, etc.) names
856 are accepted on input. */
858 printf_filtered ("(r%d): ", regnum
);
860 printf_filtered (": ");
862 /* If virtual format is floating, print it that way. */
863 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum
)) == TYPE_CODE_FLT
)
864 val_print (REGISTER_VIRTUAL_TYPE (regnum
), raw_buffer
, 0,
865 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
866 /* Else print as integer in hex. */
868 print_scalar_formatted (raw_buffer
, REGISTER_VIRTUAL_TYPE (regnum
),
872 /* Replacement for generic do_registers_info. */
874 mips_do_registers_info (regnum
, fpregs
)
879 mips_print_register (regnum
, 0);
880 printf_filtered ("\n");
883 for (regnum
= 0; regnum
< NUM_REGS
; ) {
884 if ((!fpregs
) && regnum
>= FP0_REGNUM
&& regnum
<= FCRIR_REGNUM
) {
888 mips_print_register (regnum
, 1);
890 if ((regnum
& 3) == 0 || regnum
== NUM_REGS
)
891 printf_filtered (";\n");
893 printf_filtered ("; ");
897 /* Return number of args passed to a frame. described by FIP.
898 Can return -1, meaning no way to tell. */
901 mips_frame_num_args(fip
)
905 struct chain_info_t
*p
;
907 p
= mips_find_cached_frame(FRAME_FP(fip
));
909 return p
->the_info
.numargs
;
914 /* Is this a branch with a delay slot? */
915 static int is_delayed
PARAMS ((unsigned long));
922 for (i
= 0; i
< NUMOPCODES
; ++i
)
923 if (mips_opcodes
[i
].pinfo
!= INSN_MACRO
924 && (insn
& mips_opcodes
[i
].mask
) == mips_opcodes
[i
].match
)
926 return (i
< NUMOPCODES
927 && (mips_opcodes
[i
].pinfo
& (INSN_UNCOND_BRANCH_DELAY
928 | INSN_COND_BRANCH_DELAY
929 | INSN_COND_BRANCH_LIKELY
)));
933 mips_step_skips_delay (pc
)
938 if (target_read_memory (pc
, buf
, 4) != 0)
939 /* If error reading memory, guess that it is not a delayed branch. */
941 return is_delayed (extract_unsigned_integer (buf
, 4));
944 /* To skip prologues, I use this predicate. Returns either PC itself
945 if the code at PC does not look like a function prologue; otherwise
946 returns an address that (if we're lucky) follows the prologue. If
947 LENIENT, then we must skip everything which is involved in setting
948 up the frame (it's OK to skip more, just so long as we don't skip
949 anything which might clobber the registers which are being saved.
950 We must skip more in the case where part of the prologue is in the
951 delay slot of a non-prologue instruction). */
954 mips_skip_prologue (pc
, lenient
)
960 int seen_sp_adjust
= 0;
961 int load_immediate_bytes
= 0;
963 /* Skip the typical prologue instructions. These are the stack adjustment
964 instruction and the instructions that save registers on the stack
965 or in the gcc frame. */
966 for (offset
= 0; offset
< 100; offset
+= 4)
971 status
= read_memory_nobpt (pc
+ offset
, buf
, 4);
973 memory_error (status
, pc
+ offset
);
974 inst
= extract_unsigned_integer (buf
, 4);
977 if (lenient
&& is_delayed (inst
))
981 if ((inst
& 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */
983 else if (inst
== 0x03a1e823 || /* subu $sp,$sp,$at */
984 inst
== 0x03a8e823) /* subu $sp,$sp,$t0 */
986 else if ((inst
& 0xFFE00000) == 0xAFA00000 && (inst
& 0x001F0000))
987 continue; /* sw reg,n($sp) */
989 else if ((inst
& 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */
991 else if ((inst
& 0xF3E00000) == 0xA3C00000 && (inst
& 0x001F0000))
993 continue; /* reg != $zero */
994 else if (inst
== 0x03A0F021) /* move $s8,$sp */
996 else if ((inst
& 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
998 else if ((inst
& 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
1000 else if ((inst
& 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
1002 else if (inst
== 0x0399e021 /* addu $gp,$gp,$t9 */
1003 || inst
== 0x033ce021) /* addu $gp,$t9,$gp */
1005 /* The following instructions load $at or $t0 with an immediate
1006 value in preparation for a stack adjustment via
1007 subu $sp,$sp,[$at,$t0]. These instructions could also initialize
1008 a local variable, so we accept them only before a stack adjustment
1009 instruction was seen. */
1010 else if (!seen_sp_adjust
)
1012 if ((inst
& 0xffff0000) == 0x3c010000 || /* lui $at,n */
1013 (inst
& 0xffff0000) == 0x3c080000) /* lui $t0,n */
1015 load_immediate_bytes
+= 4;
1018 else if ((inst
& 0xffff0000) == 0x34210000 || /* ori $at,$at,n */
1019 (inst
& 0xffff0000) == 0x35080000 || /* ori $t0,$t0,n */
1020 (inst
& 0xffff0000) == 0x34010000 || /* ori $at,$zero,n */
1021 (inst
& 0xffff0000) == 0x34080000) /* ori $t0,$zero,n */
1023 load_immediate_bytes
+= 4;
1033 /* In a frameless function, we might have incorrectly
1034 skipped some load immediate instructions. Undo the skipping
1035 if the load immediate was not followed by a stack adjustment. */
1036 if (load_immediate_bytes
&& !seen_sp_adjust
)
1037 offset
-= load_immediate_bytes
;
1042 /* The lenient prologue stuff should be superceded by the code in
1043 init_extra_frame_info which looks to see whether the stores mentioned
1044 in the proc_desc have actually taken place. */
1046 /* Is address PC in the prologue (loosely defined) for function at
1050 mips_in_lenient_prologue (startaddr
, pc
)
1051 CORE_ADDR startaddr
;
1054 CORE_ADDR end_prologue
= mips_skip_prologue (startaddr
, 1);
1055 return pc
>= startaddr
&& pc
< end_prologue
;
1059 /* Given a return value in `regbuf' with a type `valtype',
1060 extract and copy its value into `valbuf'. */
1062 mips_extract_return_value (valtype
, regbuf
, valbuf
)
1063 struct type
*valtype
;
1064 char regbuf
[REGISTER_BYTES
];
1069 regnum
= TYPE_CODE (valtype
) == TYPE_CODE_FLT
&& mips_fpu
? FP0_REGNUM
: 2;
1071 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (regnum
), TYPE_LENGTH (valtype
));
1072 #ifdef REGISTER_CONVERT_TO_TYPE
1073 REGISTER_CONVERT_TO_TYPE(regnum
, valtype
, valbuf
);
1077 /* Given a return value in `regbuf' with a type `valtype',
1078 write it's value into the appropriate register. */
1080 mips_store_return_value (valtype
, valbuf
)
1081 struct type
*valtype
;
1085 char raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1087 regnum
= TYPE_CODE (valtype
) == TYPE_CODE_FLT
&& mips_fpu
? FP0_REGNUM
: 2;
1088 memcpy(raw_buffer
, valbuf
, TYPE_LENGTH (valtype
));
1090 #ifdef REGISTER_CONVERT_FROM_TYPE
1091 REGISTER_CONVERT_FROM_TYPE(regnum
, valtype
, raw_buffer
);
1094 write_register_bytes(REGISTER_BYTE (regnum
), raw_buffer
, TYPE_LENGTH (valtype
));
1097 /* These exist in mdebugread.c. */
1098 extern CORE_ADDR sigtramp_address
, sigtramp_end
;
1099 extern void fixup_sigtramp
PARAMS ((void));
1101 /* Exported procedure: Is PC in the signal trampoline code */
1104 in_sigtramp (pc
, ignore
)
1106 char *ignore
; /* function name */
1108 if (sigtramp_address
== 0)
1110 return (pc
>= sigtramp_address
&& pc
< sigtramp_end
);
1113 static void reinit_frame_cache_sfunc
PARAMS ((char *, int,
1114 struct cmd_list_element
*));
1116 /* Just like reinit_frame_cache, but with the right arguments to be
1117 callable as an sfunc. */
1119 reinit_frame_cache_sfunc (args
, from_tty
, c
)
1122 struct cmd_list_element
*c
;
1124 reinit_frame_cache ();
1128 _initialize_mips_tdep ()
1130 struct cmd_list_element
*c
;
1132 /* Let the user turn off floating point and set the fence post for
1133 heuristic_proc_start. */
1136 (add_set_cmd ("mipsfpu", class_support
, var_boolean
,
1138 "Set use of floating point coprocessor.\n\
1139 Turn off to avoid using floating point instructions when calling functions\n\
1140 or dealing with return values.", &setlist
),
1143 /* We really would like to have both "0" and "unlimited" work, but
1144 command.c doesn't deal with that. So make it a var_zinteger
1145 because the user can always use "999999" or some such for unlimited. */
1146 c
= add_set_cmd ("heuristic-fence-post", class_support
, var_zinteger
,
1147 (char *) &heuristic_fence_post
,
1149 Set the distance searched for the start of a function.\n\
1150 If you are debugging a stripped executable, GDB needs to search through the\n\
1151 program for the start of a function. This command sets the distance of the\n\
1152 search. The only need to set it is when debugging a stripped executable.",
1154 /* We need to throw away the frame cache when we set this, since it
1155 might change our ability to get backtraces. */
1156 c
->function
.sfunc
= reinit_frame_cache_sfunc
;
1157 add_show_from_set (c
, &showlist
);