1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
31 #include "dwarf2-frame.h"
34 #include "prologue-value.h"
37 #include "mn10300-tdep.h"
40 /* The am33-2 has 64 registers. */
41 #define MN10300_MAX_NUM_REGS 64
43 /* Big enough to hold the size of the largest register in bytes. */
44 #define MN10300_MAX_REGISTER_SIZE 64
46 /* This structure holds the results of a prologue analysis. */
47 struct mn10300_prologue
49 /* The architecture for which we generated this prologue info. */
50 struct gdbarch
*gdbarch
;
52 /* The offset from the frame base to the stack pointer --- always
55 Calling this a "size" is a bit misleading, but given that the
56 stack grows downwards, using offsets for everything keeps one
57 from going completely sign-crazy: you never change anything's
58 sign for an ADD instruction; always change the second operand's
59 sign for a SUB instruction; and everything takes care of
63 /* Non-zero if this function has initialized the frame pointer from
64 the stack pointer, zero otherwise. */
67 /* If has_frame_ptr is non-zero, this is the offset from the frame
68 base to where the frame pointer points. This is always zero or
72 /* The address of the first instruction at which the frame has been
73 set up and the arguments are where the debug info says they are
74 --- as best as we can tell. */
75 CORE_ADDR prologue_end
;
77 /* reg_offset[R] is the offset from the CFA at which register R is
78 saved, or 1 if register R has not been saved. (Real values are
79 always zero or negative.) */
80 int reg_offset
[MN10300_MAX_NUM_REGS
];
84 /* Compute the alignment required by a type. */
87 mn10300_type_align (struct type
*type
)
91 switch (TYPE_CODE (type
))
102 case TYPE_CODE_RVALUE_REF
:
103 return TYPE_LENGTH (type
);
105 case TYPE_CODE_COMPLEX
:
106 return TYPE_LENGTH (type
) / 2;
108 case TYPE_CODE_STRUCT
:
109 case TYPE_CODE_UNION
:
110 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
112 int falign
= mn10300_type_align (TYPE_FIELD_TYPE (type
, i
));
113 while (align
< falign
)
118 case TYPE_CODE_ARRAY
:
119 /* HACK! Structures containing arrays, even small ones, are not
120 elligible for returning in registers. */
123 case TYPE_CODE_TYPEDEF
:
124 return mn10300_type_align (check_typedef (type
));
127 internal_error (__FILE__
, __LINE__
, _("bad switch"));
131 /* Should call_function allocate stack space for a struct return? */
133 mn10300_use_struct_convention (struct type
*type
)
135 /* Structures bigger than a pair of words can't be returned in
137 if (TYPE_LENGTH (type
) > 8)
140 switch (TYPE_CODE (type
))
142 case TYPE_CODE_STRUCT
:
143 case TYPE_CODE_UNION
:
144 /* Structures with a single field are handled as the field
146 if (TYPE_NFIELDS (type
) == 1)
147 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type
, 0));
149 /* Structures with word or double-word size are passed in memory, as
150 long as they require at least word alignment. */
151 if (mn10300_type_align (type
) >= 4)
156 /* Arrays are addressable, so they're never returned in
157 registers. This condition can only hold when the array is
158 the only field of a struct or union. */
159 case TYPE_CODE_ARRAY
:
162 case TYPE_CODE_TYPEDEF
:
163 return mn10300_use_struct_convention (check_typedef (type
));
171 mn10300_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
172 struct regcache
*regcache
, const gdb_byte
*valbuf
)
174 int len
= TYPE_LENGTH (type
);
177 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
182 regsz
= register_size (gdbarch
, reg
);
185 regcache_raw_write_part (regcache
, reg
, 0, len
, valbuf
);
186 else if (len
<= 2 * regsz
)
188 regcache_raw_write (regcache
, reg
, valbuf
);
189 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
190 regcache_raw_write_part (regcache
, reg
+1, 0,
191 len
- regsz
, valbuf
+ regsz
);
194 internal_error (__FILE__
, __LINE__
,
195 _("Cannot store return value %d bytes long."), len
);
199 mn10300_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
200 struct regcache
*regcache
, void *valbuf
)
202 gdb_byte buf
[MN10300_MAX_REGISTER_SIZE
];
203 int len
= TYPE_LENGTH (type
);
206 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
211 regsz
= register_size (gdbarch
, reg
);
212 gdb_assert (regsz
<= MN10300_MAX_REGISTER_SIZE
);
215 regcache_raw_read (regcache
, reg
, buf
);
216 memcpy (valbuf
, buf
, len
);
218 else if (len
<= 2 * regsz
)
220 regcache_raw_read (regcache
, reg
, buf
);
221 memcpy (valbuf
, buf
, regsz
);
222 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
223 regcache_raw_read (regcache
, reg
+ 1, buf
);
224 memcpy ((char *) valbuf
+ regsz
, buf
, len
- regsz
);
227 internal_error (__FILE__
, __LINE__
,
228 _("Cannot extract return value %d bytes long."), len
);
231 /* Determine, for architecture GDBARCH, how a return value of TYPE
232 should be returned. If it is supposed to be returned in registers,
233 and READBUF is non-zero, read the appropriate value from REGCACHE,
234 and copy it into READBUF. If WRITEBUF is non-zero, write the value
235 from WRITEBUF into REGCACHE. */
237 static enum return_value_convention
238 mn10300_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
239 struct type
*type
, struct regcache
*regcache
,
240 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
242 if (mn10300_use_struct_convention (type
))
243 return RETURN_VALUE_STRUCT_CONVENTION
;
246 mn10300_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
248 mn10300_store_return_value (gdbarch
, type
, regcache
, writebuf
);
250 return RETURN_VALUE_REGISTER_CONVENTION
;
254 register_name (int reg
, const char **regs
, long sizeof_regs
)
256 if (reg
< 0 || reg
>= sizeof_regs
/ sizeof (regs
[0]))
263 mn10300_generic_register_name (struct gdbarch
*gdbarch
, int reg
)
265 static const char *regs
[] =
266 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
267 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
268 "", "", "", "", "", "", "", "",
269 "", "", "", "", "", "", "", "fp"
271 return register_name (reg
, regs
, sizeof regs
);
276 am33_register_name (struct gdbarch
*gdbarch
, int reg
)
278 static const char *regs
[] =
279 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
280 "sp", "pc", "mdr", "psw", "lir", "lar", "",
281 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
282 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
284 return register_name (reg
, regs
, sizeof regs
);
288 am33_2_register_name (struct gdbarch
*gdbarch
, int reg
)
290 static const char *regs
[] =
292 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
293 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
294 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
295 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
296 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
297 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
298 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
299 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
301 return register_name (reg
, regs
, sizeof regs
);
305 mn10300_register_type (struct gdbarch
*gdbarch
, int reg
)
307 return builtin_type (gdbarch
)->builtin_int
;
311 mn10300_read_pc (struct regcache
*regcache
)
314 regcache_cooked_read_unsigned (regcache
, E_PC_REGNUM
, &val
);
319 mn10300_write_pc (struct regcache
*regcache
, CORE_ADDR val
)
321 regcache_cooked_write_unsigned (regcache
, E_PC_REGNUM
, val
);
324 /* The breakpoint instruction must be the same size as the smallest
325 instruction in the instruction set.
327 The Matsushita mn10x00 processors have single byte instructions
328 so we need a single byte breakpoint. Matsushita hasn't defined
329 one, so we defined it ourselves. */
330 constexpr gdb_byte mn10300_break_insn
[] = {0xff};
332 typedef BP_MANIPULATION (mn10300_break_insn
) mn10300_breakpoint
;
334 /* Model the semantics of pushing a register onto the stack. This
335 is a helper function for mn10300_analyze_prologue, below. */
337 push_reg (pv_t
*regs
, struct pv_area
*stack
, int regnum
)
339 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
340 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[regnum
]);
343 /* Translate an "r" register number extracted from an instruction encoding
344 into a GDB register number. Adapted from a simulator function
345 of the same name; see am33.igen. */
347 translate_rreg (int rreg
)
349 /* The higher register numbers actually correspond to the
350 basic machine's address and data registers. */
351 if (rreg
> 7 && rreg
< 12)
352 return E_A0_REGNUM
+ rreg
- 8;
353 else if (rreg
> 11 && rreg
< 16)
354 return E_D0_REGNUM
+ rreg
- 12;
356 return E_E0_REGNUM
+ rreg
;
359 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
361 If VALUE is a saved register, ADDR says it was saved at a constant
362 offset from the frame base, and SIZE indicates that the whole
363 register was saved, record its offset in RESULT_UNTYPED. */
365 check_for_saved (void *result_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
367 struct mn10300_prologue
*result
= (struct mn10300_prologue
*) result_untyped
;
369 if (value
.kind
== pvk_register
371 && pv_is_register (addr
, E_SP_REGNUM
)
372 && size
== register_size (result
->gdbarch
, value
.reg
))
373 result
->reg_offset
[value
.reg
] = addr
.k
;
376 /* Analyze the prologue to determine where registers are saved,
377 the end of the prologue, etc. The result of this analysis is
378 returned in RESULT. See struct mn10300_prologue above for more
381 mn10300_analyze_prologue (struct gdbarch
*gdbarch
,
382 CORE_ADDR start_pc
, CORE_ADDR limit_pc
,
383 struct mn10300_prologue
*result
)
385 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
388 pv_t regs
[MN10300_MAX_NUM_REGS
];
389 struct pv_area
*stack
;
390 struct cleanup
*back_to
;
391 CORE_ADDR after_last_frame_setup_insn
= start_pc
;
392 int am33_mode
= AM33_MODE (gdbarch
);
394 memset (result
, 0, sizeof (*result
));
395 result
->gdbarch
= gdbarch
;
397 for (rn
= 0; rn
< MN10300_MAX_NUM_REGS
; rn
++)
399 regs
[rn
] = pv_register (rn
, 0);
400 result
->reg_offset
[rn
] = 1;
402 stack
= make_pv_area (E_SP_REGNUM
, gdbarch_addr_bit (gdbarch
));
403 back_to
= make_cleanup_free_pv_area (stack
);
405 /* The typical call instruction will have saved the return address on the
406 stack. Space for the return address has already been preallocated in
407 the caller's frame. It's possible, such as when using -mrelax with gcc
408 that other registers were saved as well. If this happens, we really
409 have no chance of deciphering the frame. DWARF info can save the day
410 when this happens. */
411 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4, regs
[E_PC_REGNUM
]);
414 while (pc
< limit_pc
)
419 /* Instructions can be as small as one byte; however, we usually
420 need at least two bytes to do the decoding, so fetch that many
422 status
= target_read_memory (pc
, instr
, 2);
426 /* movm [regs], sp */
427 if (instr
[0] == 0xcf)
431 save_mask
= instr
[1];
433 if ((save_mask
& movm_exreg0_bit
) && am33_mode
)
435 push_reg (regs
, stack
, E_E2_REGNUM
);
436 push_reg (regs
, stack
, E_E3_REGNUM
);
438 if ((save_mask
& movm_exreg1_bit
) && am33_mode
)
440 push_reg (regs
, stack
, E_E4_REGNUM
);
441 push_reg (regs
, stack
, E_E5_REGNUM
);
442 push_reg (regs
, stack
, E_E6_REGNUM
);
443 push_reg (regs
, stack
, E_E7_REGNUM
);
445 if ((save_mask
& movm_exother_bit
) && am33_mode
)
447 push_reg (regs
, stack
, E_E0_REGNUM
);
448 push_reg (regs
, stack
, E_E1_REGNUM
);
449 push_reg (regs
, stack
, E_MDRQ_REGNUM
);
450 push_reg (regs
, stack
, E_MCRH_REGNUM
);
451 push_reg (regs
, stack
, E_MCRL_REGNUM
);
452 push_reg (regs
, stack
, E_MCVF_REGNUM
);
454 if (save_mask
& movm_d2_bit
)
455 push_reg (regs
, stack
, E_D2_REGNUM
);
456 if (save_mask
& movm_d3_bit
)
457 push_reg (regs
, stack
, E_D3_REGNUM
);
458 if (save_mask
& movm_a2_bit
)
459 push_reg (regs
, stack
, E_A2_REGNUM
);
460 if (save_mask
& movm_a3_bit
)
461 push_reg (regs
, stack
, E_A3_REGNUM
);
462 if (save_mask
& movm_other_bit
)
464 push_reg (regs
, stack
, E_D0_REGNUM
);
465 push_reg (regs
, stack
, E_D1_REGNUM
);
466 push_reg (regs
, stack
, E_A0_REGNUM
);
467 push_reg (regs
, stack
, E_A1_REGNUM
);
468 push_reg (regs
, stack
, E_MDR_REGNUM
);
469 push_reg (regs
, stack
, E_LIR_REGNUM
);
470 push_reg (regs
, stack
, E_LAR_REGNUM
);
471 /* The `other' bit leaves a blank area of four bytes at
472 the beginning of its block of saved registers, making
473 it 32 bytes long in total. */
474 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
478 after_last_frame_setup_insn
= pc
;
481 else if ((instr
[0] & 0xfc) == 0x3c)
483 int aN
= instr
[0] & 0x03;
485 regs
[E_A0_REGNUM
+ aN
] = regs
[E_SP_REGNUM
];
489 after_last_frame_setup_insn
= pc
;
492 else if ((instr
[0] & 0xf0) == 0x90
493 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
495 int aN
= instr
[0] & 0x03;
496 int aM
= (instr
[0] & 0x0c) >> 2;
498 regs
[E_A0_REGNUM
+ aN
] = regs
[E_A0_REGNUM
+ aM
];
503 else if ((instr
[0] & 0xf0) == 0x80
504 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
506 int dN
= instr
[0] & 0x03;
507 int dM
= (instr
[0] & 0x0c) >> 2;
509 regs
[E_D0_REGNUM
+ dN
] = regs
[E_D0_REGNUM
+ dM
];
514 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xd0)
516 int dN
= instr
[1] & 0x03;
517 int aM
= (instr
[1] & 0x0c) >> 2;
519 regs
[E_D0_REGNUM
+ dN
] = regs
[E_A0_REGNUM
+ aM
];
524 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xe0)
526 int aN
= instr
[1] & 0x03;
527 int dM
= (instr
[1] & 0x0c) >> 2;
529 regs
[E_A0_REGNUM
+ aN
] = regs
[E_D0_REGNUM
+ dM
];
534 else if (instr
[0] == 0xf8 && instr
[1] == 0xfe)
540 status
= target_read_memory (pc
+ 2, buf
, 1);
544 imm8
= extract_signed_integer (buf
, 1, byte_order
);
545 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm8
);
548 /* Stack pointer adjustments are frame related. */
549 after_last_frame_setup_insn
= pc
;
552 else if (instr
[0] == 0xfa && instr
[1] == 0xfe)
557 status
= target_read_memory (pc
+ 2, buf
, 2);
561 imm16
= extract_signed_integer (buf
, 2, byte_order
);
562 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm16
);
565 /* Stack pointer adjustments are frame related. */
566 after_last_frame_setup_insn
= pc
;
569 else if (instr
[0] == 0xfc && instr
[1] == 0xfe)
574 status
= target_read_memory (pc
+ 2, buf
, 4);
579 imm32
= extract_signed_integer (buf
, 4, byte_order
);
580 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm32
);
583 /* Stack pointer adjustments are frame related. */
584 after_last_frame_setup_insn
= pc
;
587 else if ((instr
[0] & 0xfc) == 0x20)
592 aN
= instr
[0] & 0x03;
593 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
595 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
601 else if (instr
[0] == 0xfa && (instr
[1] & 0xfc) == 0xd0)
607 aN
= instr
[1] & 0x03;
609 status
= target_read_memory (pc
+ 2, buf
, 2);
614 imm16
= extract_signed_integer (buf
, 2, byte_order
);
616 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
622 else if (instr
[0] == 0xfc && (instr
[1] & 0xfc) == 0xd0)
628 aN
= instr
[1] & 0x03;
630 status
= target_read_memory (pc
+ 2, buf
, 4);
634 imm32
= extract_signed_integer (buf
, 2, byte_order
);
636 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
641 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x30)
646 Y
= (instr
[1] & 0x02) >> 1;
648 status
= target_read_memory (pc
+ 2, buf
, 1);
652 sM
= (buf
[0] & 0xf0) >> 4;
656 pv_area_store (stack
, regs
[translate_rreg (rN
)], 4,
657 regs
[E_FS0_REGNUM
+ fsM
]);
662 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x34)
667 Y
= (instr
[1] & 0x02) >> 1;
669 status
= target_read_memory (pc
+ 2, buf
, 1);
673 sM
= (buf
[0] & 0xf0) >> 4;
676 pv_area_store (stack
, regs
[E_SP_REGNUM
], 4,
677 regs
[E_FS0_REGNUM
+ fsM
]);
681 /* fmov fsM, (rN, rI) */
682 else if (instr
[0] == 0xfb && instr
[1] == 0x37)
684 int fsM
, sM
, Z
, rN
, rI
;
688 status
= target_read_memory (pc
+ 2, buf
, 2);
692 rI
= (buf
[0] & 0xf0) >> 4;
694 sM
= (buf
[1] & 0xf0) >> 4;
695 Z
= (buf
[1] & 0x02) >> 1;
698 pv_area_store (stack
,
699 pv_add (regs
[translate_rreg (rN
)],
700 regs
[translate_rreg (rI
)]),
701 4, regs
[E_FS0_REGNUM
+ fsM
]);
705 /* fmov fsM, (d8, rN) */
706 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x30)
712 Y
= (instr
[1] & 0x02) >> 1;
714 status
= target_read_memory (pc
+ 2, buf
, 2);
718 sM
= (buf
[0] & 0xf0) >> 4;
721 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
723 pv_area_store (stack
,
724 pv_add_constant (regs
[translate_rreg (rN
)], d8
),
725 4, regs
[E_FS0_REGNUM
+ fsM
]);
729 /* fmov fsM, (d24, rN) */
730 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x30)
736 Y
= (instr
[1] & 0x02) >> 1;
738 status
= target_read_memory (pc
+ 2, buf
, 4);
742 sM
= (buf
[0] & 0xf0) >> 4;
745 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
747 pv_area_store (stack
,
748 pv_add_constant (regs
[translate_rreg (rN
)], d24
),
749 4, regs
[E_FS0_REGNUM
+ fsM
]);
753 /* fmov fsM, (d32, rN) */
754 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x30)
760 Y
= (instr
[1] & 0x02) >> 1;
762 status
= target_read_memory (pc
+ 2, buf
, 5);
766 sM
= (buf
[0] & 0xf0) >> 4;
769 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
771 pv_area_store (stack
,
772 pv_add_constant (regs
[translate_rreg (rN
)], d32
),
773 4, regs
[E_FS0_REGNUM
+ fsM
]);
777 /* fmov fsM, (d8, SP) */
778 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x34)
784 Y
= (instr
[1] & 0x02) >> 1;
786 status
= target_read_memory (pc
+ 2, buf
, 2);
790 sM
= (buf
[0] & 0xf0) >> 4;
792 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
794 pv_area_store (stack
,
795 pv_add_constant (regs
[E_SP_REGNUM
], d8
),
796 4, regs
[E_FS0_REGNUM
+ fsM
]);
800 /* fmov fsM, (d24, SP) */
801 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x34)
807 Y
= (instr
[1] & 0x02) >> 1;
809 status
= target_read_memory (pc
+ 2, buf
, 4);
813 sM
= (buf
[0] & 0xf0) >> 4;
815 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
817 pv_area_store (stack
,
818 pv_add_constant (regs
[E_SP_REGNUM
], d24
),
819 4, regs
[E_FS0_REGNUM
+ fsM
]);
823 /* fmov fsM, (d32, SP) */
824 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x34)
830 Y
= (instr
[1] & 0x02) >> 1;
832 status
= target_read_memory (pc
+ 2, buf
, 5);
836 sM
= (buf
[0] & 0xf0) >> 4;
838 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
840 pv_area_store (stack
,
841 pv_add_constant (regs
[E_SP_REGNUM
], d32
),
842 4, regs
[E_FS0_REGNUM
+ fsM
]);
846 /* fmov fsM, (rN+) */
847 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x31)
849 int fsM
, sM
, Y
, rN
, rN_regnum
;
852 Y
= (instr
[1] & 0x02) >> 1;
854 status
= target_read_memory (pc
+ 2, buf
, 1);
858 sM
= (buf
[0] & 0xf0) >> 4;
862 rN_regnum
= translate_rreg (rN
);
864 pv_area_store (stack
, regs
[rN_regnum
], 4,
865 regs
[E_FS0_REGNUM
+ fsM
]);
866 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], 4);
870 /* fmov fsM, (rN+, imm8) */
871 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x31)
873 int fsM
, sM
, Y
, rN
, rN_regnum
;
877 Y
= (instr
[1] & 0x02) >> 1;
879 status
= target_read_memory (pc
+ 2, buf
, 2);
883 sM
= (buf
[0] & 0xf0) >> 4;
886 imm8
= extract_signed_integer (&buf
[1], 1, byte_order
);
888 rN_regnum
= translate_rreg (rN
);
890 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
891 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm8
);
895 /* fmov fsM, (rN+, imm24) */
896 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x31)
898 int fsM
, sM
, Y
, rN
, rN_regnum
;
902 Y
= (instr
[1] & 0x02) >> 1;
904 status
= target_read_memory (pc
+ 2, buf
, 4);
908 sM
= (buf
[0] & 0xf0) >> 4;
911 imm24
= extract_signed_integer (&buf
[1], 3, byte_order
);
913 rN_regnum
= translate_rreg (rN
);
915 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
916 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm24
);
920 /* fmov fsM, (rN+, imm32) */
921 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x31)
923 int fsM
, sM
, Y
, rN
, rN_regnum
;
927 Y
= (instr
[1] & 0x02) >> 1;
929 status
= target_read_memory (pc
+ 2, buf
, 5);
933 sM
= (buf
[0] & 0xf0) >> 4;
936 imm32
= extract_signed_integer (&buf
[1], 4, byte_order
);
938 rN_regnum
= translate_rreg (rN
);
940 pv_area_store (stack
, regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
941 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm32
);
946 else if ((instr
[0] & 0xf0) == 0x90)
948 int aN
= instr
[0] & 0x03;
951 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
953 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm8
);
957 else if ((instr
[0] & 0xfc) == 0x24)
959 int aN
= instr
[0] & 0x03;
963 status
= target_read_memory (pc
+ 1, buf
, 2);
967 imm16
= extract_signed_integer (buf
, 2, byte_order
);
968 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm16
);
972 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xdc))
974 int aN
= instr
[1] & 0x03;
978 status
= target_read_memory (pc
+ 2, buf
, 4);
982 imm32
= extract_signed_integer (buf
, 4, byte_order
);
983 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm32
);
987 else if ((instr
[0] & 0xf0) == 0x80)
989 int dN
= instr
[0] & 0x03;
992 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
994 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm8
);
998 else if ((instr
[0] & 0xfc) == 0x2c)
1000 int dN
= instr
[0] & 0x03;
1004 status
= target_read_memory (pc
+ 1, buf
, 2);
1008 imm16
= extract_signed_integer (buf
, 2, byte_order
);
1009 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm16
);
1013 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xcc))
1015 int dN
= instr
[1] & 0x03;
1019 status
= target_read_memory (pc
+ 2, buf
, 4);
1023 imm32
= extract_signed_integer (buf
, 4, byte_order
);
1024 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm32
);
1029 /* We've hit some instruction that we don't recognize. Hopefully,
1030 we have enough to do prologue analysis. */
1035 /* Is the frame size (offset, really) a known constant? */
1036 if (pv_is_register (regs
[E_SP_REGNUM
], E_SP_REGNUM
))
1037 result
->frame_size
= regs
[E_SP_REGNUM
].k
;
1039 /* Was the frame pointer initialized? */
1040 if (pv_is_register (regs
[E_A3_REGNUM
], E_SP_REGNUM
))
1042 result
->has_frame_ptr
= 1;
1043 result
->frame_ptr_offset
= regs
[E_A3_REGNUM
].k
;
1046 /* Record where all the registers were saved. */
1047 pv_area_scan (stack
, check_for_saved
, (void *) result
);
1049 result
->prologue_end
= after_last_frame_setup_insn
;
1051 do_cleanups (back_to
);
1054 /* Function: skip_prologue
1055 Return the address of the first inst past the prologue of the function. */
1058 mn10300_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1061 CORE_ADDR func_addr
, func_end
;
1062 struct mn10300_prologue p
;
1064 /* Try to find the extent of the function that contains PC. */
1065 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
1068 mn10300_analyze_prologue (gdbarch
, pc
, func_end
, &p
);
1069 return p
.prologue_end
;
1072 /* Wrapper for mn10300_analyze_prologue: find the function start;
1073 use the current frame PC as the limit, then
1074 invoke mn10300_analyze_prologue and return its result. */
1075 static struct mn10300_prologue
*
1076 mn10300_analyze_frame_prologue (struct frame_info
*this_frame
,
1077 void **this_prologue_cache
)
1079 if (!*this_prologue_cache
)
1081 CORE_ADDR func_start
, stop_addr
;
1083 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct mn10300_prologue
);
1085 func_start
= get_frame_func (this_frame
);
1086 stop_addr
= get_frame_pc (this_frame
);
1088 /* If we couldn't find any function containing the PC, then
1089 just initialize the prologue cache, but don't do anything. */
1091 stop_addr
= func_start
;
1093 mn10300_analyze_prologue (get_frame_arch (this_frame
),
1094 func_start
, stop_addr
,
1095 ((struct mn10300_prologue
*)
1096 *this_prologue_cache
));
1099 return (struct mn10300_prologue
*) *this_prologue_cache
;
1102 /* Given the next frame and a prologue cache, return this frame's
1105 mn10300_frame_base (struct frame_info
*this_frame
, void **this_prologue_cache
)
1107 struct mn10300_prologue
*p
1108 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1110 /* In functions that use alloca, the distance between the stack
1111 pointer and the frame base varies dynamically, so we can't use
1112 the SP plus static information like prologue analysis to find the
1113 frame base. However, such functions must have a frame pointer,
1114 to be able to restore the SP on exit. So whenever we do have a
1115 frame pointer, use that to find the base. */
1116 if (p
->has_frame_ptr
)
1118 CORE_ADDR fp
= get_frame_register_unsigned (this_frame
, E_A3_REGNUM
);
1119 return fp
- p
->frame_ptr_offset
;
1123 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1124 return sp
- p
->frame_size
;
1128 /* Here is a dummy implementation. */
1129 static struct frame_id
1130 mn10300_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1132 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1133 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, E_PC_REGNUM
);
1134 return frame_id_build (sp
, pc
);
1138 mn10300_frame_this_id (struct frame_info
*this_frame
,
1139 void **this_prologue_cache
,
1140 struct frame_id
*this_id
)
1142 *this_id
= frame_id_build (mn10300_frame_base (this_frame
,
1143 this_prologue_cache
),
1144 get_frame_func (this_frame
));
1148 static struct value
*
1149 mn10300_frame_prev_register (struct frame_info
*this_frame
,
1150 void **this_prologue_cache
, int regnum
)
1152 struct mn10300_prologue
*p
1153 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1154 CORE_ADDR frame_base
= mn10300_frame_base (this_frame
, this_prologue_cache
);
1156 if (regnum
== E_SP_REGNUM
)
1157 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1159 /* If prologue analysis says we saved this register somewhere,
1160 return a description of the stack slot holding it. */
1161 if (p
->reg_offset
[regnum
] != 1)
1162 return frame_unwind_got_memory (this_frame
, regnum
,
1163 frame_base
+ p
->reg_offset
[regnum
]);
1165 /* Otherwise, presume we haven't changed the value of this
1166 register, and get it from the next frame. */
1167 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1170 static const struct frame_unwind mn10300_frame_unwind
= {
1172 default_frame_unwind_stop_reason
,
1173 mn10300_frame_this_id
,
1174 mn10300_frame_prev_register
,
1176 default_frame_sniffer
1180 mn10300_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1184 pc
= frame_unwind_register_unsigned (this_frame
, E_PC_REGNUM
);
1189 mn10300_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1193 sp
= frame_unwind_register_unsigned (this_frame
, E_SP_REGNUM
);
1198 mn10300_frame_unwind_init (struct gdbarch
*gdbarch
)
1200 dwarf2_append_unwinders (gdbarch
);
1201 frame_unwind_append_unwinder (gdbarch
, &mn10300_frame_unwind
);
1202 set_gdbarch_dummy_id (gdbarch
, mn10300_dummy_id
);
1203 set_gdbarch_unwind_pc (gdbarch
, mn10300_unwind_pc
);
1204 set_gdbarch_unwind_sp (gdbarch
, mn10300_unwind_sp
);
1207 /* Function: push_dummy_call
1209 * Set up machine state for a target call, including
1210 * function arguments, stack, return address, etc.
1215 mn10300_push_dummy_call (struct gdbarch
*gdbarch
,
1216 struct value
*target_func
,
1217 struct regcache
*regcache
,
1219 int nargs
, struct value
**args
,
1222 CORE_ADDR struct_addr
)
1224 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1225 const int push_size
= register_size (gdbarch
, E_PC_REGNUM
);
1228 int stack_offset
= 0;
1230 const gdb_byte
*val
;
1231 gdb_byte valbuf
[MN10300_MAX_REGISTER_SIZE
];
1233 /* This should be a nop, but align the stack just in case something
1234 went wrong. Stacks are four byte aligned on the mn10300. */
1237 /* Now make space on the stack for the args.
1239 XXX This doesn't appear to handle pass-by-invisible reference
1241 regs_used
= struct_return
? 1 : 0;
1242 for (len
= 0, argnum
= 0; argnum
< nargs
; argnum
++)
1244 arg_len
= (TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3;
1245 while (regs_used
< 2 && arg_len
> 0)
1248 arg_len
-= push_size
;
1253 /* Allocate stack space. */
1259 regcache_cooked_write_unsigned (regcache
, E_D0_REGNUM
, struct_addr
);
1264 /* Push all arguments onto the stack. */
1265 for (argnum
= 0; argnum
< nargs
; argnum
++)
1267 /* FIXME what about structs? Unions? */
1268 if (TYPE_CODE (value_type (*args
)) == TYPE_CODE_STRUCT
1269 && TYPE_LENGTH (value_type (*args
)) > 8)
1271 /* Change to pointer-to-type. */
1272 arg_len
= push_size
;
1273 gdb_assert (push_size
<= MN10300_MAX_REGISTER_SIZE
);
1274 store_unsigned_integer (valbuf
, push_size
, byte_order
,
1275 value_address (*args
));
1280 arg_len
= TYPE_LENGTH (value_type (*args
));
1281 val
= value_contents (*args
);
1284 while (regs_used
< 2 && arg_len
> 0)
1286 regcache_cooked_write_unsigned (regcache
, regs_used
,
1287 extract_unsigned_integer (val
, push_size
, byte_order
));
1289 arg_len
-= push_size
;
1295 write_memory (sp
+ stack_offset
, val
, push_size
);
1296 arg_len
-= push_size
;
1298 stack_offset
+= push_size
;
1304 /* Make space for the flushback area. */
1307 /* Push the return address that contains the magic breakpoint. */
1309 write_memory_unsigned_integer (sp
, push_size
, byte_order
, bp_addr
);
1311 /* The CPU also writes the return address always into the
1312 MDR register on "call". */
1313 regcache_cooked_write_unsigned (regcache
, E_MDR_REGNUM
, bp_addr
);
1316 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
, sp
);
1318 /* On the mn10300, it's possible to move some of the stack adjustment
1319 and saving of the caller-save registers out of the prologue and
1320 into the call sites. (When using gcc, this optimization can
1321 occur when using the -mrelax switch.) If this occurs, the dwarf2
1322 info will reflect this fact. We can test to see if this is the
1323 case by creating a new frame using the current stack pointer and
1324 the address of the function that we're about to call. We then
1325 unwind SP and see if it's different than the SP of our newly
1326 created frame. If the SP values are the same, the caller is not
1327 expected to allocate any additional stack. On the other hand, if
1328 the SP values are different, the difference determines the
1329 additional stack that must be allocated.
1331 Note that we don't update the return value though because that's
1332 the value of the stack just after pushing the arguments, but prior
1333 to performing the call. This value is needed in order to
1334 construct the frame ID of the dummy call. */
1336 CORE_ADDR func_addr
= find_function_addr (target_func
, NULL
);
1337 CORE_ADDR unwound_sp
1338 = mn10300_unwind_sp (gdbarch
, create_new_frame (sp
, func_addr
));
1339 if (sp
!= unwound_sp
)
1340 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
,
1341 sp
- (unwound_sp
- sp
));
1347 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1348 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1349 register number. Why don't Dwarf2 and GDB use the same numbering?
1350 Who knows? But since people have object files lying around with
1351 the existing Dwarf2 numbering, and other people have written stubs
1352 to work with the existing GDB, neither of them can change. So we
1353 just have to cope. */
1355 mn10300_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int dwarf2
)
1357 /* This table is supposed to be shaped like the gdbarch_register_name
1358 initializer in gcc/config/mn10300/mn10300.h. Registers which
1359 appear in GCC's numbering, but have no counterpart in GDB's
1360 world, are marked with a -1. */
1361 static int dwarf2_to_gdb
[] = {
1362 E_D0_REGNUM
, E_D1_REGNUM
, E_D2_REGNUM
, E_D3_REGNUM
,
1363 E_A0_REGNUM
, E_A1_REGNUM
, E_A2_REGNUM
, E_A3_REGNUM
,
1366 E_E0_REGNUM
, E_E1_REGNUM
, E_E2_REGNUM
, E_E3_REGNUM
,
1367 E_E4_REGNUM
, E_E5_REGNUM
, E_E6_REGNUM
, E_E7_REGNUM
,
1369 E_FS0_REGNUM
+ 0, E_FS0_REGNUM
+ 1, E_FS0_REGNUM
+ 2, E_FS0_REGNUM
+ 3,
1370 E_FS0_REGNUM
+ 4, E_FS0_REGNUM
+ 5, E_FS0_REGNUM
+ 6, E_FS0_REGNUM
+ 7,
1372 E_FS0_REGNUM
+ 8, E_FS0_REGNUM
+ 9, E_FS0_REGNUM
+ 10, E_FS0_REGNUM
+ 11,
1373 E_FS0_REGNUM
+ 12, E_FS0_REGNUM
+ 13, E_FS0_REGNUM
+ 14, E_FS0_REGNUM
+ 15,
1375 E_FS0_REGNUM
+ 16, E_FS0_REGNUM
+ 17, E_FS0_REGNUM
+ 18, E_FS0_REGNUM
+ 19,
1376 E_FS0_REGNUM
+ 20, E_FS0_REGNUM
+ 21, E_FS0_REGNUM
+ 22, E_FS0_REGNUM
+ 23,
1378 E_FS0_REGNUM
+ 24, E_FS0_REGNUM
+ 25, E_FS0_REGNUM
+ 26, E_FS0_REGNUM
+ 27,
1379 E_FS0_REGNUM
+ 28, E_FS0_REGNUM
+ 29, E_FS0_REGNUM
+ 30, E_FS0_REGNUM
+ 31,
1381 E_MDR_REGNUM
, E_PSW_REGNUM
, E_PC_REGNUM
1385 || dwarf2
>= ARRAY_SIZE (dwarf2_to_gdb
))
1388 return dwarf2_to_gdb
[dwarf2
];
1391 static struct gdbarch
*
1392 mn10300_gdbarch_init (struct gdbarch_info info
,
1393 struct gdbarch_list
*arches
)
1395 struct gdbarch
*gdbarch
;
1396 struct gdbarch_tdep
*tdep
;
1399 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1401 return arches
->gdbarch
;
1403 tdep
= XCNEW (struct gdbarch_tdep
);
1404 gdbarch
= gdbarch_alloc (&info
, tdep
);
1406 switch (info
.bfd_arch_info
->mach
)
1409 case bfd_mach_mn10300
:
1410 set_gdbarch_register_name (gdbarch
, mn10300_generic_register_name
);
1411 tdep
->am33_mode
= 0;
1415 set_gdbarch_register_name (gdbarch
, am33_register_name
);
1416 tdep
->am33_mode
= 1;
1419 case bfd_mach_am33_2
:
1420 set_gdbarch_register_name (gdbarch
, am33_2_register_name
);
1421 tdep
->am33_mode
= 2;
1423 set_gdbarch_fp0_regnum (gdbarch
, 32);
1426 internal_error (__FILE__
, __LINE__
,
1427 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1431 /* By default, chars are unsigned. */
1432 set_gdbarch_char_signed (gdbarch
, 0);
1435 set_gdbarch_num_regs (gdbarch
, num_regs
);
1436 set_gdbarch_register_type (gdbarch
, mn10300_register_type
);
1437 set_gdbarch_skip_prologue (gdbarch
, mn10300_skip_prologue
);
1438 set_gdbarch_read_pc (gdbarch
, mn10300_read_pc
);
1439 set_gdbarch_write_pc (gdbarch
, mn10300_write_pc
);
1440 set_gdbarch_pc_regnum (gdbarch
, E_PC_REGNUM
);
1441 set_gdbarch_sp_regnum (gdbarch
, E_SP_REGNUM
);
1442 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, mn10300_dwarf2_reg_to_regnum
);
1444 /* Stack unwinding. */
1445 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1447 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1448 mn10300_breakpoint::kind_from_pc
);
1449 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1450 mn10300_breakpoint::bp_from_kind
);
1451 /* decr_pc_after_break? */
1454 set_gdbarch_return_value (gdbarch
, mn10300_return_value
);
1456 /* Stage 3 -- get target calls working. */
1457 set_gdbarch_push_dummy_call (gdbarch
, mn10300_push_dummy_call
);
1458 /* set_gdbarch_return_value (store, extract) */
1461 mn10300_frame_unwind_init (gdbarch
);
1463 /* Hook in ABI-specific overrides, if they have been registered. */
1464 gdbarch_init_osabi (info
, gdbarch
);
1469 /* Dump out the mn10300 specific architecture information. */
1472 mn10300_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1474 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1475 fprintf_unfiltered (file
, "mn10300_dump_tdep: am33_mode = %d\n",
1479 /* Provide a prototype to silence -Wmissing-prototypes. */
1480 extern initialize_file_ftype _initialize_mn10300_tdep
;
1483 _initialize_mn10300_tdep (void)
1485 gdbarch_register (bfd_arch_mn10300
, mn10300_gdbarch_init
, mn10300_dump_tdep
);