1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2007 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "arch-utils.h"
26 #include "gdb_string.h"
27 #include "gdb_assert.h"
28 #include "gdbcore.h" /* for write_memory_unsigned_integer */
32 #include "frame-unwind.h"
33 #include "frame-base.h"
34 #include "trad-frame.h"
36 #include "dwarf2-frame.h"
39 #include "mn10300-tdep.h"
42 extern struct trad_frame_cache
*mn10300_frame_unwind_cache (struct frame_info
*,
45 /* Compute the alignment required by a type. */
48 mn10300_type_align (struct type
*type
)
52 switch (TYPE_CODE (type
))
63 return TYPE_LENGTH (type
);
65 case TYPE_CODE_COMPLEX
:
66 return TYPE_LENGTH (type
) / 2;
68 case TYPE_CODE_STRUCT
:
70 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
72 int falign
= mn10300_type_align (TYPE_FIELD_TYPE (type
, i
));
73 while (align
< falign
)
79 /* HACK! Structures containing arrays, even small ones, are not
80 elligible for returning in registers. */
83 case TYPE_CODE_TYPEDEF
:
84 return mn10300_type_align (check_typedef (type
));
87 internal_error (__FILE__
, __LINE__
, _("bad switch"));
91 /* Should call_function allocate stack space for a struct return? */
93 mn10300_use_struct_convention (struct type
*type
)
95 /* Structures bigger than a pair of words can't be returned in
97 if (TYPE_LENGTH (type
) > 8)
100 switch (TYPE_CODE (type
))
102 case TYPE_CODE_STRUCT
:
103 case TYPE_CODE_UNION
:
104 /* Structures with a single field are handled as the field
106 if (TYPE_NFIELDS (type
) == 1)
107 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type
, 0));
109 /* Structures with word or double-word size are passed in memory, as
110 long as they require at least word alignment. */
111 if (mn10300_type_align (type
) >= 4)
116 /* Arrays are addressable, so they're never returned in
117 registers. This condition can only hold when the array is
118 the only field of a struct or union. */
119 case TYPE_CODE_ARRAY
:
122 case TYPE_CODE_TYPEDEF
:
123 return mn10300_use_struct_convention (check_typedef (type
));
131 mn10300_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
132 struct regcache
*regcache
, const void *valbuf
)
134 int len
= TYPE_LENGTH (type
);
137 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
142 regsz
= register_size (gdbarch
, reg
);
145 regcache_raw_write_part (regcache
, reg
, 0, len
, valbuf
);
146 else if (len
<= 2 * regsz
)
148 regcache_raw_write (regcache
, reg
, valbuf
);
149 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
150 regcache_raw_write_part (regcache
, reg
+1, 0,
151 len
- regsz
, (char *) valbuf
+ regsz
);
154 internal_error (__FILE__
, __LINE__
,
155 _("Cannot store return value %d bytes long."), len
);
159 mn10300_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
160 struct regcache
*regcache
, void *valbuf
)
162 char buf
[MAX_REGISTER_SIZE
];
163 int len
= TYPE_LENGTH (type
);
166 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
171 regsz
= register_size (gdbarch
, reg
);
174 regcache_raw_read (regcache
, reg
, buf
);
175 memcpy (valbuf
, buf
, len
);
177 else if (len
<= 2 * regsz
)
179 regcache_raw_read (regcache
, reg
, buf
);
180 memcpy (valbuf
, buf
, regsz
);
181 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
182 regcache_raw_read (regcache
, reg
+ 1, buf
);
183 memcpy ((char *) valbuf
+ regsz
, buf
, len
- regsz
);
186 internal_error (__FILE__
, __LINE__
,
187 _("Cannot extract return value %d bytes long."), len
);
190 /* Determine, for architecture GDBARCH, how a return value of TYPE
191 should be returned. If it is supposed to be returned in registers,
192 and READBUF is non-zero, read the appropriate value from REGCACHE,
193 and copy it into READBUF. If WRITEBUF is non-zero, write the value
194 from WRITEBUF into REGCACHE. */
196 static enum return_value_convention
197 mn10300_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
198 struct regcache
*regcache
, gdb_byte
*readbuf
,
199 const gdb_byte
*writebuf
)
201 if (mn10300_use_struct_convention (type
))
202 return RETURN_VALUE_STRUCT_CONVENTION
;
205 mn10300_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
207 mn10300_store_return_value (gdbarch
, type
, regcache
, writebuf
);
209 return RETURN_VALUE_REGISTER_CONVENTION
;
213 register_name (int reg
, char **regs
, long sizeof_regs
)
215 if (reg
< 0 || reg
>= sizeof_regs
/ sizeof (regs
[0]))
222 mn10300_generic_register_name (int reg
)
224 static char *regs
[] =
225 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
226 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
227 "", "", "", "", "", "", "", "",
228 "", "", "", "", "", "", "", "fp"
230 return register_name (reg
, regs
, sizeof regs
);
235 am33_register_name (int reg
)
237 static char *regs
[] =
238 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
239 "sp", "pc", "mdr", "psw", "lir", "lar", "",
240 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
241 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
243 return register_name (reg
, regs
, sizeof regs
);
247 am33_2_register_name (int reg
)
249 static char *regs
[] =
251 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
252 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
253 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
254 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
255 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
256 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
257 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
258 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
260 return register_name (reg
, regs
, sizeof regs
);
264 mn10300_register_type (struct gdbarch
*gdbarch
, int reg
)
266 return builtin_type_int
;
270 mn10300_read_pc (struct regcache
*regcache
)
273 regcache_cooked_read_unsigned (regcache
, E_PC_REGNUM
, &val
);
278 mn10300_write_pc (struct regcache
*regcache
, CORE_ADDR val
)
280 regcache_cooked_write_unsigned (regcache
, E_PC_REGNUM
, val
);
283 /* The breakpoint instruction must be the same size as the smallest
284 instruction in the instruction set.
286 The Matsushita mn10x00 processors have single byte instructions
287 so we need a single byte breakpoint. Matsushita hasn't defined
288 one, so we defined it ourselves. */
290 const static unsigned char *
291 mn10300_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
293 static char breakpoint
[] = {0xff};
298 /* Set offsets of saved registers.
299 This is a helper function for mn10300_analyze_prologue. */
302 set_reg_offsets (struct frame_info
*fi
,
306 int stack_extra_size
,
309 struct trad_frame_cache
*cache
;
313 if (fi
== NULL
|| this_cache
== NULL
)
316 cache
= mn10300_frame_unwind_cache (fi
, this_cache
);
322 base
= frame_unwind_register_unsigned (fi
, E_A3_REGNUM
);
326 base
= frame_unwind_register_unsigned (fi
, E_SP_REGNUM
) + stack_extra_size
;
329 trad_frame_set_this_base (cache
, base
);
333 /* If bit N is set in fpregmask, fsN is saved on the stack.
334 The floating point registers are saved in ascending order.
335 For example: fs16 <- Frame Pointer
336 fs17 Frame Pointer + 4 */
340 for (i
= 0; i
< 32; i
++)
342 if (fpregmask
& (1 << i
))
344 trad_frame_set_reg_addr (cache
, E_FS0_REGNUM
+ i
, base
+ offset
);
352 if (movm_args
& movm_other_bit
)
354 /* The `other' bit leaves a blank area of four bytes at the
355 beginning of its block of saved registers, making it 32 bytes
357 trad_frame_set_reg_addr (cache
, E_LAR_REGNUM
, base
+ offset
+ 4);
358 trad_frame_set_reg_addr (cache
, E_LIR_REGNUM
, base
+ offset
+ 8);
359 trad_frame_set_reg_addr (cache
, E_MDR_REGNUM
, base
+ offset
+ 12);
360 trad_frame_set_reg_addr (cache
, E_A0_REGNUM
+ 1, base
+ offset
+ 16);
361 trad_frame_set_reg_addr (cache
, E_A0_REGNUM
, base
+ offset
+ 20);
362 trad_frame_set_reg_addr (cache
, E_D0_REGNUM
+ 1, base
+ offset
+ 24);
363 trad_frame_set_reg_addr (cache
, E_D0_REGNUM
, base
+ offset
+ 28);
367 if (movm_args
& movm_a3_bit
)
369 trad_frame_set_reg_addr (cache
, E_A3_REGNUM
, base
+ offset
);
372 if (movm_args
& movm_a2_bit
)
374 trad_frame_set_reg_addr (cache
, E_A2_REGNUM
, base
+ offset
);
377 if (movm_args
& movm_d3_bit
)
379 trad_frame_set_reg_addr (cache
, E_D3_REGNUM
, base
+ offset
);
382 if (movm_args
& movm_d2_bit
)
384 trad_frame_set_reg_addr (cache
, E_D2_REGNUM
, base
+ offset
);
389 if (movm_args
& movm_exother_bit
)
391 trad_frame_set_reg_addr (cache
, E_MCVF_REGNUM
, base
+ offset
);
392 trad_frame_set_reg_addr (cache
, E_MCRL_REGNUM
, base
+ offset
+ 4);
393 trad_frame_set_reg_addr (cache
, E_MCRH_REGNUM
, base
+ offset
+ 8);
394 trad_frame_set_reg_addr (cache
, E_MDRQ_REGNUM
, base
+ offset
+ 12);
395 trad_frame_set_reg_addr (cache
, E_E1_REGNUM
, base
+ offset
+ 16);
396 trad_frame_set_reg_addr (cache
, E_E0_REGNUM
, base
+ offset
+ 20);
399 if (movm_args
& movm_exreg1_bit
)
401 trad_frame_set_reg_addr (cache
, E_E7_REGNUM
, base
+ offset
);
402 trad_frame_set_reg_addr (cache
, E_E6_REGNUM
, base
+ offset
+ 4);
403 trad_frame_set_reg_addr (cache
, E_E5_REGNUM
, base
+ offset
+ 8);
404 trad_frame_set_reg_addr (cache
, E_E4_REGNUM
, base
+ offset
+ 12);
407 if (movm_args
& movm_exreg0_bit
)
409 trad_frame_set_reg_addr (cache
, E_E3_REGNUM
, base
+ offset
);
410 trad_frame_set_reg_addr (cache
, E_E2_REGNUM
, base
+ offset
+ 4);
414 /* The last (or first) thing on the stack will be the PC. */
415 trad_frame_set_reg_addr (cache
, E_PC_REGNUM
, base
+ offset
);
416 /* Save the SP in the 'traditional' way.
417 This will be the same location where the PC is saved. */
418 trad_frame_set_reg_value (cache
, E_SP_REGNUM
, base
+ offset
);
421 /* The main purpose of this file is dealing with prologues to extract
422 information about stack frames and saved registers.
424 In gcc/config/mn13000/mn10300.c, the expand_prologue prologue
425 function is pretty readable, and has a nice explanation of how the
426 prologue is generated. The prologues generated by that code will
427 have the following form (NOTE: the current code doesn't handle all
430 + If this is an old-style varargs function, then its arguments
431 need to be flushed back to the stack:
436 + If we use any of the callee-saved registers, save them now.
438 movm [some callee-saved registers],(sp)
440 + If we have any floating-point registers to save:
442 - Decrement the stack pointer to reserve space for the registers.
443 If the function doesn't need a frame pointer, we may combine
444 this with the adjustment that reserves space for the frame.
448 - Save the floating-point registers. We have two possible
451 . Save them at fixed offset from the SP:
453 fmov fsN,(OFFSETN,sp)
454 fmov fsM,(OFFSETM,sp)
457 Note that, if OFFSETN happens to be zero, you'll get the
458 different opcode: fmov fsN,(sp)
460 . Or, set a0 to the start of the save area, and then use
461 post-increment addressing to save the FP registers.
469 + If the function needs a frame pointer, we set it here.
473 + Now we reserve space for the stack frame proper. This could be
474 merged into the `add -SIZE, sp' instruction for FP saves up
475 above, unless we needed to set the frame pointer in the previous
476 step, or the frame is so large that allocating the whole thing at
477 once would put the FP register save slots out of reach of the
478 addressing mode (128 bytes).
482 One day we might keep the stack pointer constant, that won't
483 change the code for prologues, but it will make the frame
484 pointerless case much more common. */
486 /* Analyze the prologue to determine where registers are saved,
487 the end of the prologue, etc etc. Return the end of the prologue
490 We store into FI (if non-null) several tidbits of information:
492 * stack_size -- size of this stack frame. Note that if we stop in
493 certain parts of the prologue/epilogue we may claim the size of the
494 current frame is zero. This happens when the current frame has
495 not been allocated yet or has already been deallocated.
497 * fsr -- Addresses of registers saved in the stack by this frame.
499 * status -- A (relatively) generic status indicator. It's a bitmask
500 with the following bits:
502 MY_FRAME_IN_SP: The base of the current frame is actually in
503 the stack pointer. This can happen for frame pointerless
504 functions, or cases where we're stopped in the prologue/epilogue
505 itself. For these cases mn10300_analyze_prologue will need up
506 update fi->frame before returning or analyzing the register
509 MY_FRAME_IN_FP: The base of the current frame is in the
510 frame pointer register ($a3).
512 NO_MORE_FRAMES: Set this if the current frame is "start" or
513 if the first instruction looks like mov <imm>,sp. This tells
514 frame chain to not bother trying to unwind past this frame. */
517 mn10300_analyze_prologue (struct frame_info
*fi
,
521 CORE_ADDR func_addr
, func_end
, addr
, stop
;
522 long stack_extra_size
= 0;
524 unsigned char buf
[4];
531 /* Use the PC in the frame if it's provided to look up the
532 start of this function.
534 Note: kevinb/2003-07-16: We used to do the following here:
535 pc = (fi ? get_frame_pc (fi) : pc);
536 But this is (now) badly broken when called from analyze_dummy_frame().
540 pc
= (pc
? pc
: get_frame_pc (fi
));
543 /* Find the start of this function. */
544 status
= find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
);
546 /* Do nothing if we couldn't find the start of this function
548 MVS: comment went on to say "or if we're stopped at the first
549 instruction in the prologue" -- but code doesn't reflect that,
550 and I don't want to do that anyway. */
554 goto finish_prologue
;
557 /* If we're in start, then give up. */
558 if (strcmp (name
, "start") == 0)
561 goto finish_prologue
;
564 /* Figure out where to stop scanning. */
565 stop
= fi
? pc
: func_end
;
567 /* Don't walk off the end of the function. */
568 stop
= stop
> func_end
? func_end
: stop
;
570 /* Start scanning on the first instruction of this function. */
573 /* Suck in two bytes. */
574 if (addr
+ 2 > stop
|| !safe_frame_unwind_memory (fi
, addr
, buf
, 2))
575 goto finish_prologue
;
577 /* First see if this insn sets the stack pointer from a register; if
578 so, it's probably the initialization of the stack pointer in _start,
579 so mark this as the bottom-most frame. */
580 if (buf
[0] == 0xf2 && (buf
[1] & 0xf3) == 0xf0)
582 goto finish_prologue
;
585 /* Now look for movm [regs],sp, which saves the callee saved registers.
587 At this time we don't know if fi->frame is valid, so we only note
588 that we encountered a movm instruction. Later, we'll set the entries
589 in fsr.regs as needed. */
592 /* Extract the register list for the movm instruction. */
597 /* Quit now if we're beyond the stop point. */
599 goto finish_prologue
;
601 /* Get the next two bytes so the prologue scan can continue. */
602 if (!safe_frame_unwind_memory (fi
, addr
, buf
, 2))
603 goto finish_prologue
;
608 /* Determine if any floating point registers are to be saved.
609 Look for one of the following three prologue formats:
611 [movm [regs],(sp)] [movm [regs],(sp)] [movm [regs],(sp)]
613 add -SIZE,sp add -SIZE,sp add -SIZE,sp
614 fmov fs#,(sp) mov sp,a0/a1 mov sp,a0/a1
615 fmov fs#,(#,sp) fmov fs#,(a0/a1+) add SIZE2,a0/a1
616 ... ... fmov fs#,(a0/a1+)
618 fmov fs#,(#,sp) fmov fs#,(a0/a1+) fmov fs#,(a0/a1+)
620 [mov sp,a3] [mov sp,a3]
621 [add -SIZE2,sp] [add -SIZE2,sp] */
623 /* Remember the address at which we started in the event that we
624 don't ultimately find an fmov instruction. Once we're certain
625 that we matched one of the above patterns, we'll set
626 ``restore_addr'' to the appropriate value. Note: At one time
627 in the past, this code attempted to not adjust ``addr'' until
628 there was a fair degree of certainty that the pattern would be
629 matched. However, that code did not wait until an fmov instruction
630 was actually encountered. As a consequence, ``addr'' would
631 sometimes be advanced even when no fmov instructions were found. */
632 CORE_ADDR restore_addr
= addr
;
634 /* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX)
635 or add imm16,sp (0xfafeXXXX)
636 or add imm32,sp (0xfcfeXXXXXXXX)) */
638 if (buf
[0] == 0xf8 && buf
[1] == 0xfe)
640 else if (buf
[0] == 0xfa && buf
[1] == 0xfe)
642 else if (buf
[0] == 0xfc && buf
[1] == 0xfe)
646 /* An "add -#,sp" instruction has been found. "addr + 2 + imm_size"
647 is the address of the next instruction. Don't modify "addr" until
648 the next "floating point prologue" instruction is found. If this
649 is not a prologue that saves floating point registers we need to
650 be able to back out of this bit of code and continue with the
651 prologue analysis. */
652 if (addr
+ 2 + imm_size
< stop
)
654 if (!safe_frame_unwind_memory (fi
, addr
+ 2 + imm_size
, buf
, 3))
655 goto finish_prologue
;
656 if ((buf
[0] & 0xfc) == 0x3c)
658 /* Occasionally, especially with C++ code, the "fmov"
659 instructions will be preceded by "mov sp,aN"
660 (aN => a0, a1, a2, or a3).
662 This is a one byte instruction: mov sp,aN = 0011 11XX
663 where XX is the register number.
665 Skip this instruction by incrementing addr. The "fmov"
666 instructions will have the form "fmov fs#,(aN+)" in this
667 case, but that will not necessitate a change in the
668 "fmov" parsing logic below. */
672 if ((buf
[1] & 0xfc) == 0x20)
674 /* Occasionally, especially with C++ code compiled with
675 the -fomit-frame-pointer or -O3 options, the
676 "mov sp,aN" instruction will be followed by an
677 "add #,aN" instruction. This indicates the
678 "stack_size", the size of the portion of the stack
679 containing the arguments. This instruction format is:
680 add #,aN = 0010 00XX YYYY YYYY
681 where XX is the register number
682 YYYY YYYY is the constant.
683 Note the size of the stack (as a negative number) in
684 the frame info structure. */
686 stack_extra_size
+= -buf
[2];
692 if ((buf
[0] & 0xfc) == 0x3c ||
693 buf
[0] == 0xf9 || buf
[0] == 0xfb)
695 /* An "fmov" instruction has been found indicating that this
696 prologue saves floating point registers (or, as described
697 above, a "mov sp,aN" and possible "add #,aN" have been
698 found and we will assume an "fmov" follows). Process the
699 consecutive "fmov" instructions. */
700 for (addr
+= 2 + imm_size
;;addr
+= imm_size
)
704 /* Read the "fmov" instruction. */
706 !safe_frame_unwind_memory (fi
, addr
, buf
, 4))
707 goto finish_prologue
;
709 if (buf
[0] != 0xf9 && buf
[0] != 0xfb)
712 /* An fmov instruction has just been seen. We can
713 now really commit to the pattern match. Set the
714 address to restore at the end of this speculative
715 bit of code to the actually address that we've
716 been incrementing (or not) throughout the
720 /* Get the floating point register number from the
721 2nd and 3rd bytes of the "fmov" instruction:
722 Machine Code: 0000 00X0 YYYY 0000 =>
724 regnum
= (buf
[1] & 0x02) << 3;
725 regnum
|= ((buf
[2] & 0xf0) >> 4) & 0x0f;
727 /* Add this register number to the bit mask of floating
728 point registers that have been saved. */
729 fpregmask
|= 1 << regnum
;
731 /* Determine the length of this "fmov" instruction.
732 fmov fs#,(sp) => 3 byte instruction
733 fmov fs#,(#,sp) => 4 byte instruction */
734 imm_size
= (buf
[0] == 0xf9) ? 3 : 4;
739 /* No "fmov" was found. Reread the two bytes at the original
740 "addr" to reset the state. */
742 if (!safe_frame_unwind_memory (fi
, addr
, buf
, 2))
743 goto finish_prologue
;
746 /* else the prologue consists entirely of an "add -SIZE,sp"
747 instruction. Handle this below. */
749 /* else no "add -SIZE,sp" was found indicating no floating point
750 registers are saved in this prologue. */
752 /* In the pattern match code contained within this block, `restore_addr'
753 is set to the starting address at the very beginning and then
754 iteratively to the next address to start scanning at once the
755 pattern match has succeeded. Thus `restore_addr' will contain
756 the address to rewind to if the pattern match failed. If the
757 match succeeded, `restore_addr' and `addr' will already have the
762 /* Now see if we set up a frame pointer via "mov sp,a3" */
767 /* The frame pointer is now valid. */
773 /* Quit now if we're beyond the stop point. */
775 goto finish_prologue
;
777 /* Get two more bytes so scanning can continue. */
778 if (!safe_frame_unwind_memory (fi
, addr
, buf
, 2))
779 goto finish_prologue
;
782 /* Next we should allocate the local frame. No more prologue insns
783 are found after allocating the local frame.
785 Search for add imm8,sp (0xf8feXX)
786 or add imm16,sp (0xfafeXXXX)
787 or add imm32,sp (0xfcfeXXXXXXXX).
789 If none of the above was found, then this prologue has no
793 if (buf
[0] == 0xf8 && buf
[1] == 0xfe)
795 else if (buf
[0] == 0xfa && buf
[1] == 0xfe)
797 else if (buf
[0] == 0xfc && buf
[1] == 0xfe)
802 /* Suck in imm_size more bytes, they'll hold the size of the
804 if (!safe_frame_unwind_memory (fi
, addr
+ 2, buf
, imm_size
))
805 goto finish_prologue
;
807 /* Note the size of the stack. */
808 stack_extra_size
-= extract_signed_integer (buf
, imm_size
);
810 /* We just consumed 2 + imm_size bytes. */
811 addr
+= 2 + imm_size
;
813 /* No more prologue insns follow, so begin preparation to return. */
814 goto finish_prologue
;
816 /* Do the essentials and get out of here. */
818 /* Note if/where callee saved registers were saved. */
820 set_reg_offsets (fi
, this_cache
, movm_args
, fpregmask
, stack_extra_size
, frame_in_fp
);
824 /* Function: skip_prologue
825 Return the address of the first inst past the prologue of the function. */
828 mn10300_skip_prologue (CORE_ADDR pc
)
830 return mn10300_analyze_prologue (NULL
, NULL
, pc
);
833 /* Simple frame_unwind_cache.
834 This finds the "extra info" for the frame. */
835 struct trad_frame_cache
*
836 mn10300_frame_unwind_cache (struct frame_info
*next_frame
,
837 void **this_prologue_cache
)
839 struct trad_frame_cache
*cache
;
840 CORE_ADDR pc
, start
, end
;
842 if (*this_prologue_cache
)
843 return (*this_prologue_cache
);
845 cache
= trad_frame_cache_zalloc (next_frame
);
846 pc
= gdbarch_unwind_pc (current_gdbarch
, next_frame
);
847 mn10300_analyze_prologue (next_frame
, (void **) &cache
, pc
);
848 if (find_pc_partial_function (pc
, NULL
, &start
, &end
))
849 trad_frame_set_id (cache
,
850 frame_id_build (trad_frame_get_this_base (cache
),
854 start
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
855 trad_frame_set_id (cache
,
856 frame_id_build (trad_frame_get_this_base (cache
),
860 (*this_prologue_cache
) = cache
;
864 /* Here is a dummy implementation. */
865 static struct frame_id
866 mn10300_unwind_dummy_id (struct gdbarch
*gdbarch
,
867 struct frame_info
*next_frame
)
869 return frame_id_build (frame_sp_unwind (next_frame
),
870 frame_pc_unwind (next_frame
));
873 /* Trad frame implementation. */
875 mn10300_frame_this_id (struct frame_info
*next_frame
,
876 void **this_prologue_cache
,
877 struct frame_id
*this_id
)
879 struct trad_frame_cache
*cache
=
880 mn10300_frame_unwind_cache (next_frame
, this_prologue_cache
);
882 trad_frame_get_id (cache
, this_id
);
886 mn10300_frame_prev_register (struct frame_info
*next_frame
,
887 void **this_prologue_cache
,
888 int regnum
, int *optimizedp
,
889 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
890 int *realnump
, gdb_byte
*bufferp
)
892 struct trad_frame_cache
*cache
=
893 mn10300_frame_unwind_cache (next_frame
, this_prologue_cache
);
895 trad_frame_get_register (cache
, next_frame
, regnum
, optimizedp
,
896 lvalp
, addrp
, realnump
, bufferp
);
898 trad_frame_get_prev_register (next_frame, cache->prev_regs, regnum,
899 optimizedp, lvalp, addrp, realnump, bufferp);
903 static const struct frame_unwind mn10300_frame_unwind
= {
905 mn10300_frame_this_id
,
906 mn10300_frame_prev_register
910 mn10300_frame_base_address (struct frame_info
*next_frame
,
911 void **this_prologue_cache
)
913 struct trad_frame_cache
*cache
=
914 mn10300_frame_unwind_cache (next_frame
, this_prologue_cache
);
916 return trad_frame_get_this_base (cache
);
919 static const struct frame_unwind
*
920 mn10300_frame_sniffer (struct frame_info
*next_frame
)
922 return &mn10300_frame_unwind
;
925 static const struct frame_base mn10300_frame_base
= {
926 &mn10300_frame_unwind
,
927 mn10300_frame_base_address
,
928 mn10300_frame_base_address
,
929 mn10300_frame_base_address
933 mn10300_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
937 frame_unwind_unsigned_register (next_frame
, E_PC_REGNUM
, &pc
);
942 mn10300_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
946 frame_unwind_unsigned_register (next_frame
, E_SP_REGNUM
, &sp
);
951 mn10300_frame_unwind_init (struct gdbarch
*gdbarch
)
953 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
954 frame_unwind_append_sniffer (gdbarch
, mn10300_frame_sniffer
);
955 frame_base_set_default (gdbarch
, &mn10300_frame_base
);
956 set_gdbarch_unwind_dummy_id (gdbarch
, mn10300_unwind_dummy_id
);
957 set_gdbarch_unwind_pc (gdbarch
, mn10300_unwind_pc
);
958 set_gdbarch_unwind_sp (gdbarch
, mn10300_unwind_sp
);
961 /* Function: push_dummy_call
963 * Set up machine state for a target call, including
964 * function arguments, stack, return address, etc.
969 mn10300_push_dummy_call (struct gdbarch
*gdbarch
,
970 struct value
*target_func
,
971 struct regcache
*regcache
,
973 int nargs
, struct value
**args
,
976 CORE_ADDR struct_addr
)
978 const int push_size
= register_size (gdbarch
, E_PC_REGNUM
);
981 int stack_offset
= 0;
983 char *val
, valbuf
[MAX_REGISTER_SIZE
];
985 /* This should be a nop, but align the stack just in case something
986 went wrong. Stacks are four byte aligned on the mn10300. */
989 /* Now make space on the stack for the args.
991 XXX This doesn't appear to handle pass-by-invisible reference
993 regs_used
= struct_return
? 1 : 0;
994 for (len
= 0, argnum
= 0; argnum
< nargs
; argnum
++)
996 arg_len
= (TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3;
997 while (regs_used
< 2 && arg_len
> 0)
1000 arg_len
-= push_size
;
1005 /* Allocate stack space. */
1011 regcache_cooked_write_unsigned (regcache
, E_D0_REGNUM
, struct_addr
);
1016 /* Push all arguments onto the stack. */
1017 for (argnum
= 0; argnum
< nargs
; argnum
++)
1019 /* FIXME what about structs? Unions? */
1020 if (TYPE_CODE (value_type (*args
)) == TYPE_CODE_STRUCT
1021 && TYPE_LENGTH (value_type (*args
)) > 8)
1023 /* Change to pointer-to-type. */
1024 arg_len
= push_size
;
1025 store_unsigned_integer (valbuf
, push_size
,
1026 VALUE_ADDRESS (*args
));
1031 arg_len
= TYPE_LENGTH (value_type (*args
));
1032 val
= (char *) value_contents (*args
);
1035 while (regs_used
< 2 && arg_len
> 0)
1037 regcache_cooked_write_unsigned (regcache
, regs_used
,
1038 extract_unsigned_integer (val
, push_size
));
1040 arg_len
-= push_size
;
1046 write_memory (sp
+ stack_offset
, val
, push_size
);
1047 arg_len
-= push_size
;
1049 stack_offset
+= push_size
;
1055 /* Make space for the flushback area. */
1058 /* Push the return address that contains the magic breakpoint. */
1060 write_memory_unsigned_integer (sp
, push_size
, bp_addr
);
1062 /* The CPU also writes the return address always into the
1063 MDR register on "call". */
1064 regcache_cooked_write_unsigned (regcache
, E_MDR_REGNUM
, bp_addr
);
1067 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
, sp
);
1071 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1072 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1073 register number. Why don't Dwarf2 and GDB use the same numbering?
1074 Who knows? But since people have object files lying around with
1075 the existing Dwarf2 numbering, and other people have written stubs
1076 to work with the existing GDB, neither of them can change. So we
1077 just have to cope. */
1079 mn10300_dwarf2_reg_to_regnum (int dwarf2
)
1081 /* This table is supposed to be shaped like the gdbarch_register_name
1082 initializer in gcc/config/mn10300/mn10300.h. Registers which
1083 appear in GCC's numbering, but have no counterpart in GDB's
1084 world, are marked with a -1. */
1085 static int dwarf2_to_gdb
[] = {
1086 0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
1087 15, 16, 17, 18, 19, 20, 21, 22,
1088 32, 33, 34, 35, 36, 37, 38, 39,
1089 40, 41, 42, 43, 44, 45, 46, 47,
1090 48, 49, 50, 51, 52, 53, 54, 55,
1091 56, 57, 58, 59, 60, 61, 62, 63
1095 || dwarf2
>= ARRAY_SIZE (dwarf2_to_gdb
)
1096 || dwarf2_to_gdb
[dwarf2
] == -1)
1098 warning (_("Bogus register number in debug info: %d"), dwarf2
);
1102 return dwarf2_to_gdb
[dwarf2
];
1105 static struct gdbarch
*
1106 mn10300_gdbarch_init (struct gdbarch_info info
,
1107 struct gdbarch_list
*arches
)
1109 struct gdbarch
*gdbarch
;
1110 struct gdbarch_tdep
*tdep
;
1113 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1115 return arches
->gdbarch
;
1117 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1118 gdbarch
= gdbarch_alloc (&info
, tdep
);
1120 switch (info
.bfd_arch_info
->mach
)
1123 case bfd_mach_mn10300
:
1124 set_gdbarch_register_name (gdbarch
, mn10300_generic_register_name
);
1125 tdep
->am33_mode
= 0;
1129 set_gdbarch_register_name (gdbarch
, am33_register_name
);
1130 tdep
->am33_mode
= 1;
1133 case bfd_mach_am33_2
:
1134 set_gdbarch_register_name (gdbarch
, am33_2_register_name
);
1135 tdep
->am33_mode
= 2;
1137 set_gdbarch_fp0_regnum (gdbarch
, 32);
1140 internal_error (__FILE__
, __LINE__
,
1141 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1146 set_gdbarch_num_regs (gdbarch
, num_regs
);
1147 set_gdbarch_register_type (gdbarch
, mn10300_register_type
);
1148 set_gdbarch_skip_prologue (gdbarch
, mn10300_skip_prologue
);
1149 set_gdbarch_read_pc (gdbarch
, mn10300_read_pc
);
1150 set_gdbarch_write_pc (gdbarch
, mn10300_write_pc
);
1151 set_gdbarch_pc_regnum (gdbarch
, E_PC_REGNUM
);
1152 set_gdbarch_sp_regnum (gdbarch
, E_SP_REGNUM
);
1153 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, mn10300_dwarf2_reg_to_regnum
);
1155 /* Stack unwinding. */
1156 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1158 set_gdbarch_breakpoint_from_pc (gdbarch
, mn10300_breakpoint_from_pc
);
1159 /* decr_pc_after_break? */
1161 set_gdbarch_print_insn (gdbarch
, print_insn_mn10300
);
1164 set_gdbarch_return_value (gdbarch
, mn10300_return_value
);
1166 /* Stage 3 -- get target calls working. */
1167 set_gdbarch_push_dummy_call (gdbarch
, mn10300_push_dummy_call
);
1168 /* set_gdbarch_return_value (store, extract) */
1171 mn10300_frame_unwind_init (gdbarch
);
1173 /* Hook in ABI-specific overrides, if they have been registered. */
1174 gdbarch_init_osabi (info
, gdbarch
);
1179 /* Dump out the mn10300 specific architecture information. */
1182 mn10300_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
1184 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1185 fprintf_unfiltered (file
, "mn10300_dump_tdep: am33_mode = %d\n",
1190 _initialize_mn10300_tdep (void)
1192 gdbarch_register (bfd_arch_mn10300
, mn10300_gdbarch_init
, mn10300_dump_tdep
);