1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 1996-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
28 #include "frame-unwind.h"
29 #include "frame-base.h"
31 #include "dwarf2-frame.h"
34 #include "prologue-value.h"
37 #include "mn10300-tdep.h"
40 /* The am33-2 has 64 registers. */
41 #define MN10300_MAX_NUM_REGS 64
43 /* Big enough to hold the size of the largest register in bytes. */
44 #define MN10300_MAX_REGISTER_SIZE 64
46 /* This structure holds the results of a prologue analysis. */
47 struct mn10300_prologue
49 /* The architecture for which we generated this prologue info. */
50 struct gdbarch
*gdbarch
;
52 /* The offset from the frame base to the stack pointer --- always
55 Calling this a "size" is a bit misleading, but given that the
56 stack grows downwards, using offsets for everything keeps one
57 from going completely sign-crazy: you never change anything's
58 sign for an ADD instruction; always change the second operand's
59 sign for a SUB instruction; and everything takes care of
63 /* Non-zero if this function has initialized the frame pointer from
64 the stack pointer, zero otherwise. */
67 /* If has_frame_ptr is non-zero, this is the offset from the frame
68 base to where the frame pointer points. This is always zero or
72 /* The address of the first instruction at which the frame has been
73 set up and the arguments are where the debug info says they are
74 --- as best as we can tell. */
75 CORE_ADDR prologue_end
;
77 /* reg_offset[R] is the offset from the CFA at which register R is
78 saved, or 1 if register R has not been saved. (Real values are
79 always zero or negative.) */
80 int reg_offset
[MN10300_MAX_NUM_REGS
];
84 /* Compute the alignment required by a type. */
87 mn10300_type_align (struct type
*type
)
91 switch (TYPE_CODE (type
))
102 case TYPE_CODE_RVALUE_REF
:
103 return TYPE_LENGTH (type
);
105 case TYPE_CODE_COMPLEX
:
106 return TYPE_LENGTH (type
) / 2;
108 case TYPE_CODE_STRUCT
:
109 case TYPE_CODE_UNION
:
110 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
112 int falign
= mn10300_type_align (TYPE_FIELD_TYPE (type
, i
));
113 while (align
< falign
)
118 case TYPE_CODE_ARRAY
:
119 /* HACK! Structures containing arrays, even small ones, are not
120 elligible for returning in registers. */
123 case TYPE_CODE_TYPEDEF
:
124 return mn10300_type_align (check_typedef (type
));
127 internal_error (__FILE__
, __LINE__
, _("bad switch"));
131 /* Should call_function allocate stack space for a struct return? */
133 mn10300_use_struct_convention (struct type
*type
)
135 /* Structures bigger than a pair of words can't be returned in
137 if (TYPE_LENGTH (type
) > 8)
140 switch (TYPE_CODE (type
))
142 case TYPE_CODE_STRUCT
:
143 case TYPE_CODE_UNION
:
144 /* Structures with a single field are handled as the field
146 if (TYPE_NFIELDS (type
) == 1)
147 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type
, 0));
149 /* Structures with word or double-word size are passed in memory, as
150 long as they require at least word alignment. */
151 if (mn10300_type_align (type
) >= 4)
156 /* Arrays are addressable, so they're never returned in
157 registers. This condition can only hold when the array is
158 the only field of a struct or union. */
159 case TYPE_CODE_ARRAY
:
162 case TYPE_CODE_TYPEDEF
:
163 return mn10300_use_struct_convention (check_typedef (type
));
171 mn10300_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
172 struct regcache
*regcache
, const gdb_byte
*valbuf
)
174 int len
= TYPE_LENGTH (type
);
177 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
182 regsz
= register_size (gdbarch
, reg
);
185 regcache_raw_write_part (regcache
, reg
, 0, len
, valbuf
);
186 else if (len
<= 2 * regsz
)
188 regcache_raw_write (regcache
, reg
, valbuf
);
189 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
190 regcache_raw_write_part (regcache
, reg
+1, 0,
191 len
- regsz
, valbuf
+ regsz
);
194 internal_error (__FILE__
, __LINE__
,
195 _("Cannot store return value %d bytes long."), len
);
199 mn10300_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
200 struct regcache
*regcache
, void *valbuf
)
202 gdb_byte buf
[MN10300_MAX_REGISTER_SIZE
];
203 int len
= TYPE_LENGTH (type
);
206 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
211 regsz
= register_size (gdbarch
, reg
);
212 gdb_assert (regsz
<= MN10300_MAX_REGISTER_SIZE
);
215 regcache_raw_read (regcache
, reg
, buf
);
216 memcpy (valbuf
, buf
, len
);
218 else if (len
<= 2 * regsz
)
220 regcache_raw_read (regcache
, reg
, buf
);
221 memcpy (valbuf
, buf
, regsz
);
222 gdb_assert (regsz
== register_size (gdbarch
, reg
+ 1));
223 regcache_raw_read (regcache
, reg
+ 1, buf
);
224 memcpy ((char *) valbuf
+ regsz
, buf
, len
- regsz
);
227 internal_error (__FILE__
, __LINE__
,
228 _("Cannot extract return value %d bytes long."), len
);
231 /* Determine, for architecture GDBARCH, how a return value of TYPE
232 should be returned. If it is supposed to be returned in registers,
233 and READBUF is non-zero, read the appropriate value from REGCACHE,
234 and copy it into READBUF. If WRITEBUF is non-zero, write the value
235 from WRITEBUF into REGCACHE. */
237 static enum return_value_convention
238 mn10300_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
239 struct type
*type
, struct regcache
*regcache
,
240 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
242 if (mn10300_use_struct_convention (type
))
243 return RETURN_VALUE_STRUCT_CONVENTION
;
246 mn10300_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
248 mn10300_store_return_value (gdbarch
, type
, regcache
, writebuf
);
250 return RETURN_VALUE_REGISTER_CONVENTION
;
254 register_name (int reg
, const char **regs
, long sizeof_regs
)
256 if (reg
< 0 || reg
>= sizeof_regs
/ sizeof (regs
[0]))
263 mn10300_generic_register_name (struct gdbarch
*gdbarch
, int reg
)
265 static const char *regs
[] =
266 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
267 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
268 "", "", "", "", "", "", "", "",
269 "", "", "", "", "", "", "", "fp"
271 return register_name (reg
, regs
, sizeof regs
);
276 am33_register_name (struct gdbarch
*gdbarch
, int reg
)
278 static const char *regs
[] =
279 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
280 "sp", "pc", "mdr", "psw", "lir", "lar", "",
281 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
282 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
284 return register_name (reg
, regs
, sizeof regs
);
288 am33_2_register_name (struct gdbarch
*gdbarch
, int reg
)
290 static const char *regs
[] =
292 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
293 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
294 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
295 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
296 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
297 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
298 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
299 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
301 return register_name (reg
, regs
, sizeof regs
);
305 mn10300_register_type (struct gdbarch
*gdbarch
, int reg
)
307 return builtin_type (gdbarch
)->builtin_int
;
310 /* The breakpoint instruction must be the same size as the smallest
311 instruction in the instruction set.
313 The Matsushita mn10x00 processors have single byte instructions
314 so we need a single byte breakpoint. Matsushita hasn't defined
315 one, so we defined it ourselves. */
316 constexpr gdb_byte mn10300_break_insn
[] = {0xff};
318 typedef BP_MANIPULATION (mn10300_break_insn
) mn10300_breakpoint
;
320 /* Model the semantics of pushing a register onto the stack. This
321 is a helper function for mn10300_analyze_prologue, below. */
323 push_reg (pv_t
*regs
, struct pv_area
*stack
, int regnum
)
325 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
326 stack
->store (regs
[E_SP_REGNUM
], 4, regs
[regnum
]);
329 /* Translate an "r" register number extracted from an instruction encoding
330 into a GDB register number. Adapted from a simulator function
331 of the same name; see am33.igen. */
333 translate_rreg (int rreg
)
335 /* The higher register numbers actually correspond to the
336 basic machine's address and data registers. */
337 if (rreg
> 7 && rreg
< 12)
338 return E_A0_REGNUM
+ rreg
- 8;
339 else if (rreg
> 11 && rreg
< 16)
340 return E_D0_REGNUM
+ rreg
- 12;
342 return E_E0_REGNUM
+ rreg
;
345 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
347 If VALUE is a saved register, ADDR says it was saved at a constant
348 offset from the frame base, and SIZE indicates that the whole
349 register was saved, record its offset in RESULT_UNTYPED. */
351 check_for_saved (void *result_untyped
, pv_t addr
, CORE_ADDR size
, pv_t value
)
353 struct mn10300_prologue
*result
= (struct mn10300_prologue
*) result_untyped
;
355 if (value
.kind
== pvk_register
357 && pv_is_register (addr
, E_SP_REGNUM
)
358 && size
== register_size (result
->gdbarch
, value
.reg
))
359 result
->reg_offset
[value
.reg
] = addr
.k
;
362 /* Analyze the prologue to determine where registers are saved,
363 the end of the prologue, etc. The result of this analysis is
364 returned in RESULT. See struct mn10300_prologue above for more
367 mn10300_analyze_prologue (struct gdbarch
*gdbarch
,
368 CORE_ADDR start_pc
, CORE_ADDR limit_pc
,
369 struct mn10300_prologue
*result
)
371 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
374 pv_t regs
[MN10300_MAX_NUM_REGS
];
375 CORE_ADDR after_last_frame_setup_insn
= start_pc
;
376 int am33_mode
= AM33_MODE (gdbarch
);
378 memset (result
, 0, sizeof (*result
));
379 result
->gdbarch
= gdbarch
;
381 for (rn
= 0; rn
< MN10300_MAX_NUM_REGS
; rn
++)
383 regs
[rn
] = pv_register (rn
, 0);
384 result
->reg_offset
[rn
] = 1;
386 pv_area
stack (E_SP_REGNUM
, gdbarch_addr_bit (gdbarch
));
388 /* The typical call instruction will have saved the return address on the
389 stack. Space for the return address has already been preallocated in
390 the caller's frame. It's possible, such as when using -mrelax with gcc
391 that other registers were saved as well. If this happens, we really
392 have no chance of deciphering the frame. DWARF info can save the day
393 when this happens. */
394 stack
.store (regs
[E_SP_REGNUM
], 4, regs
[E_PC_REGNUM
]);
397 while (pc
< limit_pc
)
402 /* Instructions can be as small as one byte; however, we usually
403 need at least two bytes to do the decoding, so fetch that many
405 status
= target_read_memory (pc
, instr
, 2);
409 /* movm [regs], sp */
410 if (instr
[0] == 0xcf)
414 save_mask
= instr
[1];
416 if ((save_mask
& movm_exreg0_bit
) && am33_mode
)
418 push_reg (regs
, &stack
, E_E2_REGNUM
);
419 push_reg (regs
, &stack
, E_E3_REGNUM
);
421 if ((save_mask
& movm_exreg1_bit
) && am33_mode
)
423 push_reg (regs
, &stack
, E_E4_REGNUM
);
424 push_reg (regs
, &stack
, E_E5_REGNUM
);
425 push_reg (regs
, &stack
, E_E6_REGNUM
);
426 push_reg (regs
, &stack
, E_E7_REGNUM
);
428 if ((save_mask
& movm_exother_bit
) && am33_mode
)
430 push_reg (regs
, &stack
, E_E0_REGNUM
);
431 push_reg (regs
, &stack
, E_E1_REGNUM
);
432 push_reg (regs
, &stack
, E_MDRQ_REGNUM
);
433 push_reg (regs
, &stack
, E_MCRH_REGNUM
);
434 push_reg (regs
, &stack
, E_MCRL_REGNUM
);
435 push_reg (regs
, &stack
, E_MCVF_REGNUM
);
437 if (save_mask
& movm_d2_bit
)
438 push_reg (regs
, &stack
, E_D2_REGNUM
);
439 if (save_mask
& movm_d3_bit
)
440 push_reg (regs
, &stack
, E_D3_REGNUM
);
441 if (save_mask
& movm_a2_bit
)
442 push_reg (regs
, &stack
, E_A2_REGNUM
);
443 if (save_mask
& movm_a3_bit
)
444 push_reg (regs
, &stack
, E_A3_REGNUM
);
445 if (save_mask
& movm_other_bit
)
447 push_reg (regs
, &stack
, E_D0_REGNUM
);
448 push_reg (regs
, &stack
, E_D1_REGNUM
);
449 push_reg (regs
, &stack
, E_A0_REGNUM
);
450 push_reg (regs
, &stack
, E_A1_REGNUM
);
451 push_reg (regs
, &stack
, E_MDR_REGNUM
);
452 push_reg (regs
, &stack
, E_LIR_REGNUM
);
453 push_reg (regs
, &stack
, E_LAR_REGNUM
);
454 /* The `other' bit leaves a blank area of four bytes at
455 the beginning of its block of saved registers, making
456 it 32 bytes long in total. */
457 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], -4);
461 after_last_frame_setup_insn
= pc
;
464 else if ((instr
[0] & 0xfc) == 0x3c)
466 int aN
= instr
[0] & 0x03;
468 regs
[E_A0_REGNUM
+ aN
] = regs
[E_SP_REGNUM
];
472 after_last_frame_setup_insn
= pc
;
475 else if ((instr
[0] & 0xf0) == 0x90
476 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
478 int aN
= instr
[0] & 0x03;
479 int aM
= (instr
[0] & 0x0c) >> 2;
481 regs
[E_A0_REGNUM
+ aN
] = regs
[E_A0_REGNUM
+ aM
];
486 else if ((instr
[0] & 0xf0) == 0x80
487 && (instr
[0] & 0x03) != ((instr
[0] & 0x0c) >> 2))
489 int dN
= instr
[0] & 0x03;
490 int dM
= (instr
[0] & 0x0c) >> 2;
492 regs
[E_D0_REGNUM
+ dN
] = regs
[E_D0_REGNUM
+ dM
];
497 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xd0)
499 int dN
= instr
[1] & 0x03;
500 int aM
= (instr
[1] & 0x0c) >> 2;
502 regs
[E_D0_REGNUM
+ dN
] = regs
[E_A0_REGNUM
+ aM
];
507 else if (instr
[0] == 0xf1 && (instr
[1] & 0xf0) == 0xe0)
509 int aN
= instr
[1] & 0x03;
510 int dM
= (instr
[1] & 0x0c) >> 2;
512 regs
[E_A0_REGNUM
+ aN
] = regs
[E_D0_REGNUM
+ dM
];
517 else if (instr
[0] == 0xf8 && instr
[1] == 0xfe)
523 status
= target_read_memory (pc
+ 2, buf
, 1);
527 imm8
= extract_signed_integer (buf
, 1, byte_order
);
528 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm8
);
531 /* Stack pointer adjustments are frame related. */
532 after_last_frame_setup_insn
= pc
;
535 else if (instr
[0] == 0xfa && instr
[1] == 0xfe)
540 status
= target_read_memory (pc
+ 2, buf
, 2);
544 imm16
= extract_signed_integer (buf
, 2, byte_order
);
545 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm16
);
548 /* Stack pointer adjustments are frame related. */
549 after_last_frame_setup_insn
= pc
;
552 else if (instr
[0] == 0xfc && instr
[1] == 0xfe)
557 status
= target_read_memory (pc
+ 2, buf
, 4);
562 imm32
= extract_signed_integer (buf
, 4, byte_order
);
563 regs
[E_SP_REGNUM
] = pv_add_constant (regs
[E_SP_REGNUM
], imm32
);
566 /* Stack pointer adjustments are frame related. */
567 after_last_frame_setup_insn
= pc
;
570 else if ((instr
[0] & 0xfc) == 0x20)
575 aN
= instr
[0] & 0x03;
576 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
578 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
584 else if (instr
[0] == 0xfa && (instr
[1] & 0xfc) == 0xd0)
590 aN
= instr
[1] & 0x03;
592 status
= target_read_memory (pc
+ 2, buf
, 2);
597 imm16
= extract_signed_integer (buf
, 2, byte_order
);
599 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
605 else if (instr
[0] == 0xfc && (instr
[1] & 0xfc) == 0xd0)
611 aN
= instr
[1] & 0x03;
613 status
= target_read_memory (pc
+ 2, buf
, 4);
617 imm32
= extract_signed_integer (buf
, 2, byte_order
);
619 regs
[E_A0_REGNUM
+ aN
] = pv_add_constant (regs
[E_A0_REGNUM
+ aN
],
624 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x30)
629 Y
= (instr
[1] & 0x02) >> 1;
631 status
= target_read_memory (pc
+ 2, buf
, 1);
635 sM
= (buf
[0] & 0xf0) >> 4;
639 stack
.store (regs
[translate_rreg (rN
)], 4,
640 regs
[E_FS0_REGNUM
+ fsM
]);
645 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x34)
650 Y
= (instr
[1] & 0x02) >> 1;
652 status
= target_read_memory (pc
+ 2, buf
, 1);
656 sM
= (buf
[0] & 0xf0) >> 4;
659 stack
.store (regs
[E_SP_REGNUM
], 4,
660 regs
[E_FS0_REGNUM
+ fsM
]);
664 /* fmov fsM, (rN, rI) */
665 else if (instr
[0] == 0xfb && instr
[1] == 0x37)
667 int fsM
, sM
, Z
, rN
, rI
;
671 status
= target_read_memory (pc
+ 2, buf
, 2);
675 rI
= (buf
[0] & 0xf0) >> 4;
677 sM
= (buf
[1] & 0xf0) >> 4;
678 Z
= (buf
[1] & 0x02) >> 1;
681 stack
.store (pv_add (regs
[translate_rreg (rN
)],
682 regs
[translate_rreg (rI
)]),
683 4, regs
[E_FS0_REGNUM
+ fsM
]);
687 /* fmov fsM, (d8, rN) */
688 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x30)
694 Y
= (instr
[1] & 0x02) >> 1;
696 status
= target_read_memory (pc
+ 2, buf
, 2);
700 sM
= (buf
[0] & 0xf0) >> 4;
703 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
705 stack
.store (pv_add_constant (regs
[translate_rreg (rN
)], d8
),
706 4, regs
[E_FS0_REGNUM
+ fsM
]);
710 /* fmov fsM, (d24, rN) */
711 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x30)
717 Y
= (instr
[1] & 0x02) >> 1;
719 status
= target_read_memory (pc
+ 2, buf
, 4);
723 sM
= (buf
[0] & 0xf0) >> 4;
726 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
728 stack
.store (pv_add_constant (regs
[translate_rreg (rN
)], d24
),
729 4, regs
[E_FS0_REGNUM
+ fsM
]);
733 /* fmov fsM, (d32, rN) */
734 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x30)
740 Y
= (instr
[1] & 0x02) >> 1;
742 status
= target_read_memory (pc
+ 2, buf
, 5);
746 sM
= (buf
[0] & 0xf0) >> 4;
749 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
751 stack
.store (pv_add_constant (regs
[translate_rreg (rN
)], d32
),
752 4, regs
[E_FS0_REGNUM
+ fsM
]);
756 /* fmov fsM, (d8, SP) */
757 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x34)
763 Y
= (instr
[1] & 0x02) >> 1;
765 status
= target_read_memory (pc
+ 2, buf
, 2);
769 sM
= (buf
[0] & 0xf0) >> 4;
771 d8
= extract_signed_integer (&buf
[1], 1, byte_order
);
773 stack
.store (pv_add_constant (regs
[E_SP_REGNUM
], d8
),
774 4, regs
[E_FS0_REGNUM
+ fsM
]);
778 /* fmov fsM, (d24, SP) */
779 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x34)
785 Y
= (instr
[1] & 0x02) >> 1;
787 status
= target_read_memory (pc
+ 2, buf
, 4);
791 sM
= (buf
[0] & 0xf0) >> 4;
793 d24
= extract_signed_integer (&buf
[1], 3, byte_order
);
795 stack
.store (pv_add_constant (regs
[E_SP_REGNUM
], d24
),
796 4, regs
[E_FS0_REGNUM
+ fsM
]);
800 /* fmov fsM, (d32, SP) */
801 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x34)
807 Y
= (instr
[1] & 0x02) >> 1;
809 status
= target_read_memory (pc
+ 2, buf
, 5);
813 sM
= (buf
[0] & 0xf0) >> 4;
815 d32
= extract_signed_integer (&buf
[1], 4, byte_order
);
817 stack
.store (pv_add_constant (regs
[E_SP_REGNUM
], d32
),
818 4, regs
[E_FS0_REGNUM
+ fsM
]);
822 /* fmov fsM, (rN+) */
823 else if (instr
[0] == 0xf9 && (instr
[1] & 0xfd) == 0x31)
825 int fsM
, sM
, Y
, rN
, rN_regnum
;
828 Y
= (instr
[1] & 0x02) >> 1;
830 status
= target_read_memory (pc
+ 2, buf
, 1);
834 sM
= (buf
[0] & 0xf0) >> 4;
838 rN_regnum
= translate_rreg (rN
);
840 stack
.store (regs
[rN_regnum
], 4,
841 regs
[E_FS0_REGNUM
+ fsM
]);
842 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], 4);
846 /* fmov fsM, (rN+, imm8) */
847 else if (instr
[0] == 0xfb && (instr
[1] & 0xfd) == 0x31)
849 int fsM
, sM
, Y
, rN
, rN_regnum
;
853 Y
= (instr
[1] & 0x02) >> 1;
855 status
= target_read_memory (pc
+ 2, buf
, 2);
859 sM
= (buf
[0] & 0xf0) >> 4;
862 imm8
= extract_signed_integer (&buf
[1], 1, byte_order
);
864 rN_regnum
= translate_rreg (rN
);
866 stack
.store (regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
867 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm8
);
871 /* fmov fsM, (rN+, imm24) */
872 else if (instr
[0] == 0xfd && (instr
[1] & 0xfd) == 0x31)
874 int fsM
, sM
, Y
, rN
, rN_regnum
;
878 Y
= (instr
[1] & 0x02) >> 1;
880 status
= target_read_memory (pc
+ 2, buf
, 4);
884 sM
= (buf
[0] & 0xf0) >> 4;
887 imm24
= extract_signed_integer (&buf
[1], 3, byte_order
);
889 rN_regnum
= translate_rreg (rN
);
891 stack
.store (regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
892 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm24
);
896 /* fmov fsM, (rN+, imm32) */
897 else if (instr
[0] == 0xfe && (instr
[1] & 0xfd) == 0x31)
899 int fsM
, sM
, Y
, rN
, rN_regnum
;
903 Y
= (instr
[1] & 0x02) >> 1;
905 status
= target_read_memory (pc
+ 2, buf
, 5);
909 sM
= (buf
[0] & 0xf0) >> 4;
912 imm32
= extract_signed_integer (&buf
[1], 4, byte_order
);
914 rN_regnum
= translate_rreg (rN
);
916 stack
.store (regs
[rN_regnum
], 4, regs
[E_FS0_REGNUM
+ fsM
]);
917 regs
[rN_regnum
] = pv_add_constant (regs
[rN_regnum
], imm32
);
922 else if ((instr
[0] & 0xf0) == 0x90)
924 int aN
= instr
[0] & 0x03;
927 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
929 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm8
);
933 else if ((instr
[0] & 0xfc) == 0x24)
935 int aN
= instr
[0] & 0x03;
939 status
= target_read_memory (pc
+ 1, buf
, 2);
943 imm16
= extract_signed_integer (buf
, 2, byte_order
);
944 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm16
);
948 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xdc))
950 int aN
= instr
[1] & 0x03;
954 status
= target_read_memory (pc
+ 2, buf
, 4);
958 imm32
= extract_signed_integer (buf
, 4, byte_order
);
959 regs
[E_A0_REGNUM
+ aN
] = pv_constant (imm32
);
963 else if ((instr
[0] & 0xf0) == 0x80)
965 int dN
= instr
[0] & 0x03;
968 imm8
= extract_signed_integer (&instr
[1], 1, byte_order
);
970 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm8
);
974 else if ((instr
[0] & 0xfc) == 0x2c)
976 int dN
= instr
[0] & 0x03;
980 status
= target_read_memory (pc
+ 1, buf
, 2);
984 imm16
= extract_signed_integer (buf
, 2, byte_order
);
985 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm16
);
989 else if (instr
[0] == 0xfc && ((instr
[1] & 0xfc) == 0xcc))
991 int dN
= instr
[1] & 0x03;
995 status
= target_read_memory (pc
+ 2, buf
, 4);
999 imm32
= extract_signed_integer (buf
, 4, byte_order
);
1000 regs
[E_D0_REGNUM
+ dN
] = pv_constant (imm32
);
1005 /* We've hit some instruction that we don't recognize. Hopefully,
1006 we have enough to do prologue analysis. */
1011 /* Is the frame size (offset, really) a known constant? */
1012 if (pv_is_register (regs
[E_SP_REGNUM
], E_SP_REGNUM
))
1013 result
->frame_size
= regs
[E_SP_REGNUM
].k
;
1015 /* Was the frame pointer initialized? */
1016 if (pv_is_register (regs
[E_A3_REGNUM
], E_SP_REGNUM
))
1018 result
->has_frame_ptr
= 1;
1019 result
->frame_ptr_offset
= regs
[E_A3_REGNUM
].k
;
1022 /* Record where all the registers were saved. */
1023 stack
.scan (check_for_saved
, (void *) result
);
1025 result
->prologue_end
= after_last_frame_setup_insn
;
1028 /* Function: skip_prologue
1029 Return the address of the first inst past the prologue of the function. */
1032 mn10300_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1035 CORE_ADDR func_addr
, func_end
;
1036 struct mn10300_prologue p
;
1038 /* Try to find the extent of the function that contains PC. */
1039 if (!find_pc_partial_function (pc
, &name
, &func_addr
, &func_end
))
1042 mn10300_analyze_prologue (gdbarch
, pc
, func_end
, &p
);
1043 return p
.prologue_end
;
1046 /* Wrapper for mn10300_analyze_prologue: find the function start;
1047 use the current frame PC as the limit, then
1048 invoke mn10300_analyze_prologue and return its result. */
1049 static struct mn10300_prologue
*
1050 mn10300_analyze_frame_prologue (struct frame_info
*this_frame
,
1051 void **this_prologue_cache
)
1053 if (!*this_prologue_cache
)
1055 CORE_ADDR func_start
, stop_addr
;
1057 *this_prologue_cache
= FRAME_OBSTACK_ZALLOC (struct mn10300_prologue
);
1059 func_start
= get_frame_func (this_frame
);
1060 stop_addr
= get_frame_pc (this_frame
);
1062 /* If we couldn't find any function containing the PC, then
1063 just initialize the prologue cache, but don't do anything. */
1065 stop_addr
= func_start
;
1067 mn10300_analyze_prologue (get_frame_arch (this_frame
),
1068 func_start
, stop_addr
,
1069 ((struct mn10300_prologue
*)
1070 *this_prologue_cache
));
1073 return (struct mn10300_prologue
*) *this_prologue_cache
;
1076 /* Given the next frame and a prologue cache, return this frame's
1079 mn10300_frame_base (struct frame_info
*this_frame
, void **this_prologue_cache
)
1081 struct mn10300_prologue
*p
1082 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1084 /* In functions that use alloca, the distance between the stack
1085 pointer and the frame base varies dynamically, so we can't use
1086 the SP plus static information like prologue analysis to find the
1087 frame base. However, such functions must have a frame pointer,
1088 to be able to restore the SP on exit. So whenever we do have a
1089 frame pointer, use that to find the base. */
1090 if (p
->has_frame_ptr
)
1092 CORE_ADDR fp
= get_frame_register_unsigned (this_frame
, E_A3_REGNUM
);
1093 return fp
- p
->frame_ptr_offset
;
1097 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1098 return sp
- p
->frame_size
;
1102 /* Here is a dummy implementation. */
1103 static struct frame_id
1104 mn10300_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1106 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, E_SP_REGNUM
);
1107 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, E_PC_REGNUM
);
1108 return frame_id_build (sp
, pc
);
1112 mn10300_frame_this_id (struct frame_info
*this_frame
,
1113 void **this_prologue_cache
,
1114 struct frame_id
*this_id
)
1116 *this_id
= frame_id_build (mn10300_frame_base (this_frame
,
1117 this_prologue_cache
),
1118 get_frame_func (this_frame
));
1122 static struct value
*
1123 mn10300_frame_prev_register (struct frame_info
*this_frame
,
1124 void **this_prologue_cache
, int regnum
)
1126 struct mn10300_prologue
*p
1127 = mn10300_analyze_frame_prologue (this_frame
, this_prologue_cache
);
1128 CORE_ADDR frame_base
= mn10300_frame_base (this_frame
, this_prologue_cache
);
1130 if (regnum
== E_SP_REGNUM
)
1131 return frame_unwind_got_constant (this_frame
, regnum
, frame_base
);
1133 /* If prologue analysis says we saved this register somewhere,
1134 return a description of the stack slot holding it. */
1135 if (p
->reg_offset
[regnum
] != 1)
1136 return frame_unwind_got_memory (this_frame
, regnum
,
1137 frame_base
+ p
->reg_offset
[regnum
]);
1139 /* Otherwise, presume we haven't changed the value of this
1140 register, and get it from the next frame. */
1141 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1144 static const struct frame_unwind mn10300_frame_unwind
= {
1146 default_frame_unwind_stop_reason
,
1147 mn10300_frame_this_id
,
1148 mn10300_frame_prev_register
,
1150 default_frame_sniffer
1154 mn10300_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1158 pc
= frame_unwind_register_unsigned (this_frame
, E_PC_REGNUM
);
1163 mn10300_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1167 sp
= frame_unwind_register_unsigned (this_frame
, E_SP_REGNUM
);
1172 mn10300_frame_unwind_init (struct gdbarch
*gdbarch
)
1174 dwarf2_append_unwinders (gdbarch
);
1175 frame_unwind_append_unwinder (gdbarch
, &mn10300_frame_unwind
);
1176 set_gdbarch_dummy_id (gdbarch
, mn10300_dummy_id
);
1177 set_gdbarch_unwind_pc (gdbarch
, mn10300_unwind_pc
);
1178 set_gdbarch_unwind_sp (gdbarch
, mn10300_unwind_sp
);
1181 /* Function: push_dummy_call
1183 * Set up machine state for a target call, including
1184 * function arguments, stack, return address, etc.
1189 mn10300_push_dummy_call (struct gdbarch
*gdbarch
,
1190 struct value
*target_func
,
1191 struct regcache
*regcache
,
1193 int nargs
, struct value
**args
,
1196 CORE_ADDR struct_addr
)
1198 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1199 const int push_size
= register_size (gdbarch
, E_PC_REGNUM
);
1202 int stack_offset
= 0;
1204 const gdb_byte
*val
;
1205 gdb_byte valbuf
[MN10300_MAX_REGISTER_SIZE
];
1207 /* This should be a nop, but align the stack just in case something
1208 went wrong. Stacks are four byte aligned on the mn10300. */
1211 /* Now make space on the stack for the args.
1213 XXX This doesn't appear to handle pass-by-invisible reference
1215 regs_used
= struct_return
? 1 : 0;
1216 for (len
= 0, argnum
= 0; argnum
< nargs
; argnum
++)
1218 arg_len
= (TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3;
1219 while (regs_used
< 2 && arg_len
> 0)
1222 arg_len
-= push_size
;
1227 /* Allocate stack space. */
1233 regcache_cooked_write_unsigned (regcache
, E_D0_REGNUM
, struct_addr
);
1238 /* Push all arguments onto the stack. */
1239 for (argnum
= 0; argnum
< nargs
; argnum
++)
1241 /* FIXME what about structs? Unions? */
1242 if (TYPE_CODE (value_type (*args
)) == TYPE_CODE_STRUCT
1243 && TYPE_LENGTH (value_type (*args
)) > 8)
1245 /* Change to pointer-to-type. */
1246 arg_len
= push_size
;
1247 gdb_assert (push_size
<= MN10300_MAX_REGISTER_SIZE
);
1248 store_unsigned_integer (valbuf
, push_size
, byte_order
,
1249 value_address (*args
));
1254 arg_len
= TYPE_LENGTH (value_type (*args
));
1255 val
= value_contents (*args
);
1258 while (regs_used
< 2 && arg_len
> 0)
1260 regcache_cooked_write_unsigned (regcache
, regs_used
,
1261 extract_unsigned_integer (val
, push_size
, byte_order
));
1263 arg_len
-= push_size
;
1269 write_memory (sp
+ stack_offset
, val
, push_size
);
1270 arg_len
-= push_size
;
1272 stack_offset
+= push_size
;
1278 /* Make space for the flushback area. */
1281 /* Push the return address that contains the magic breakpoint. */
1283 write_memory_unsigned_integer (sp
, push_size
, byte_order
, bp_addr
);
1285 /* The CPU also writes the return address always into the
1286 MDR register on "call". */
1287 regcache_cooked_write_unsigned (regcache
, E_MDR_REGNUM
, bp_addr
);
1290 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
, sp
);
1292 /* On the mn10300, it's possible to move some of the stack adjustment
1293 and saving of the caller-save registers out of the prologue and
1294 into the call sites. (When using gcc, this optimization can
1295 occur when using the -mrelax switch.) If this occurs, the dwarf2
1296 info will reflect this fact. We can test to see if this is the
1297 case by creating a new frame using the current stack pointer and
1298 the address of the function that we're about to call. We then
1299 unwind SP and see if it's different than the SP of our newly
1300 created frame. If the SP values are the same, the caller is not
1301 expected to allocate any additional stack. On the other hand, if
1302 the SP values are different, the difference determines the
1303 additional stack that must be allocated.
1305 Note that we don't update the return value though because that's
1306 the value of the stack just after pushing the arguments, but prior
1307 to performing the call. This value is needed in order to
1308 construct the frame ID of the dummy call. */
1310 CORE_ADDR func_addr
= find_function_addr (target_func
, NULL
);
1311 CORE_ADDR unwound_sp
1312 = mn10300_unwind_sp (gdbarch
, create_new_frame (sp
, func_addr
));
1313 if (sp
!= unwound_sp
)
1314 regcache_cooked_write_unsigned (regcache
, E_SP_REGNUM
,
1315 sp
- (unwound_sp
- sp
));
1321 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1322 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1323 register number. Why don't Dwarf2 and GDB use the same numbering?
1324 Who knows? But since people have object files lying around with
1325 the existing Dwarf2 numbering, and other people have written stubs
1326 to work with the existing GDB, neither of them can change. So we
1327 just have to cope. */
1329 mn10300_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int dwarf2
)
1331 /* This table is supposed to be shaped like the gdbarch_register_name
1332 initializer in gcc/config/mn10300/mn10300.h. Registers which
1333 appear in GCC's numbering, but have no counterpart in GDB's
1334 world, are marked with a -1. */
1335 static int dwarf2_to_gdb
[] = {
1336 E_D0_REGNUM
, E_D1_REGNUM
, E_D2_REGNUM
, E_D3_REGNUM
,
1337 E_A0_REGNUM
, E_A1_REGNUM
, E_A2_REGNUM
, E_A3_REGNUM
,
1340 E_E0_REGNUM
, E_E1_REGNUM
, E_E2_REGNUM
, E_E3_REGNUM
,
1341 E_E4_REGNUM
, E_E5_REGNUM
, E_E6_REGNUM
, E_E7_REGNUM
,
1343 E_FS0_REGNUM
+ 0, E_FS0_REGNUM
+ 1, E_FS0_REGNUM
+ 2, E_FS0_REGNUM
+ 3,
1344 E_FS0_REGNUM
+ 4, E_FS0_REGNUM
+ 5, E_FS0_REGNUM
+ 6, E_FS0_REGNUM
+ 7,
1346 E_FS0_REGNUM
+ 8, E_FS0_REGNUM
+ 9, E_FS0_REGNUM
+ 10, E_FS0_REGNUM
+ 11,
1347 E_FS0_REGNUM
+ 12, E_FS0_REGNUM
+ 13, E_FS0_REGNUM
+ 14, E_FS0_REGNUM
+ 15,
1349 E_FS0_REGNUM
+ 16, E_FS0_REGNUM
+ 17, E_FS0_REGNUM
+ 18, E_FS0_REGNUM
+ 19,
1350 E_FS0_REGNUM
+ 20, E_FS0_REGNUM
+ 21, E_FS0_REGNUM
+ 22, E_FS0_REGNUM
+ 23,
1352 E_FS0_REGNUM
+ 24, E_FS0_REGNUM
+ 25, E_FS0_REGNUM
+ 26, E_FS0_REGNUM
+ 27,
1353 E_FS0_REGNUM
+ 28, E_FS0_REGNUM
+ 29, E_FS0_REGNUM
+ 30, E_FS0_REGNUM
+ 31,
1355 E_MDR_REGNUM
, E_PSW_REGNUM
, E_PC_REGNUM
1359 || dwarf2
>= ARRAY_SIZE (dwarf2_to_gdb
))
1362 return dwarf2_to_gdb
[dwarf2
];
1365 static struct gdbarch
*
1366 mn10300_gdbarch_init (struct gdbarch_info info
,
1367 struct gdbarch_list
*arches
)
1369 struct gdbarch
*gdbarch
;
1370 struct gdbarch_tdep
*tdep
;
1373 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1375 return arches
->gdbarch
;
1377 tdep
= XCNEW (struct gdbarch_tdep
);
1378 gdbarch
= gdbarch_alloc (&info
, tdep
);
1380 switch (info
.bfd_arch_info
->mach
)
1383 case bfd_mach_mn10300
:
1384 set_gdbarch_register_name (gdbarch
, mn10300_generic_register_name
);
1385 tdep
->am33_mode
= 0;
1389 set_gdbarch_register_name (gdbarch
, am33_register_name
);
1390 tdep
->am33_mode
= 1;
1393 case bfd_mach_am33_2
:
1394 set_gdbarch_register_name (gdbarch
, am33_2_register_name
);
1395 tdep
->am33_mode
= 2;
1397 set_gdbarch_fp0_regnum (gdbarch
, 32);
1400 internal_error (__FILE__
, __LINE__
,
1401 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1405 /* By default, chars are unsigned. */
1406 set_gdbarch_char_signed (gdbarch
, 0);
1409 set_gdbarch_num_regs (gdbarch
, num_regs
);
1410 set_gdbarch_register_type (gdbarch
, mn10300_register_type
);
1411 set_gdbarch_skip_prologue (gdbarch
, mn10300_skip_prologue
);
1412 set_gdbarch_pc_regnum (gdbarch
, E_PC_REGNUM
);
1413 set_gdbarch_sp_regnum (gdbarch
, E_SP_REGNUM
);
1414 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, mn10300_dwarf2_reg_to_regnum
);
1416 /* Stack unwinding. */
1417 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1419 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1420 mn10300_breakpoint::kind_from_pc
);
1421 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1422 mn10300_breakpoint::bp_from_kind
);
1423 /* decr_pc_after_break? */
1426 set_gdbarch_return_value (gdbarch
, mn10300_return_value
);
1428 /* Stage 3 -- get target calls working. */
1429 set_gdbarch_push_dummy_call (gdbarch
, mn10300_push_dummy_call
);
1430 /* set_gdbarch_return_value (store, extract) */
1433 mn10300_frame_unwind_init (gdbarch
);
1435 /* Hook in ABI-specific overrides, if they have been registered. */
1436 gdbarch_init_osabi (info
, gdbarch
);
1441 /* Dump out the mn10300 specific architecture information. */
1444 mn10300_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1446 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1447 fprintf_unfiltered (file
, "mn10300_dump_tdep: am33_mode = %d\n",
1452 _initialize_mn10300_tdep (void)
1454 gdbarch_register (bfd_arch_mn10300
, mn10300_gdbarch_init
, mn10300_dump_tdep
);