1 /* Target-dependent code for Morpho mt processor, for GDB.
3 Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Contributed by Michael Snyder, msnyder@redhat.com. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
28 #include "arch-utils.h"
30 #include "gdb_string.h"
32 #include "reggroups.h"
34 #include "trad-frame.h"
36 #include "dwarf2-frame.h"
38 #include "gdb_assert.h"
42 enum mt_arch_constants
44 MT_MAX_STRUCT_SIZE
= 16
49 MT_R0_REGNUM
, /* 32 bit regs. */
51 MT_1ST_ARGREG
= MT_R1_REGNUM
,
55 MT_LAST_ARGREG
= MT_R4_REGNUM
,
64 MT_FP_REGNUM
= MT_R12_REGNUM
,
66 MT_SP_REGNUM
= MT_R13_REGNUM
,
68 MT_RA_REGNUM
= MT_R14_REGNUM
,
70 MT_IRA_REGNUM
= MT_R15_REGNUM
,
73 /* Interrupt Enable pseudo-register, exported by SID. */
75 /* End of CPU regs. */
79 /* Co-processor registers. */
80 MT_COPRO_REGNUM
= MT_NUM_CPU_REGS
, /* 16 bit regs. */
97 MT_BYPA_REGNUM
, /* 32 bit regs. */
101 MT_CONTEXT_REGNUM
, /* 38 bits (treat as array of
103 MT_MAC_REGNUM
, /* 32 bits. */
104 MT_Z1_REGNUM
, /* 16 bits. */
105 MT_Z2_REGNUM
, /* 16 bits. */
106 MT_ICHANNEL_REGNUM
, /* 32 bits. */
107 MT_ISCRAMB_REGNUM
, /* 32 bits. */
108 MT_QSCRAMB_REGNUM
, /* 32 bits. */
109 MT_OUT_REGNUM
, /* 16 bits. */
110 MT_EXMAC_REGNUM
, /* 32 bits (8 used). */
111 MT_QCHANNEL_REGNUM
, /* 32 bits. */
112 MT_ZI2_REGNUM
, /* 16 bits. */
113 MT_ZQ2_REGNUM
, /* 16 bits. */
114 MT_CHANNEL2_REGNUM
, /* 32 bits. */
115 MT_ISCRAMB2_REGNUM
, /* 32 bits. */
116 MT_QSCRAMB2_REGNUM
, /* 32 bits. */
117 MT_QCHANNEL2_REGNUM
, /* 32 bits. */
119 /* Number of real registers. */
122 /* Pseudo-registers. */
123 MT_COPRO_PSEUDOREG_REGNUM
= MT_NUM_REGS
,
124 MT_MAC_PSEUDOREG_REGNUM
,
125 MT_COPRO_PSEUDOREG_ARRAY
,
127 MT_COPRO_PSEUDOREG_DIM_1
= 2,
128 MT_COPRO_PSEUDOREG_DIM_2
= 8,
129 /* The number of pseudo-registers for each coprocessor. These
130 include the real coprocessor registers, the pseudo-registe for
131 the coprocessor number, and the pseudo-register for the MAC. */
132 MT_COPRO_PSEUDOREG_REGS
= MT_NUM_REGS
- MT_NUM_CPU_REGS
+ 2,
133 /* The register number of the MAC, relative to a given coprocessor. */
134 MT_COPRO_PSEUDOREG_MAC_REGNUM
= MT_COPRO_PSEUDOREG_REGS
- 1,
136 /* Two pseudo-regs ('coprocessor' and 'mac'). */
137 MT_NUM_PSEUDO_REGS
= 2 + (MT_COPRO_PSEUDOREG_REGS
138 * MT_COPRO_PSEUDOREG_DIM_1
139 * MT_COPRO_PSEUDOREG_DIM_2
)
142 /* Return name of register number specified by REGNUM. */
145 mt_register_name (struct gdbarch
*gdbarch
, int regnum
)
147 static const char *const register_names
[] = {
149 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
150 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
152 /* Co-processor regs. */
153 "", /* copro register. */
154 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
155 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
156 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2",
157 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel",
158 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
159 /* Pseudo-registers. */
162 static const char *array_names
[MT_COPRO_PSEUDOREG_REGS
163 * MT_COPRO_PSEUDOREG_DIM_1
164 * MT_COPRO_PSEUDOREG_DIM_2
];
168 if (regnum
< ARRAY_SIZE (register_names
))
169 return register_names
[regnum
];
170 if (array_names
[regnum
- MT_COPRO_PSEUDOREG_ARRAY
])
171 return array_names
[regnum
- MT_COPRO_PSEUDOREG_ARRAY
];
180 regnum
-= MT_COPRO_PSEUDOREG_ARRAY
;
181 index
= regnum
% MT_COPRO_PSEUDOREG_REGS
;
182 dim_2
= (regnum
/ MT_COPRO_PSEUDOREG_REGS
) % MT_COPRO_PSEUDOREG_DIM_2
;
183 dim_1
= ((regnum
/ MT_COPRO_PSEUDOREG_REGS
/ MT_COPRO_PSEUDOREG_DIM_2
)
184 % MT_COPRO_PSEUDOREG_DIM_1
);
186 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
187 stub
= register_names
[MT_MAC_PSEUDOREG_REGNUM
];
188 else if (index
>= MT_NUM_REGS
- MT_CPR0_REGNUM
)
191 stub
= register_names
[index
+ MT_CPR0_REGNUM
];
194 array_names
[regnum
] = stub
;
198 sprintf (name
, "copro_%d_%d_%s", dim_1
, dim_2
, stub
);
199 array_names
[regnum
] = name
;
204 /* Return the type of a coprocessor register. */
207 mt_copro_register_type (struct gdbarch
*arch
, int regnum
)
211 case MT_INT_ENABLE_REGNUM
:
212 case MT_ICHANNEL_REGNUM
:
213 case MT_QCHANNEL_REGNUM
:
214 case MT_ISCRAMB_REGNUM
:
215 case MT_QSCRAMB_REGNUM
:
216 return builtin_type_int32
;
225 return builtin_type_int16
;
226 case MT_EXMAC_REGNUM
:
228 return builtin_type_uint32
;
229 case MT_CONTEXT_REGNUM
:
230 return builtin_type (arch
)->builtin_long_long
;
232 return builtin_type (arch
)->builtin_unsigned_char
;
234 if (regnum
>= MT_CPR0_REGNUM
&& regnum
<= MT_CPR15_REGNUM
)
235 return builtin_type_int16
;
236 else if (regnum
== MT_CPR0_REGNUM
+ MT_COPRO_PSEUDOREG_MAC_REGNUM
)
238 if (gdbarch_bfd_arch_info (arch
)->mach
== bfd_mach_mrisc2
239 || gdbarch_bfd_arch_info (arch
)->mach
== bfd_mach_ms2
)
240 return builtin_type_uint64
;
242 return builtin_type_uint32
;
245 return builtin_type_uint32
;
249 /* Given ARCH and a register number specified by REGNUM, return the
250 type of that register. */
253 mt_register_type (struct gdbarch
*arch
, int regnum
)
255 static struct type
*copro_type
= NULL
;
257 if (regnum
>= 0 && regnum
< MT_NUM_REGS
+ MT_NUM_PSEUDO_REGS
)
259 if (copro_type
== NULL
)
262 temp
= create_range_type (NULL
, builtin_type_int32
, 0, 1);
263 copro_type
= create_array_type (NULL
, builtin_type_int16
, temp
);
270 return builtin_type (arch
)->builtin_func_ptr
;
273 return builtin_type (arch
)->builtin_data_ptr
;
274 case MT_COPRO_REGNUM
:
275 case MT_COPRO_PSEUDOREG_REGNUM
:
277 case MT_MAC_PSEUDOREG_REGNUM
:
278 return mt_copro_register_type (arch
,
280 + MT_COPRO_PSEUDOREG_MAC_REGNUM
);
282 if (regnum
>= MT_R0_REGNUM
&& regnum
<= MT_R15_REGNUM
)
283 return builtin_type_int32
;
284 else if (regnum
< MT_COPRO_PSEUDOREG_ARRAY
)
285 return mt_copro_register_type (arch
, regnum
);
288 regnum
-= MT_COPRO_PSEUDOREG_ARRAY
;
289 regnum
%= MT_COPRO_PSEUDOREG_REGS
;
290 regnum
+= MT_CPR0_REGNUM
;
291 return mt_copro_register_type (arch
, regnum
);
295 internal_error (__FILE__
, __LINE__
,
296 _("mt_register_type: illegal register number %d"), regnum
);
299 /* Return true if register REGNUM is a member of the register group
300 specified by GROUP. */
303 mt_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
304 struct reggroup
*group
)
306 /* Groups of registers that can be displayed via "info reg". */
307 if (group
== all_reggroup
)
309 && regnum
< MT_NUM_REGS
+ MT_NUM_PSEUDO_REGS
310 && mt_register_name (gdbarch
, regnum
)[0] != '\0');
312 if (group
== general_reggroup
)
313 return (regnum
>= MT_R0_REGNUM
&& regnum
<= MT_R15_REGNUM
);
315 if (group
== float_reggroup
)
316 return 0; /* No float regs. */
318 if (group
== vector_reggroup
)
319 return 0; /* No vector regs. */
321 /* For any that are not handled above. */
322 return default_register_reggroup_p (gdbarch
, regnum
, group
);
325 /* Return the return value convention used for a given type TYPE.
326 Optionally, fetch or set the return value via READBUF or
327 WRITEBUF respectively using REGCACHE for the register
330 static enum return_value_convention
331 mt_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
332 struct type
*type
, struct regcache
*regcache
,
333 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
335 if (TYPE_LENGTH (type
) > 4)
337 /* Return values > 4 bytes are returned in memory,
338 pointed to by R11. */
343 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &addr
);
344 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
351 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &addr
);
352 write_memory (addr
, writebuf
, TYPE_LENGTH (type
));
355 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
363 /* Return values of <= 4 bytes are returned in R11. */
364 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &temp
);
365 store_unsigned_integer (readbuf
, TYPE_LENGTH (type
), temp
);
370 if (TYPE_LENGTH (type
) < 4)
373 /* Add leading zeros to the value. */
374 memset (buf
, 0, sizeof (buf
));
375 memcpy (buf
+ sizeof (buf
) - TYPE_LENGTH (type
),
376 writebuf
, TYPE_LENGTH (type
));
377 regcache_cooked_write (regcache
, MT_R11_REGNUM
, buf
);
379 else /* (TYPE_LENGTH (type) == 4 */
380 regcache_cooked_write (regcache
, MT_R11_REGNUM
, writebuf
);
383 return RETURN_VALUE_REGISTER_CONVENTION
;
387 /* If the input address, PC, is in a function prologue, return the
388 address of the end of the prologue, otherwise return the input
391 Note: PC is likely to be the function start, since this function
392 is mainly used for advancing a breakpoint to the first line, or
393 stepping to the first line when we have stepped into a function
397 mt_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
399 CORE_ADDR func_addr
= 0, func_end
= 0;
403 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
405 struct symtab_and_line sal
;
408 /* Found a function. */
409 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
);
410 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
412 /* Don't use this trick for assembly source files. */
413 sal
= find_pc_line (func_addr
, 0);
415 if (sal
.end
&& sal
.end
< func_end
)
417 /* Found a line number, use it as end of prologue. */
423 /* No function symbol, or no line symbol. Use prologue scanning method. */
426 instr
= read_memory_unsigned_integer (pc
, 4);
427 if (instr
== 0x12000000) /* nop */
429 if (instr
== 0x12ddc000) /* copy sp into fp */
432 if (instr
== 0x05dd) /* subi sp, sp, imm */
434 if (instr
>= 0x43c0 && instr
<= 0x43df) /* push */
436 /* Not an obvious prologue instruction. */
443 /* The breakpoint instruction must be the same size as the smallest
444 instruction in the instruction set.
446 The BP for ms1 is defined as 0x68000000 (BREAK).
447 The BP for ms2 is defined as 0x69000000 (illegal) */
449 static const gdb_byte
*
450 mt_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*bp_addr
,
453 static gdb_byte ms1_breakpoint
[] = { 0x68, 0, 0, 0 };
454 static gdb_byte ms2_breakpoint
[] = { 0x69, 0, 0, 0 };
457 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
458 return ms2_breakpoint
;
460 return ms1_breakpoint
;
463 /* Select the correct coprocessor register bank. Return the pseudo
464 regnum we really want to read. */
467 mt_select_coprocessor (struct gdbarch
*gdbarch
,
468 struct regcache
*regcache
, int regno
)
470 unsigned index
, base
;
473 /* Get the copro pseudo regnum. */
474 regcache_raw_read (regcache
, MT_COPRO_REGNUM
, copro
);
475 base
= (extract_signed_integer (&copro
[0], 2) * MT_COPRO_PSEUDOREG_DIM_2
476 + extract_signed_integer (&copro
[2], 2));
478 regno
-= MT_COPRO_PSEUDOREG_ARRAY
;
479 index
= regno
% MT_COPRO_PSEUDOREG_REGS
;
480 regno
/= MT_COPRO_PSEUDOREG_REGS
;
483 /* Select the correct coprocessor register bank. Invalidate the
484 coprocessor register cache. */
487 store_signed_integer (&copro
[0], 2, regno
/ MT_COPRO_PSEUDOREG_DIM_2
);
488 store_signed_integer (&copro
[2], 2, regno
% MT_COPRO_PSEUDOREG_DIM_2
);
489 regcache_raw_write (regcache
, MT_COPRO_REGNUM
, copro
);
491 /* We must flush the cache, as it is now invalid. */
492 for (ix
= MT_NUM_CPU_REGS
; ix
!= MT_NUM_REGS
; ix
++)
493 regcache_invalidate (regcache
, ix
);
499 /* Fetch the pseudo registers:
501 There are two regular pseudo-registers:
502 1) The 'coprocessor' pseudo-register (which mirrors the
503 "real" coprocessor register sent by the target), and
504 2) The 'MAC' pseudo-register (which represents the union
505 of the original 32 bit target MAC register and the new
506 8-bit extended-MAC register).
508 Additionally there is an array of coprocessor registers which track
509 the coprocessor registers for each coprocessor. */
512 mt_pseudo_register_read (struct gdbarch
*gdbarch
,
513 struct regcache
*regcache
, int regno
, gdb_byte
*buf
)
517 case MT_COPRO_REGNUM
:
518 case MT_COPRO_PSEUDOREG_REGNUM
:
519 regcache_raw_read (regcache
, MT_COPRO_REGNUM
, buf
);
522 case MT_MAC_PSEUDOREG_REGNUM
:
523 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
524 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
526 ULONGEST oldmac
= 0, ext_mac
= 0;
529 regcache_cooked_read_unsigned (regcache
, MT_MAC_REGNUM
, &oldmac
);
530 regcache_cooked_read_unsigned (regcache
, MT_EXMAC_REGNUM
, &ext_mac
);
532 (oldmac
& 0xffffffff) | ((long long) (ext_mac
& 0xff) << 32);
533 store_signed_integer (buf
, 8, newmac
);
536 regcache_raw_read (regcache
, MT_MAC_REGNUM
, buf
);
540 unsigned index
= mt_select_coprocessor (gdbarch
, regcache
, regno
);
542 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
543 mt_pseudo_register_read (gdbarch
, regcache
,
544 MT_MAC_PSEUDOREG_REGNUM
, buf
);
545 else if (index
< MT_NUM_REGS
- MT_CPR0_REGNUM
)
546 regcache_raw_read (regcache
, index
+ MT_CPR0_REGNUM
, buf
);
552 /* Write the pseudo registers:
554 Mt pseudo-registers are stored directly to the target. The
555 'coprocessor' register is special, because when it is modified, all
556 the other coprocessor regs must be flushed from the reg cache. */
559 mt_pseudo_register_write (struct gdbarch
*gdbarch
,
560 struct regcache
*regcache
,
561 int regno
, const gdb_byte
*buf
)
567 case MT_COPRO_REGNUM
:
568 case MT_COPRO_PSEUDOREG_REGNUM
:
569 regcache_raw_write (regcache
, MT_COPRO_REGNUM
, buf
);
570 for (i
= MT_NUM_CPU_REGS
; i
< MT_NUM_REGS
; i
++)
571 regcache_invalidate (regcache
, i
);
574 case MT_MAC_PSEUDOREG_REGNUM
:
575 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
576 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
578 /* The 8-byte MAC pseudo-register must be broken down into two
579 32-byte registers. */
580 unsigned int oldmac
, ext_mac
;
583 newmac
= extract_unsigned_integer (buf
, 8);
584 oldmac
= newmac
& 0xffffffff;
585 ext_mac
= (newmac
>> 32) & 0xff;
586 regcache_cooked_write_unsigned (regcache
, MT_MAC_REGNUM
, oldmac
);
587 regcache_cooked_write_unsigned (regcache
, MT_EXMAC_REGNUM
, ext_mac
);
590 regcache_raw_write (regcache
, MT_MAC_REGNUM
, buf
);
594 unsigned index
= mt_select_coprocessor (gdbarch
, regcache
, regno
);
596 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
597 mt_pseudo_register_write (gdbarch
, regcache
,
598 MT_MAC_PSEUDOREG_REGNUM
, buf
);
599 else if (index
< MT_NUM_REGS
- MT_CPR0_REGNUM
)
600 regcache_raw_write (regcache
, index
+ MT_CPR0_REGNUM
, buf
);
607 mt_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
609 /* Register size is 4 bytes. */
610 return align_down (sp
, 4);
613 /* Implements the "info registers" command. When ``all'' is non-zero,
614 the coprocessor registers will be printed in addition to the rest
618 mt_registers_info (struct gdbarch
*gdbarch
,
619 struct ui_file
*file
,
620 struct frame_info
*frame
, int regnum
, int all
)
626 lim
= all
? MT_NUM_REGS
: MT_NUM_CPU_REGS
;
628 for (regnum
= 0; regnum
< lim
; regnum
++)
630 /* Don't display the Qchannel register since it will be displayed
631 along with Ichannel. (See below.) */
632 if (regnum
== MT_QCHANNEL_REGNUM
)
635 mt_registers_info (gdbarch
, file
, frame
, regnum
, all
);
637 /* Display the Qchannel register immediately after Ichannel. */
638 if (regnum
== MT_ICHANNEL_REGNUM
)
639 mt_registers_info (gdbarch
, file
, frame
, MT_QCHANNEL_REGNUM
, all
);
644 if (regnum
== MT_EXMAC_REGNUM
)
646 else if (regnum
== MT_CONTEXT_REGNUM
)
648 /* Special output handling for 38-bit context register. */
650 unsigned int *bytes
, i
, regsize
;
652 regsize
= register_size (gdbarch
, regnum
);
654 buff
= alloca (regsize
);
655 bytes
= alloca (regsize
* sizeof (*bytes
));
657 frame_register_read (frame
, regnum
, buff
);
659 fputs_filtered (gdbarch_register_name
660 (gdbarch
, regnum
), file
);
661 print_spaces_filtered (15 - strlen (gdbarch_register_name
664 fputs_filtered ("0x", file
);
666 for (i
= 0; i
< regsize
; i
++)
667 fprintf_filtered (file
, "%02x", (unsigned int)
668 extract_unsigned_integer (buff
+ i
, 1));
669 fputs_filtered ("\t", file
);
670 print_longest (file
, 'd', 0,
671 extract_unsigned_integer (buff
, regsize
));
672 fputs_filtered ("\n", file
);
674 else if (regnum
== MT_COPRO_REGNUM
675 || regnum
== MT_COPRO_PSEUDOREG_REGNUM
)
677 /* Special output handling for the 'coprocessor' register. */
679 struct value_print_options opts
;
681 buf
= alloca (register_size (gdbarch
, MT_COPRO_REGNUM
));
682 frame_register_read (frame
, MT_COPRO_REGNUM
, buf
);
684 regnum
= MT_COPRO_PSEUDOREG_REGNUM
;
685 fputs_filtered (gdbarch_register_name (gdbarch
, regnum
),
687 print_spaces_filtered (15 - strlen (gdbarch_register_name
690 get_raw_print_options (&opts
);
692 val_print (register_type (gdbarch
, regnum
), buf
,
693 0, 0, file
, 0, &opts
,
695 fputs_filtered ("\n", file
);
697 else if (regnum
== MT_MAC_REGNUM
|| regnum
== MT_MAC_PSEUDOREG_REGNUM
)
699 ULONGEST oldmac
, ext_mac
, newmac
;
700 gdb_byte buf
[3 * sizeof (LONGEST
)];
702 /* Get the two "real" mac registers. */
703 frame_register_read (frame
, MT_MAC_REGNUM
, buf
);
704 oldmac
= extract_unsigned_integer
705 (buf
, register_size (gdbarch
, MT_MAC_REGNUM
));
706 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
707 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
709 frame_register_read (frame
, MT_EXMAC_REGNUM
, buf
);
710 ext_mac
= extract_unsigned_integer
711 (buf
, register_size (gdbarch
, MT_EXMAC_REGNUM
));
716 /* Add them together. */
717 newmac
= (oldmac
& 0xffffffff) + ((ext_mac
& 0xff) << 32);
720 regnum
= MT_MAC_PSEUDOREG_REGNUM
;
721 fputs_filtered (gdbarch_register_name (gdbarch
, regnum
),
723 print_spaces_filtered (15 - strlen (gdbarch_register_name
726 fputs_filtered ("0x", file
);
727 print_longest (file
, 'x', 0, newmac
);
728 fputs_filtered ("\t", file
);
729 print_longest (file
, 'u', 0, newmac
);
730 fputs_filtered ("\n", file
);
733 default_print_registers_info (gdbarch
, file
, frame
, regnum
, all
);
737 /* Set up the callee's arguments for an inferior function call. The
738 arguments are pushed on the stack or are placed in registers as
739 appropriate. It also sets up the return address (which points to
740 the call dummy breakpoint).
742 Returns the updated (and aligned) stack pointer. */
745 mt_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
746 struct regcache
*regcache
, CORE_ADDR bp_addr
,
747 int nargs
, struct value
**args
, CORE_ADDR sp
,
748 int struct_return
, CORE_ADDR struct_addr
)
751 gdb_byte buf
[MT_MAX_STRUCT_SIZE
];
752 int argreg
= MT_1ST_ARGREG
;
753 int split_param_len
= 0;
759 /* First handle however many args we can fit into MT_1ST_ARGREG thru
761 for (i
= 0; i
< nargs
&& argreg
<= MT_LAST_ARGREG
; i
++)
764 typelen
= TYPE_LENGTH (value_type (args
[i
]));
771 regcache_cooked_write_unsigned (regcache
, argreg
++,
772 extract_unsigned_integer
773 (value_contents (args
[i
]),
779 val
= value_contents (args
[i
]);
782 if (argreg
<= MT_LAST_ARGREG
)
784 /* This word of the argument is passed in a register. */
785 regcache_cooked_write_unsigned (regcache
, argreg
++,
786 extract_unsigned_integer
793 /* Remainder of this arg must be passed on the stack
794 (deferred to do later). */
795 split_param_len
= typelen
;
796 memcpy (buf
, val
, typelen
);
797 break; /* No more args can be handled in regs. */
802 /* By reverse engineering of gcc output, args bigger than
803 16 bytes go on the stack, and their address is passed
805 stack_dest
-= typelen
;
806 write_memory (stack_dest
, value_contents (args
[i
]), typelen
);
807 regcache_cooked_write_unsigned (regcache
, argreg
++, stack_dest
);
812 /* Next, the rest of the arguments go onto the stack, in reverse order. */
813 for (j
= nargs
- 1; j
>= i
; j
--)
817 /* Right-justify the value in an aligned-length buffer. */
818 typelen
= TYPE_LENGTH (value_type (args
[j
]));
819 slacklen
= (wordsize
- (typelen
% wordsize
)) % wordsize
;
820 val
= alloca (typelen
+ slacklen
);
821 memcpy (val
, value_contents (args
[j
]), typelen
);
822 memset (val
+ typelen
, 0, slacklen
);
823 /* Now write this data to the stack. */
824 stack_dest
-= typelen
+ slacklen
;
825 write_memory (stack_dest
, val
, typelen
+ slacklen
);
828 /* Finally, if a param needs to be split between registers and stack,
829 write the second half to the stack now. */
830 if (split_param_len
!= 0)
832 stack_dest
-= split_param_len
;
833 write_memory (stack_dest
, buf
, split_param_len
);
836 /* Set up return address (provided to us as bp_addr). */
837 regcache_cooked_write_unsigned (regcache
, MT_RA_REGNUM
, bp_addr
);
839 /* Store struct return address, if given. */
840 if (struct_return
&& struct_addr
!= 0)
841 regcache_cooked_write_unsigned (regcache
, MT_R11_REGNUM
, struct_addr
);
843 /* Set aside 16 bytes for the callee to save regs 1-4. */
846 /* Update the stack pointer. */
847 regcache_cooked_write_unsigned (regcache
, MT_SP_REGNUM
, stack_dest
);
849 /* And that should do it. Return the new stack pointer. */
854 /* The 'unwind_cache' data structure. */
856 struct mt_unwind_cache
858 /* The previous frame's inner most stack address.
859 Used as this frame ID's stack_addr. */
861 CORE_ADDR frame_base
;
865 /* Table indicating the location of each and every register. */
866 struct trad_frame_saved_reg
*saved_regs
;
869 /* Initialize an unwind_cache. Build up the saved_regs table etc. for
872 static struct mt_unwind_cache
*
873 mt_frame_unwind_cache (struct frame_info
*this_frame
,
874 void **this_prologue_cache
)
876 struct gdbarch
*gdbarch
;
877 struct mt_unwind_cache
*info
;
878 CORE_ADDR next_addr
, start_addr
, end_addr
, prologue_end_addr
;
879 unsigned long instr
, upper_half
, delayed_store
= 0;
883 if ((*this_prologue_cache
))
884 return (*this_prologue_cache
);
886 gdbarch
= get_frame_arch (this_frame
);
887 info
= FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache
);
888 (*this_prologue_cache
) = info
;
892 info
->frame_base
= 0;
893 info
->frameless_p
= 1;
894 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
896 /* Grab the frame-relative values of SP and FP, needed below.
897 The frame_saved_register function will find them on the
898 stack or in the registers as appropriate. */
899 sp
= get_frame_register_unsigned (this_frame
, MT_SP_REGNUM
);
900 fp
= get_frame_register_unsigned (this_frame
, MT_FP_REGNUM
);
902 start_addr
= get_frame_func (this_frame
);
904 /* Return early if GDB couldn't find the function. */
908 end_addr
= get_frame_pc (this_frame
);
909 prologue_end_addr
= skip_prologue_using_sal (start_addr
);
911 for (next_addr
= start_addr
; next_addr
< end_addr
; next_addr
+= 4)
913 instr
= get_frame_memory_unsigned (this_frame
, next_addr
, 4);
914 if (delayed_store
) /* previous instr was a push */
916 upper_half
= delayed_store
>> 16;
917 regnum
= upper_half
& 0xf;
918 offset
= delayed_store
& 0xffff;
919 switch (upper_half
& 0xfff0)
921 case 0x43c0: /* push using frame pointer */
922 info
->saved_regs
[regnum
].addr
= offset
;
924 case 0x43d0: /* push using stack pointer */
925 info
->saved_regs
[regnum
].addr
= offset
;
935 case 0x12000000: /* NO-OP */
937 case 0x12ddc000: /* copy sp into fp */
938 info
->frameless_p
= 0; /* Record that the frame pointer is in use. */
941 upper_half
= instr
>> 16;
942 if (upper_half
== 0x05dd || /* subi sp, sp, imm */
943 upper_half
== 0x07dd) /* subui sp, sp, imm */
945 /* Record the frame size. */
946 info
->framesize
= instr
& 0xffff;
949 if ((upper_half
& 0xfff0) == 0x43c0 || /* frame push */
950 (upper_half
& 0xfff0) == 0x43d0) /* stack push */
952 /* Save this instruction, but don't record the
953 pushed register as 'saved' until we see the
954 next instruction. That's because of deferred stores
955 on this target -- GDB won't be able to read the register
956 from the stack until one instruction later. */
957 delayed_store
= instr
;
960 /* Not a prologue instruction. Is this the end of the prologue?
961 This is the most difficult decision; when to stop scanning.
963 If we have no line symbol, then the best thing we can do
964 is to stop scanning when we encounter an instruction that
965 is not likely to be a part of the prologue.
967 But if we do have a line symbol, then we should
968 keep scanning until we reach it (or we reach end_addr). */
970 if (prologue_end_addr
&& (prologue_end_addr
> (next_addr
+ 4)))
971 continue; /* Keep scanning, recording saved_regs etc. */
973 break; /* Quit scanning: breakpoint can be set here. */
977 /* Special handling for the "saved" address of the SP:
978 The SP is of course never saved on the stack at all, so
979 by convention what we put here is simply the previous
980 _value_ of the SP (as opposed to an address where the
981 previous value would have been pushed). This will also
982 give us the frame base address. */
984 if (info
->frameless_p
)
986 info
->frame_base
= sp
+ info
->framesize
;
987 info
->prev_sp
= sp
+ info
->framesize
;
991 info
->frame_base
= fp
+ info
->framesize
;
992 info
->prev_sp
= fp
+ info
->framesize
;
994 /* Save prev_sp in saved_regs as a value, not as an address. */
995 trad_frame_set_value (info
->saved_regs
, MT_SP_REGNUM
, info
->prev_sp
);
997 /* Now convert frame offsets to actual addresses (not offsets). */
998 for (regnum
= 0; regnum
< MT_NUM_REGS
; regnum
++)
999 if (trad_frame_addr_p (info
->saved_regs
, regnum
))
1000 info
->saved_regs
[regnum
].addr
+= info
->frame_base
- info
->framesize
;
1002 /* The call instruction moves the caller's PC in the callee's RA reg.
1003 Since this is an unwind, do the reverse. Copy the location of RA
1004 into PC (the address / regnum) so that a request for PC will be
1005 converted into a request for the RA. */
1006 info
->saved_regs
[MT_PC_REGNUM
] = info
->saved_regs
[MT_RA_REGNUM
];
1012 mt_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1016 pc
= frame_unwind_register_unsigned (next_frame
, MT_PC_REGNUM
);
1021 mt_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1025 sp
= frame_unwind_register_unsigned (next_frame
, MT_SP_REGNUM
);
1029 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
1030 frame. The frame ID's base needs to match the TOS value saved by
1031 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
1033 static struct frame_id
1034 mt_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1036 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, MT_SP_REGNUM
);
1037 return frame_id_build (sp
, get_frame_pc (this_frame
));
1040 /* Given a GDB frame, determine the address of the calling function's
1041 frame. This will be used to create a new GDB frame struct. */
1044 mt_frame_this_id (struct frame_info
*this_frame
,
1045 void **this_prologue_cache
, struct frame_id
*this_id
)
1047 struct mt_unwind_cache
*info
=
1048 mt_frame_unwind_cache (this_frame
, this_prologue_cache
);
1050 if (!(info
== NULL
|| info
->prev_sp
== 0))
1051 (*this_id
) = frame_id_build (info
->prev_sp
, get_frame_func (this_frame
));
1056 static struct value
*
1057 mt_frame_prev_register (struct frame_info
*this_frame
,
1058 void **this_prologue_cache
, int regnum
)
1060 struct mt_unwind_cache
*info
=
1061 mt_frame_unwind_cache (this_frame
, this_prologue_cache
);
1063 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1067 mt_frame_base_address (struct frame_info
*this_frame
,
1068 void **this_prologue_cache
)
1070 struct mt_unwind_cache
*info
=
1071 mt_frame_unwind_cache (this_frame
, this_prologue_cache
);
1073 return info
->frame_base
;
1076 /* This is a shared interface: the 'frame_unwind' object is what's
1077 returned by the 'sniffer' function, and in turn specifies how to
1078 get a frame's ID and prev_regs.
1080 This exports the 'prev_register' and 'this_id' methods. */
1082 static const struct frame_unwind mt_frame_unwind
= {
1085 mt_frame_prev_register
,
1087 default_frame_sniffer
1090 /* Another shared interface: the 'frame_base' object specifies how to
1091 unwind a frame and secure the base addresses for frame objects
1094 static struct frame_base mt_frame_base
= {
1096 mt_frame_base_address
,
1097 mt_frame_base_address
,
1098 mt_frame_base_address
1101 static struct gdbarch
*
1102 mt_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1104 struct gdbarch
*gdbarch
;
1106 /* Find a candidate among the list of pre-declared architectures. */
1107 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1109 return arches
->gdbarch
;
1111 /* None found, create a new architecture from the information
1113 gdbarch
= gdbarch_alloc (&info
, NULL
);
1115 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1116 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1117 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
1119 set_gdbarch_register_name (gdbarch
, mt_register_name
);
1120 set_gdbarch_num_regs (gdbarch
, MT_NUM_REGS
);
1121 set_gdbarch_num_pseudo_regs (gdbarch
, MT_NUM_PSEUDO_REGS
);
1122 set_gdbarch_pc_regnum (gdbarch
, MT_PC_REGNUM
);
1123 set_gdbarch_sp_regnum (gdbarch
, MT_SP_REGNUM
);
1124 set_gdbarch_pseudo_register_read (gdbarch
, mt_pseudo_register_read
);
1125 set_gdbarch_pseudo_register_write (gdbarch
, mt_pseudo_register_write
);
1126 set_gdbarch_skip_prologue (gdbarch
, mt_skip_prologue
);
1127 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1128 set_gdbarch_breakpoint_from_pc (gdbarch
, mt_breakpoint_from_pc
);
1129 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1130 set_gdbarch_frame_args_skip (gdbarch
, 0);
1131 set_gdbarch_print_insn (gdbarch
, print_insn_mt
);
1132 set_gdbarch_register_type (gdbarch
, mt_register_type
);
1133 set_gdbarch_register_reggroup_p (gdbarch
, mt_register_reggroup_p
);
1135 set_gdbarch_return_value (gdbarch
, mt_return_value
);
1136 set_gdbarch_sp_regnum (gdbarch
, MT_SP_REGNUM
);
1138 set_gdbarch_frame_align (gdbarch
, mt_frame_align
);
1140 set_gdbarch_print_registers_info (gdbarch
, mt_registers_info
);
1142 set_gdbarch_push_dummy_call (gdbarch
, mt_push_dummy_call
);
1144 /* Target builtin data types. */
1145 set_gdbarch_short_bit (gdbarch
, 16);
1146 set_gdbarch_int_bit (gdbarch
, 32);
1147 set_gdbarch_long_bit (gdbarch
, 32);
1148 set_gdbarch_long_long_bit (gdbarch
, 64);
1149 set_gdbarch_float_bit (gdbarch
, 32);
1150 set_gdbarch_double_bit (gdbarch
, 64);
1151 set_gdbarch_long_double_bit (gdbarch
, 64);
1152 set_gdbarch_ptr_bit (gdbarch
, 32);
1154 /* Register the DWARF 2 sniffer first, and then the traditional prologue
1156 dwarf2_append_unwinders (gdbarch
);
1157 frame_unwind_append_unwinder (gdbarch
, &mt_frame_unwind
);
1158 frame_base_set_default (gdbarch
, &mt_frame_base
);
1160 /* Register the 'unwind_pc' method. */
1161 set_gdbarch_unwind_pc (gdbarch
, mt_unwind_pc
);
1162 set_gdbarch_unwind_sp (gdbarch
, mt_unwind_sp
);
1164 /* Methods for saving / extracting a dummy frame's ID.
1165 The ID's stack address must match the SP value returned by
1166 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1167 set_gdbarch_dummy_id (gdbarch
, mt_dummy_id
);
1172 /* Provide a prototype to silence -Wmissing-prototypes. */
1173 extern initialize_file_ftype _initialize_mt_tdep
;
1176 _initialize_mt_tdep (void)
1178 register_gdbarch_init (bfd_arch_mt
, mt_gdbarch_init
);