1 /* Target-dependent code for Morpho mt processor, for GDB.
3 Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Contributed by Michael Snyder, msnyder@redhat.com. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
28 #include "arch-utils.h"
30 #include "gdb_string.h"
32 #include "reggroups.h"
34 #include "trad-frame.h"
36 #include "dwarf2-frame.h"
38 #include "gdb_assert.h"
41 enum mt_arch_constants
43 MT_MAX_STRUCT_SIZE
= 16
48 MT_R0_REGNUM
, /* 32 bit regs. */
50 MT_1ST_ARGREG
= MT_R1_REGNUM
,
54 MT_LAST_ARGREG
= MT_R4_REGNUM
,
63 MT_FP_REGNUM
= MT_R12_REGNUM
,
65 MT_SP_REGNUM
= MT_R13_REGNUM
,
67 MT_RA_REGNUM
= MT_R14_REGNUM
,
69 MT_IRA_REGNUM
= MT_R15_REGNUM
,
72 /* Interrupt Enable pseudo-register, exported by SID. */
74 /* End of CPU regs. */
78 /* Co-processor registers. */
79 MT_COPRO_REGNUM
= MT_NUM_CPU_REGS
, /* 16 bit regs. */
96 MT_BYPA_REGNUM
, /* 32 bit regs. */
100 MT_CONTEXT_REGNUM
, /* 38 bits (treat as array of
102 MT_MAC_REGNUM
, /* 32 bits. */
103 MT_Z1_REGNUM
, /* 16 bits. */
104 MT_Z2_REGNUM
, /* 16 bits. */
105 MT_ICHANNEL_REGNUM
, /* 32 bits. */
106 MT_ISCRAMB_REGNUM
, /* 32 bits. */
107 MT_QSCRAMB_REGNUM
, /* 32 bits. */
108 MT_OUT_REGNUM
, /* 16 bits. */
109 MT_EXMAC_REGNUM
, /* 32 bits (8 used). */
110 MT_QCHANNEL_REGNUM
, /* 32 bits. */
111 MT_ZI2_REGNUM
, /* 16 bits. */
112 MT_ZQ2_REGNUM
, /* 16 bits. */
113 MT_CHANNEL2_REGNUM
, /* 32 bits. */
114 MT_ISCRAMB2_REGNUM
, /* 32 bits. */
115 MT_QSCRAMB2_REGNUM
, /* 32 bits. */
116 MT_QCHANNEL2_REGNUM
, /* 32 bits. */
118 /* Number of real registers. */
121 /* Pseudo-registers. */
122 MT_COPRO_PSEUDOREG_REGNUM
= MT_NUM_REGS
,
123 MT_MAC_PSEUDOREG_REGNUM
,
124 MT_COPRO_PSEUDOREG_ARRAY
,
126 MT_COPRO_PSEUDOREG_DIM_1
= 2,
127 MT_COPRO_PSEUDOREG_DIM_2
= 8,
128 /* The number of pseudo-registers for each coprocessor. These
129 include the real coprocessor registers, the pseudo-registe for
130 the coprocessor number, and the pseudo-register for the MAC. */
131 MT_COPRO_PSEUDOREG_REGS
= MT_NUM_REGS
- MT_NUM_CPU_REGS
+ 2,
132 /* The register number of the MAC, relative to a given coprocessor. */
133 MT_COPRO_PSEUDOREG_MAC_REGNUM
= MT_COPRO_PSEUDOREG_REGS
- 1,
135 /* Two pseudo-regs ('coprocessor' and 'mac'). */
136 MT_NUM_PSEUDO_REGS
= 2 + (MT_COPRO_PSEUDOREG_REGS
137 * MT_COPRO_PSEUDOREG_DIM_1
138 * MT_COPRO_PSEUDOREG_DIM_2
)
141 /* Return name of register number specified by REGNUM. */
144 mt_register_name (struct gdbarch
*gdbarch
, int regnum
)
146 static const char *const register_names
[] = {
148 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
149 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
151 /* Co-processor regs. */
152 "", /* copro register. */
153 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
154 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
155 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2",
156 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel",
157 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
158 /* Pseudo-registers. */
161 static const char *array_names
[MT_COPRO_PSEUDOREG_REGS
162 * MT_COPRO_PSEUDOREG_DIM_1
163 * MT_COPRO_PSEUDOREG_DIM_2
];
167 if (regnum
< ARRAY_SIZE (register_names
))
168 return register_names
[regnum
];
169 if (array_names
[regnum
- MT_COPRO_PSEUDOREG_ARRAY
])
170 return array_names
[regnum
- MT_COPRO_PSEUDOREG_ARRAY
];
179 regnum
-= MT_COPRO_PSEUDOREG_ARRAY
;
180 index
= regnum
% MT_COPRO_PSEUDOREG_REGS
;
181 dim_2
= (regnum
/ MT_COPRO_PSEUDOREG_REGS
) % MT_COPRO_PSEUDOREG_DIM_2
;
182 dim_1
= ((regnum
/ MT_COPRO_PSEUDOREG_REGS
/ MT_COPRO_PSEUDOREG_DIM_2
)
183 % MT_COPRO_PSEUDOREG_DIM_1
);
185 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
186 stub
= register_names
[MT_MAC_PSEUDOREG_REGNUM
];
187 else if (index
>= MT_NUM_REGS
- MT_CPR0_REGNUM
)
190 stub
= register_names
[index
+ MT_CPR0_REGNUM
];
193 array_names
[regnum
] = stub
;
197 sprintf (name
, "copro_%d_%d_%s", dim_1
, dim_2
, stub
);
198 array_names
[regnum
] = name
;
203 /* Return the type of a coprocessor register. */
206 mt_copro_register_type (struct gdbarch
*arch
, int regnum
)
210 case MT_INT_ENABLE_REGNUM
:
211 case MT_ICHANNEL_REGNUM
:
212 case MT_QCHANNEL_REGNUM
:
213 case MT_ISCRAMB_REGNUM
:
214 case MT_QSCRAMB_REGNUM
:
215 return builtin_type_int32
;
224 return builtin_type_int16
;
225 case MT_EXMAC_REGNUM
:
227 return builtin_type_uint32
;
228 case MT_CONTEXT_REGNUM
:
229 return builtin_type_long_long
;
231 return builtin_type_unsigned_char
;
233 if (regnum
>= MT_CPR0_REGNUM
&& regnum
<= MT_CPR15_REGNUM
)
234 return builtin_type_int16
;
235 else if (regnum
== MT_CPR0_REGNUM
+ MT_COPRO_PSEUDOREG_MAC_REGNUM
)
237 if (gdbarch_bfd_arch_info (arch
)->mach
== bfd_mach_mrisc2
238 || gdbarch_bfd_arch_info (arch
)->mach
== bfd_mach_ms2
)
239 return builtin_type_uint64
;
241 return builtin_type_uint32
;
244 return builtin_type_uint32
;
248 /* Given ARCH and a register number specified by REGNUM, return the
249 type of that register. */
252 mt_register_type (struct gdbarch
*arch
, int regnum
)
254 static struct type
*void_func_ptr
= NULL
;
255 static struct type
*void_ptr
= NULL
;
256 static struct type
*copro_type
;
258 if (regnum
>= 0 && regnum
< MT_NUM_REGS
+ MT_NUM_PSEUDO_REGS
)
260 if (void_func_ptr
== NULL
)
264 void_ptr
= lookup_pointer_type (builtin_type_void
);
266 lookup_pointer_type (lookup_function_type (builtin_type_void
));
267 temp
= create_range_type (NULL
, builtin_type_unsigned_int
, 0, 1);
268 copro_type
= create_array_type (NULL
, builtin_type_int16
, temp
);
275 return void_func_ptr
;
279 case MT_COPRO_REGNUM
:
280 case MT_COPRO_PSEUDOREG_REGNUM
:
282 case MT_MAC_PSEUDOREG_REGNUM
:
283 return mt_copro_register_type (arch
,
285 + MT_COPRO_PSEUDOREG_MAC_REGNUM
);
287 if (regnum
>= MT_R0_REGNUM
&& regnum
<= MT_R15_REGNUM
)
288 return builtin_type_int32
;
289 else if (regnum
< MT_COPRO_PSEUDOREG_ARRAY
)
290 return mt_copro_register_type (arch
, regnum
);
293 regnum
-= MT_COPRO_PSEUDOREG_ARRAY
;
294 regnum
%= MT_COPRO_PSEUDOREG_REGS
;
295 regnum
+= MT_CPR0_REGNUM
;
296 return mt_copro_register_type (arch
, regnum
);
300 internal_error (__FILE__
, __LINE__
,
301 _("mt_register_type: illegal register number %d"), regnum
);
304 /* Return true if register REGNUM is a member of the register group
305 specified by GROUP. */
308 mt_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
309 struct reggroup
*group
)
311 /* Groups of registers that can be displayed via "info reg". */
312 if (group
== all_reggroup
)
314 && regnum
< MT_NUM_REGS
+ MT_NUM_PSEUDO_REGS
315 && mt_register_name (gdbarch
, regnum
)[0] != '\0');
317 if (group
== general_reggroup
)
318 return (regnum
>= MT_R0_REGNUM
&& regnum
<= MT_R15_REGNUM
);
320 if (group
== float_reggroup
)
321 return 0; /* No float regs. */
323 if (group
== vector_reggroup
)
324 return 0; /* No vector regs. */
326 /* For any that are not handled above. */
327 return default_register_reggroup_p (gdbarch
, regnum
, group
);
330 /* Return the return value convention used for a given type TYPE.
331 Optionally, fetch or set the return value via READBUF or
332 WRITEBUF respectively using REGCACHE for the register
335 static enum return_value_convention
336 mt_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
337 struct type
*type
, struct regcache
*regcache
,
338 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
340 if (TYPE_LENGTH (type
) > 4)
342 /* Return values > 4 bytes are returned in memory,
343 pointed to by R11. */
348 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &addr
);
349 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
356 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &addr
);
357 write_memory (addr
, writebuf
, TYPE_LENGTH (type
));
360 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
368 /* Return values of <= 4 bytes are returned in R11. */
369 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &temp
);
370 store_unsigned_integer (readbuf
, TYPE_LENGTH (type
), temp
);
375 if (TYPE_LENGTH (type
) < 4)
378 /* Add leading zeros to the value. */
379 memset (buf
, 0, sizeof (buf
));
380 memcpy (buf
+ sizeof (buf
) - TYPE_LENGTH (type
),
381 writebuf
, TYPE_LENGTH (type
));
382 regcache_cooked_write (regcache
, MT_R11_REGNUM
, buf
);
384 else /* (TYPE_LENGTH (type) == 4 */
385 regcache_cooked_write (regcache
, MT_R11_REGNUM
, writebuf
);
388 return RETURN_VALUE_REGISTER_CONVENTION
;
392 /* If the input address, PC, is in a function prologue, return the
393 address of the end of the prologue, otherwise return the input
396 Note: PC is likely to be the function start, since this function
397 is mainly used for advancing a breakpoint to the first line, or
398 stepping to the first line when we have stepped into a function
402 mt_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
404 CORE_ADDR func_addr
= 0, func_end
= 0;
408 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
410 struct symtab_and_line sal
;
413 /* Found a function. */
414 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
);
415 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
417 /* Don't use this trick for assembly source files. */
418 sal
= find_pc_line (func_addr
, 0);
420 if (sal
.end
&& sal
.end
< func_end
)
422 /* Found a line number, use it as end of prologue. */
428 /* No function symbol, or no line symbol. Use prologue scanning method. */
431 instr
= read_memory_unsigned_integer (pc
, 4);
432 if (instr
== 0x12000000) /* nop */
434 if (instr
== 0x12ddc000) /* copy sp into fp */
437 if (instr
== 0x05dd) /* subi sp, sp, imm */
439 if (instr
>= 0x43c0 && instr
<= 0x43df) /* push */
441 /* Not an obvious prologue instruction. */
448 /* The breakpoint instruction must be the same size as the smallest
449 instruction in the instruction set.
451 The BP for ms1 is defined as 0x68000000 (BREAK).
452 The BP for ms2 is defined as 0x69000000 (illegal) */
454 static const gdb_byte
*
455 mt_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*bp_addr
,
458 static gdb_byte ms1_breakpoint
[] = { 0x68, 0, 0, 0 };
459 static gdb_byte ms2_breakpoint
[] = { 0x69, 0, 0, 0 };
462 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
463 return ms2_breakpoint
;
465 return ms1_breakpoint
;
468 /* Select the correct coprocessor register bank. Return the pseudo
469 regnum we really want to read. */
472 mt_select_coprocessor (struct gdbarch
*gdbarch
,
473 struct regcache
*regcache
, int regno
)
475 unsigned index
, base
;
478 /* Get the copro pseudo regnum. */
479 regcache_raw_read (regcache
, MT_COPRO_REGNUM
, copro
);
480 base
= (extract_signed_integer (&copro
[0], 2) * MT_COPRO_PSEUDOREG_DIM_2
481 + extract_signed_integer (&copro
[2], 2));
483 regno
-= MT_COPRO_PSEUDOREG_ARRAY
;
484 index
= regno
% MT_COPRO_PSEUDOREG_REGS
;
485 regno
/= MT_COPRO_PSEUDOREG_REGS
;
488 /* Select the correct coprocessor register bank. Invalidate the
489 coprocessor register cache. */
492 store_signed_integer (&copro
[0], 2, regno
/ MT_COPRO_PSEUDOREG_DIM_2
);
493 store_signed_integer (&copro
[2], 2, regno
% MT_COPRO_PSEUDOREG_DIM_2
);
494 regcache_raw_write (regcache
, MT_COPRO_REGNUM
, copro
);
496 /* We must flush the cache, as it is now invalid. */
497 for (ix
= MT_NUM_CPU_REGS
; ix
!= MT_NUM_REGS
; ix
++)
498 regcache_invalidate (regcache
, ix
);
504 /* Fetch the pseudo registers:
506 There are two regular pseudo-registers:
507 1) The 'coprocessor' pseudo-register (which mirrors the
508 "real" coprocessor register sent by the target), and
509 2) The 'MAC' pseudo-register (which represents the union
510 of the original 32 bit target MAC register and the new
511 8-bit extended-MAC register).
513 Additionally there is an array of coprocessor registers which track
514 the coprocessor registers for each coprocessor. */
517 mt_pseudo_register_read (struct gdbarch
*gdbarch
,
518 struct regcache
*regcache
, int regno
, gdb_byte
*buf
)
522 case MT_COPRO_REGNUM
:
523 case MT_COPRO_PSEUDOREG_REGNUM
:
524 regcache_raw_read (regcache
, MT_COPRO_REGNUM
, buf
);
527 case MT_MAC_PSEUDOREG_REGNUM
:
528 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
529 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
531 ULONGEST oldmac
= 0, ext_mac
= 0;
534 regcache_cooked_read_unsigned (regcache
, MT_MAC_REGNUM
, &oldmac
);
535 regcache_cooked_read_unsigned (regcache
, MT_EXMAC_REGNUM
, &ext_mac
);
537 (oldmac
& 0xffffffff) | ((long long) (ext_mac
& 0xff) << 32);
538 store_signed_integer (buf
, 8, newmac
);
541 regcache_raw_read (regcache
, MT_MAC_REGNUM
, buf
);
545 unsigned index
= mt_select_coprocessor (gdbarch
, regcache
, regno
);
547 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
548 mt_pseudo_register_read (gdbarch
, regcache
,
549 MT_MAC_PSEUDOREG_REGNUM
, buf
);
550 else if (index
< MT_NUM_REGS
- MT_CPR0_REGNUM
)
551 regcache_raw_read (regcache
, index
+ MT_CPR0_REGNUM
, buf
);
557 /* Write the pseudo registers:
559 Mt pseudo-registers are stored directly to the target. The
560 'coprocessor' register is special, because when it is modified, all
561 the other coprocessor regs must be flushed from the reg cache. */
564 mt_pseudo_register_write (struct gdbarch
*gdbarch
,
565 struct regcache
*regcache
,
566 int regno
, const gdb_byte
*buf
)
572 case MT_COPRO_REGNUM
:
573 case MT_COPRO_PSEUDOREG_REGNUM
:
574 regcache_raw_write (regcache
, MT_COPRO_REGNUM
, buf
);
575 for (i
= MT_NUM_CPU_REGS
; i
< MT_NUM_REGS
; i
++)
576 regcache_invalidate (regcache
, i
);
579 case MT_MAC_PSEUDOREG_REGNUM
:
580 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
581 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
583 /* The 8-byte MAC pseudo-register must be broken down into two
584 32-byte registers. */
585 unsigned int oldmac
, ext_mac
;
588 newmac
= extract_unsigned_integer (buf
, 8);
589 oldmac
= newmac
& 0xffffffff;
590 ext_mac
= (newmac
>> 32) & 0xff;
591 regcache_cooked_write_unsigned (regcache
, MT_MAC_REGNUM
, oldmac
);
592 regcache_cooked_write_unsigned (regcache
, MT_EXMAC_REGNUM
, ext_mac
);
595 regcache_raw_write (regcache
, MT_MAC_REGNUM
, buf
);
599 unsigned index
= mt_select_coprocessor (gdbarch
, regcache
, regno
);
601 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
602 mt_pseudo_register_write (gdbarch
, regcache
,
603 MT_MAC_PSEUDOREG_REGNUM
, buf
);
604 else if (index
< MT_NUM_REGS
- MT_CPR0_REGNUM
)
605 regcache_raw_write (regcache
, index
+ MT_CPR0_REGNUM
, buf
);
612 mt_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
614 /* Register size is 4 bytes. */
615 return align_down (sp
, 4);
618 /* Implements the "info registers" command. When ``all'' is non-zero,
619 the coprocessor registers will be printed in addition to the rest
623 mt_registers_info (struct gdbarch
*gdbarch
,
624 struct ui_file
*file
,
625 struct frame_info
*frame
, int regnum
, int all
)
631 lim
= all
? MT_NUM_REGS
: MT_NUM_CPU_REGS
;
633 for (regnum
= 0; regnum
< lim
; regnum
++)
635 /* Don't display the Qchannel register since it will be displayed
636 along with Ichannel. (See below.) */
637 if (regnum
== MT_QCHANNEL_REGNUM
)
640 mt_registers_info (gdbarch
, file
, frame
, regnum
, all
);
642 /* Display the Qchannel register immediately after Ichannel. */
643 if (regnum
== MT_ICHANNEL_REGNUM
)
644 mt_registers_info (gdbarch
, file
, frame
, MT_QCHANNEL_REGNUM
, all
);
649 if (regnum
== MT_EXMAC_REGNUM
)
651 else if (regnum
== MT_CONTEXT_REGNUM
)
653 /* Special output handling for 38-bit context register. */
655 unsigned int *bytes
, i
, regsize
;
657 regsize
= register_size (gdbarch
, regnum
);
659 buff
= alloca (regsize
);
660 bytes
= alloca (regsize
* sizeof (*bytes
));
662 frame_register_read (frame
, regnum
, buff
);
664 fputs_filtered (gdbarch_register_name
665 (gdbarch
, regnum
), file
);
666 print_spaces_filtered (15 - strlen (gdbarch_register_name
669 fputs_filtered ("0x", file
);
671 for (i
= 0; i
< regsize
; i
++)
672 fprintf_filtered (file
, "%02x", (unsigned int)
673 extract_unsigned_integer (buff
+ i
, 1));
674 fputs_filtered ("\t", file
);
675 print_longest (file
, 'd', 0,
676 extract_unsigned_integer (buff
, regsize
));
677 fputs_filtered ("\n", file
);
679 else if (regnum
== MT_COPRO_REGNUM
680 || regnum
== MT_COPRO_PSEUDOREG_REGNUM
)
682 /* Special output handling for the 'coprocessor' register. */
685 buf
= alloca (register_size (gdbarch
, MT_COPRO_REGNUM
));
686 frame_register_read (frame
, MT_COPRO_REGNUM
, buf
);
688 regnum
= MT_COPRO_PSEUDOREG_REGNUM
;
689 fputs_filtered (gdbarch_register_name (gdbarch
, regnum
),
691 print_spaces_filtered (15 - strlen (gdbarch_register_name
694 val_print (register_type (gdbarch
, regnum
), buf
,
695 0, 0, file
, 0, 1, 0, Val_no_prettyprint
,
697 fputs_filtered ("\n", file
);
699 else if (regnum
== MT_MAC_REGNUM
|| regnum
== MT_MAC_PSEUDOREG_REGNUM
)
701 ULONGEST oldmac
, ext_mac
, newmac
;
702 gdb_byte buf
[3 * sizeof (LONGEST
)];
704 /* Get the two "real" mac registers. */
705 frame_register_read (frame
, MT_MAC_REGNUM
, buf
);
706 oldmac
= extract_unsigned_integer
707 (buf
, register_size (gdbarch
, MT_MAC_REGNUM
));
708 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
709 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
711 frame_register_read (frame
, MT_EXMAC_REGNUM
, buf
);
712 ext_mac
= extract_unsigned_integer
713 (buf
, register_size (gdbarch
, MT_EXMAC_REGNUM
));
718 /* Add them together. */
719 newmac
= (oldmac
& 0xffffffff) + ((ext_mac
& 0xff) << 32);
722 regnum
= MT_MAC_PSEUDOREG_REGNUM
;
723 fputs_filtered (gdbarch_register_name (gdbarch
, regnum
),
725 print_spaces_filtered (15 - strlen (gdbarch_register_name
728 fputs_filtered ("0x", file
);
729 print_longest (file
, 'x', 0, newmac
);
730 fputs_filtered ("\t", file
);
731 print_longest (file
, 'u', 0, newmac
);
732 fputs_filtered ("\n", file
);
735 default_print_registers_info (gdbarch
, file
, frame
, regnum
, all
);
739 /* Set up the callee's arguments for an inferior function call. The
740 arguments are pushed on the stack or are placed in registers as
741 appropriate. It also sets up the return address (which points to
742 the call dummy breakpoint).
744 Returns the updated (and aligned) stack pointer. */
747 mt_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
748 struct regcache
*regcache
, CORE_ADDR bp_addr
,
749 int nargs
, struct value
**args
, CORE_ADDR sp
,
750 int struct_return
, CORE_ADDR struct_addr
)
753 gdb_byte buf
[MT_MAX_STRUCT_SIZE
];
754 int argreg
= MT_1ST_ARGREG
;
755 int split_param_len
= 0;
761 /* First handle however many args we can fit into MT_1ST_ARGREG thru
763 for (i
= 0; i
< nargs
&& argreg
<= MT_LAST_ARGREG
; i
++)
766 typelen
= TYPE_LENGTH (value_type (args
[i
]));
773 regcache_cooked_write_unsigned (regcache
, argreg
++,
774 extract_unsigned_integer
775 (value_contents (args
[i
]),
781 val
= value_contents (args
[i
]);
784 if (argreg
<= MT_LAST_ARGREG
)
786 /* This word of the argument is passed in a register. */
787 regcache_cooked_write_unsigned (regcache
, argreg
++,
788 extract_unsigned_integer
795 /* Remainder of this arg must be passed on the stack
796 (deferred to do later). */
797 split_param_len
= typelen
;
798 memcpy (buf
, val
, typelen
);
799 break; /* No more args can be handled in regs. */
804 /* By reverse engineering of gcc output, args bigger than
805 16 bytes go on the stack, and their address is passed
807 stack_dest
-= typelen
;
808 write_memory (stack_dest
, value_contents (args
[i
]), typelen
);
809 regcache_cooked_write_unsigned (regcache
, argreg
++, stack_dest
);
814 /* Next, the rest of the arguments go onto the stack, in reverse order. */
815 for (j
= nargs
- 1; j
>= i
; j
--)
819 /* Right-justify the value in an aligned-length buffer. */
820 typelen
= TYPE_LENGTH (value_type (args
[j
]));
821 slacklen
= (wordsize
- (typelen
% wordsize
)) % wordsize
;
822 val
= alloca (typelen
+ slacklen
);
823 memcpy (val
, value_contents (args
[j
]), typelen
);
824 memset (val
+ typelen
, 0, slacklen
);
825 /* Now write this data to the stack. */
826 stack_dest
-= typelen
+ slacklen
;
827 write_memory (stack_dest
, val
, typelen
+ slacklen
);
830 /* Finally, if a param needs to be split between registers and stack,
831 write the second half to the stack now. */
832 if (split_param_len
!= 0)
834 stack_dest
-= split_param_len
;
835 write_memory (stack_dest
, buf
, split_param_len
);
838 /* Set up return address (provided to us as bp_addr). */
839 regcache_cooked_write_unsigned (regcache
, MT_RA_REGNUM
, bp_addr
);
841 /* Store struct return address, if given. */
842 if (struct_return
&& struct_addr
!= 0)
843 regcache_cooked_write_unsigned (regcache
, MT_R11_REGNUM
, struct_addr
);
845 /* Set aside 16 bytes for the callee to save regs 1-4. */
848 /* Update the stack pointer. */
849 regcache_cooked_write_unsigned (regcache
, MT_SP_REGNUM
, stack_dest
);
851 /* And that should do it. Return the new stack pointer. */
856 /* The 'unwind_cache' data structure. */
858 struct mt_unwind_cache
860 /* The previous frame's inner most stack address.
861 Used as this frame ID's stack_addr. */
863 CORE_ADDR frame_base
;
867 /* Table indicating the location of each and every register. */
868 struct trad_frame_saved_reg
*saved_regs
;
871 /* Initialize an unwind_cache. Build up the saved_regs table etc. for
874 static struct mt_unwind_cache
*
875 mt_frame_unwind_cache (struct frame_info
*next_frame
,
876 void **this_prologue_cache
)
878 struct gdbarch
*gdbarch
;
879 struct mt_unwind_cache
*info
;
880 CORE_ADDR next_addr
, start_addr
, end_addr
, prologue_end_addr
;
881 unsigned long instr
, upper_half
, delayed_store
= 0;
885 if ((*this_prologue_cache
))
886 return (*this_prologue_cache
);
888 gdbarch
= get_frame_arch (next_frame
);
889 info
= FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache
);
890 (*this_prologue_cache
) = info
;
894 info
->frame_base
= 0;
895 info
->frameless_p
= 1;
896 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
898 /* Grab the frame-relative values of SP and FP, needed below.
899 The frame_saved_register function will find them on the
900 stack or in the registers as appropriate. */
901 sp
= frame_unwind_register_unsigned (next_frame
, MT_SP_REGNUM
);
902 fp
= frame_unwind_register_unsigned (next_frame
, MT_FP_REGNUM
);
904 start_addr
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
906 /* Return early if GDB couldn't find the function. */
910 end_addr
= frame_pc_unwind (next_frame
);
911 prologue_end_addr
= skip_prologue_using_sal (start_addr
);
913 for (next_addr
= start_addr
; next_addr
< end_addr
; next_addr
+= 4)
915 instr
= get_frame_memory_unsigned (next_frame
, next_addr
, 4);
916 if (delayed_store
) /* previous instr was a push */
918 upper_half
= delayed_store
>> 16;
919 regnum
= upper_half
& 0xf;
920 offset
= delayed_store
& 0xffff;
921 switch (upper_half
& 0xfff0)
923 case 0x43c0: /* push using frame pointer */
924 info
->saved_regs
[regnum
].addr
= offset
;
926 case 0x43d0: /* push using stack pointer */
927 info
->saved_regs
[regnum
].addr
= offset
;
937 case 0x12000000: /* NO-OP */
939 case 0x12ddc000: /* copy sp into fp */
940 info
->frameless_p
= 0; /* Record that the frame pointer is in use. */
943 upper_half
= instr
>> 16;
944 if (upper_half
== 0x05dd || /* subi sp, sp, imm */
945 upper_half
== 0x07dd) /* subui sp, sp, imm */
947 /* Record the frame size. */
948 info
->framesize
= instr
& 0xffff;
951 if ((upper_half
& 0xfff0) == 0x43c0 || /* frame push */
952 (upper_half
& 0xfff0) == 0x43d0) /* stack push */
954 /* Save this instruction, but don't record the
955 pushed register as 'saved' until we see the
956 next instruction. That's because of deferred stores
957 on this target -- GDB won't be able to read the register
958 from the stack until one instruction later. */
959 delayed_store
= instr
;
962 /* Not a prologue instruction. Is this the end of the prologue?
963 This is the most difficult decision; when to stop scanning.
965 If we have no line symbol, then the best thing we can do
966 is to stop scanning when we encounter an instruction that
967 is not likely to be a part of the prologue.
969 But if we do have a line symbol, then we should
970 keep scanning until we reach it (or we reach end_addr). */
972 if (prologue_end_addr
&& (prologue_end_addr
> (next_addr
+ 4)))
973 continue; /* Keep scanning, recording saved_regs etc. */
975 break; /* Quit scanning: breakpoint can be set here. */
979 /* Special handling for the "saved" address of the SP:
980 The SP is of course never saved on the stack at all, so
981 by convention what we put here is simply the previous
982 _value_ of the SP (as opposed to an address where the
983 previous value would have been pushed). This will also
984 give us the frame base address. */
986 if (info
->frameless_p
)
988 info
->frame_base
= sp
+ info
->framesize
;
989 info
->prev_sp
= sp
+ info
->framesize
;
993 info
->frame_base
= fp
+ info
->framesize
;
994 info
->prev_sp
= fp
+ info
->framesize
;
996 /* Save prev_sp in saved_regs as a value, not as an address. */
997 trad_frame_set_value (info
->saved_regs
, MT_SP_REGNUM
, info
->prev_sp
);
999 /* Now convert frame offsets to actual addresses (not offsets). */
1000 for (regnum
= 0; regnum
< MT_NUM_REGS
; regnum
++)
1001 if (trad_frame_addr_p (info
->saved_regs
, regnum
))
1002 info
->saved_regs
[regnum
].addr
+= info
->frame_base
- info
->framesize
;
1004 /* The call instruction moves the caller's PC in the callee's RA reg.
1005 Since this is an unwind, do the reverse. Copy the location of RA
1006 into PC (the address / regnum) so that a request for PC will be
1007 converted into a request for the RA. */
1008 info
->saved_regs
[MT_PC_REGNUM
] = info
->saved_regs
[MT_RA_REGNUM
];
1014 mt_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1018 pc
= frame_unwind_register_unsigned (next_frame
, MT_PC_REGNUM
);
1023 mt_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1027 sp
= frame_unwind_register_unsigned (next_frame
, MT_SP_REGNUM
);
1031 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1032 dummy frame. The frame ID's base needs to match the TOS value
1033 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1036 static struct frame_id
1037 mt_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1039 return frame_id_build (mt_unwind_sp (gdbarch
, next_frame
),
1040 frame_pc_unwind (next_frame
));
1043 /* Given a GDB frame, determine the address of the calling function's
1044 frame. This will be used to create a new GDB frame struct. */
1047 mt_frame_this_id (struct frame_info
*next_frame
,
1048 void **this_prologue_cache
, struct frame_id
*this_id
)
1050 struct mt_unwind_cache
*info
=
1051 mt_frame_unwind_cache (next_frame
, this_prologue_cache
);
1053 if (!(info
== NULL
|| info
->prev_sp
== 0))
1054 (*this_id
) = frame_id_build (info
->prev_sp
,
1055 frame_func_unwind (next_frame
, NORMAL_FRAME
));
1061 mt_frame_prev_register (struct frame_info
*next_frame
,
1062 void **this_prologue_cache
,
1063 int regnum
, int *optimizedp
,
1064 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1065 int *realnump
, gdb_byte
*bufferp
)
1067 struct mt_unwind_cache
*info
=
1068 mt_frame_unwind_cache (next_frame
, this_prologue_cache
);
1070 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
1071 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1075 mt_frame_base_address (struct frame_info
*next_frame
,
1076 void **this_prologue_cache
)
1078 struct mt_unwind_cache
*info
=
1079 mt_frame_unwind_cache (next_frame
, this_prologue_cache
);
1081 return info
->frame_base
;
1084 /* This is a shared interface: the 'frame_unwind' object is what's
1085 returned by the 'sniffer' function, and in turn specifies how to
1086 get a frame's ID and prev_regs.
1088 This exports the 'prev_register' and 'this_id' methods. */
1090 static const struct frame_unwind mt_frame_unwind
= {
1093 mt_frame_prev_register
1096 /* The sniffer is a registered function that identifies our family of
1097 frame unwind functions (this_id and prev_register). */
1099 static const struct frame_unwind
*
1100 mt_frame_sniffer (struct frame_info
*next_frame
)
1102 return &mt_frame_unwind
;
1105 /* Another shared interface: the 'frame_base' object specifies how to
1106 unwind a frame and secure the base addresses for frame objects
1109 static struct frame_base mt_frame_base
= {
1111 mt_frame_base_address
,
1112 mt_frame_base_address
,
1113 mt_frame_base_address
1116 static struct gdbarch
*
1117 mt_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1119 struct gdbarch
*gdbarch
;
1121 /* Find a candidate among the list of pre-declared architectures. */
1122 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1124 return arches
->gdbarch
;
1126 /* None found, create a new architecture from the information
1128 gdbarch
= gdbarch_alloc (&info
, NULL
);
1130 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1131 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1132 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
1134 set_gdbarch_register_name (gdbarch
, mt_register_name
);
1135 set_gdbarch_num_regs (gdbarch
, MT_NUM_REGS
);
1136 set_gdbarch_num_pseudo_regs (gdbarch
, MT_NUM_PSEUDO_REGS
);
1137 set_gdbarch_pc_regnum (gdbarch
, MT_PC_REGNUM
);
1138 set_gdbarch_sp_regnum (gdbarch
, MT_SP_REGNUM
);
1139 set_gdbarch_pseudo_register_read (gdbarch
, mt_pseudo_register_read
);
1140 set_gdbarch_pseudo_register_write (gdbarch
, mt_pseudo_register_write
);
1141 set_gdbarch_skip_prologue (gdbarch
, mt_skip_prologue
);
1142 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1143 set_gdbarch_breakpoint_from_pc (gdbarch
, mt_breakpoint_from_pc
);
1144 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1145 set_gdbarch_frame_args_skip (gdbarch
, 0);
1146 set_gdbarch_print_insn (gdbarch
, print_insn_mt
);
1147 set_gdbarch_register_type (gdbarch
, mt_register_type
);
1148 set_gdbarch_register_reggroup_p (gdbarch
, mt_register_reggroup_p
);
1150 set_gdbarch_return_value (gdbarch
, mt_return_value
);
1151 set_gdbarch_sp_regnum (gdbarch
, MT_SP_REGNUM
);
1153 set_gdbarch_frame_align (gdbarch
, mt_frame_align
);
1155 set_gdbarch_print_registers_info (gdbarch
, mt_registers_info
);
1157 set_gdbarch_push_dummy_call (gdbarch
, mt_push_dummy_call
);
1159 /* Target builtin data types. */
1160 set_gdbarch_short_bit (gdbarch
, 16);
1161 set_gdbarch_int_bit (gdbarch
, 32);
1162 set_gdbarch_long_bit (gdbarch
, 32);
1163 set_gdbarch_long_long_bit (gdbarch
, 64);
1164 set_gdbarch_float_bit (gdbarch
, 32);
1165 set_gdbarch_double_bit (gdbarch
, 64);
1166 set_gdbarch_long_double_bit (gdbarch
, 64);
1167 set_gdbarch_ptr_bit (gdbarch
, 32);
1169 /* Register the DWARF 2 sniffer first, and then the traditional prologue
1171 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1172 frame_unwind_append_sniffer (gdbarch
, mt_frame_sniffer
);
1173 frame_base_set_default (gdbarch
, &mt_frame_base
);
1175 /* Register the 'unwind_pc' method. */
1176 set_gdbarch_unwind_pc (gdbarch
, mt_unwind_pc
);
1177 set_gdbarch_unwind_sp (gdbarch
, mt_unwind_sp
);
1179 /* Methods for saving / extracting a dummy frame's ID.
1180 The ID's stack address must match the SP value returned by
1181 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1182 set_gdbarch_unwind_dummy_id (gdbarch
, mt_unwind_dummy_id
);
1188 _initialize_mt_tdep (void)
1190 register_gdbarch_init (bfd_arch_mt
, mt_gdbarch_init
);