1 /* Target-dependent code for Morpho mt processor, for GDB.
3 Copyright (C) 2005, 2007 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 /* Contributed by Michael Snyder, msnyder@redhat.com. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
28 #include "arch-utils.h"
30 #include "gdb_string.h"
32 #include "reggroups.h"
34 #include "trad-frame.h"
36 #include "dwarf2-frame.h"
38 #include "gdb_assert.h"
40 enum mt_arch_constants
42 MT_MAX_STRUCT_SIZE
= 16
47 MT_R0_REGNUM
, /* 32 bit regs. */
49 MT_1ST_ARGREG
= MT_R1_REGNUM
,
53 MT_LAST_ARGREG
= MT_R4_REGNUM
,
62 MT_FP_REGNUM
= MT_R12_REGNUM
,
64 MT_SP_REGNUM
= MT_R13_REGNUM
,
66 MT_RA_REGNUM
= MT_R14_REGNUM
,
68 MT_IRA_REGNUM
= MT_R15_REGNUM
,
71 /* Interrupt Enable pseudo-register, exported by SID. */
73 /* End of CPU regs. */
77 /* Co-processor registers. */
78 MT_COPRO_REGNUM
= MT_NUM_CPU_REGS
, /* 16 bit regs. */
95 MT_BYPA_REGNUM
, /* 32 bit regs. */
99 MT_CONTEXT_REGNUM
, /* 38 bits (treat as array of
101 MT_MAC_REGNUM
, /* 32 bits. */
102 MT_Z1_REGNUM
, /* 16 bits. */
103 MT_Z2_REGNUM
, /* 16 bits. */
104 MT_ICHANNEL_REGNUM
, /* 32 bits. */
105 MT_ISCRAMB_REGNUM
, /* 32 bits. */
106 MT_QSCRAMB_REGNUM
, /* 32 bits. */
107 MT_OUT_REGNUM
, /* 16 bits. */
108 MT_EXMAC_REGNUM
, /* 32 bits (8 used). */
109 MT_QCHANNEL_REGNUM
, /* 32 bits. */
110 MT_ZI2_REGNUM
, /* 16 bits. */
111 MT_ZQ2_REGNUM
, /* 16 bits. */
112 MT_CHANNEL2_REGNUM
, /* 32 bits. */
113 MT_ISCRAMB2_REGNUM
, /* 32 bits. */
114 MT_QSCRAMB2_REGNUM
, /* 32 bits. */
115 MT_QCHANNEL2_REGNUM
, /* 32 bits. */
117 /* Number of real registers. */
120 /* Pseudo-registers. */
121 MT_COPRO_PSEUDOREG_REGNUM
= MT_NUM_REGS
,
122 MT_MAC_PSEUDOREG_REGNUM
,
123 MT_COPRO_PSEUDOREG_ARRAY
,
125 MT_COPRO_PSEUDOREG_DIM_1
= 2,
126 MT_COPRO_PSEUDOREG_DIM_2
= 8,
127 /* The number of pseudo-registers for each coprocessor. These
128 include the real coprocessor registers, the pseudo-registe for
129 the coprocessor number, and the pseudo-register for the MAC. */
130 MT_COPRO_PSEUDOREG_REGS
= MT_NUM_REGS
- MT_NUM_CPU_REGS
+ 2,
131 /* The register number of the MAC, relative to a given coprocessor. */
132 MT_COPRO_PSEUDOREG_MAC_REGNUM
= MT_COPRO_PSEUDOREG_REGS
- 1,
134 /* Two pseudo-regs ('coprocessor' and 'mac'). */
135 MT_NUM_PSEUDO_REGS
= 2 + (MT_COPRO_PSEUDOREG_REGS
136 * MT_COPRO_PSEUDOREG_DIM_1
137 * MT_COPRO_PSEUDOREG_DIM_2
)
140 /* Return name of register number specified by REGNUM. */
143 mt_register_name (int regnum
)
145 static const char *const register_names
[] = {
147 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
148 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
150 /* Co-processor regs. */
151 "", /* copro register. */
152 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
153 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
154 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2",
155 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel",
156 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2",
157 /* Pseudo-registers. */
160 static const char *array_names
[MT_COPRO_PSEUDOREG_REGS
161 * MT_COPRO_PSEUDOREG_DIM_1
162 * MT_COPRO_PSEUDOREG_DIM_2
];
166 if (regnum
< ARRAY_SIZE (register_names
))
167 return register_names
[regnum
];
168 if (array_names
[regnum
- MT_COPRO_PSEUDOREG_ARRAY
])
169 return array_names
[regnum
- MT_COPRO_PSEUDOREG_ARRAY
];
178 regnum
-= MT_COPRO_PSEUDOREG_ARRAY
;
179 index
= regnum
% MT_COPRO_PSEUDOREG_REGS
;
180 dim_2
= (regnum
/ MT_COPRO_PSEUDOREG_REGS
) % MT_COPRO_PSEUDOREG_DIM_2
;
181 dim_1
= ((regnum
/ MT_COPRO_PSEUDOREG_REGS
/ MT_COPRO_PSEUDOREG_DIM_2
)
182 % MT_COPRO_PSEUDOREG_DIM_1
);
184 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
185 stub
= register_names
[MT_MAC_PSEUDOREG_REGNUM
];
186 else if (index
>= MT_NUM_REGS
- MT_CPR0_REGNUM
)
189 stub
= register_names
[index
+ MT_CPR0_REGNUM
];
192 array_names
[regnum
] = stub
;
196 sprintf (name
, "copro_%d_%d_%s", dim_1
, dim_2
, stub
);
197 array_names
[regnum
] = name
;
202 /* Return the type of a coprocessor register. */
205 mt_copro_register_type (struct gdbarch
*arch
, int regnum
)
209 case MT_INT_ENABLE_REGNUM
:
210 case MT_ICHANNEL_REGNUM
:
211 case MT_QCHANNEL_REGNUM
:
212 case MT_ISCRAMB_REGNUM
:
213 case MT_QSCRAMB_REGNUM
:
214 return builtin_type_int32
;
223 return builtin_type_int16
;
224 case MT_EXMAC_REGNUM
:
226 return builtin_type_uint32
;
227 case MT_CONTEXT_REGNUM
:
228 return builtin_type_long_long
;
230 return builtin_type_unsigned_char
;
232 if (regnum
>= MT_CPR0_REGNUM
&& regnum
<= MT_CPR15_REGNUM
)
233 return builtin_type_int16
;
234 else if (regnum
== MT_CPR0_REGNUM
+ MT_COPRO_PSEUDOREG_MAC_REGNUM
)
236 if (gdbarch_bfd_arch_info (arch
)->mach
== bfd_mach_mrisc2
237 || gdbarch_bfd_arch_info (arch
)->mach
== bfd_mach_ms2
)
238 return builtin_type_uint64
;
240 return builtin_type_uint32
;
243 return builtin_type_uint32
;
247 /* Given ARCH and a register number specified by REGNUM, return the
248 type of that register. */
251 mt_register_type (struct gdbarch
*arch
, int regnum
)
253 static struct type
*void_func_ptr
= NULL
;
254 static struct type
*void_ptr
= NULL
;
255 static struct type
*copro_type
;
257 if (regnum
>= 0 && regnum
< MT_NUM_REGS
+ MT_NUM_PSEUDO_REGS
)
259 if (void_func_ptr
== NULL
)
263 void_ptr
= lookup_pointer_type (builtin_type_void
);
265 lookup_pointer_type (lookup_function_type (builtin_type_void
));
266 temp
= create_range_type (NULL
, builtin_type_unsigned_int
, 0, 1);
267 copro_type
= create_array_type (NULL
, builtin_type_int16
, temp
);
274 return void_func_ptr
;
278 case MT_COPRO_REGNUM
:
279 case MT_COPRO_PSEUDOREG_REGNUM
:
281 case MT_MAC_PSEUDOREG_REGNUM
:
282 return mt_copro_register_type (arch
,
284 + MT_COPRO_PSEUDOREG_MAC_REGNUM
);
286 if (regnum
>= MT_R0_REGNUM
&& regnum
<= MT_R15_REGNUM
)
287 return builtin_type_int32
;
288 else if (regnum
< MT_COPRO_PSEUDOREG_ARRAY
)
289 return mt_copro_register_type (arch
, regnum
);
292 regnum
-= MT_COPRO_PSEUDOREG_ARRAY
;
293 regnum
%= MT_COPRO_PSEUDOREG_REGS
;
294 regnum
+= MT_CPR0_REGNUM
;
295 return mt_copro_register_type (arch
, regnum
);
299 internal_error (__FILE__
, __LINE__
,
300 _("mt_register_type: illegal register number %d"), regnum
);
303 /* Return true if register REGNUM is a member of the register group
304 specified by GROUP. */
307 mt_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
308 struct reggroup
*group
)
310 /* Groups of registers that can be displayed via "info reg". */
311 if (group
== all_reggroup
)
313 && regnum
< MT_NUM_REGS
+ MT_NUM_PSEUDO_REGS
314 && mt_register_name (regnum
)[0] != '\0');
316 if (group
== general_reggroup
)
317 return (regnum
>= MT_R0_REGNUM
&& regnum
<= MT_R15_REGNUM
);
319 if (group
== float_reggroup
)
320 return 0; /* No float regs. */
322 if (group
== vector_reggroup
)
323 return 0; /* No vector regs. */
325 /* For any that are not handled above. */
326 return default_register_reggroup_p (gdbarch
, regnum
, group
);
329 /* Return the return value convention used for a given type TYPE.
330 Optionally, fetch or set the return value via READBUF or
331 WRITEBUF respectively using REGCACHE for the register
334 static enum return_value_convention
335 mt_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
336 struct regcache
*regcache
, gdb_byte
*readbuf
,
337 const gdb_byte
*writebuf
)
339 if (TYPE_LENGTH (type
) > 4)
341 /* Return values > 4 bytes are returned in memory,
342 pointed to by R11. */
347 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &addr
);
348 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
355 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &addr
);
356 write_memory (addr
, writebuf
, TYPE_LENGTH (type
));
359 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
367 /* Return values of <= 4 bytes are returned in R11. */
368 regcache_cooked_read_unsigned (regcache
, MT_R11_REGNUM
, &temp
);
369 store_unsigned_integer (readbuf
, TYPE_LENGTH (type
), temp
);
374 if (TYPE_LENGTH (type
) < 4)
377 /* Add leading zeros to the value. */
378 memset (buf
, 0, sizeof (buf
));
379 memcpy (buf
+ sizeof (buf
) - TYPE_LENGTH (type
),
380 writebuf
, TYPE_LENGTH (type
));
381 regcache_cooked_write (regcache
, MT_R11_REGNUM
, buf
);
383 else /* (TYPE_LENGTH (type) == 4 */
384 regcache_cooked_write (regcache
, MT_R11_REGNUM
, writebuf
);
387 return RETURN_VALUE_REGISTER_CONVENTION
;
391 /* If the input address, PC, is in a function prologue, return the
392 address of the end of the prologue, otherwise return the input
395 Note: PC is likely to be the function start, since this function
396 is mainly used for advancing a breakpoint to the first line, or
397 stepping to the first line when we have stepped into a function
401 mt_skip_prologue (CORE_ADDR pc
)
403 CORE_ADDR func_addr
= 0, func_end
= 0;
407 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
409 struct symtab_and_line sal
;
412 /* Found a function. */
413 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
, NULL
);
414 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
416 /* Don't use this trick for assembly source files. */
417 sal
= find_pc_line (func_addr
, 0);
419 if (sal
.end
&& sal
.end
< func_end
)
421 /* Found a line number, use it as end of prologue. */
427 /* No function symbol, or no line symbol. Use prologue scanning method. */
430 instr
= read_memory_unsigned_integer (pc
, 4);
431 if (instr
== 0x12000000) /* nop */
433 if (instr
== 0x12ddc000) /* copy sp into fp */
436 if (instr
== 0x05dd) /* subi sp, sp, imm */
438 if (instr
>= 0x43c0 && instr
<= 0x43df) /* push */
440 /* Not an obvious prologue instruction. */
447 /* The breakpoint instruction must be the same size as the smallest
448 instruction in the instruction set.
450 The BP for ms1 is defined as 0x68000000 (BREAK).
451 The BP for ms2 is defined as 0x69000000 (illegal) */
453 static const gdb_byte
*
454 mt_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
456 static gdb_byte ms1_breakpoint
[] = { 0x68, 0, 0, 0 };
457 static gdb_byte ms2_breakpoint
[] = { 0x69, 0, 0, 0 };
460 if (gdbarch_bfd_arch_info (current_gdbarch
)->mach
== bfd_mach_ms2
)
461 return ms2_breakpoint
;
463 return ms1_breakpoint
;
466 /* Select the correct coprocessor register bank. Return the pseudo
467 regnum we really want to read. */
470 mt_select_coprocessor (struct gdbarch
*gdbarch
,
471 struct regcache
*regcache
, int regno
)
473 unsigned index
, base
;
476 /* Get the copro pseudo regnum. */
477 regcache_raw_read (regcache
, MT_COPRO_REGNUM
, copro
);
478 base
= (extract_signed_integer (&copro
[0], 2) * MT_COPRO_PSEUDOREG_DIM_2
479 + extract_signed_integer (&copro
[2], 2));
481 regno
-= MT_COPRO_PSEUDOREG_ARRAY
;
482 index
= regno
% MT_COPRO_PSEUDOREG_REGS
;
483 regno
/= MT_COPRO_PSEUDOREG_REGS
;
486 /* Select the correct coprocessor register bank. Invalidate the
487 coprocessor register cache. */
490 store_signed_integer (&copro
[0], 2, regno
/ MT_COPRO_PSEUDOREG_DIM_2
);
491 store_signed_integer (&copro
[2], 2, regno
% MT_COPRO_PSEUDOREG_DIM_2
);
492 regcache_raw_write (regcache
, MT_COPRO_REGNUM
, copro
);
494 /* We must flush the cache, as it is now invalid. */
495 for (ix
= MT_NUM_CPU_REGS
; ix
!= MT_NUM_REGS
; ix
++)
496 regcache_invalidate (regcache
, ix
);
502 /* Fetch the pseudo registers:
504 There are two regular pseudo-registers:
505 1) The 'coprocessor' pseudo-register (which mirrors the
506 "real" coprocessor register sent by the target), and
507 2) The 'MAC' pseudo-register (which represents the union
508 of the original 32 bit target MAC register and the new
509 8-bit extended-MAC register).
511 Additionally there is an array of coprocessor registers which track
512 the coprocessor registers for each coprocessor. */
515 mt_pseudo_register_read (struct gdbarch
*gdbarch
,
516 struct regcache
*regcache
, int regno
, gdb_byte
*buf
)
520 case MT_COPRO_REGNUM
:
521 case MT_COPRO_PSEUDOREG_REGNUM
:
522 regcache_raw_read (regcache
, MT_COPRO_REGNUM
, buf
);
525 case MT_MAC_PSEUDOREG_REGNUM
:
526 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
527 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
529 ULONGEST oldmac
= 0, ext_mac
= 0;
532 regcache_cooked_read_unsigned (regcache
, MT_MAC_REGNUM
, &oldmac
);
533 regcache_cooked_read_unsigned (regcache
, MT_EXMAC_REGNUM
, &ext_mac
);
535 (oldmac
& 0xffffffff) | ((long long) (ext_mac
& 0xff) << 32);
536 store_signed_integer (buf
, 8, newmac
);
539 regcache_raw_read (regcache
, MT_MAC_REGNUM
, buf
);
543 unsigned index
= mt_select_coprocessor (gdbarch
, regcache
, regno
);
545 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
546 mt_pseudo_register_read (gdbarch
, regcache
,
547 MT_MAC_PSEUDOREG_REGNUM
, buf
);
548 else if (index
< MT_NUM_REGS
- MT_CPR0_REGNUM
)
549 regcache_raw_read (regcache
, index
+ MT_CPR0_REGNUM
, buf
);
555 /* Write the pseudo registers:
557 Mt pseudo-registers are stored directly to the target. The
558 'coprocessor' register is special, because when it is modified, all
559 the other coprocessor regs must be flushed from the reg cache. */
562 mt_pseudo_register_write (struct gdbarch
*gdbarch
,
563 struct regcache
*regcache
,
564 int regno
, const gdb_byte
*buf
)
570 case MT_COPRO_REGNUM
:
571 case MT_COPRO_PSEUDOREG_REGNUM
:
572 regcache_raw_write (regcache
, MT_COPRO_REGNUM
, buf
);
573 for (i
= MT_NUM_CPU_REGS
; i
< MT_NUM_REGS
; i
++)
574 regcache_invalidate (regcache
, i
);
577 case MT_MAC_PSEUDOREG_REGNUM
:
578 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
579 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
581 /* The 8-byte MAC pseudo-register must be broken down into two
582 32-byte registers. */
583 unsigned int oldmac
, ext_mac
;
586 newmac
= extract_unsigned_integer (buf
, 8);
587 oldmac
= newmac
& 0xffffffff;
588 ext_mac
= (newmac
>> 32) & 0xff;
589 regcache_cooked_write_unsigned (regcache
, MT_MAC_REGNUM
, oldmac
);
590 regcache_cooked_write_unsigned (regcache
, MT_EXMAC_REGNUM
, ext_mac
);
593 regcache_raw_write (regcache
, MT_MAC_REGNUM
, buf
);
597 unsigned index
= mt_select_coprocessor (gdbarch
, regcache
, regno
);
599 if (index
== MT_COPRO_PSEUDOREG_MAC_REGNUM
)
600 mt_pseudo_register_write (gdbarch
, regcache
,
601 MT_MAC_PSEUDOREG_REGNUM
, buf
);
602 else if (index
< MT_NUM_REGS
- MT_CPR0_REGNUM
)
603 regcache_raw_write (regcache
, index
+ MT_CPR0_REGNUM
, buf
);
610 mt_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
612 /* Register size is 4 bytes. */
613 return align_down (sp
, 4);
616 /* Implements the "info registers" command. When ``all'' is non-zero,
617 the coprocessor registers will be printed in addition to the rest
621 mt_registers_info (struct gdbarch
*gdbarch
,
622 struct ui_file
*file
,
623 struct frame_info
*frame
, int regnum
, int all
)
629 lim
= all
? MT_NUM_REGS
: MT_NUM_CPU_REGS
;
631 for (regnum
= 0; regnum
< lim
; regnum
++)
633 /* Don't display the Qchannel register since it will be displayed
634 along with Ichannel. (See below.) */
635 if (regnum
== MT_QCHANNEL_REGNUM
)
638 mt_registers_info (gdbarch
, file
, frame
, regnum
, all
);
640 /* Display the Qchannel register immediately after Ichannel. */
641 if (regnum
== MT_ICHANNEL_REGNUM
)
642 mt_registers_info (gdbarch
, file
, frame
, MT_QCHANNEL_REGNUM
, all
);
647 if (regnum
== MT_EXMAC_REGNUM
)
649 else if (regnum
== MT_CONTEXT_REGNUM
)
651 /* Special output handling for 38-bit context register. */
653 unsigned int *bytes
, i
, regsize
;
655 regsize
= register_size (gdbarch
, regnum
);
657 buff
= alloca (regsize
);
658 bytes
= alloca (regsize
* sizeof (*bytes
));
660 frame_register_read (frame
, regnum
, buff
);
662 fputs_filtered (gdbarch_register_name
663 (current_gdbarch
, regnum
), file
);
664 print_spaces_filtered (15 - strlen (gdbarch_register_name
665 (current_gdbarch
, regnum
)),
667 fputs_filtered ("0x", file
);
669 for (i
= 0; i
< regsize
; i
++)
670 fprintf_filtered (file
, "%02x", (unsigned int)
671 extract_unsigned_integer (buff
+ i
, 1));
672 fputs_filtered ("\t", file
);
673 print_longest (file
, 'd', 0,
674 extract_unsigned_integer (buff
, regsize
));
675 fputs_filtered ("\n", file
);
677 else if (regnum
== MT_COPRO_REGNUM
678 || regnum
== MT_COPRO_PSEUDOREG_REGNUM
)
680 /* Special output handling for the 'coprocessor' register. */
683 buf
= alloca (register_size (gdbarch
, MT_COPRO_REGNUM
));
684 frame_register_read (frame
, MT_COPRO_REGNUM
, buf
);
686 regnum
= MT_COPRO_PSEUDOREG_REGNUM
;
687 fputs_filtered (gdbarch_register_name (current_gdbarch
, regnum
),
689 print_spaces_filtered (15 - strlen (gdbarch_register_name
690 (current_gdbarch
, regnum
)),
692 val_print (register_type (gdbarch
, regnum
), buf
,
693 0, 0, file
, 0, 1, 0, Val_no_prettyprint
);
694 fputs_filtered ("\n", file
);
696 else if (regnum
== MT_MAC_REGNUM
|| regnum
== MT_MAC_PSEUDOREG_REGNUM
)
698 ULONGEST oldmac
, ext_mac
, newmac
;
699 gdb_byte buf
[3 * sizeof (LONGEST
)];
701 /* Get the two "real" mac registers. */
702 frame_register_read (frame
, MT_MAC_REGNUM
, buf
);
703 oldmac
= extract_unsigned_integer
704 (buf
, register_size (gdbarch
, MT_MAC_REGNUM
));
705 if (gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_mrisc2
706 || gdbarch_bfd_arch_info (gdbarch
)->mach
== bfd_mach_ms2
)
708 frame_register_read (frame
, MT_EXMAC_REGNUM
, buf
);
709 ext_mac
= extract_unsigned_integer
710 (buf
, register_size (gdbarch
, MT_EXMAC_REGNUM
));
715 /* Add them together. */
716 newmac
= (oldmac
& 0xffffffff) + ((ext_mac
& 0xff) << 32);
719 regnum
= MT_MAC_PSEUDOREG_REGNUM
;
720 fputs_filtered (gdbarch_register_name (current_gdbarch
, regnum
),
722 print_spaces_filtered (15 - strlen (gdbarch_register_name
723 (current_gdbarch
, regnum
)),
725 fputs_filtered ("0x", file
);
726 print_longest (file
, 'x', 0, newmac
);
727 fputs_filtered ("\t", file
);
728 print_longest (file
, 'u', 0, newmac
);
729 fputs_filtered ("\n", file
);
732 default_print_registers_info (gdbarch
, file
, frame
, regnum
, all
);
736 /* Set up the callee's arguments for an inferior function call. The
737 arguments are pushed on the stack or are placed in registers as
738 appropriate. It also sets up the return address (which points to
739 the call dummy breakpoint).
741 Returns the updated (and aligned) stack pointer. */
744 mt_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
745 struct regcache
*regcache
, CORE_ADDR bp_addr
,
746 int nargs
, struct value
**args
, CORE_ADDR sp
,
747 int struct_return
, CORE_ADDR struct_addr
)
750 gdb_byte buf
[MT_MAX_STRUCT_SIZE
];
751 int argreg
= MT_1ST_ARGREG
;
752 int split_param_len
= 0;
758 /* First handle however many args we can fit into MT_1ST_ARGREG thru
760 for (i
= 0; i
< nargs
&& argreg
<= MT_LAST_ARGREG
; i
++)
763 typelen
= TYPE_LENGTH (value_type (args
[i
]));
770 regcache_cooked_write_unsigned (regcache
, argreg
++,
771 extract_unsigned_integer
772 (value_contents (args
[i
]),
778 val
= value_contents (args
[i
]);
781 if (argreg
<= MT_LAST_ARGREG
)
783 /* This word of the argument is passed in a register. */
784 regcache_cooked_write_unsigned (regcache
, argreg
++,
785 extract_unsigned_integer
792 /* Remainder of this arg must be passed on the stack
793 (deferred to do later). */
794 split_param_len
= typelen
;
795 memcpy (buf
, val
, typelen
);
796 break; /* No more args can be handled in regs. */
801 /* By reverse engineering of gcc output, args bigger than
802 16 bytes go on the stack, and their address is passed
804 stack_dest
-= typelen
;
805 write_memory (stack_dest
, value_contents (args
[i
]), typelen
);
806 regcache_cooked_write_unsigned (regcache
, argreg
++, stack_dest
);
811 /* Next, the rest of the arguments go onto the stack, in reverse order. */
812 for (j
= nargs
- 1; j
>= i
; j
--)
816 /* Right-justify the value in an aligned-length buffer. */
817 typelen
= TYPE_LENGTH (value_type (args
[j
]));
818 slacklen
= (wordsize
- (typelen
% wordsize
)) % wordsize
;
819 val
= alloca (typelen
+ slacklen
);
820 memcpy (val
, value_contents (args
[j
]), typelen
);
821 memset (val
+ typelen
, 0, slacklen
);
822 /* Now write this data to the stack. */
823 stack_dest
-= typelen
+ slacklen
;
824 write_memory (stack_dest
, val
, typelen
+ slacklen
);
827 /* Finally, if a param needs to be split between registers and stack,
828 write the second half to the stack now. */
829 if (split_param_len
!= 0)
831 stack_dest
-= split_param_len
;
832 write_memory (stack_dest
, buf
, split_param_len
);
835 /* Set up return address (provided to us as bp_addr). */
836 regcache_cooked_write_unsigned (regcache
, MT_RA_REGNUM
, bp_addr
);
838 /* Store struct return address, if given. */
839 if (struct_return
&& struct_addr
!= 0)
840 regcache_cooked_write_unsigned (regcache
, MT_R11_REGNUM
, struct_addr
);
842 /* Set aside 16 bytes for the callee to save regs 1-4. */
845 /* Update the stack pointer. */
846 regcache_cooked_write_unsigned (regcache
, MT_SP_REGNUM
, stack_dest
);
848 /* And that should do it. Return the new stack pointer. */
853 /* The 'unwind_cache' data structure. */
855 struct mt_unwind_cache
857 /* The previous frame's inner most stack address.
858 Used as this frame ID's stack_addr. */
860 CORE_ADDR frame_base
;
864 /* Table indicating the location of each and every register. */
865 struct trad_frame_saved_reg
*saved_regs
;
868 /* Initialize an unwind_cache. Build up the saved_regs table etc. for
871 static struct mt_unwind_cache
*
872 mt_frame_unwind_cache (struct frame_info
*next_frame
,
873 void **this_prologue_cache
)
875 struct gdbarch
*gdbarch
;
876 struct mt_unwind_cache
*info
;
877 CORE_ADDR next_addr
, start_addr
, end_addr
, prologue_end_addr
;
878 unsigned long instr
, upper_half
, delayed_store
= 0;
882 if ((*this_prologue_cache
))
883 return (*this_prologue_cache
);
885 gdbarch
= get_frame_arch (next_frame
);
886 info
= FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache
);
887 (*this_prologue_cache
) = info
;
891 info
->frame_base
= 0;
892 info
->frameless_p
= 1;
893 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
895 /* Grab the frame-relative values of SP and FP, needed below.
896 The frame_saved_register function will find them on the
897 stack or in the registers as appropriate. */
898 frame_unwind_unsigned_register (next_frame
, MT_SP_REGNUM
, &sp
);
899 frame_unwind_unsigned_register (next_frame
, MT_FP_REGNUM
, &fp
);
901 start_addr
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
903 /* Return early if GDB couldn't find the function. */
907 end_addr
= frame_pc_unwind (next_frame
);
908 prologue_end_addr
= skip_prologue_using_sal (start_addr
);
910 for (next_addr
= start_addr
; next_addr
< end_addr
; next_addr
+= 4)
912 instr
= get_frame_memory_unsigned (next_frame
, next_addr
, 4);
913 if (delayed_store
) /* previous instr was a push */
915 upper_half
= delayed_store
>> 16;
916 regnum
= upper_half
& 0xf;
917 offset
= delayed_store
& 0xffff;
918 switch (upper_half
& 0xfff0)
920 case 0x43c0: /* push using frame pointer */
921 info
->saved_regs
[regnum
].addr
= offset
;
923 case 0x43d0: /* push using stack pointer */
924 info
->saved_regs
[regnum
].addr
= offset
;
934 case 0x12000000: /* NO-OP */
936 case 0x12ddc000: /* copy sp into fp */
937 info
->frameless_p
= 0; /* Record that the frame pointer is in use. */
940 upper_half
= instr
>> 16;
941 if (upper_half
== 0x05dd || /* subi sp, sp, imm */
942 upper_half
== 0x07dd) /* subui sp, sp, imm */
944 /* Record the frame size. */
945 info
->framesize
= instr
& 0xffff;
948 if ((upper_half
& 0xfff0) == 0x43c0 || /* frame push */
949 (upper_half
& 0xfff0) == 0x43d0) /* stack push */
951 /* Save this instruction, but don't record the
952 pushed register as 'saved' until we see the
953 next instruction. That's because of deferred stores
954 on this target -- GDB won't be able to read the register
955 from the stack until one instruction later. */
956 delayed_store
= instr
;
959 /* Not a prologue instruction. Is this the end of the prologue?
960 This is the most difficult decision; when to stop scanning.
962 If we have no line symbol, then the best thing we can do
963 is to stop scanning when we encounter an instruction that
964 is not likely to be a part of the prologue.
966 But if we do have a line symbol, then we should
967 keep scanning until we reach it (or we reach end_addr). */
969 if (prologue_end_addr
&& (prologue_end_addr
> (next_addr
+ 4)))
970 continue; /* Keep scanning, recording saved_regs etc. */
972 break; /* Quit scanning: breakpoint can be set here. */
976 /* Special handling for the "saved" address of the SP:
977 The SP is of course never saved on the stack at all, so
978 by convention what we put here is simply the previous
979 _value_ of the SP (as opposed to an address where the
980 previous value would have been pushed). This will also
981 give us the frame base address. */
983 if (info
->frameless_p
)
985 info
->frame_base
= sp
+ info
->framesize
;
986 info
->prev_sp
= sp
+ info
->framesize
;
990 info
->frame_base
= fp
+ info
->framesize
;
991 info
->prev_sp
= fp
+ info
->framesize
;
993 /* Save prev_sp in saved_regs as a value, not as an address. */
994 trad_frame_set_value (info
->saved_regs
, MT_SP_REGNUM
, info
->prev_sp
);
996 /* Now convert frame offsets to actual addresses (not offsets). */
997 for (regnum
= 0; regnum
< MT_NUM_REGS
; regnum
++)
998 if (trad_frame_addr_p (info
->saved_regs
, regnum
))
999 info
->saved_regs
[regnum
].addr
+= info
->frame_base
- info
->framesize
;
1001 /* The call instruction moves the caller's PC in the callee's RA reg.
1002 Since this is an unwind, do the reverse. Copy the location of RA
1003 into PC (the address / regnum) so that a request for PC will be
1004 converted into a request for the RA. */
1005 info
->saved_regs
[MT_PC_REGNUM
] = info
->saved_regs
[MT_RA_REGNUM
];
1011 mt_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1015 frame_unwind_unsigned_register (next_frame
, MT_PC_REGNUM
, &pc
);
1020 mt_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1024 frame_unwind_unsigned_register (next_frame
, MT_SP_REGNUM
, &sp
);
1028 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1029 dummy frame. The frame ID's base needs to match the TOS value
1030 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1033 static struct frame_id
1034 mt_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1036 return frame_id_build (mt_unwind_sp (gdbarch
, next_frame
),
1037 frame_pc_unwind (next_frame
));
1040 /* Given a GDB frame, determine the address of the calling function's
1041 frame. This will be used to create a new GDB frame struct. */
1044 mt_frame_this_id (struct frame_info
*next_frame
,
1045 void **this_prologue_cache
, struct frame_id
*this_id
)
1047 struct mt_unwind_cache
*info
=
1048 mt_frame_unwind_cache (next_frame
, this_prologue_cache
);
1050 if (!(info
== NULL
|| info
->prev_sp
== 0))
1051 (*this_id
) = frame_id_build (info
->prev_sp
,
1052 frame_func_unwind (next_frame
, NORMAL_FRAME
));
1058 mt_frame_prev_register (struct frame_info
*next_frame
,
1059 void **this_prologue_cache
,
1060 int regnum
, int *optimizedp
,
1061 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1062 int *realnump
, gdb_byte
*bufferp
)
1064 struct mt_unwind_cache
*info
=
1065 mt_frame_unwind_cache (next_frame
, this_prologue_cache
);
1067 trad_frame_get_prev_register (next_frame
, info
->saved_regs
, regnum
,
1068 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1072 mt_frame_base_address (struct frame_info
*next_frame
,
1073 void **this_prologue_cache
)
1075 struct mt_unwind_cache
*info
=
1076 mt_frame_unwind_cache (next_frame
, this_prologue_cache
);
1078 return info
->frame_base
;
1081 /* This is a shared interface: the 'frame_unwind' object is what's
1082 returned by the 'sniffer' function, and in turn specifies how to
1083 get a frame's ID and prev_regs.
1085 This exports the 'prev_register' and 'this_id' methods. */
1087 static const struct frame_unwind mt_frame_unwind
= {
1090 mt_frame_prev_register
1093 /* The sniffer is a registered function that identifies our family of
1094 frame unwind functions (this_id and prev_register). */
1096 static const struct frame_unwind
*
1097 mt_frame_sniffer (struct frame_info
*next_frame
)
1099 return &mt_frame_unwind
;
1102 /* Another shared interface: the 'frame_base' object specifies how to
1103 unwind a frame and secure the base addresses for frame objects
1106 static struct frame_base mt_frame_base
= {
1108 mt_frame_base_address
,
1109 mt_frame_base_address
,
1110 mt_frame_base_address
1113 static struct gdbarch
*
1114 mt_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1116 struct gdbarch
*gdbarch
;
1118 /* Find a candidate among the list of pre-declared architectures. */
1119 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1121 return arches
->gdbarch
;
1123 /* None found, create a new architecture from the information
1125 gdbarch
= gdbarch_alloc (&info
, NULL
);
1127 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1128 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1129 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
1131 set_gdbarch_register_name (gdbarch
, mt_register_name
);
1132 set_gdbarch_num_regs (gdbarch
, MT_NUM_REGS
);
1133 set_gdbarch_num_pseudo_regs (gdbarch
, MT_NUM_PSEUDO_REGS
);
1134 set_gdbarch_pc_regnum (gdbarch
, MT_PC_REGNUM
);
1135 set_gdbarch_sp_regnum (gdbarch
, MT_SP_REGNUM
);
1136 set_gdbarch_pseudo_register_read (gdbarch
, mt_pseudo_register_read
);
1137 set_gdbarch_pseudo_register_write (gdbarch
, mt_pseudo_register_write
);
1138 set_gdbarch_skip_prologue (gdbarch
, mt_skip_prologue
);
1139 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1140 set_gdbarch_breakpoint_from_pc (gdbarch
, mt_breakpoint_from_pc
);
1141 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1142 set_gdbarch_frame_args_skip (gdbarch
, 0);
1143 set_gdbarch_print_insn (gdbarch
, print_insn_mt
);
1144 set_gdbarch_register_type (gdbarch
, mt_register_type
);
1145 set_gdbarch_register_reggroup_p (gdbarch
, mt_register_reggroup_p
);
1147 set_gdbarch_return_value (gdbarch
, mt_return_value
);
1148 set_gdbarch_sp_regnum (gdbarch
, MT_SP_REGNUM
);
1150 set_gdbarch_frame_align (gdbarch
, mt_frame_align
);
1152 set_gdbarch_print_registers_info (gdbarch
, mt_registers_info
);
1154 set_gdbarch_push_dummy_call (gdbarch
, mt_push_dummy_call
);
1156 /* Target builtin data types. */
1157 set_gdbarch_short_bit (gdbarch
, 16);
1158 set_gdbarch_int_bit (gdbarch
, 32);
1159 set_gdbarch_long_bit (gdbarch
, 32);
1160 set_gdbarch_long_long_bit (gdbarch
, 64);
1161 set_gdbarch_float_bit (gdbarch
, 32);
1162 set_gdbarch_double_bit (gdbarch
, 64);
1163 set_gdbarch_long_double_bit (gdbarch
, 64);
1164 set_gdbarch_ptr_bit (gdbarch
, 32);
1166 /* Register the DWARF 2 sniffer first, and then the traditional prologue
1168 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1169 frame_unwind_append_sniffer (gdbarch
, mt_frame_sniffer
);
1170 frame_base_set_default (gdbarch
, &mt_frame_base
);
1172 /* Register the 'unwind_pc' method. */
1173 set_gdbarch_unwind_pc (gdbarch
, mt_unwind_pc
);
1174 set_gdbarch_unwind_sp (gdbarch
, mt_unwind_sp
);
1176 /* Methods for saving / extracting a dummy frame's ID.
1177 The ID's stack address must match the SP value returned by
1178 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1179 set_gdbarch_unwind_dummy_id (gdbarch
, mt_unwind_dummy_id
);
1185 _initialize_mt_tdep (void)
1187 register_gdbarch_init (bfd_arch_mt
, mt_gdbarch_init
);