1 /* Copyright (C) 2009-2015 Free Software Foundation, Inc.
3 This file is part of GDB.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18 #include "common-defs.h"
19 #include "nat/gdb_ptrace.h"
20 #include "mips-linux-watch.h"
22 /* Assuming usable watch registers REGS, return the irw_mask of
26 mips_linux_watch_get_irw_mask (struct pt_watch_regs
*regs
, int n
)
30 case pt_watch_style_mips32
:
31 return regs
->mips32
.watch_masks
[n
] & IRW_MASK
;
32 case pt_watch_style_mips64
:
33 return regs
->mips64
.watch_masks
[n
] & IRW_MASK
;
35 internal_error (__FILE__
, __LINE__
,
36 _("Unrecognized watch register style"));
40 /* Assuming usable watch registers REGS, return the reg_mask of
44 get_reg_mask (struct pt_watch_regs
*regs
, int n
)
48 case pt_watch_style_mips32
:
49 return regs
->mips32
.watch_masks
[n
] & ~IRW_MASK
;
50 case pt_watch_style_mips64
:
51 return regs
->mips64
.watch_masks
[n
] & ~IRW_MASK
;
53 internal_error (__FILE__
, __LINE__
,
54 _("Unrecognized watch register style"));
58 /* Assuming usable watch registers REGS, return the num_valid. */
61 mips_linux_watch_get_num_valid (struct pt_watch_regs
*regs
)
65 case pt_watch_style_mips32
:
66 return regs
->mips32
.num_valid
;
67 case pt_watch_style_mips64
:
68 return regs
->mips64
.num_valid
;
70 internal_error (__FILE__
, __LINE__
,
71 _("Unrecognized watch register style"));
75 /* Assuming usable watch registers REGS, return the watchlo of
79 mips_linux_watch_get_watchlo (struct pt_watch_regs
*regs
, int n
)
83 case pt_watch_style_mips32
:
84 return regs
->mips32
.watchlo
[n
];
85 case pt_watch_style_mips64
:
86 return regs
->mips64
.watchlo
[n
];
88 internal_error (__FILE__
, __LINE__
,
89 _("Unrecognized watch register style"));
93 /* Assuming usable watch registers REGS, set watchlo of register N to
97 mips_linux_watch_set_watchlo (struct pt_watch_regs
*regs
, int n
,
102 case pt_watch_style_mips32
:
103 /* The cast will never throw away bits as 64 bit addresses can
104 never be used on a 32 bit kernel. */
105 regs
->mips32
.watchlo
[n
] = (uint32_t) value
;
107 case pt_watch_style_mips64
:
108 regs
->mips64
.watchlo
[n
] = value
;
111 internal_error (__FILE__
, __LINE__
,
112 _("Unrecognized watch register style"));
116 /* Assuming usable watch registers REGS, return the watchhi of
120 mips_linux_watch_get_watchhi (struct pt_watch_regs
*regs
, int n
)
124 case pt_watch_style_mips32
:
125 return regs
->mips32
.watchhi
[n
];
126 case pt_watch_style_mips64
:
127 return regs
->mips64
.watchhi
[n
];
129 internal_error (__FILE__
, __LINE__
,
130 _("Unrecognized watch register style"));
134 /* Assuming usable watch registers REGS, set watchhi of register N to
138 mips_linux_watch_set_watchhi (struct pt_watch_regs
*regs
, int n
,
143 case pt_watch_style_mips32
:
144 regs
->mips32
.watchhi
[n
] = value
;
146 case pt_watch_style_mips64
:
147 regs
->mips64
.watchhi
[n
] = value
;
150 internal_error (__FILE__
, __LINE__
,
151 _("Unrecognized watch register style"));
155 /* Read the watch registers of process LWPID and store it in
156 WATCH_READBACK. Save true to *WATCH_READBACK_VALID if watch
157 registers are valid. Return 1 if watch registers are usable.
158 Cached information is used unless FORCE is true. */
161 mips_linux_read_watch_registers (long lwpid
,
162 struct pt_watch_regs
*watch_readback
,
163 int *watch_readback_valid
, int force
)
165 if (force
|| *watch_readback_valid
== 0)
167 if (ptrace (PTRACE_GET_WATCH_REGS
, lwpid
, watch_readback
, NULL
) == -1)
169 *watch_readback_valid
= -1;
172 switch (watch_readback
->style
)
174 case pt_watch_style_mips32
:
175 if (watch_readback
->mips32
.num_valid
== 0)
177 *watch_readback_valid
= -1;
181 case pt_watch_style_mips64
:
182 if (watch_readback
->mips64
.num_valid
== 0)
184 *watch_readback_valid
= -1;
189 *watch_readback_valid
= -1;
192 /* Watch registers appear to be usable. */
193 *watch_readback_valid
= 1;
195 return (*watch_readback_valid
== 1) ? 1 : 0;
198 /* Convert GDB's TYPE to an IRW mask. */
201 mips_linux_watch_type_to_irw (enum target_hw_bp_type type
)
210 return (W_MASK
| R_MASK
);
216 /* Set any low order bits in MASK that are not set. */
219 fill_mask (CORE_ADDR mask
)
223 while (f
&& f
< mask
)
231 /* Try to add a single watch to the specified registers REGS. The
232 address of added watch is ADDR, the length is LEN, and the mask
233 is IRW. Return 1 on success, 0 on failure. */
236 mips_linux_watch_try_one_watch (struct pt_watch_regs
*regs
,
237 CORE_ADDR addr
, int len
, uint32_t irw
)
239 CORE_ADDR base_addr
, last_byte
, break_addr
, segment_len
;
240 CORE_ADDR mask_bits
, t_low
;
243 struct pt_watch_regs regs_copy
;
248 last_byte
= addr
+ len
- 1;
249 mask_bits
= fill_mask (addr
^ last_byte
) | IRW_MASK
;
250 base_addr
= addr
& ~mask_bits
;
252 /* Check to see if it is covered by current registers. */
253 for (i
= 0; i
< mips_linux_watch_get_num_valid (regs
); i
++)
255 t_low
= mips_linux_watch_get_watchlo (regs
, i
);
256 if (t_low
!= 0 && irw
== ((uint32_t) t_low
& irw
))
258 t_hi
= mips_linux_watch_get_watchhi (regs
, i
) | IRW_MASK
;
259 t_low
&= ~(CORE_ADDR
) t_hi
;
260 if (addr
>= t_low
&& last_byte
<= (t_low
+ t_hi
))
264 /* Try to find an empty register. */
266 for (i
= 0; i
< mips_linux_watch_get_num_valid (regs
); i
++)
268 t_low
= mips_linux_watch_get_watchlo (regs
, i
);
270 && irw
== (mips_linux_watch_get_irw_mask (regs
, i
) & irw
))
272 if (mask_bits
<= (get_reg_mask (regs
, i
) | IRW_MASK
))
274 /* It fits, we'll take it. */
275 mips_linux_watch_set_watchlo (regs
, i
, base_addr
| irw
);
276 mips_linux_watch_set_watchhi (regs
, i
, mask_bits
& ~IRW_MASK
);
281 /* It doesn't fit, but has the proper IRW capabilities. */
286 if (free_watches
> 1)
288 /* Try to split it across several registers. */
290 for (i
= 0; i
< mips_linux_watch_get_num_valid (®s_copy
); i
++)
292 t_low
= mips_linux_watch_get_watchlo (®s_copy
, i
);
293 t_hi
= get_reg_mask (®s_copy
, i
) | IRW_MASK
;
294 if (t_low
== 0 && irw
== (t_hi
& irw
))
296 t_low
= addr
& ~(CORE_ADDR
) t_hi
;
297 break_addr
= t_low
+ t_hi
+ 1;
298 if (break_addr
>= addr
+ len
)
301 segment_len
= break_addr
- addr
;
302 mask_bits
= fill_mask (addr
^ (addr
+ segment_len
- 1));
303 mips_linux_watch_set_watchlo (®s_copy
, i
,
304 (addr
& ~mask_bits
) | irw
);
305 mips_linux_watch_set_watchhi (®s_copy
, i
,
306 mask_bits
& ~IRW_MASK
);
307 if (break_addr
>= addr
+ len
)
312 len
= addr
+ len
- break_addr
;
317 /* It didn't fit anywhere, we failed. */
321 /* Fill in the watch registers REGS with the currently cached
322 watches CURRENT_WATCHES. */
325 mips_linux_watch_populate_regs (struct mips_watchpoint
*current_watches
,
326 struct pt_watch_regs
*regs
)
328 struct mips_watchpoint
*w
;
331 /* Clear them out. */
332 for (i
= 0; i
< mips_linux_watch_get_num_valid (regs
); i
++)
334 mips_linux_watch_set_watchlo (regs
, i
, 0);
335 mips_linux_watch_set_watchhi (regs
, i
, 0);
341 uint32_t irw
= mips_linux_watch_type_to_irw (w
->type
);
343 i
= mips_linux_watch_try_one_watch (regs
, w
->addr
, w
->len
, irw
);
344 /* They must all fit, because we previously calculated that they
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