1 /* Copyright (C) 2009-2014 Free Software Foundation, Inc.
3 This file is part of GDB.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include <sys/ptrace.h>
24 #include "mips-linux-watch.h"
25 #include "gdb_assert.h"
27 /* Assuming usable watch registers REGS, return the irw_mask of
31 mips_linux_watch_get_irw_mask (struct pt_watch_regs
*regs
, int n
)
35 case pt_watch_style_mips32
:
36 return regs
->mips32
.watch_masks
[n
] & IRW_MASK
;
37 case pt_watch_style_mips64
:
38 return regs
->mips64
.watch_masks
[n
] & IRW_MASK
;
40 internal_error (__FILE__
, __LINE__
,
41 _("Unrecognized watch register style"));
45 /* Assuming usable watch registers REGS, return the reg_mask of
49 get_reg_mask (struct pt_watch_regs
*regs
, int n
)
53 case pt_watch_style_mips32
:
54 return regs
->mips32
.watch_masks
[n
] & ~IRW_MASK
;
55 case pt_watch_style_mips64
:
56 return regs
->mips64
.watch_masks
[n
] & ~IRW_MASK
;
58 internal_error (__FILE__
, __LINE__
,
59 _("Unrecognized watch register style"));
63 /* Assuming usable watch registers REGS, return the num_valid. */
66 mips_linux_watch_get_num_valid (struct pt_watch_regs
*regs
)
70 case pt_watch_style_mips32
:
71 return regs
->mips32
.num_valid
;
72 case pt_watch_style_mips64
:
73 return regs
->mips64
.num_valid
;
75 internal_error (__FILE__
, __LINE__
,
76 _("Unrecognized watch register style"));
80 /* Assuming usable watch registers REGS, return the watchlo of
84 mips_linux_watch_get_watchlo (struct pt_watch_regs
*regs
, int n
)
88 case pt_watch_style_mips32
:
89 return regs
->mips32
.watchlo
[n
];
90 case pt_watch_style_mips64
:
91 return regs
->mips64
.watchlo
[n
];
93 internal_error (__FILE__
, __LINE__
,
94 _("Unrecognized watch register style"));
98 /* Assuming usable watch registers REGS, set watchlo of register N to
102 mips_linux_watch_set_watchlo (struct pt_watch_regs
*regs
, int n
,
107 case pt_watch_style_mips32
:
108 /* The cast will never throw away bits as 64 bit addresses can
109 never be used on a 32 bit kernel. */
110 regs
->mips32
.watchlo
[n
] = (uint32_t) value
;
112 case pt_watch_style_mips64
:
113 regs
->mips64
.watchlo
[n
] = value
;
116 internal_error (__FILE__
, __LINE__
,
117 _("Unrecognized watch register style"));
121 /* Assuming usable watch registers REGS, return the watchhi of
125 mips_linux_watch_get_watchhi (struct pt_watch_regs
*regs
, int n
)
129 case pt_watch_style_mips32
:
130 return regs
->mips32
.watchhi
[n
];
131 case pt_watch_style_mips64
:
132 return regs
->mips64
.watchhi
[n
];
134 internal_error (__FILE__
, __LINE__
,
135 _("Unrecognized watch register style"));
139 /* Assuming usable watch registers REGS, set watchhi of register N to
143 mips_linux_watch_set_watchhi (struct pt_watch_regs
*regs
, int n
,
148 case pt_watch_style_mips32
:
149 regs
->mips32
.watchhi
[n
] = value
;
151 case pt_watch_style_mips64
:
152 regs
->mips64
.watchhi
[n
] = value
;
155 internal_error (__FILE__
, __LINE__
,
156 _("Unrecognized watch register style"));
160 /* Read the watch registers of process LWPID and store it in
161 WATCH_READBACK. Save true to *WATCH_READBACK_VALID if watch
162 registers are valid. Return 1 if watch registers are usable.
163 Cached information is used unless FORCE is true. */
166 mips_linux_read_watch_registers (long lwpid
,
167 struct pt_watch_regs
*watch_readback
,
168 int *watch_readback_valid
, int force
)
170 if (force
|| *watch_readback_valid
== 0)
172 if (ptrace (PTRACE_GET_WATCH_REGS
, lwpid
, watch_readback
) == -1)
174 *watch_readback_valid
= -1;
177 switch (watch_readback
->style
)
179 case pt_watch_style_mips32
:
180 if (watch_readback
->mips32
.num_valid
== 0)
182 *watch_readback_valid
= -1;
186 case pt_watch_style_mips64
:
187 if (watch_readback
->mips64
.num_valid
== 0)
189 *watch_readback_valid
= -1;
194 *watch_readback_valid
= -1;
197 /* Watch registers appear to be usable. */
198 *watch_readback_valid
= 1;
200 return (*watch_readback_valid
== 1) ? 1 : 0;
203 /* Convert GDB's TYPE to an IRW mask. */
206 mips_linux_watch_type_to_irw (int type
)
215 return (W_MASK
| R_MASK
);
221 /* Set any low order bits in MASK that are not set. */
224 fill_mask (CORE_ADDR mask
)
228 while (f
&& f
< mask
)
236 /* Try to add a single watch to the specified registers REGS. The
237 address of added watch is ADDR, the length is LEN, and the mask
238 is IRW. Return 1 on success, 0 on failure. */
241 mips_linux_watch_try_one_watch (struct pt_watch_regs
*regs
,
242 CORE_ADDR addr
, int len
, uint32_t irw
)
244 CORE_ADDR base_addr
, last_byte
, break_addr
, segment_len
;
245 CORE_ADDR mask_bits
, t_low
;
248 struct pt_watch_regs regs_copy
;
253 last_byte
= addr
+ len
- 1;
254 mask_bits
= fill_mask (addr
^ last_byte
) | IRW_MASK
;
255 base_addr
= addr
& ~mask_bits
;
257 /* Check to see if it is covered by current registers. */
258 for (i
= 0; i
< mips_linux_watch_get_num_valid (regs
); i
++)
260 t_low
= mips_linux_watch_get_watchlo (regs
, i
);
261 if (t_low
!= 0 && irw
== ((uint32_t) t_low
& irw
))
263 t_hi
= mips_linux_watch_get_watchhi (regs
, i
) | IRW_MASK
;
264 t_low
&= ~(CORE_ADDR
) t_hi
;
265 if (addr
>= t_low
&& last_byte
<= (t_low
+ t_hi
))
269 /* Try to find an empty register. */
271 for (i
= 0; i
< mips_linux_watch_get_num_valid (regs
); i
++)
273 t_low
= mips_linux_watch_get_watchlo (regs
, i
);
275 && irw
== (mips_linux_watch_get_irw_mask (regs
, i
) & irw
))
277 if (mask_bits
<= (get_reg_mask (regs
, i
) | IRW_MASK
))
279 /* It fits, we'll take it. */
280 mips_linux_watch_set_watchlo (regs
, i
, base_addr
| irw
);
281 mips_linux_watch_set_watchhi (regs
, i
, mask_bits
& ~IRW_MASK
);
286 /* It doesn't fit, but has the proper IRW capabilities. */
291 if (free_watches
> 1)
293 /* Try to split it across several registers. */
295 for (i
= 0; i
< mips_linux_watch_get_num_valid (®s_copy
); i
++)
297 t_low
= mips_linux_watch_get_watchlo (®s_copy
, i
);
298 t_hi
= get_reg_mask (®s_copy
, i
) | IRW_MASK
;
299 if (t_low
== 0 && irw
== (t_hi
& irw
))
301 t_low
= addr
& ~(CORE_ADDR
) t_hi
;
302 break_addr
= t_low
+ t_hi
+ 1;
303 if (break_addr
>= addr
+ len
)
306 segment_len
= break_addr
- addr
;
307 mask_bits
= fill_mask (addr
^ (addr
+ segment_len
- 1));
308 mips_linux_watch_set_watchlo (®s_copy
, i
,
309 (addr
& ~mask_bits
) | irw
);
310 mips_linux_watch_set_watchhi (®s_copy
, i
,
311 mask_bits
& ~IRW_MASK
);
312 if (break_addr
>= addr
+ len
)
317 len
= addr
+ len
- break_addr
;
322 /* It didn't fit anywhere, we failed. */
326 /* Fill in the watch registers REGS with the currently cached
327 watches CURRENT_WATCHES. */
330 mips_linux_watch_populate_regs (struct mips_watchpoint
*current_watches
,
331 struct pt_watch_regs
*regs
)
333 struct mips_watchpoint
*w
;
336 /* Clear them out. */
337 for (i
= 0; i
< mips_linux_watch_get_num_valid (regs
); i
++)
339 mips_linux_watch_set_watchlo (regs
, i
, 0);
340 mips_linux_watch_set_watchhi (regs
, i
, 0);
346 uint32_t irw
= mips_linux_watch_type_to_irw (w
->type
);
348 i
= mips_linux_watch_try_one_watch (regs
, w
->addr
, w
->len
, irw
);
349 /* They must all fit, because we previously calculated that they
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