1 /* Target-machine dependent code for Nios II, for GDB.
2 Copyright (C) 2012-2015 Free Software Foundation, Inc.
3 Contributed by Peter Brookes (pbrookes@altera.com)
4 and Andrew Draper (adraper@altera.com).
5 Contributed by Mentor Graphics, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "trad-frame.h"
27 #include "dwarf2-frame.h"
39 #include "arch-utils.h"
40 #include "floatformat.h"
43 #include "target-descriptions.h"
45 /* To get entry_point_address. */
48 /* Nios II ISA specific encodings and macros. */
49 #include "opcode/nios2.h"
51 /* Nios II specific header. */
52 #include "nios2-tdep.h"
54 #include "features/nios2.c"
56 /* Control debugging information emitted in this file. */
58 static int nios2_debug
= 0;
60 /* The following structures are used in the cache for prologue
61 analysis; see the reg_value and reg_saved tables in
62 struct nios2_unwind_cache, respectively. */
64 /* struct reg_value is used to record that a register has the same value
65 as reg at the given offset from the start of a function. */
73 /* struct reg_saved is used to record that a register value has been saved at
74 basereg + addr, for basereg >= 0. If basereg < 0, that indicates
75 that the register is not known to have been saved. Note that when
76 basereg == NIOS2_Z_REGNUM (that is, r0, which holds value 0),
77 addr is an absolute address. */
85 struct nios2_unwind_cache
87 /* The frame's base, optionally used by the high-level debug info. */
90 /* The previous frame's inner most stack address. Used as this
91 frame ID's stack_addr. */
94 /* The address of the first instruction in this function. */
97 /* Which register holds the return address for the frame. */
100 /* Table indicating what changes have been made to each register. */
101 struct reg_value reg_value
[NIOS2_NUM_REGS
];
103 /* Table indicating where each register has been saved. */
104 struct reg_saved reg_saved
[NIOS2_NUM_REGS
];
108 /* This array is a mapping from Dwarf-2 register numbering to GDB's. */
110 static int nios2_dwarf2gdb_regno_map
[] =
119 NIOS2_GP_REGNUM
, /* 26 */
120 NIOS2_SP_REGNUM
, /* 27 */
121 NIOS2_FP_REGNUM
, /* 28 */
122 NIOS2_EA_REGNUM
, /* 29 */
123 NIOS2_BA_REGNUM
, /* 30 */
124 NIOS2_RA_REGNUM
, /* 31 */
125 NIOS2_PC_REGNUM
, /* 32 */
126 NIOS2_STATUS_REGNUM
, /* 33 */
127 NIOS2_ESTATUS_REGNUM
, /* 34 */
128 NIOS2_BSTATUS_REGNUM
, /* 35 */
129 NIOS2_IENABLE_REGNUM
, /* 36 */
130 NIOS2_IPENDING_REGNUM
, /* 37 */
131 NIOS2_CPUID_REGNUM
, /* 38 */
132 39, /* CTL6 */ /* 39 */
133 NIOS2_EXCEPTION_REGNUM
, /* 40 */
134 NIOS2_PTEADDR_REGNUM
, /* 41 */
135 NIOS2_TLBACC_REGNUM
, /* 42 */
136 NIOS2_TLBMISC_REGNUM
, /* 43 */
137 NIOS2_ECCINJ_REGNUM
, /* 44 */
138 NIOS2_BADADDR_REGNUM
, /* 45 */
139 NIOS2_CONFIG_REGNUM
, /* 46 */
140 NIOS2_MPUBASE_REGNUM
, /* 47 */
141 NIOS2_MPUACC_REGNUM
/* 48 */
145 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
148 nios2_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int dw_reg
)
150 if (dw_reg
< 0 || dw_reg
> NIOS2_NUM_REGS
)
152 warning (_("Dwarf-2 uses unmapped register #%d"), dw_reg
);
156 return nios2_dwarf2gdb_regno_map
[dw_reg
];
159 /* Canonical names for the 49 registers. */
161 static const char *const nios2_reg_names
[NIOS2_NUM_REGS
] =
163 "zero", "at", "r2", "r3", "r4", "r5", "r6", "r7",
164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
165 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
166 "et", "bt", "gp", "sp", "fp", "ea", "sstatus", "ra",
168 "status", "estatus", "bstatus", "ienable",
169 "ipending", "cpuid", "ctl6", "exception",
170 "pteaddr", "tlbacc", "tlbmisc", "eccinj",
171 "badaddr", "config", "mpubase", "mpuacc"
174 /* Implement the register_name gdbarch method. */
177 nios2_register_name (struct gdbarch
*gdbarch
, int regno
)
179 /* Use mnemonic aliases for GPRs. */
180 if (regno
>= 0 && regno
< NIOS2_NUM_REGS
)
181 return nios2_reg_names
[regno
];
183 return tdesc_register_name (gdbarch
, regno
);
186 /* Implement the register_type gdbarch method. */
189 nios2_register_type (struct gdbarch
*gdbarch
, int regno
)
191 /* If the XML description has register information, use that to
192 determine the register type. */
193 if (tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
194 return tdesc_register_type (gdbarch
, regno
);
196 if (regno
== NIOS2_PC_REGNUM
)
197 return builtin_type (gdbarch
)->builtin_func_ptr
;
198 else if (regno
== NIOS2_SP_REGNUM
)
199 return builtin_type (gdbarch
)->builtin_data_ptr
;
201 return builtin_type (gdbarch
)->builtin_uint32
;
204 /* Given a return value in REGCACHE with a type VALTYPE,
205 extract and copy its value into VALBUF. */
208 nios2_extract_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
209 struct regcache
*regcache
, gdb_byte
*valbuf
)
211 int len
= TYPE_LENGTH (valtype
);
213 /* Return values of up to 8 bytes are returned in $r2 $r3. */
214 if (len
<= register_size (gdbarch
, NIOS2_R2_REGNUM
))
215 regcache_cooked_read (regcache
, NIOS2_R2_REGNUM
, valbuf
);
218 gdb_assert (len
<= (register_size (gdbarch
, NIOS2_R2_REGNUM
)
219 + register_size (gdbarch
, NIOS2_R3_REGNUM
)));
220 regcache_cooked_read (regcache
, NIOS2_R2_REGNUM
, valbuf
);
221 regcache_cooked_read (regcache
, NIOS2_R3_REGNUM
, valbuf
+ 4);
225 /* Write into appropriate registers a function return value
226 of type TYPE, given in virtual format. */
229 nios2_store_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
230 struct regcache
*regcache
, const gdb_byte
*valbuf
)
232 int len
= TYPE_LENGTH (valtype
);
234 /* Return values of up to 8 bytes are returned in $r2 $r3. */
235 if (len
<= register_size (gdbarch
, NIOS2_R2_REGNUM
))
236 regcache_cooked_write (regcache
, NIOS2_R2_REGNUM
, valbuf
);
239 gdb_assert (len
<= (register_size (gdbarch
, NIOS2_R2_REGNUM
)
240 + register_size (gdbarch
, NIOS2_R3_REGNUM
)));
241 regcache_cooked_write (regcache
, NIOS2_R2_REGNUM
, valbuf
);
242 regcache_cooked_write (regcache
, NIOS2_R3_REGNUM
, valbuf
+ 4);
247 /* Set up the default values of the registers. */
250 nios2_setup_default (struct nios2_unwind_cache
*cache
)
254 for (i
= 0; i
< NIOS2_NUM_REGS
; i
++)
256 /* All registers start off holding their previous values. */
257 cache
->reg_value
[i
].reg
= i
;
258 cache
->reg_value
[i
].offset
= 0;
260 /* All registers start off not saved. */
261 cache
->reg_saved
[i
].basereg
= -1;
262 cache
->reg_saved
[i
].addr
= 0;
266 /* Initialize the unwind cache. */
269 nios2_init_cache (struct nios2_unwind_cache
*cache
, CORE_ADDR pc
)
274 cache
->return_regnum
= NIOS2_RA_REGNUM
;
275 nios2_setup_default (cache
);
278 /* Read and identify an instruction at PC. If INSNP is non-null,
279 store the instruction word into that location. Return the opcode
280 pointer or NULL if the memory couldn't be read or disassembled. */
282 static const struct nios2_opcode
*
283 nios2_fetch_insn (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
287 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
290 if (!safe_read_memory_integer (pc
, NIOS2_OPCODE_SIZE
,
291 gdbarch_byte_order (gdbarch
), &memword
))
294 insn
= (unsigned int) memword
;
297 return nios2_find_opcode_hash (insn
, mach
);
301 /* Match and disassemble an ADD-type instruction, with 3 register operands.
302 Returns true on success, and fills in the operand pointers. */
305 nios2_match_add (uint32_t insn
, const struct nios2_opcode
*op
,
306 unsigned long mach
, int *ra
, int *rb
, int *rc
)
308 if (op
->match
== MATCH_R1_ADD
|| op
->match
== MATCH_R1_MOV
)
310 *ra
= GET_IW_R_A (insn
);
311 *rb
= GET_IW_R_B (insn
);
312 *rc
= GET_IW_R_C (insn
);
318 /* Match and disassemble a SUB-type instruction, with 3 register operands.
319 Returns true on success, and fills in the operand pointers. */
322 nios2_match_sub (uint32_t insn
, const struct nios2_opcode
*op
,
323 unsigned long mach
, int *ra
, int *rb
, int *rc
)
325 if (op
->match
== MATCH_R1_SUB
)
327 *ra
= GET_IW_R_A (insn
);
328 *rb
= GET_IW_R_B (insn
);
329 *rc
= GET_IW_R_C (insn
);
335 /* Match and disassemble an ADDI-type instruction, with 2 register operands
336 and one immediate operand.
337 Returns true on success, and fills in the operand pointers. */
340 nios2_match_addi (uint32_t insn
, const struct nios2_opcode
*op
,
341 unsigned long mach
, int *ra
, int *rb
, int *imm
)
343 if (op
->match
== MATCH_R1_ADDI
)
345 *ra
= GET_IW_I_A (insn
);
346 *rb
= GET_IW_I_B (insn
);
347 *imm
= (signed) (GET_IW_I_IMM16 (insn
) << 16) >> 16;
353 /* Match and disassemble an ORHI-type instruction, with 2 register operands
354 and one unsigned immediate operand.
355 Returns true on success, and fills in the operand pointers. */
358 nios2_match_orhi (uint32_t insn
, const struct nios2_opcode
*op
,
359 unsigned long mach
, int *ra
, int *rb
, unsigned int *uimm
)
361 if (op
->match
== MATCH_R1_ORHI
)
363 *ra
= GET_IW_I_A (insn
);
364 *rb
= GET_IW_I_B (insn
);
365 *uimm
= GET_IW_I_IMM16 (insn
);
371 /* Match and disassemble a STW-type instruction, with 2 register operands
372 and one immediate operand.
373 Returns true on success, and fills in the operand pointers. */
376 nios2_match_stw (uint32_t insn
, const struct nios2_opcode
*op
,
377 unsigned long mach
, int *ra
, int *rb
, int *imm
)
379 if (op
->match
== MATCH_R1_STW
|| op
->match
== MATCH_R1_STWIO
)
381 *ra
= GET_IW_I_A (insn
);
382 *rb
= GET_IW_I_B (insn
);
383 *imm
= (signed) (GET_IW_I_IMM16 (insn
) << 16) >> 16;
389 /* Match and disassemble a LDW-type instruction, with 2 register operands
390 and one immediate operand.
391 Returns true on success, and fills in the operand pointers. */
394 nios2_match_ldw (uint32_t insn
, const struct nios2_opcode
*op
,
395 unsigned long mach
, int *ra
, int *rb
, int *imm
)
397 if (op
->match
== MATCH_R1_LDW
|| op
->match
== MATCH_R1_LDWIO
)
399 *ra
= GET_IW_I_A (insn
);
400 *rb
= GET_IW_I_B (insn
);
401 *imm
= (signed) (GET_IW_I_IMM16 (insn
) << 16) >> 16;
407 /* Match and disassemble a RDCTL instruction, with 2 register operands.
408 Returns true on success, and fills in the operand pointers. */
411 nios2_match_rdctl (uint32_t insn
, const struct nios2_opcode
*op
,
412 unsigned long mach
, int *ra
, int *rc
)
414 if (op
->match
== MATCH_R1_RDCTL
)
416 *ra
= GET_IW_R_IMM5 (insn
);
417 *rc
= GET_IW_R_C (insn
);
424 /* Match and disassemble a branch instruction, with (potentially)
425 2 register operands and one immediate operand.
426 Returns true on success, and fills in the operand pointers. */
428 enum branch_condition
{
439 nios2_match_branch (uint32_t insn
, const struct nios2_opcode
*op
,
440 unsigned long mach
, int *ra
, int *rb
, int *imm
,
441 enum branch_condition
*cond
)
469 *imm
= (signed) (GET_IW_I_IMM16 (insn
) << 16) >> 16;
470 *ra
= GET_IW_I_A (insn
);
471 *rb
= GET_IW_I_B (insn
);
475 /* Match and disassemble a direct jump instruction, with an
476 unsigned operand. Returns true on success, and fills in the operand
480 nios2_match_jmpi (uint32_t insn
, const struct nios2_opcode
*op
,
481 unsigned long mach
, unsigned int *uimm
)
483 if (op
->match
== MATCH_R1_JMPI
)
485 *uimm
= GET_IW_J_IMM26 (insn
) << 2;
491 /* Match and disassemble a direct call instruction, with an
492 unsigned operand. Returns true on success, and fills in the operand
496 nios2_match_calli (uint32_t insn
, const struct nios2_opcode
*op
,
497 unsigned long mach
, unsigned int *uimm
)
499 if (op
->match
== MATCH_R1_CALL
)
501 *uimm
= GET_IW_J_IMM26 (insn
) << 2;
507 /* Match and disassemble an indirect jump instruction, with a
508 (possibly implicit) register operand. Returns true on success, and fills
509 in the operand pointer. */
512 nios2_match_jmpr (uint32_t insn
, const struct nios2_opcode
*op
,
513 unsigned long mach
, int *ra
)
518 *ra
= GET_IW_I_A (insn
);
521 *ra
= NIOS2_RA_REGNUM
;
524 *ra
= NIOS2_EA_REGNUM
;
527 *ra
= NIOS2_BA_REGNUM
;
534 /* Match and disassemble an indirect call instruction, with a register
535 operand. Returns true on success, and fills in the operand pointer. */
538 nios2_match_callr (uint32_t insn
, const struct nios2_opcode
*op
,
539 unsigned long mach
, int *ra
)
541 if (op
->match
== MATCH_R1_CALLR
)
543 *ra
= GET_IW_I_A (insn
);
549 /* Match and disassemble a break instruction, with an unsigned operand.
550 Returns true on success, and fills in the operand pointer. */
553 nios2_match_break (uint32_t insn
, const struct nios2_opcode
*op
,
554 unsigned long mach
, unsigned int *uimm
)
556 if (op
->match
== MATCH_R1_BREAK
)
558 *uimm
= GET_IW_R_IMM5 (insn
);
564 /* Match and disassemble a trap instruction, with an unsigned operand.
565 Returns true on success, and fills in the operand pointer. */
568 nios2_match_trap (uint32_t insn
, const struct nios2_opcode
*op
,
569 unsigned long mach
, unsigned int *uimm
)
571 if (op
->match
== MATCH_R1_TRAP
)
573 *uimm
= GET_IW_R_IMM5 (insn
);
579 /* Helper function to identify when we're in a function epilogue;
580 that is, the part of the function from the point at which the
581 stack adjustments are made, to the return or sibcall.
582 Note that we may have several stack adjustment instructions, and
583 this function needs to test whether the stack teardown has already
584 started before current_pc, not whether it has completed. */
587 nios2_in_epilogue_p (struct gdbarch
*gdbarch
,
588 CORE_ADDR current_pc
,
591 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
592 /* Maximum number of possibly-epilogue instructions to check.
593 Note that this number should not be too large, else we can
594 potentially end up iterating through unmapped memory. */
595 int ninsns
, max_insns
= 5;
597 const struct nios2_opcode
*op
= NULL
;
601 enum branch_condition cond
;
604 /* There has to be a previous instruction in the function. */
605 if (current_pc
<= start_pc
)
608 /* Find the previous instruction before current_pc.
609 For the moment we will assume that all instructions are the
611 pc
= current_pc
- NIOS2_OPCODE_SIZE
;
613 /* Beginning with the previous instruction we just located, check whether
614 we are in a sequence of at least one stack adjustment instruction.
615 Possible instructions here include:
619 for (ninsns
= 0; ninsns
< max_insns
; ninsns
++)
623 /* Fetch the insn at pc. */
624 op
= nios2_fetch_insn (gdbarch
, pc
, &insn
);
629 /* Was it a stack adjustment? */
630 if (nios2_match_addi (insn
, op
, mach
, &ra
, &rb
, &imm
))
631 ok
= (rb
== NIOS2_SP_REGNUM
);
632 else if (nios2_match_add (insn
, op
, mach
, &ra
, &rb
, &rc
))
633 ok
= (rc
== NIOS2_SP_REGNUM
);
634 else if (nios2_match_ldw (insn
, op
, mach
, &ra
, &rb
, &imm
))
635 ok
= (rb
== NIOS2_SP_REGNUM
);
640 /* No stack adjustments found. */
644 /* We found more stack adjustments than we expect GCC to be generating.
645 Since it looks like a stack unwind might be in progress tell GDB to
647 if (ninsns
== max_insns
)
650 /* The next instruction following the stack adjustments must be a
651 return, jump, or unconditional branch. */
652 if (nios2_match_jmpr (insn
, op
, mach
, &ra
)
653 || nios2_match_jmpi (insn
, op
, mach
, &uimm
)
654 || (nios2_match_branch (insn
, op
, mach
, &ra
, &rb
, &imm
, &cond
)
655 && cond
== branch_none
))
661 /* Implement the stack_frame_destroyed_p gdbarch method. */
664 nios2_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
668 if (find_pc_partial_function (pc
, NULL
, &func_addr
, NULL
))
669 return nios2_in_epilogue_p (gdbarch
, pc
, func_addr
);
674 /* Do prologue analysis, returning the PC of the first instruction
675 after the function prologue. Assumes CACHE has already been
676 initialized. THIS_FRAME can be null, in which case we are only
677 interested in skipping the prologue. Otherwise CACHE is filled in
678 from the frame information.
680 The prologue may consist of the following parts:
681 1) Profiling instrumentation. For non-PIC code it looks like:
686 2) A stack adjustment and save of R4-R7 for varargs functions.
687 This is typically merged with item 3.
689 3) A stack adjustment and save of the callee-saved registers;
690 typically an explicit SP decrement and individual register
693 There may also be a stack switch here in an exception handler
694 in place of a stack adjustment. It looks like:
695 movhi rx, %hiadj(newstack)
696 addhi rx, rx, %lo(newstack)
700 4) A frame pointer save, which can be either a MOV or ADDI.
702 5) A further stack pointer adjustment. This is normally included
703 adjustment in step 3 unless the total adjustment is too large
704 to be done in one step.
706 7) A stack overflow check, which can take either of these forms:
710 bltu sp, rx, .Lstack_overflow
715 Older versions of GCC emitted "break 3" instead of "trap 3" here,
716 so we check for both cases.
718 Older GCC versions emitted stack overflow checks after the SP
719 adjustments in both steps 3 and 4. Starting with GCC 6, there is
720 at most one overflow check, which is placed before the first
721 stack adjustment for R2 CDX and after the first stack adjustment
724 The prologue instructions may be combined or interleaved with other
727 To cope with all this variability we decode all the instructions
728 from the start of the prologue until we hit an instruction that
729 cannot possibly be a prologue instruction, such as a branch, call,
730 return, or epilogue instruction. The prologue is considered to end
731 at the last instruction that can definitely be considered a
732 prologue instruction. */
735 nios2_analyze_prologue (struct gdbarch
*gdbarch
, const CORE_ADDR start_pc
,
736 const CORE_ADDR current_pc
,
737 struct nios2_unwind_cache
*cache
,
738 struct frame_info
*this_frame
)
740 /* Maximum number of possibly-prologue instructions to check.
741 Note that this number should not be too large, else we can
742 potentially end up iterating through unmapped memory. */
743 int ninsns
, max_insns
= 50;
745 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
746 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
748 /* Does the frame set up the FP register? */
751 struct reg_value
*value
= cache
->reg_value
;
752 struct reg_value temp_value
[NIOS2_NUM_REGS
];
756 /* Save the starting PC so we can correct the pc after running
757 through the prolog, using symbol info. */
758 CORE_ADDR pc
= start_pc
;
760 /* Is this an exception handler? */
761 int exception_handler
= 0;
763 /* What was the original value of SP (or fake original value for
764 functions which switch stacks? */
765 CORE_ADDR frame_high
;
767 /* The last definitely-prologue instruction seen. */
768 CORE_ADDR prologue_end
;
770 /* Is this the innermost function? */
771 int innermost
= (this_frame
? (frame_relative_level (this_frame
) == 0) : 1);
774 fprintf_unfiltered (gdb_stdlog
,
775 "{ nios2_analyze_prologue start=%s, current=%s ",
776 paddress (gdbarch
, start_pc
),
777 paddress (gdbarch
, current_pc
));
779 /* Set up the default values of the registers. */
780 nios2_setup_default (cache
);
782 /* Find the prologue instructions. */
783 prologue_end
= start_pc
;
784 for (ninsns
= 0; ninsns
< max_insns
; ninsns
++)
786 /* Present instruction. */
788 const struct nios2_opcode
*op
;
791 unsigned int reglist
;
793 enum branch_condition cond
;
795 if (pc
== current_pc
)
797 /* When we reach the current PC we must save the current
798 register state (for the backtrace) but keep analysing
799 because there might be more to find out (eg. is this an
800 exception handler). */
801 memcpy (temp_value
, value
, sizeof (temp_value
));
804 fprintf_unfiltered (gdb_stdlog
, "*");
807 op
= nios2_fetch_insn (gdbarch
, pc
, &insn
);
809 /* Unknown opcode? Stop scanning. */
815 fprintf_unfiltered (gdb_stdlog
, "[%08X]", insn
);
817 /* The following instructions can appear in the prologue. */
819 if (nios2_match_add (insn
, op
, mach
, &ra
, &rb
, &rc
))
821 /* ADD rc, ra, rb (also used for MOV) */
822 if (rc
== NIOS2_SP_REGNUM
824 && value
[ra
].reg
== cache
->reg_saved
[NIOS2_SP_REGNUM
].basereg
)
826 /* If the previous value of SP is available somewhere
827 near the new stack pointer value then this is a
830 /* If any registers were saved on the stack before then
831 we can't backtrace into them now. */
832 for (i
= 0 ; i
< NIOS2_NUM_REGS
; i
++)
834 if (cache
->reg_saved
[i
].basereg
== NIOS2_SP_REGNUM
)
835 cache
->reg_saved
[i
].basereg
= -1;
836 if (value
[i
].reg
== NIOS2_SP_REGNUM
)
840 /* Create a fake "high water mark" 4 bytes above where SP
841 was stored and fake up the registers to be consistent
843 value
[NIOS2_SP_REGNUM
].reg
= NIOS2_SP_REGNUM
;
844 value
[NIOS2_SP_REGNUM
].offset
846 - cache
->reg_saved
[NIOS2_SP_REGNUM
].addr
848 cache
->reg_saved
[NIOS2_SP_REGNUM
].basereg
= NIOS2_SP_REGNUM
;
849 cache
->reg_saved
[NIOS2_SP_REGNUM
].addr
= -4;
852 else if (rc
== NIOS2_SP_REGNUM
&& ra
== NIOS2_FP_REGNUM
)
853 /* This is setting SP from FP. This only happens in the
854 function epilogue. */
859 if (value
[rb
].reg
== 0)
860 value
[rc
].reg
= value
[ra
].reg
;
861 else if (value
[ra
].reg
== 0)
862 value
[rc
].reg
= value
[rb
].reg
;
865 value
[rc
].offset
= value
[ra
].offset
+ value
[rb
].offset
;
868 /* The add/move is only considered a prologue instruction
869 if the destination is SP or FP. */
870 if (rc
== NIOS2_SP_REGNUM
|| rc
== NIOS2_FP_REGNUM
)
874 else if (nios2_match_sub (insn
, op
, mach
, &ra
, &rb
, &rc
))
877 if (rc
== NIOS2_SP_REGNUM
&& rb
== NIOS2_SP_REGNUM
878 && value
[rc
].reg
!= 0)
879 /* If we are decrementing the SP by a non-constant amount,
880 this is alloca, not part of the prologue. */
884 if (value
[rb
].reg
== 0)
885 value
[rc
].reg
= value
[ra
].reg
;
888 value
[rc
].offset
= value
[ra
].offset
- value
[rb
].offset
;
892 else if (nios2_match_addi (insn
, op
, mach
, &ra
, &rb
, &imm
))
894 /* ADDI rb, ra, imm */
896 /* A positive stack adjustment has to be part of the epilogue. */
897 if (rb
== NIOS2_SP_REGNUM
898 && (imm
> 0 || value
[ra
].reg
!= NIOS2_SP_REGNUM
))
901 /* Likewise restoring SP from FP. */
902 else if (rb
== NIOS2_SP_REGNUM
&& ra
== NIOS2_FP_REGNUM
)
907 value
[rb
].reg
= value
[ra
].reg
;
908 value
[rb
].offset
= value
[ra
].offset
+ imm
;
911 /* The add is only considered a prologue instruction
912 if the destination is SP or FP. */
913 if (rb
== NIOS2_SP_REGNUM
|| rb
== NIOS2_FP_REGNUM
)
917 else if (nios2_match_orhi (insn
, op
, mach
, &ra
, &rb
, &uimm
))
919 /* ORHI rb, ra, uimm (also used for MOVHI) */
922 value
[rb
].reg
= (value
[ra
].reg
== 0) ? 0 : -1;
923 value
[rb
].offset
= value
[ra
].offset
| (uimm
<< 16);
927 else if (nios2_match_stw (insn
, op
, mach
, &ra
, &rb
, &imm
))
929 /* STW rb, imm(ra) */
931 /* Are we storing the original value of a register to the stack?
932 For exception handlers the value of EA-4 (return
933 address from interrupts etc) is sometimes stored. */
934 int orig
= value
[rb
].reg
;
936 && (value
[rb
].offset
== 0
937 || (orig
== NIOS2_EA_REGNUM
&& value
[rb
].offset
== -4))
938 && value
[ra
].reg
== NIOS2_SP_REGNUM
)
942 /* Save off callee saved registers. */
943 cache
->reg_saved
[orig
].basereg
= value
[ra
].reg
;
944 cache
->reg_saved
[orig
].addr
= value
[ra
].offset
+ imm
;
949 if (orig
== NIOS2_EA_REGNUM
|| orig
== NIOS2_ESTATUS_REGNUM
)
950 exception_handler
= 1;
953 /* Non-stack memory writes cannot appear in the prologue. */
957 else if (nios2_match_rdctl (insn
, op
, mach
, &ra
, &rc
))
960 This can appear in exception handlers in combination with
961 a subsequent save to the stack frame. */
964 value
[rc
].reg
= NIOS2_STATUS_REGNUM
+ ra
;
965 value
[rc
].offset
= 0;
969 else if (nios2_match_calli (insn
, op
, mach
, &uimm
))
971 if (value
[8].reg
== NIOS2_RA_REGNUM
972 && value
[8].offset
== 0
973 && value
[NIOS2_SP_REGNUM
].reg
== NIOS2_SP_REGNUM
974 && value
[NIOS2_SP_REGNUM
].offset
== 0)
976 /* A CALL instruction. This is treated as a call to mcount
977 if ra has been stored into r8 beforehand and if it's
978 before the stack adjust.
979 Note mcount corrupts r2-r3, r9-r15 & ra. */
980 for (i
= 2 ; i
<= 3 ; i
++)
982 for (i
= 9 ; i
<= 15 ; i
++)
984 value
[NIOS2_RA_REGNUM
].reg
= -1;
989 /* Other calls are not part of the prologue. */
994 else if (nios2_match_branch (insn
, op
, mach
, &ra
, &rb
, &imm
, &cond
))
996 /* Branches not involving a stack overflow check aren't part of
998 if (ra
!= NIOS2_SP_REGNUM
)
1000 else if (cond
== branch_geu
)
1004 This instruction sequence is used in stack checking;
1005 we can ignore it. */
1006 unsigned int next_insn
;
1007 const struct nios2_opcode
*next_op
1008 = nios2_fetch_insn (gdbarch
, pc
, &next_insn
);
1010 && (nios2_match_trap (next_insn
, op
, mach
, &uimm
)
1011 || nios2_match_break (next_insn
, op
, mach
, &uimm
)))
1012 pc
+= next_op
->size
;
1016 else if (cond
== branch_ltu
)
1018 /* BLTU sp, rx, .Lstackoverflow
1019 If the location branched to holds a TRAP or BREAK
1020 instruction then this is also stack overflow detection. */
1021 unsigned int next_insn
;
1022 const struct nios2_opcode
*next_op
1023 = nios2_fetch_insn (gdbarch
, pc
+ imm
, &next_insn
);
1025 && (nios2_match_trap (next_insn
, op
, mach
, &uimm
)
1026 || nios2_match_break (next_insn
, op
, mach
, &uimm
)))
1035 /* All other calls, jumps, returns, TRAPs, or BREAKs terminate
1037 else if (nios2_match_callr (insn
, op
, mach
, &ra
)
1038 || nios2_match_jmpr (insn
, op
, mach
, &ra
)
1039 || nios2_match_jmpi (insn
, op
, mach
, &uimm
)
1040 || nios2_match_trap (insn
, op
, mach
, &uimm
)
1041 || nios2_match_break (insn
, op
, mach
, &uimm
))
1045 /* If THIS_FRAME is NULL, we are being called from skip_prologue
1046 and are only interested in the PROLOGUE_END value, so just
1047 return that now and skip over the cache updates, which depend
1048 on having frame information. */
1049 if (this_frame
== NULL
)
1050 return prologue_end
;
1052 /* If we are in the function epilogue and have already popped
1053 registers off the stack in preparation for returning, then we
1054 want to go back to the original register values. */
1055 if (innermost
&& nios2_in_epilogue_p (gdbarch
, current_pc
, start_pc
))
1056 nios2_setup_default (cache
);
1058 /* Exception handlers use a different return address register. */
1059 if (exception_handler
)
1060 cache
->return_regnum
= NIOS2_EA_REGNUM
;
1063 fprintf_unfiltered (gdb_stdlog
, "\n-> retreg=%d, ", cache
->return_regnum
);
1065 if (cache
->reg_value
[NIOS2_FP_REGNUM
].reg
== NIOS2_SP_REGNUM
)
1066 /* If the FP now holds an offset from the CFA then this is a
1067 normal frame which uses the frame pointer. */
1068 base_reg
= NIOS2_FP_REGNUM
;
1069 else if (cache
->reg_value
[NIOS2_SP_REGNUM
].reg
== NIOS2_SP_REGNUM
)
1070 /* FP doesn't hold an offset from the CFA. If SP still holds an
1071 offset from the CFA then we might be in a function which omits
1072 the frame pointer, or we might be partway through the prologue.
1073 In both cases we can find the CFA using SP. */
1074 base_reg
= NIOS2_SP_REGNUM
;
1077 /* Somehow the stack pointer has been corrupted.
1080 fprintf_unfiltered (gdb_stdlog
, "<can't reach cfa> }\n");
1084 if (cache
->reg_value
[base_reg
].offset
== 0
1085 || cache
->reg_saved
[NIOS2_RA_REGNUM
].basereg
!= NIOS2_SP_REGNUM
1086 || cache
->reg_saved
[cache
->return_regnum
].basereg
!= NIOS2_SP_REGNUM
)
1088 /* If the frame didn't adjust the stack, didn't save RA or
1089 didn't save EA in an exception handler then it must either
1090 be a leaf function (doesn't call any other functions) or it
1091 can't return. If it has called another function then it
1092 can't be a leaf, so set base == 0 to indicate that we can't
1093 backtrace past it. */
1097 /* If it isn't the innermost function then it can't be a
1098 leaf, unless it was interrupted. Check whether RA for
1099 this frame is the same as PC. If so then it probably
1100 wasn't interrupted. */
1102 = get_frame_register_unsigned (this_frame
, NIOS2_RA_REGNUM
);
1104 if (ra
== current_pc
)
1109 "<noreturn ADJUST %s, r31@r%d+?>, r%d@r%d+?> }\n",
1110 paddress (gdbarch
, cache
->reg_value
[base_reg
].offset
),
1111 cache
->reg_saved
[NIOS2_RA_REGNUM
].basereg
,
1112 cache
->return_regnum
,
1113 cache
->reg_saved
[cache
->return_regnum
].basereg
);
1119 /* Get the value of whichever register we are using for the
1121 cache
->base
= get_frame_register_unsigned (this_frame
, base_reg
);
1123 /* What was the value of SP at the start of this function (or just
1124 after the stack switch). */
1125 frame_high
= cache
->base
- cache
->reg_value
[base_reg
].offset
;
1127 /* Adjust all the saved registers such that they contain addresses
1128 instead of offsets. */
1129 for (i
= 0; i
< NIOS2_NUM_REGS
; i
++)
1130 if (cache
->reg_saved
[i
].basereg
== NIOS2_SP_REGNUM
)
1132 cache
->reg_saved
[i
].basereg
= NIOS2_Z_REGNUM
;
1133 cache
->reg_saved
[i
].addr
+= frame_high
;
1136 for (i
= 0; i
< NIOS2_NUM_REGS
; i
++)
1137 if (cache
->reg_saved
[i
].basereg
== NIOS2_GP_REGNUM
)
1139 CORE_ADDR gp
= get_frame_register_unsigned (this_frame
,
1142 for ( ; i
< NIOS2_NUM_REGS
; i
++)
1143 if (cache
->reg_saved
[i
].basereg
== NIOS2_GP_REGNUM
)
1145 cache
->reg_saved
[i
].basereg
= NIOS2_Z_REGNUM
;
1146 cache
->reg_saved
[i
].addr
+= gp
;
1150 /* Work out what the value of SP was on the first instruction of
1151 this function. If we didn't switch stacks then this can be
1152 trivially computed from the base address. */
1153 if (cache
->reg_saved
[NIOS2_SP_REGNUM
].basereg
== NIOS2_Z_REGNUM
)
1155 = read_memory_unsigned_integer (cache
->reg_saved
[NIOS2_SP_REGNUM
].addr
,
1158 cache
->cfa
= frame_high
;
1160 /* Exception handlers restore ESTATUS into STATUS. */
1161 if (exception_handler
)
1163 cache
->reg_saved
[NIOS2_STATUS_REGNUM
]
1164 = cache
->reg_saved
[NIOS2_ESTATUS_REGNUM
];
1165 cache
->reg_saved
[NIOS2_ESTATUS_REGNUM
].basereg
= -1;
1169 fprintf_unfiltered (gdb_stdlog
, "cfa=%s }\n",
1170 paddress (gdbarch
, cache
->cfa
));
1172 return prologue_end
;
1175 /* Implement the skip_prologue gdbarch hook. */
1178 nios2_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1180 CORE_ADDR func_addr
;
1182 struct nios2_unwind_cache cache
;
1184 /* See if we can determine the end of the prologue via the symbol
1185 table. If so, then return either PC, or the PC after the
1186 prologue, whichever is greater. */
1187 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1189 CORE_ADDR post_prologue_pc
1190 = skip_prologue_using_sal (gdbarch
, func_addr
);
1192 if (post_prologue_pc
!= 0)
1193 return max (start_pc
, post_prologue_pc
);
1196 /* Prologue analysis does the rest.... */
1197 nios2_init_cache (&cache
, start_pc
);
1198 return nios2_analyze_prologue (gdbarch
, start_pc
, start_pc
, &cache
, NULL
);
1201 /* Implement the breakpoint_from_pc gdbarch hook.
1203 The Nios II ABI for Linux says: "Userspace programs should not use
1204 the break instruction and userspace debuggers should not insert
1205 one." and "Userspace breakpoints are accomplished using the trap
1206 instruction with immediate operand 31 (all ones)."
1208 So, we use "trap 31" consistently as the breakpoint on bare-metal
1209 as well as Linux targets. */
1211 static const gdb_byte
*
1212 nios2_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*bp_addr
,
1215 enum bfd_endian byte_order_for_code
= gdbarch_byte_order_for_code (gdbarch
);
1216 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
1218 /* R1 trap encoding:
1219 ((0x1d << 17) | (0x2d << 11) | (0x1f << 6) | (0x3a << 0))
1221 static const gdb_byte r1_breakpoint_le
[] = {0xfa, 0x6f, 0x3b, 0x0};
1222 static const gdb_byte r1_breakpoint_be
[] = {0x0, 0x3b, 0x6f, 0xfa};
1223 *bp_size
= NIOS2_OPCODE_SIZE
;
1224 if (byte_order_for_code
== BFD_ENDIAN_BIG
)
1225 return r1_breakpoint_be
;
1227 return r1_breakpoint_le
;
1230 /* Implement the print_insn gdbarch method. */
1233 nios2_print_insn (bfd_vma memaddr
, disassemble_info
*info
)
1235 if (info
->endian
== BFD_ENDIAN_BIG
)
1236 return print_insn_big_nios2 (memaddr
, info
);
1238 return print_insn_little_nios2 (memaddr
, info
);
1242 /* Implement the frame_align gdbarch method. */
1245 nios2_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1247 return align_down (addr
, 4);
1251 /* Implement the return_value gdbarch method. */
1253 static enum return_value_convention
1254 nios2_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1255 struct type
*type
, struct regcache
*regcache
,
1256 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1258 if (TYPE_LENGTH (type
) > 8)
1259 return RETURN_VALUE_STRUCT_CONVENTION
;
1262 nios2_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1264 nios2_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1266 return RETURN_VALUE_REGISTER_CONVENTION
;
1269 /* Implement the dummy_id gdbarch method. */
1271 static struct frame_id
1272 nios2_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1274 return frame_id_build
1275 (get_frame_register_unsigned (this_frame
, NIOS2_SP_REGNUM
),
1276 get_frame_pc (this_frame
));
1279 /* Implement the push_dummy_call gdbarch method. */
1282 nios2_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1283 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1284 int nargs
, struct value
**args
, CORE_ADDR sp
,
1285 int struct_return
, CORE_ADDR struct_addr
)
1291 int stack_offset
= 0;
1292 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
1293 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1295 /* Set the return address register to point to the entry point of
1296 the program, where a breakpoint lies in wait. */
1297 regcache_cooked_write_signed (regcache
, NIOS2_RA_REGNUM
, bp_addr
);
1299 /* Now make space on the stack for the args. */
1300 for (argnum
= 0; argnum
< nargs
; argnum
++)
1301 len
+= align_up (TYPE_LENGTH (value_type (args
[argnum
])), 4);
1304 /* Initialize the register pointer. */
1305 argreg
= NIOS2_FIRST_ARGREG
;
1307 /* The struct_return pointer occupies the first parameter-passing
1310 regcache_cooked_write_unsigned (regcache
, argreg
++, struct_addr
);
1312 /* Now load as many as possible of the first arguments into
1313 registers, and push the rest onto the stack. Loop through args
1314 from first to last. */
1315 for (argnum
= 0; argnum
< nargs
; argnum
++)
1317 const gdb_byte
*val
;
1318 gdb_byte valbuf
[MAX_REGISTER_SIZE
];
1319 struct value
*arg
= args
[argnum
];
1320 struct type
*arg_type
= check_typedef (value_type (arg
));
1321 int len
= TYPE_LENGTH (arg_type
);
1322 enum type_code typecode
= TYPE_CODE (arg_type
);
1324 val
= value_contents (arg
);
1326 /* Copy the argument to general registers or the stack in
1327 register-sized pieces. Large arguments are split between
1328 registers and stack. */
1331 int partial_len
= (len
< 4 ? len
: 4);
1333 if (argreg
<= NIOS2_LAST_ARGREG
)
1335 /* The argument is being passed in a register. */
1336 CORE_ADDR regval
= extract_unsigned_integer (val
, partial_len
,
1339 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1344 /* The argument is being passed on the stack. */
1345 CORE_ADDR addr
= sp
+ stack_offset
;
1347 write_memory (addr
, val
, partial_len
);
1348 stack_offset
+= align_up (partial_len
, 4);
1356 regcache_cooked_write_signed (regcache
, NIOS2_SP_REGNUM
, sp
);
1358 /* Return adjusted stack pointer. */
1362 /* Implement the unwind_pc gdbarch method. */
1365 nios2_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1369 frame_unwind_register (next_frame
, NIOS2_PC_REGNUM
, buf
);
1370 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1373 /* Implement the unwind_sp gdbarch method. */
1376 nios2_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1378 return frame_unwind_register_unsigned (this_frame
, NIOS2_SP_REGNUM
);
1381 /* Use prologue analysis to fill in the register cache
1382 *THIS_PROLOGUE_CACHE for THIS_FRAME. This function initializes
1383 *THIS_PROLOGUE_CACHE first. */
1385 static struct nios2_unwind_cache
*
1386 nios2_frame_unwind_cache (struct frame_info
*this_frame
,
1387 void **this_prologue_cache
)
1389 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1390 CORE_ADDR current_pc
;
1391 struct nios2_unwind_cache
*cache
;
1394 if (*this_prologue_cache
)
1395 return *this_prologue_cache
;
1397 cache
= FRAME_OBSTACK_ZALLOC (struct nios2_unwind_cache
);
1398 *this_prologue_cache
= cache
;
1400 /* Zero all fields. */
1401 nios2_init_cache (cache
, get_frame_func (this_frame
));
1403 /* Prologue analysis does the rest... */
1404 current_pc
= get_frame_pc (this_frame
);
1406 nios2_analyze_prologue (gdbarch
, cache
->pc
, current_pc
, cache
, this_frame
);
1411 /* Implement the this_id function for the normal unwinder. */
1414 nios2_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1415 struct frame_id
*this_id
)
1417 struct nios2_unwind_cache
*cache
=
1418 nios2_frame_unwind_cache (this_frame
, this_cache
);
1420 /* This marks the outermost frame. */
1421 if (cache
->base
== 0)
1424 *this_id
= frame_id_build (cache
->cfa
, cache
->pc
);
1427 /* Implement the prev_register function for the normal unwinder. */
1429 static struct value
*
1430 nios2_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1433 struct nios2_unwind_cache
*cache
=
1434 nios2_frame_unwind_cache (this_frame
, this_cache
);
1436 gdb_assert (regnum
>= 0 && regnum
< NIOS2_NUM_REGS
);
1438 /* The PC of the previous frame is stored in the RA register of
1439 the current frame. Frob regnum so that we pull the value from
1440 the correct place. */
1441 if (regnum
== NIOS2_PC_REGNUM
)
1442 regnum
= cache
->return_regnum
;
1444 if (regnum
== NIOS2_SP_REGNUM
&& cache
->cfa
)
1445 return frame_unwind_got_constant (this_frame
, regnum
, cache
->cfa
);
1447 /* If we've worked out where a register is stored then load it from
1449 if (cache
->reg_saved
[regnum
].basereg
== NIOS2_Z_REGNUM
)
1450 return frame_unwind_got_memory (this_frame
, regnum
,
1451 cache
->reg_saved
[regnum
].addr
);
1453 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
1456 /* Implement the this_base, this_locals, and this_args hooks
1457 for the normal unwinder. */
1460 nios2_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1462 struct nios2_unwind_cache
*info
1463 = nios2_frame_unwind_cache (this_frame
, this_cache
);
1468 /* Data structures for the normal prologue-analysis-based
1471 static const struct frame_unwind nios2_frame_unwind
=
1474 default_frame_unwind_stop_reason
,
1475 nios2_frame_this_id
,
1476 nios2_frame_prev_register
,
1478 default_frame_sniffer
1481 static const struct frame_base nios2_frame_base
=
1483 &nios2_frame_unwind
,
1484 nios2_frame_base_address
,
1485 nios2_frame_base_address
,
1486 nios2_frame_base_address
1489 /* Fill in the register cache *THIS_CACHE for THIS_FRAME for use
1490 in the stub unwinder. */
1492 static struct trad_frame_cache
*
1493 nios2_stub_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1496 CORE_ADDR start_addr
;
1497 CORE_ADDR stack_addr
;
1498 struct trad_frame_cache
*this_trad_cache
;
1499 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1500 int num_regs
= gdbarch_num_regs (gdbarch
);
1502 if (*this_cache
!= NULL
)
1504 this_trad_cache
= trad_frame_cache_zalloc (this_frame
);
1505 *this_cache
= this_trad_cache
;
1507 /* The return address is in the link register. */
1508 trad_frame_set_reg_realreg (this_trad_cache
,
1509 gdbarch_pc_regnum (gdbarch
),
1512 /* Frame ID, since it's a frameless / stackless function, no stack
1513 space is allocated and SP on entry is the current SP. */
1514 pc
= get_frame_pc (this_frame
);
1515 find_pc_partial_function (pc
, NULL
, &start_addr
, NULL
);
1516 stack_addr
= get_frame_register_unsigned (this_frame
, NIOS2_SP_REGNUM
);
1517 trad_frame_set_id (this_trad_cache
, frame_id_build (start_addr
, stack_addr
));
1518 /* Assume that the frame's base is the same as the stack pointer. */
1519 trad_frame_set_this_base (this_trad_cache
, stack_addr
);
1521 return this_trad_cache
;
1524 /* Implement the this_id function for the stub unwinder. */
1527 nios2_stub_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1528 struct frame_id
*this_id
)
1530 struct trad_frame_cache
*this_trad_cache
1531 = nios2_stub_frame_cache (this_frame
, this_cache
);
1533 trad_frame_get_id (this_trad_cache
, this_id
);
1536 /* Implement the prev_register function for the stub unwinder. */
1538 static struct value
*
1539 nios2_stub_frame_prev_register (struct frame_info
*this_frame
,
1540 void **this_cache
, int regnum
)
1542 struct trad_frame_cache
*this_trad_cache
1543 = nios2_stub_frame_cache (this_frame
, this_cache
);
1545 return trad_frame_get_register (this_trad_cache
, this_frame
, regnum
);
1548 /* Implement the sniffer function for the stub unwinder.
1549 This unwinder is used for cases where the normal
1550 prologue-analysis-based unwinder can't work,
1551 such as PLT stubs. */
1554 nios2_stub_frame_sniffer (const struct frame_unwind
*self
,
1555 struct frame_info
*this_frame
, void **cache
)
1558 struct obj_section
*s
;
1559 CORE_ADDR pc
= get_frame_address_in_block (this_frame
);
1561 /* Use the stub unwinder for unreadable code. */
1562 if (target_read_memory (get_frame_pc (this_frame
), dummy
, 4) != 0)
1565 if (in_plt_section (pc
))
1571 /* Define the data structures for the stub unwinder. */
1573 static const struct frame_unwind nios2_stub_frame_unwind
=
1576 default_frame_unwind_stop_reason
,
1577 nios2_stub_frame_this_id
,
1578 nios2_stub_frame_prev_register
,
1580 nios2_stub_frame_sniffer
1585 /* Determine where to set a single step breakpoint while considering
1586 branch prediction. */
1589 nios2_get_next_pc (struct frame_info
*frame
, CORE_ADDR pc
)
1591 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1592 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1593 unsigned long mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
1595 const struct nios2_opcode
*op
= nios2_fetch_insn (gdbarch
, pc
, &insn
);
1601 enum branch_condition cond
;
1603 /* Do something stupid if we can't disassemble the insn at pc. */
1605 return pc
+ NIOS2_OPCODE_SIZE
;
1607 if (nios2_match_branch (insn
, op
, mach
, &ra
, &rb
, &imm
, &cond
))
1609 int ras
= get_frame_register_signed (frame
, ra
);
1610 int rbs
= get_frame_register_signed (frame
, rb
);
1611 unsigned int rau
= get_frame_register_unsigned (frame
, ra
);
1612 unsigned int rbu
= get_frame_register_unsigned (frame
, rb
);
1649 else if (nios2_match_jmpi (insn
, op
, mach
, &uimm
)
1650 || nios2_match_calli (insn
, op
, mach
, &uimm
))
1651 pc
= (pc
& 0xf0000000) | uimm
;
1653 else if (nios2_match_jmpr (insn
, op
, mach
, &ra
)
1654 || nios2_match_callr (insn
, op
, mach
, &ra
))
1655 pc
= get_frame_register_unsigned (frame
, ra
);
1657 else if (nios2_match_trap (insn
, op
, mach
, &uimm
))
1659 if (tdep
->syscall_next_pc
!= NULL
)
1660 return tdep
->syscall_next_pc (frame
);
1669 /* Implement the software_single_step gdbarch method. */
1672 nios2_software_single_step (struct frame_info
*frame
)
1674 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1675 struct address_space
*aspace
= get_frame_address_space (frame
);
1676 CORE_ADDR next_pc
= nios2_get_next_pc (frame
, get_frame_pc (frame
));
1678 insert_single_step_breakpoint (gdbarch
, aspace
, next_pc
);
1683 /* Implement the get_longjump_target gdbarch method. */
1686 nios2_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1688 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1689 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1690 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1691 CORE_ADDR jb_addr
= get_frame_register_unsigned (frame
, NIOS2_R4_REGNUM
);
1694 if (target_read_memory (jb_addr
+ (tdep
->jb_pc
* 4), buf
, 4))
1697 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1701 /* Initialize the Nios II gdbarch. */
1703 static struct gdbarch
*
1704 nios2_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1706 struct gdbarch
*gdbarch
;
1707 struct gdbarch_tdep
*tdep
;
1708 int register_bytes
, i
;
1709 struct tdesc_arch_data
*tdesc_data
= NULL
;
1710 const struct target_desc
*tdesc
= info
.target_desc
;
1712 if (!tdesc_has_registers (tdesc
))
1713 /* Pick a default target description. */
1714 tdesc
= tdesc_nios2
;
1716 /* Check any target description for validity. */
1717 if (tdesc_has_registers (tdesc
))
1719 const struct tdesc_feature
*feature
;
1722 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.nios2.cpu");
1723 if (feature
== NULL
)
1726 tdesc_data
= tdesc_data_alloc ();
1730 for (i
= 0; i
< NIOS2_NUM_REGS
; i
++)
1731 valid_p
&= tdesc_numbered_register (feature
, tdesc_data
, i
,
1732 nios2_reg_names
[i
]);
1736 tdesc_data_cleanup (tdesc_data
);
1741 /* Find a candidate among the list of pre-declared architectures. */
1742 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1744 return arches
->gdbarch
;
1746 /* None found, create a new architecture from the information
1748 tdep
= xcalloc (1, sizeof (struct gdbarch_tdep
));
1749 gdbarch
= gdbarch_alloc (&info
, tdep
);
1751 /* longjmp support not enabled by default. */
1754 /* Data type sizes. */
1755 set_gdbarch_ptr_bit (gdbarch
, 32);
1756 set_gdbarch_addr_bit (gdbarch
, 32);
1757 set_gdbarch_short_bit (gdbarch
, 16);
1758 set_gdbarch_int_bit (gdbarch
, 32);
1759 set_gdbarch_long_bit (gdbarch
, 32);
1760 set_gdbarch_long_long_bit (gdbarch
, 64);
1761 set_gdbarch_float_bit (gdbarch
, 32);
1762 set_gdbarch_double_bit (gdbarch
, 64);
1764 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1765 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1767 /* The register set. */
1768 set_gdbarch_num_regs (gdbarch
, NIOS2_NUM_REGS
);
1769 set_gdbarch_sp_regnum (gdbarch
, NIOS2_SP_REGNUM
);
1770 set_gdbarch_pc_regnum (gdbarch
, NIOS2_PC_REGNUM
); /* Pseudo register PC */
1772 set_gdbarch_register_name (gdbarch
, nios2_register_name
);
1773 set_gdbarch_register_type (gdbarch
, nios2_register_type
);
1775 /* Provide register mappings for stabs and dwarf2. */
1776 set_gdbarch_stab_reg_to_regnum (gdbarch
, nios2_dwarf_reg_to_regnum
);
1777 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, nios2_dwarf_reg_to_regnum
);
1779 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1781 /* Call dummy code. */
1782 set_gdbarch_frame_align (gdbarch
, nios2_frame_align
);
1784 set_gdbarch_return_value (gdbarch
, nios2_return_value
);
1786 set_gdbarch_skip_prologue (gdbarch
, nios2_skip_prologue
);
1787 set_gdbarch_stack_frame_destroyed_p (gdbarch
, nios2_stack_frame_destroyed_p
);
1788 set_gdbarch_breakpoint_from_pc (gdbarch
, nios2_breakpoint_from_pc
);
1790 set_gdbarch_dummy_id (gdbarch
, nios2_dummy_id
);
1791 set_gdbarch_unwind_pc (gdbarch
, nios2_unwind_pc
);
1792 set_gdbarch_unwind_sp (gdbarch
, nios2_unwind_sp
);
1794 /* The dwarf2 unwinder will normally produce the best results if
1795 the debug information is available, so register it first. */
1796 dwarf2_append_unwinders (gdbarch
);
1797 frame_unwind_append_unwinder (gdbarch
, &nios2_stub_frame_unwind
);
1798 frame_unwind_append_unwinder (gdbarch
, &nios2_frame_unwind
);
1800 /* Single stepping. */
1801 set_gdbarch_software_single_step (gdbarch
, nios2_software_single_step
);
1803 /* Hook in ABI-specific overrides, if they have been registered. */
1804 gdbarch_init_osabi (info
, gdbarch
);
1806 if (tdep
->jb_pc
>= 0)
1807 set_gdbarch_get_longjmp_target (gdbarch
, nios2_get_longjmp_target
);
1809 frame_base_set_default (gdbarch
, &nios2_frame_base
);
1811 set_gdbarch_print_insn (gdbarch
, nios2_print_insn
);
1813 /* Enable inferior call support. */
1814 set_gdbarch_push_dummy_call (gdbarch
, nios2_push_dummy_call
);
1817 tdesc_use_registers (gdbarch
, tdesc
, tdesc_data
);
1822 extern initialize_file_ftype _initialize_nios2_tdep
; /* -Wmissing-prototypes */
1825 _initialize_nios2_tdep (void)
1827 gdbarch_register (bfd_arch_nios2
, nios2_gdbarch_init
, NULL
);
1828 initialize_tdesc_nios2 ();
1830 /* Allow debugging this file's internals. */
1831 add_setshow_boolean_cmd ("nios2", class_maintenance
, &nios2_debug
,
1832 _("Set Nios II debugging."),
1833 _("Show Nios II debugging."),
1834 _("When on, Nios II specific debugging is enabled."),
1837 &setdebuglist
, &showdebuglist
);