1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
28 #include "linux-nat.h"
29 #include <sys/types.h>
32 #include <sys/ioctl.h>
35 #include <sys/procfs.h>
36 #include "nat/gdb_ptrace.h"
37 #include "inf-ptrace.h"
39 /* Prototypes for supply_gregset etc. */
42 #include "ppc-linux-tdep.h"
44 /* Required when using the AUXV. */
45 #include "elf/common.h"
48 #include "arch/ppc-linux-common.h"
49 #include "arch/ppc-linux-tdesc.h"
50 #include "nat/ppc-linux.h"
52 /* Similarly for the hardware watchpoint support. These requests are used
53 when the PowerPC HWDEBUG ptrace interface is not available. */
54 #ifndef PTRACE_GET_DEBUGREG
55 #define PTRACE_GET_DEBUGREG 25
57 #ifndef PTRACE_SET_DEBUGREG
58 #define PTRACE_SET_DEBUGREG 26
60 #ifndef PTRACE_GETSIGINFO
61 #define PTRACE_GETSIGINFO 0x4202
64 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
65 available. It exposes the debug facilities of PowerPC processors, as well
66 as additional features of BookE processors, such as ranged breakpoints and
67 watchpoints and hardware-accelerated condition evaluation. */
68 #ifndef PPC_PTRACE_GETHWDBGINFO
70 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
71 ptrace interface is not present in ptrace.h, so we'll have to pretty much
72 include it all here so that the code at least compiles on older systems. */
73 #define PPC_PTRACE_GETHWDBGINFO 0x89
74 #define PPC_PTRACE_SETHWDEBUG 0x88
75 #define PPC_PTRACE_DELHWDEBUG 0x87
79 uint32_t version
; /* Only version 1 exists to date. */
80 uint32_t num_instruction_bps
;
81 uint32_t num_data_bps
;
82 uint32_t num_condition_regs
;
83 uint32_t data_bp_alignment
;
84 uint32_t sizeof_condition
; /* size of the DVC register. */
88 /* Features will have bits indicating whether there is support for: */
89 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
90 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
91 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
92 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
94 struct ppc_hw_breakpoint
96 uint32_t version
; /* currently, version must be 1 */
97 uint32_t trigger_type
; /* only some combinations allowed */
98 uint32_t addr_mode
; /* address match mode */
99 uint32_t condition_mode
; /* break/watchpoint condition flags */
100 uint64_t addr
; /* break/watchpoint address */
101 uint64_t addr2
; /* range end or mask */
102 uint64_t condition_value
; /* contents of the DVC register */
106 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
107 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
108 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
109 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
112 #define PPC_BREAKPOINT_MODE_EXACT 0x0
113 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
114 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
115 #define PPC_BREAKPOINT_MODE_MASK 0x3
117 /* Condition mode. */
118 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
119 #define PPC_BREAKPOINT_CONDITION_AND 0x1
120 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
121 #define PPC_BREAKPOINT_CONDITION_OR 0x2
122 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
123 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
124 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
125 #define PPC_BREAKPOINT_CONDITION_BE(n) \
126 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
127 #endif /* PPC_PTRACE_GETHWDBGINFO */
129 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
130 watchpoint (up to 512 bytes). */
131 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
132 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
133 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
135 /* Similarly for the general-purpose (gp0 -- gp31)
136 and floating-point registers (fp0 -- fp31). */
137 #ifndef PTRACE_GETREGS
138 #define PTRACE_GETREGS 12
140 #ifndef PTRACE_SETREGS
141 #define PTRACE_SETREGS 13
143 #ifndef PTRACE_GETFPREGS
144 #define PTRACE_GETFPREGS 14
146 #ifndef PTRACE_SETFPREGS
147 #define PTRACE_SETFPREGS 15
150 /* This oddity is because the Linux kernel defines elf_vrregset_t as
151 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
152 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
153 the vrsave as an extra 4 bytes at the end. I opted for creating a
154 flat array of chars, so that it is easier to manipulate for gdb.
156 There are 32 vector registers 16 bytes longs, plus a VSCR register
157 which is only 4 bytes long, but is fetched as a 16 bytes
158 quantity. Up to here we have the elf_vrregset_t structure.
159 Appended to this there is space for the VRSAVE register: 4 bytes.
160 Even though this vrsave register is not included in the regset
161 typedef, it is handled by the ptrace requests.
163 Note that GNU/Linux doesn't support little endian PPC hardware,
164 therefore the offset at which the real value of the VSCR register
165 is located will be always 12 bytes.
167 The layout is like this (where x is the actual value of the vscr reg): */
171 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
172 <-------> <-------><-------><->
177 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
179 /* This is the layout of the POWER7 VSX registers and the way they overlap
180 with the existing FPR and VMX registers.
182 VSR doubleword 0 VSR doubleword 1
183 ----------------------------------------------------------------
185 ----------------------------------------------------------------
187 ----------------------------------------------------------------
190 ----------------------------------------------------------------
191 VSR[30] | FPR[30] | |
192 ----------------------------------------------------------------
193 VSR[31] | FPR[31] | |
194 ----------------------------------------------------------------
196 ----------------------------------------------------------------
198 ----------------------------------------------------------------
201 ----------------------------------------------------------------
203 ----------------------------------------------------------------
205 ----------------------------------------------------------------
207 VSX has 64 128bit registers. The first 32 registers overlap with
208 the FP registers (doubleword 0) and hence extend them with additional
209 64 bits (doubleword 1). The other 32 regs overlap with the VMX
211 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
213 /* On PPC processors that support the Signal Processing Extension
214 (SPE) APU, the general-purpose registers are 64 bits long.
215 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
216 ptrace calls only access the lower half of each register, to allow
217 them to behave the same way they do on non-SPE systems. There's a
218 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
219 read and write the top halves of all the general-purpose registers
220 at once, along with some SPE-specific registers.
222 GDB itself continues to claim the general-purpose registers are 32
223 bits long. It has unnamed raw registers that hold the upper halves
224 of the gprs, and the full 64-bit SIMD views of the registers,
225 'ev0' -- 'ev31', are pseudo-registers that splice the top and
226 bottom halves together.
228 This is the structure filled in by PTRACE_GETEVRREGS and written to
229 the inferior's registers by PTRACE_SETEVRREGS. */
230 struct gdb_evrregset_t
232 unsigned long evr
[32];
233 unsigned long long acc
;
234 unsigned long spefscr
;
237 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
238 PTRACE_SETVSXREGS requests, for reading and writing the VSX
239 POWER7 registers 0 through 31. Zero if we've tried one of them and
240 gotten an error. Note that VSX registers 32 through 63 overlap
241 with VR registers 0 through 31. */
242 int have_ptrace_getsetvsxregs
= 1;
244 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
245 PTRACE_SETVRREGS requests, for reading and writing the Altivec
246 registers. Zero if we've tried one of them and gotten an
248 int have_ptrace_getvrregs
= 1;
250 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
251 PTRACE_SETEVRREGS requests, for reading and writing the SPE
252 registers. Zero if we've tried one of them and gotten an
254 int have_ptrace_getsetevrregs
= 1;
256 /* Non-zero if our kernel may support the PTRACE_GETREGS and
257 PTRACE_SETREGS requests, for reading and writing the
258 general-purpose registers. Zero if we've tried one of
259 them and gotten an error. */
260 int have_ptrace_getsetregs
= 1;
262 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
263 PTRACE_SETFPREGS requests, for reading and writing the
264 floating-pointers registers. Zero if we've tried one of
265 them and gotten an error. */
266 int have_ptrace_getsetfpregs
= 1;
268 struct ppc_linux_nat_target final
: public linux_nat_target
270 /* Add our register access methods. */
271 void fetch_registers (struct regcache
*, int) override
;
272 void store_registers (struct regcache
*, int) override
;
274 /* Add our breakpoint/watchpoint methods. */
275 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
277 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
280 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
283 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
285 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
286 struct expression
*) override
;
288 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
289 struct expression
*) override
;
291 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
294 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
297 bool stopped_by_watchpoint () override
;
299 bool stopped_data_address (CORE_ADDR
*) override
;
301 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
303 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
306 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
308 int ranged_break_num_registers () override
;
310 const struct target_desc
*read_description () override
;
312 int auxv_parse (gdb_byte
**readptr
,
313 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
316 /* Override linux_nat_target low methods. */
317 void low_new_thread (struct lwp_info
*lp
) override
;
320 static ppc_linux_nat_target the_ppc_linux_nat_target
;
323 /* registers layout, as presented by the ptrace interface:
324 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
325 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
326 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
327 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
328 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
329 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
330 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
331 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
332 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
333 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
334 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
335 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
336 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
340 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
343 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
344 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
345 interface, and not the wordsize of the program's ABI. */
346 int wordsize
= sizeof (long);
348 /* General purpose registers occupy 1 slot each in the buffer. */
349 if (regno
>= tdep
->ppc_gp0_regnum
350 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
351 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
353 /* Floating point regs: eight bytes each in both 32- and 64-bit
354 ptrace interfaces. Thus, two slots each in 32-bit interface, one
355 slot each in 64-bit interface. */
356 if (tdep
->ppc_fp0_regnum
>= 0
357 && regno
>= tdep
->ppc_fp0_regnum
358 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
359 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
361 /* UISA special purpose registers: 1 slot each. */
362 if (regno
== gdbarch_pc_regnum (gdbarch
))
363 u_addr
= PT_NIP
* wordsize
;
364 if (regno
== tdep
->ppc_lr_regnum
)
365 u_addr
= PT_LNK
* wordsize
;
366 if (regno
== tdep
->ppc_cr_regnum
)
367 u_addr
= PT_CCR
* wordsize
;
368 if (regno
== tdep
->ppc_xer_regnum
)
369 u_addr
= PT_XER
* wordsize
;
370 if (regno
== tdep
->ppc_ctr_regnum
)
371 u_addr
= PT_CTR
* wordsize
;
373 if (regno
== tdep
->ppc_mq_regnum
)
374 u_addr
= PT_MQ
* wordsize
;
376 if (regno
== tdep
->ppc_ps_regnum
)
377 u_addr
= PT_MSR
* wordsize
;
378 if (regno
== PPC_ORIG_R3_REGNUM
)
379 u_addr
= PT_ORIG_R3
* wordsize
;
380 if (regno
== PPC_TRAP_REGNUM
)
381 u_addr
= PT_TRAP
* wordsize
;
382 if (tdep
->ppc_fpscr_regnum
>= 0
383 && regno
== tdep
->ppc_fpscr_regnum
)
385 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
386 kernel headers incorrectly contained the 32-bit definition of
387 PT_FPSCR. For the 32-bit definition, floating-point
388 registers occupy two 32-bit "slots", and the FPSCR lives in
389 the second half of such a slot-pair (hence +1). For 64-bit,
390 the FPSCR instead occupies the full 64-bit 2-word-slot and
391 hence no adjustment is necessary. Hack around this. */
392 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
393 u_addr
= (48 + 32) * wordsize
;
394 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
395 slot and not just its second word. The PT_FPSCR supplied when
396 GDB is compiled as a 32-bit app doesn't reflect this. */
397 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
398 && PT_FPSCR
== (48 + 2*32 + 1))
399 u_addr
= (48 + 2*32) * wordsize
;
401 u_addr
= PT_FPSCR
* wordsize
;
406 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
407 registers set mechanism, as opposed to the interface for all the
408 other registers, that stores/fetches each register individually. */
410 fetch_vsx_register (struct regcache
*regcache
, int tid
, int regno
)
413 gdb_vsxregset_t regs
;
414 struct gdbarch
*gdbarch
= regcache
->arch ();
415 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
416 int vsxregsize
= register_size (gdbarch
, tdep
->ppc_vsr0_upper_regnum
);
418 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
423 have_ptrace_getsetvsxregs
= 0;
426 perror_with_name (_("Unable to fetch VSX register"));
429 regcache_raw_supply (regcache
, regno
,
430 regs
+ (regno
- tdep
->ppc_vsr0_upper_regnum
)
434 /* The Linux kernel ptrace interface for AltiVec registers uses the
435 registers set mechanism, as opposed to the interface for all the
436 other registers, that stores/fetches each register individually. */
438 fetch_altivec_register (struct regcache
*regcache
, int tid
, int regno
)
443 struct gdbarch
*gdbarch
= regcache
->arch ();
444 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
445 int vrregsize
= register_size (gdbarch
, tdep
->ppc_vr0_regnum
);
447 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
452 have_ptrace_getvrregs
= 0;
455 perror_with_name (_("Unable to fetch AltiVec register"));
458 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
459 long on the hardware. We deal only with the lower 4 bytes of the
460 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
461 there is no need to define an offset for it. */
462 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
463 offset
= vrregsize
- register_size (gdbarch
, tdep
->ppc_vrsave_regnum
);
465 regcache_raw_supply (regcache
, regno
,
467 - tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
470 /* Fetch the top 32 bits of TID's general-purpose registers and the
471 SPE-specific registers, and place the results in EVRREGSET. If we
472 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
475 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
476 PTRACE_SETEVRREGS requests are supported is isolated here, and in
477 set_spe_registers. */
479 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
481 if (have_ptrace_getsetevrregs
)
483 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
487 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
488 we just return zeros. */
490 have_ptrace_getsetevrregs
= 0;
492 /* Anything else needs to be reported. */
493 perror_with_name (_("Unable to fetch SPE registers"));
497 memset (evrregset
, 0, sizeof (*evrregset
));
500 /* Supply values from TID for SPE-specific raw registers: the upper
501 halves of the GPRs, the accumulator, and the spefscr. REGNO must
502 be the number of an upper half register, acc, spefscr, or -1 to
503 supply the values of all registers. */
505 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
507 struct gdbarch
*gdbarch
= regcache
->arch ();
508 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
509 struct gdb_evrregset_t evrregs
;
511 gdb_assert (sizeof (evrregs
.evr
[0])
512 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
513 gdb_assert (sizeof (evrregs
.acc
)
514 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
515 gdb_assert (sizeof (evrregs
.spefscr
)
516 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
518 get_spe_registers (tid
, &evrregs
);
524 for (i
= 0; i
< ppc_num_gprs
; i
++)
525 regcache_raw_supply (regcache
, tdep
->ppc_ev0_upper_regnum
+ i
,
528 else if (tdep
->ppc_ev0_upper_regnum
<= regno
529 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
530 regcache_raw_supply (regcache
, regno
,
531 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
534 || regno
== tdep
->ppc_acc_regnum
)
535 regcache_raw_supply (regcache
, tdep
->ppc_acc_regnum
, &evrregs
.acc
);
538 || regno
== tdep
->ppc_spefscr_regnum
)
539 regcache_raw_supply (regcache
, tdep
->ppc_spefscr_regnum
,
544 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
546 struct gdbarch
*gdbarch
= regcache
->arch ();
547 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
548 /* This isn't really an address. But ptrace thinks of it as one. */
549 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
550 int bytes_transferred
;
551 unsigned int offset
; /* Offset of registers within the u area. */
552 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
554 if (altivec_register_p (gdbarch
, regno
))
556 /* If this is the first time through, or if it is not the first
557 time through, and we have comfirmed that there is kernel
558 support for such a ptrace request, then go and fetch the
560 if (have_ptrace_getvrregs
)
562 fetch_altivec_register (regcache
, tid
, regno
);
565 /* If we have discovered that there is no ptrace support for
566 AltiVec registers, fall through and return zeroes, because
567 regaddr will be -1 in this case. */
569 if (vsx_register_p (gdbarch
, regno
))
571 if (have_ptrace_getsetvsxregs
)
573 fetch_vsx_register (regcache
, tid
, regno
);
577 else if (spe_register_p (gdbarch
, regno
))
579 fetch_spe_register (regcache
, tid
, regno
);
585 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
586 regcache_raw_supply (regcache
, regno
, buf
);
590 /* Read the raw register using sizeof(long) sized chunks. On a
591 32-bit platform, 64-bit floating-point registers will require two
593 for (bytes_transferred
= 0;
594 bytes_transferred
< register_size (gdbarch
, regno
);
595 bytes_transferred
+= sizeof (long))
600 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
601 regaddr
+= sizeof (long);
605 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
606 gdbarch_register_name (gdbarch
, regno
), regno
);
607 perror_with_name (message
);
609 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
612 /* Now supply the register. Keep in mind that the regcache's idea
613 of the register's size may not be a multiple of sizeof
615 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
617 /* Little-endian values are always found at the left end of the
618 bytes transferred. */
619 regcache_raw_supply (regcache
, regno
, buf
);
621 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
623 /* Big-endian values are found at the right end of the bytes
625 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
626 regcache_raw_supply (regcache
, regno
, buf
+ padding
);
629 internal_error (__FILE__
, __LINE__
,
630 _("fetch_register: unexpected byte order: %d"),
631 gdbarch_byte_order (gdbarch
));
635 supply_vsxregset (struct regcache
*regcache
, gdb_vsxregset_t
*vsxregsetp
)
638 struct gdbarch
*gdbarch
= regcache
->arch ();
639 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
640 int vsxregsize
= register_size (gdbarch
, tdep
->ppc_vsr0_upper_regnum
);
642 for (i
= 0; i
< ppc_num_vshrs
; i
++)
644 regcache_raw_supply (regcache
, tdep
->ppc_vsr0_upper_regnum
+ i
,
645 *vsxregsetp
+ i
* vsxregsize
);
650 supply_vrregset (struct regcache
*regcache
, gdb_vrregset_t
*vrregsetp
)
653 struct gdbarch
*gdbarch
= regcache
->arch ();
654 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
655 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
656 int vrregsize
= register_size (gdbarch
, tdep
->ppc_vr0_regnum
);
657 int offset
= vrregsize
- register_size (gdbarch
, tdep
->ppc_vrsave_regnum
);
659 for (i
= 0; i
< num_of_vrregs
; i
++)
661 /* The last 2 registers of this set are only 32 bit long, not
662 128. However an offset is necessary only for VSCR because it
663 occupies a whole vector, while VRSAVE occupies a full 4 bytes
665 if (i
== (num_of_vrregs
- 2))
666 regcache_raw_supply (regcache
, tdep
->ppc_vr0_regnum
+ i
,
667 *vrregsetp
+ i
* vrregsize
+ offset
);
669 regcache_raw_supply (regcache
, tdep
->ppc_vr0_regnum
+ i
,
670 *vrregsetp
+ i
* vrregsize
);
675 fetch_vsx_registers (struct regcache
*regcache
, int tid
)
678 gdb_vsxregset_t regs
;
680 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
685 have_ptrace_getsetvsxregs
= 0;
688 perror_with_name (_("Unable to fetch VSX registers"));
690 supply_vsxregset (regcache
, ®s
);
694 fetch_altivec_registers (struct regcache
*regcache
, int tid
)
699 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
704 have_ptrace_getvrregs
= 0;
707 perror_with_name (_("Unable to fetch AltiVec registers"));
709 supply_vrregset (regcache
, ®s
);
712 /* This function actually issues the request to ptrace, telling
713 it to get all general-purpose registers and put them into the
716 If the ptrace request does not exist, this function returns 0
717 and properly sets the have_ptrace_* flag. If the request fails,
718 this function calls perror_with_name. Otherwise, if the request
719 succeeds, then the regcache gets filled and 1 is returned. */
721 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
723 struct gdbarch
*gdbarch
= regcache
->arch ();
724 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
725 gdb_gregset_t gregset
;
727 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
731 have_ptrace_getsetregs
= 0;
734 perror_with_name (_("Couldn't get general-purpose registers."));
737 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
742 /* This is a wrapper for the fetch_all_gp_regs function. It is
743 responsible for verifying if this target has the ptrace request
744 that can be used to fetch all general-purpose registers at one
745 shot. If it doesn't, then we should fetch them using the
746 old-fashioned way, which is to iterate over the registers and
747 request them one by one. */
749 fetch_gp_regs (struct regcache
*regcache
, int tid
)
751 struct gdbarch
*gdbarch
= regcache
->arch ();
752 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
755 if (have_ptrace_getsetregs
)
756 if (fetch_all_gp_regs (regcache
, tid
))
759 /* If we've hit this point, it doesn't really matter which
760 architecture we are using. We just need to read the
761 registers in the "old-fashioned way". */
762 for (i
= 0; i
< ppc_num_gprs
; i
++)
763 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
766 /* This function actually issues the request to ptrace, telling
767 it to get all floating-point registers and put them into the
770 If the ptrace request does not exist, this function returns 0
771 and properly sets the have_ptrace_* flag. If the request fails,
772 this function calls perror_with_name. Otherwise, if the request
773 succeeds, then the regcache gets filled and 1 is returned. */
775 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
777 gdb_fpregset_t fpregs
;
779 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
783 have_ptrace_getsetfpregs
= 0;
786 perror_with_name (_("Couldn't get floating-point registers."));
789 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
794 /* This is a wrapper for the fetch_all_fp_regs function. It is
795 responsible for verifying if this target has the ptrace request
796 that can be used to fetch all floating-point registers at one
797 shot. If it doesn't, then we should fetch them using the
798 old-fashioned way, which is to iterate over the registers and
799 request them one by one. */
801 fetch_fp_regs (struct regcache
*regcache
, int tid
)
803 struct gdbarch
*gdbarch
= regcache
->arch ();
804 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
807 if (have_ptrace_getsetfpregs
)
808 if (fetch_all_fp_regs (regcache
, tid
))
811 /* If we've hit this point, it doesn't really matter which
812 architecture we are using. We just need to read the
813 registers in the "old-fashioned way". */
814 for (i
= 0; i
< ppc_num_fprs
; i
++)
815 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
819 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
822 struct gdbarch
*gdbarch
= regcache
->arch ();
823 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
825 fetch_gp_regs (regcache
, tid
);
826 if (tdep
->ppc_fp0_regnum
>= 0)
827 fetch_fp_regs (regcache
, tid
);
828 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
829 if (tdep
->ppc_ps_regnum
!= -1)
830 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
831 if (tdep
->ppc_cr_regnum
!= -1)
832 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
833 if (tdep
->ppc_lr_regnum
!= -1)
834 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
835 if (tdep
->ppc_ctr_regnum
!= -1)
836 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
837 if (tdep
->ppc_xer_regnum
!= -1)
838 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
839 if (tdep
->ppc_mq_regnum
!= -1)
840 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
841 if (ppc_linux_trap_reg_p (gdbarch
))
843 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
844 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
846 if (tdep
->ppc_fpscr_regnum
!= -1)
847 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
848 if (have_ptrace_getvrregs
)
849 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
850 fetch_altivec_registers (regcache
, tid
);
851 if (have_ptrace_getsetvsxregs
)
852 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
853 fetch_vsx_registers (regcache
, tid
);
854 if (tdep
->ppc_ev0_upper_regnum
>= 0)
855 fetch_spe_register (regcache
, tid
, -1);
858 /* Fetch registers from the child process. Fetch all registers if
859 regno == -1, otherwise fetch all general registers or all floating
860 point registers depending upon the value of regno. */
862 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
864 pid_t tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
867 fetch_ppc_registers (regcache
, tid
);
869 fetch_register (regcache
, tid
, regno
);
872 /* Store one VSX register. */
874 store_vsx_register (const struct regcache
*regcache
, int tid
, int regno
)
877 gdb_vsxregset_t regs
;
878 struct gdbarch
*gdbarch
= regcache
->arch ();
879 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
880 int vsxregsize
= register_size (gdbarch
, tdep
->ppc_vsr0_upper_regnum
);
882 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
887 have_ptrace_getsetvsxregs
= 0;
890 perror_with_name (_("Unable to fetch VSX register"));
893 regcache_raw_collect (regcache
, regno
, regs
+
894 (regno
- tdep
->ppc_vsr0_upper_regnum
) * vsxregsize
);
896 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
898 perror_with_name (_("Unable to store VSX register"));
901 /* Store one register. */
903 store_altivec_register (const struct regcache
*regcache
, int tid
, int regno
)
908 struct gdbarch
*gdbarch
= regcache
->arch ();
909 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
910 int vrregsize
= register_size (gdbarch
, tdep
->ppc_vr0_regnum
);
912 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
917 have_ptrace_getvrregs
= 0;
920 perror_with_name (_("Unable to fetch AltiVec register"));
923 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
924 long on the hardware. */
925 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
926 offset
= vrregsize
- register_size (gdbarch
, tdep
->ppc_vrsave_regnum
);
928 regcache_raw_collect (regcache
, regno
,
930 - tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
932 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
934 perror_with_name (_("Unable to store AltiVec register"));
937 /* Assuming TID referrs to an SPE process, set the top halves of TID's
938 general-purpose registers and its SPE-specific registers to the
939 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
942 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
943 PTRACE_SETEVRREGS requests are supported is isolated here, and in
944 get_spe_registers. */
946 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
948 if (have_ptrace_getsetevrregs
)
950 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
954 /* EIO means that the PTRACE_SETEVRREGS request isn't
955 supported; we fail silently, and don't try the call
958 have_ptrace_getsetevrregs
= 0;
960 /* Anything else needs to be reported. */
961 perror_with_name (_("Unable to set SPE registers"));
966 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
967 If REGNO is -1, write the values of all the SPE-specific
970 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
972 struct gdbarch
*gdbarch
= regcache
->arch ();
973 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
974 struct gdb_evrregset_t evrregs
;
976 gdb_assert (sizeof (evrregs
.evr
[0])
977 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
978 gdb_assert (sizeof (evrregs
.acc
)
979 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
980 gdb_assert (sizeof (evrregs
.spefscr
)
981 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
984 /* Since we're going to write out every register, the code below
985 should store to every field of evrregs; if that doesn't happen,
986 make it obvious by initializing it with suspicious values. */
987 memset (&evrregs
, 42, sizeof (evrregs
));
989 /* We can only read and write the entire EVR register set at a
990 time, so to write just a single register, we do a
991 read-modify-write maneuver. */
992 get_spe_registers (tid
, &evrregs
);
998 for (i
= 0; i
< ppc_num_gprs
; i
++)
999 regcache_raw_collect (regcache
,
1000 tdep
->ppc_ev0_upper_regnum
+ i
,
1003 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1004 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1005 regcache_raw_collect (regcache
, regno
,
1006 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1009 || regno
== tdep
->ppc_acc_regnum
)
1010 regcache_raw_collect (regcache
,
1011 tdep
->ppc_acc_regnum
,
1015 || regno
== tdep
->ppc_spefscr_regnum
)
1016 regcache_raw_collect (regcache
,
1017 tdep
->ppc_spefscr_regnum
,
1020 /* Write back the modified register set. */
1021 set_spe_registers (tid
, &evrregs
);
1025 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1027 struct gdbarch
*gdbarch
= regcache
->arch ();
1028 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1029 /* This isn't really an address. But ptrace thinks of it as one. */
1030 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1032 size_t bytes_to_transfer
;
1033 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1035 if (altivec_register_p (gdbarch
, regno
))
1037 store_altivec_register (regcache
, tid
, regno
);
1040 if (vsx_register_p (gdbarch
, regno
))
1042 store_vsx_register (regcache
, tid
, regno
);
1045 else if (spe_register_p (gdbarch
, regno
))
1047 store_spe_register (regcache
, tid
, regno
);
1054 /* First collect the register. Keep in mind that the regcache's
1055 idea of the register's size may not be a multiple of sizeof
1057 memset (buf
, 0, sizeof buf
);
1058 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1059 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1061 /* Little-endian values always sit at the left end of the buffer. */
1062 regcache_raw_collect (regcache
, regno
, buf
);
1064 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1066 /* Big-endian values sit at the right end of the buffer. */
1067 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1068 regcache_raw_collect (regcache
, regno
, buf
+ padding
);
1071 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1075 memcpy (&l
, &buf
[i
], sizeof (l
));
1077 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1078 regaddr
+= sizeof (long);
1081 && (regno
== tdep
->ppc_fpscr_regnum
1082 || regno
== PPC_ORIG_R3_REGNUM
1083 || regno
== PPC_TRAP_REGNUM
))
1085 /* Some older kernel versions don't allow fpscr, orig_r3
1086 or trap to be written. */
1093 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1094 gdbarch_register_name (gdbarch
, regno
), regno
);
1095 perror_with_name (message
);
1101 fill_vsxregset (const struct regcache
*regcache
, gdb_vsxregset_t
*vsxregsetp
)
1104 struct gdbarch
*gdbarch
= regcache
->arch ();
1105 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1106 int vsxregsize
= register_size (gdbarch
, tdep
->ppc_vsr0_upper_regnum
);
1108 for (i
= 0; i
< ppc_num_vshrs
; i
++)
1109 regcache_raw_collect (regcache
, tdep
->ppc_vsr0_upper_regnum
+ i
,
1110 *vsxregsetp
+ i
* vsxregsize
);
1114 fill_vrregset (const struct regcache
*regcache
, gdb_vrregset_t
*vrregsetp
)
1117 struct gdbarch
*gdbarch
= regcache
->arch ();
1118 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1119 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
1120 int vrregsize
= register_size (gdbarch
, tdep
->ppc_vr0_regnum
);
1121 int offset
= vrregsize
- register_size (gdbarch
, tdep
->ppc_vrsave_regnum
);
1123 for (i
= 0; i
< num_of_vrregs
; i
++)
1125 /* The last 2 registers of this set are only 32 bit long, not
1126 128, but only VSCR is fetched as a 16 bytes quantity. */
1127 if (i
== (num_of_vrregs
- 2))
1128 regcache_raw_collect (regcache
, tdep
->ppc_vr0_regnum
+ i
,
1129 *vrregsetp
+ i
* vrregsize
+ offset
);
1131 regcache_raw_collect (regcache
, tdep
->ppc_vr0_regnum
+ i
,
1132 *vrregsetp
+ i
* vrregsize
);
1137 store_vsx_registers (const struct regcache
*regcache
, int tid
)
1140 gdb_vsxregset_t regs
;
1142 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
1147 have_ptrace_getsetvsxregs
= 0;
1150 perror_with_name (_("Couldn't get VSX registers"));
1153 fill_vsxregset (regcache
, ®s
);
1155 if (ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
) < 0)
1156 perror_with_name (_("Couldn't write VSX registers"));
1160 store_altivec_registers (const struct regcache
*regcache
, int tid
)
1163 gdb_vrregset_t regs
;
1165 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
1170 have_ptrace_getvrregs
= 0;
1173 perror_with_name (_("Couldn't get AltiVec registers"));
1176 fill_vrregset (regcache
, ®s
);
1178 if (ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
) < 0)
1179 perror_with_name (_("Couldn't write AltiVec registers"));
1182 /* This function actually issues the request to ptrace, telling
1183 it to store all general-purpose registers present in the specified
1186 If the ptrace request does not exist, this function returns 0
1187 and properly sets the have_ptrace_* flag. If the request fails,
1188 this function calls perror_with_name. Otherwise, if the request
1189 succeeds, then the regcache is stored and 1 is returned. */
1191 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1193 struct gdbarch
*gdbarch
= regcache
->arch ();
1194 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1195 gdb_gregset_t gregset
;
1197 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1201 have_ptrace_getsetregs
= 0;
1204 perror_with_name (_("Couldn't get general-purpose registers."));
1207 fill_gregset (regcache
, &gregset
, regno
);
1209 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1213 have_ptrace_getsetregs
= 0;
1216 perror_with_name (_("Couldn't set general-purpose registers."));
1222 /* This is a wrapper for the store_all_gp_regs function. It is
1223 responsible for verifying if this target has the ptrace request
1224 that can be used to store all general-purpose registers at one
1225 shot. If it doesn't, then we should store them using the
1226 old-fashioned way, which is to iterate over the registers and
1227 store them one by one. */
1229 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1231 struct gdbarch
*gdbarch
= regcache
->arch ();
1232 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1235 if (have_ptrace_getsetregs
)
1236 if (store_all_gp_regs (regcache
, tid
, regno
))
1239 /* If we hit this point, it doesn't really matter which
1240 architecture we are using. We just need to store the
1241 registers in the "old-fashioned way". */
1242 for (i
= 0; i
< ppc_num_gprs
; i
++)
1243 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1246 /* This function actually issues the request to ptrace, telling
1247 it to store all floating-point registers present in the specified
1250 If the ptrace request does not exist, this function returns 0
1251 and properly sets the have_ptrace_* flag. If the request fails,
1252 this function calls perror_with_name. Otherwise, if the request
1253 succeeds, then the regcache is stored and 1 is returned. */
1255 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1257 gdb_fpregset_t fpregs
;
1259 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1263 have_ptrace_getsetfpregs
= 0;
1266 perror_with_name (_("Couldn't get floating-point registers."));
1269 fill_fpregset (regcache
, &fpregs
, regno
);
1271 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1275 have_ptrace_getsetfpregs
= 0;
1278 perror_with_name (_("Couldn't set floating-point registers."));
1284 /* This is a wrapper for the store_all_fp_regs function. It is
1285 responsible for verifying if this target has the ptrace request
1286 that can be used to store all floating-point registers at one
1287 shot. If it doesn't, then we should store them using the
1288 old-fashioned way, which is to iterate over the registers and
1289 store them one by one. */
1291 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1293 struct gdbarch
*gdbarch
= regcache
->arch ();
1294 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1297 if (have_ptrace_getsetfpregs
)
1298 if (store_all_fp_regs (regcache
, tid
, regno
))
1301 /* If we hit this point, it doesn't really matter which
1302 architecture we are using. We just need to store the
1303 registers in the "old-fashioned way". */
1304 for (i
= 0; i
< ppc_num_fprs
; i
++)
1305 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1309 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1312 struct gdbarch
*gdbarch
= regcache
->arch ();
1313 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1315 store_gp_regs (regcache
, tid
, -1);
1316 if (tdep
->ppc_fp0_regnum
>= 0)
1317 store_fp_regs (regcache
, tid
, -1);
1318 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1319 if (tdep
->ppc_ps_regnum
!= -1)
1320 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1321 if (tdep
->ppc_cr_regnum
!= -1)
1322 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1323 if (tdep
->ppc_lr_regnum
!= -1)
1324 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1325 if (tdep
->ppc_ctr_regnum
!= -1)
1326 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1327 if (tdep
->ppc_xer_regnum
!= -1)
1328 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1329 if (tdep
->ppc_mq_regnum
!= -1)
1330 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1331 if (tdep
->ppc_fpscr_regnum
!= -1)
1332 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1333 if (ppc_linux_trap_reg_p (gdbarch
))
1335 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1336 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1338 if (have_ptrace_getvrregs
)
1339 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1340 store_altivec_registers (regcache
, tid
);
1341 if (have_ptrace_getsetvsxregs
)
1342 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1343 store_vsx_registers (regcache
, tid
);
1344 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1345 store_spe_register (regcache
, tid
, -1);
1348 /* Fetch the AT_HWCAP entry from the aux vector. */
1349 static unsigned long
1350 ppc_linux_get_hwcap (void)
1354 if (target_auxv_search (target_stack
, AT_HWCAP
, &field
))
1355 return (unsigned long) field
;
1360 /* The cached DABR value, to install in new threads.
1361 This variable is used when the PowerPC HWDEBUG ptrace
1362 interface is not available. */
1363 static long saved_dabr_value
;
1365 /* Global structure that will store information about the available
1366 features provided by the PowerPC HWDEBUG ptrace interface. */
1367 static struct ppc_debug_info hwdebug_info
;
1369 /* Global variable that holds the maximum number of slots that the
1370 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1372 static size_t max_slots_number
= 0;
1374 struct hw_break_tuple
1377 struct ppc_hw_breakpoint
*hw_break
;
1380 /* This is an internal VEC created to store information about *points inserted
1381 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1383 typedef struct thread_points
1385 /* The TID to which this *point relates. */
1387 /* Information about the *point, such as its address, type, etc.
1389 Each element inside this vector corresponds to a hardware
1390 breakpoint or watchpoint in the thread represented by TID. The maximum
1391 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1392 the tuple is NULL, then the position in the vector is free. */
1393 struct hw_break_tuple
*hw_breaks
;
1395 DEF_VEC_P (thread_points_p
);
1397 VEC(thread_points_p
) *ppc_threads
= NULL
;
1399 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1401 #define PPC_DEBUG_CURRENT_VERSION 1
1403 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1405 have_ptrace_hwdebug_interface (void)
1407 static int have_ptrace_hwdebug_interface
= -1;
1409 if (have_ptrace_hwdebug_interface
== -1)
1413 tid
= ptid_get_lwp (inferior_ptid
);
1415 tid
= ptid_get_pid (inferior_ptid
);
1417 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1418 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1420 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1421 provides any supported feature. */
1422 if (hwdebug_info
.features
!= 0)
1424 have_ptrace_hwdebug_interface
= 1;
1425 max_slots_number
= hwdebug_info
.num_instruction_bps
1426 + hwdebug_info
.num_data_bps
1427 + hwdebug_info
.num_condition_regs
;
1428 return have_ptrace_hwdebug_interface
;
1431 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1432 have_ptrace_hwdebug_interface
= 0;
1433 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1436 return have_ptrace_hwdebug_interface
;
1440 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1442 int total_hw_wp
, total_hw_bp
;
1444 if (have_ptrace_hwdebug_interface ())
1446 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1447 available hardware watchpoints and breakpoints is stored at the
1448 hwdebug_info struct. */
1449 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1450 total_hw_wp
= hwdebug_info
.num_data_bps
;
1454 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1455 consider having 1 hardware watchpoint and no hardware breakpoints. */
1460 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1461 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1463 if (cnt
+ ot
> total_hw_wp
)
1466 else if (type
== bp_hardware_breakpoint
)
1468 if (total_hw_bp
== 0)
1470 /* No hardware breakpoint support. */
1473 if (cnt
> total_hw_bp
)
1477 if (!have_ptrace_hwdebug_interface ())
1480 ptid_t ptid
= inferior_ptid
;
1482 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1483 and whether the target has DABR. If either answer is no, the
1484 ptrace call will return -1. Fail in that case. */
1485 tid
= ptid_get_lwp (ptid
);
1487 tid
= ptid_get_pid (ptid
);
1489 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1497 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1499 /* Handle sub-8-byte quantities. */
1503 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1504 restrictions for watchpoints in the processors. In that case, we use that
1505 information to determine the hardcoded watchable region for
1507 if (have_ptrace_hwdebug_interface ())
1510 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1511 watchpoints and can watch any access within an arbitrary memory
1512 region. This is useful to watch arrays and structs, for instance. It
1513 takes two hardware watchpoints though. */
1515 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1516 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1518 /* Check if the processor provides DAWR interface. */
1519 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1520 /* DAWR interface allows to watch up to 512 byte wide ranges which
1521 can't cross a 512 byte boundary. */
1524 region_size
= hwdebug_info
.data_bp_alignment
;
1525 /* Server processors provide one hardware watchpoint and addr+len should
1526 fall in the watchable region provided by the ptrace interface. */
1528 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1531 /* addr+len must fall in the 8 byte watchable region for DABR-based
1532 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1533 ptrace interface, DAC-based processors (i.e., embedded processors) will
1534 use addresses aligned to 4-bytes due to the way the read/write flags are
1535 passed in the old ptrace interface. */
1536 else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1537 && (addr
+ len
) > (addr
& ~3) + 4)
1538 || (addr
+ len
) > (addr
& ~7) + 8)
1544 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1546 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1548 return (a
->trigger_type
== b
->trigger_type
1549 && a
->addr_mode
== b
->addr_mode
1550 && a
->condition_mode
== b
->condition_mode
1551 && a
->addr
== b
->addr
1552 && a
->addr2
== b
->addr2
1553 && a
->condition_value
== b
->condition_value
);
1556 /* This function can be used to retrieve a thread_points by the TID of the
1557 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1558 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1559 provided TID will be created and returned. */
1560 static struct thread_points
*
1561 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1564 struct thread_points
*t
;
1566 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1572 /* Do we need to allocate a new point_item
1573 if the wanted one does not exist? */
1576 t
= XNEW (struct thread_points
);
1577 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1579 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1585 /* This function is a generic wrapper that is responsible for inserting a
1586 *point (i.e., calling `ptrace' in order to issue the request to the
1587 kernel) and registering it internally in GDB. */
1589 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1593 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1594 struct hw_break_tuple
*hw_breaks
;
1595 struct thread_points
*t
;
1596 struct hw_break_tuple
*tuple
;
1599 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1601 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1603 /* Everything went fine, so we have to register this *point. */
1604 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1605 gdb_assert (t
!= NULL
);
1606 hw_breaks
= t
->hw_breaks
;
1608 /* Find a free element in the hw_breaks vector. */
1609 for (i
= 0; i
< max_slots_number
; i
++)
1610 if (hw_breaks
[i
].hw_break
== NULL
)
1612 hw_breaks
[i
].slot
= slot
;
1613 hw_breaks
[i
].hw_break
= p
.release ();
1617 gdb_assert (i
!= max_slots_number
);
1620 /* This function is a generic wrapper that is responsible for removing a
1621 *point (i.e., calling `ptrace' in order to issue the request to the
1622 kernel), and unregistering it internally at GDB. */
1624 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1627 struct hw_break_tuple
*hw_breaks
;
1628 struct thread_points
*t
;
1630 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1631 gdb_assert (t
!= NULL
);
1632 hw_breaks
= t
->hw_breaks
;
1634 for (i
= 0; i
< max_slots_number
; i
++)
1635 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1638 gdb_assert (i
!= max_slots_number
);
1640 /* We have to ignore ENOENT errors because the kernel implements hardware
1641 breakpoints/watchpoints as "one-shot", that is, they are automatically
1642 deleted when hit. */
1644 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1645 if (errno
!= ENOENT
)
1646 perror_with_name (_("Unexpected error deleting "
1647 "breakpoint or watchpoint"));
1649 xfree (hw_breaks
[i
].hw_break
);
1650 hw_breaks
[i
].hw_break
= NULL
;
1653 /* Return the number of registers needed for a ranged breakpoint. */
1656 ppc_linux_nat_target::ranged_break_num_registers ()
1658 return ((have_ptrace_hwdebug_interface ()
1659 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1663 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1664 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1667 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1668 struct bp_target_info
*bp_tgt
)
1670 struct lwp_info
*lp
;
1671 struct ppc_hw_breakpoint p
;
1673 if (!have_ptrace_hwdebug_interface ())
1676 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1677 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1678 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1679 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1680 p
.condition_value
= 0;
1684 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1686 /* The breakpoint will trigger if the address of the instruction is
1687 within the defined range, as follows: p.addr <= address < p.addr2. */
1688 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1692 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1697 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1703 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1704 struct bp_target_info
*bp_tgt
)
1706 struct lwp_info
*lp
;
1707 struct ppc_hw_breakpoint p
;
1709 if (!have_ptrace_hwdebug_interface ())
1712 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1713 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1714 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1715 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1716 p
.condition_value
= 0;
1720 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1722 /* The breakpoint will trigger if the address of the instruction is within
1723 the defined range, as follows: p.addr <= address < p.addr2. */
1724 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1728 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1733 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1739 get_trigger_type (enum target_hw_bp_type type
)
1743 if (type
== hw_read
)
1744 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1745 else if (type
== hw_write
)
1746 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1748 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1753 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1754 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1755 or hw_access for an access watchpoint. Returns 0 on success and throws
1756 an error on failure. */
1759 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1760 target_hw_bp_type rw
)
1762 struct lwp_info
*lp
;
1763 struct ppc_hw_breakpoint p
;
1765 gdb_assert (have_ptrace_hwdebug_interface ());
1767 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1768 p
.trigger_type
= get_trigger_type (rw
);
1769 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1770 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1773 p
.condition_value
= 0;
1776 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1781 /* Remove a masked watchpoint at ADDR with the mask MASK.
1782 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1783 or hw_access for an access watchpoint. Returns 0 on success and throws
1784 an error on failure. */
1787 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1788 target_hw_bp_type rw
)
1790 struct lwp_info
*lp
;
1791 struct ppc_hw_breakpoint p
;
1793 gdb_assert (have_ptrace_hwdebug_interface ());
1795 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1796 p
.trigger_type
= get_trigger_type (rw
);
1797 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1798 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1801 p
.condition_value
= 0;
1804 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1809 /* Check whether we have at least one free DVC register. */
1811 can_use_watchpoint_cond_accel (void)
1813 struct thread_points
*p
;
1814 int tid
= ptid_get_lwp (inferior_ptid
);
1815 int cnt
= hwdebug_info
.num_condition_regs
, i
;
1816 CORE_ADDR tmp_value
;
1818 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
1821 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
1825 for (i
= 0; i
< max_slots_number
; i
++)
1826 if (p
->hw_breaks
[i
].hw_break
!= NULL
1827 && (p
->hw_breaks
[i
].hw_break
->condition_mode
1828 != PPC_BREAKPOINT_CONDITION_NONE
))
1831 /* There are no available slots now. */
1839 /* Calculate the enable bits and the contents of the Data Value Compare
1840 debug register present in BookE processors.
1842 ADDR is the address to be watched, LEN is the length of watched data
1843 and DATA_VALUE is the value which will trigger the watchpoint.
1844 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
1845 CONDITION_VALUE will hold the value which should be put in the
1848 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
1849 uint32_t *condition_mode
, uint64_t *condition_value
)
1851 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
1852 rightmost_enabled_byte
;
1853 CORE_ADDR addr_end_data
, addr_end_dvc
;
1855 /* The DVC register compares bytes within fixed-length windows which
1856 are word-aligned, with length equal to that of the DVC register.
1857 We need to calculate where our watch region is relative to that
1858 window and enable comparison of the bytes which fall within it. */
1860 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
1861 addr_end_data
= addr
+ len
;
1862 addr_end_dvc
= (addr
- align_offset
1863 + hwdebug_info
.sizeof_condition
);
1864 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
1865 addr_end_data
- addr_end_dvc
: 0;
1866 num_byte_enable
= len
- num_bytes_off_dvc
;
1867 /* Here, bytes are numbered from right to left. */
1868 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
1869 addr_end_dvc
- addr_end_data
: 0;
1871 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
1872 for (i
= 0; i
< num_byte_enable
; i
++)
1874 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
1876 /* Now we need to match the position within the DVC of the comparison
1877 value with where the watch region is relative to the window
1878 (i.e., the ALIGN_OFFSET). */
1880 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
1881 << rightmost_enabled_byte
* 8);
1884 /* Return the number of memory locations that need to be accessed to
1885 evaluate the expression which generated the given value chain.
1886 Returns -1 if there's any register access involved, or if there are
1887 other kinds of values which are not acceptable in a condition
1888 expression (e.g., lval_computed or lval_internalvar). */
1890 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
1892 int found_memory_cnt
= 0;
1894 /* The idea here is that evaluating an expression generates a series
1895 of values, one holding the value of every subexpression. (The
1896 expression a*b+c has five subexpressions: a, b, a*b, c, and
1897 a*b+c.) GDB's values hold almost enough information to establish
1898 the criteria given above --- they identify memory lvalues,
1899 register lvalues, computed values, etcetera. So we can evaluate
1900 the expression, and then scan the chain of values that leaves
1901 behind to determine the memory locations involved in the evaluation
1904 However, I don't think that the values returned by inferior
1905 function calls are special in any way. So this function may not
1906 notice that an expression contains an inferior function call.
1909 for (const value_ref_ptr
&iter
: chain
)
1911 struct value
*v
= iter
.get ();
1913 /* Constants and values from the history are fine. */
1914 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
1916 else if (VALUE_LVAL (v
) == lval_memory
)
1918 /* A lazy memory lvalue is one that GDB never needed to fetch;
1919 we either just used its address (e.g., `a' in `a.b') or
1920 we never needed it at all (e.g., `a' in `a,b'). */
1921 if (!value_lazy (v
))
1924 /* Other kinds of values are not fine. */
1929 return found_memory_cnt
;
1932 /* Verifies whether the expression COND can be implemented using the
1933 DVC (Data Value Compare) register in BookE processors. The expression
1934 must test the watch value for equality with a constant expression.
1935 If the function returns 1, DATA_VALUE will contain the constant against
1936 which the watch value should be compared and LEN will contain the size
1939 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
1940 CORE_ADDR
*data_value
, int *len
)
1942 int pc
= 1, num_accesses_left
, num_accesses_right
;
1943 struct value
*left_val
, *right_val
;
1944 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
1946 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
1949 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
1950 num_accesses_left
= num_memory_accesses (left_chain
);
1952 if (left_val
== NULL
|| num_accesses_left
< 0)
1955 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
1956 num_accesses_right
= num_memory_accesses (right_chain
);
1958 if (right_val
== NULL
|| num_accesses_right
< 0)
1961 if (num_accesses_left
== 1 && num_accesses_right
== 0
1962 && VALUE_LVAL (left_val
) == lval_memory
1963 && value_address (left_val
) == watch_addr
)
1965 *data_value
= value_as_long (right_val
);
1967 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
1968 the same type as the memory region referenced by LEFT_VAL. */
1969 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
1971 else if (num_accesses_left
== 0 && num_accesses_right
== 1
1972 && VALUE_LVAL (right_val
) == lval_memory
1973 && value_address (right_val
) == watch_addr
)
1975 *data_value
= value_as_long (left_val
);
1977 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
1978 the same type as the memory region referenced by RIGHT_VAL. */
1979 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
1987 /* Return non-zero if the target is capable of using hardware to evaluate
1988 the condition expression, thus only triggering the watchpoint when it is
1991 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
1993 struct expression
*cond
)
1995 CORE_ADDR data_value
;
1997 return (have_ptrace_hwdebug_interface ()
1998 && hwdebug_info
.num_condition_regs
> 0
1999 && check_condition (addr
, cond
, &data_value
, &len
));
2002 /* Set up P with the parameters necessary to request a watchpoint covering
2003 LEN bytes starting at ADDR and if possible with condition expression COND
2004 evaluated by hardware. INSERT tells if we are creating a request for
2005 inserting or removing the watchpoint. */
2008 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
2009 int len
, enum target_hw_bp_type type
,
2010 struct expression
*cond
, int insert
)
2013 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2016 CORE_ADDR data_value
;
2018 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2019 : hwdebug_info
.num_condition_regs
> 0);
2020 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2022 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2023 &p
->condition_value
);
2026 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2027 p
->condition_value
= 0;
2030 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2035 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2036 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2037 p
->condition_value
= 0;
2039 /* The watchpoint will trigger if the address of the memory access is
2040 within the defined range, as follows: p->addr <= address < p->addr2.
2042 Note that the above sentence just documents how ptrace interprets
2043 its arguments; the watchpoint is set to watch the range defined by
2044 the user _inclusively_, as specified by the user interface. */
2045 p
->addr2
= (uint64_t) addr
+ len
;
2048 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2049 p
->trigger_type
= get_trigger_type (type
);
2050 p
->addr
= (uint64_t) addr
;
2054 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2055 enum target_hw_bp_type type
,
2056 struct expression
*cond
)
2058 struct lwp_info
*lp
;
2061 if (have_ptrace_hwdebug_interface ())
2063 struct ppc_hw_breakpoint p
;
2065 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2068 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
2075 long read_mode
, write_mode
;
2077 if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2079 /* PowerPC 440 requires only the read/write flags to be passed
2086 /* PowerPC 970 and other DABR-based processors are required to pass
2087 the Breakpoint Translation bit together with the flags. */
2092 dabr_value
= addr
& ~(read_mode
| write_mode
);
2096 /* Set read and translate bits. */
2097 dabr_value
|= read_mode
;
2100 /* Set write and translate bits. */
2101 dabr_value
|= write_mode
;
2104 /* Set read, write and translate bits. */
2105 dabr_value
|= read_mode
| write_mode
;
2109 saved_dabr_value
= dabr_value
;
2112 if (ptrace (PTRACE_SET_DEBUGREG
, ptid_get_lwp (lp
->ptid
), 0,
2113 saved_dabr_value
) < 0)
2123 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2124 enum target_hw_bp_type type
,
2125 struct expression
*cond
)
2127 struct lwp_info
*lp
;
2130 if (have_ptrace_hwdebug_interface ())
2132 struct ppc_hw_breakpoint p
;
2134 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2137 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
2143 saved_dabr_value
= 0;
2145 if (ptrace (PTRACE_SET_DEBUGREG
, ptid_get_lwp (lp
->ptid
), 0,
2146 saved_dabr_value
) < 0)
2156 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2158 int tid
= ptid_get_lwp (lp
->ptid
);
2160 if (have_ptrace_hwdebug_interface ())
2163 struct thread_points
*p
;
2164 struct hw_break_tuple
*hw_breaks
;
2166 if (VEC_empty (thread_points_p
, ppc_threads
))
2169 /* Get a list of breakpoints from any thread. */
2170 p
= VEC_last (thread_points_p
, ppc_threads
);
2171 hw_breaks
= p
->hw_breaks
;
2173 /* Copy that thread's breakpoints and watchpoints to the new thread. */
2174 for (i
= 0; i
< max_slots_number
; i
++)
2175 if (hw_breaks
[i
].hw_break
)
2177 /* Older kernels did not make new threads inherit their parent
2178 thread's debug state, so we always clear the slot and replicate
2179 the debug state ourselves, ensuring compatibility with all
2182 /* The ppc debug resource accounting is done through "slots".
2183 Ask the kernel the deallocate this specific *point's slot. */
2184 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2186 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2190 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2194 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2197 int tid
= ptid_get_lwp (tp
->ptid
);
2198 struct hw_break_tuple
*hw_breaks
;
2199 struct thread_points
*t
= NULL
, *p
;
2201 if (!have_ptrace_hwdebug_interface ())
2204 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2214 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2216 hw_breaks
= t
->hw_breaks
;
2218 for (i
= 0; i
< max_slots_number
; i
++)
2219 if (hw_breaks
[i
].hw_break
)
2220 xfree (hw_breaks
[i
].hw_break
);
2222 xfree (t
->hw_breaks
);
2227 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2231 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2234 if (siginfo
.si_signo
!= SIGTRAP
2235 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2238 if (have_ptrace_hwdebug_interface ())
2241 struct thread_points
*t
;
2242 struct hw_break_tuple
*hw_breaks
;
2243 /* The index (or slot) of the *point is passed in the si_errno field. */
2244 int slot
= siginfo
.si_errno
;
2246 t
= hwdebug_find_thread_points_by_tid (ptid_get_lwp (inferior_ptid
), 0);
2248 /* Find out if this *point is a hardware breakpoint.
2249 If so, we should return 0. */
2252 hw_breaks
= t
->hw_breaks
;
2253 for (i
= 0; i
< max_slots_number
; i
++)
2254 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2255 && hw_breaks
[i
].hw_break
->trigger_type
2256 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2261 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2266 ppc_linux_nat_target::stopped_by_watchpoint ()
2269 return stopped_data_address (&addr
);
2273 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2279 if (have_ptrace_hwdebug_interface ()
2280 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2281 return start
<= addr
&& start
+ length
>= addr
;
2282 else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2289 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2290 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2293 /* Return the number of registers needed for a masked hardware watchpoint. */
2296 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2298 if (!have_ptrace_hwdebug_interface ()
2299 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2301 else if ((mask
& 0xC0000000) != 0xC0000000)
2303 warning (_("The given mask covers kernel address space "
2304 "and cannot be used.\n"));
2313 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2315 pid_t tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
2318 store_register (regcache
, tid
, regno
);
2320 store_ppc_registers (regcache
, tid
);
2323 /* Functions for transferring registers between a gregset_t or fpregset_t
2324 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2325 by the ptrace interface, not the current program's ABI. Eg. if a
2326 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2327 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2330 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2332 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2334 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2338 fill_gregset (const struct regcache
*regcache
,
2339 gdb_gregset_t
*gregsetp
, int regno
)
2341 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2344 memset (gregsetp
, 0, sizeof (*gregsetp
));
2345 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2349 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2351 const struct regset
*regset
= ppc_linux_fpregset ();
2353 ppc_supply_fpregset (regset
, regcache
, -1,
2354 fpregsetp
, sizeof (*fpregsetp
));
2358 fill_fpregset (const struct regcache
*regcache
,
2359 gdb_fpregset_t
*fpregsetp
, int regno
)
2361 const struct regset
*regset
= ppc_linux_fpregset ();
2363 ppc_collect_fpregset (regset
, regcache
, regno
,
2364 fpregsetp
, sizeof (*fpregsetp
));
2368 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2369 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2372 int tid
= ptid_get_lwp (inferior_ptid
);
2374 tid
= ptid_get_pid (inferior_ptid
);
2376 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2378 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2379 gdb_byte
*ptr
= *readptr
;
2384 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2387 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2388 ptr
+= sizeof_auxv_field
;
2389 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2390 ptr
+= sizeof_auxv_field
;
2396 const struct target_desc
*
2397 ppc_linux_nat_target::read_description ()
2399 int tid
= ptid_get_lwp (inferior_ptid
);
2401 tid
= ptid_get_pid (inferior_ptid
);
2403 if (have_ptrace_getsetevrregs
)
2405 struct gdb_evrregset_t evrregset
;
2407 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2408 return tdesc_powerpc_e500l
;
2410 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2411 Anything else needs to be reported. */
2412 else if (errno
!= EIO
)
2413 perror_with_name (_("Unable to fetch SPE registers"));
2416 struct ppc_linux_features features
= ppc_linux_no_features
;
2418 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2420 unsigned long hwcap
= ppc_linux_get_hwcap ();
2422 if (have_ptrace_getsetvsxregs
2423 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2425 gdb_vsxregset_t vsxregset
;
2427 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2428 features
.vsx
= true;
2430 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2431 Anything else needs to be reported. */
2432 else if (errno
!= EIO
)
2433 perror_with_name (_("Unable to fetch VSX registers"));
2436 if (have_ptrace_getvrregs
2437 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2439 gdb_vrregset_t vrregset
;
2441 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2442 features
.altivec
= true;
2444 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2445 Anything else needs to be reported. */
2446 else if (errno
!= EIO
)
2447 perror_with_name (_("Unable to fetch AltiVec registers"));
2450 if (hwcap
& PPC_FEATURE_CELL
)
2451 features
.cell
= true;
2453 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2455 return ppc_linux_match_description (features
);
2459 _initialize_ppc_linux_nat (void)
2461 linux_target
= &the_ppc_linux_nat_target
;
2463 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2465 /* Register the target. */
2466 add_inf_child_target (linux_target
);