1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003, 2004, 2005 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
24 #include "gdb_string.h"
29 #include "gdb_assert.h"
31 #include "linux-nat.h"
33 #include <sys/types.h>
34 #include <sys/param.h>
37 #include <sys/ioctl.h>
40 #include <sys/procfs.h>
41 #include <sys/ptrace.h>
43 /* Prototypes for supply_gregset etc. */
48 #define PT_READ_U PTRACE_PEEKUSR
51 #define PT_WRITE_U PTRACE_POKEUSR
54 /* Default the type of the ptrace transfer to int. */
55 #ifndef PTRACE_XFER_TYPE
56 #define PTRACE_XFER_TYPE int
59 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
60 configure time check. Some older glibc's (for instance 2.2.1)
61 don't have a specific powerpc version of ptrace.h, and fall back on
62 a generic one. In such cases, sys/ptrace.h defines
63 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
64 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
65 PTRACE_SETVRREGS to be. This also makes a configury check pretty
68 /* These definitions should really come from the glibc header files,
69 but Glibc doesn't know about the vrregs yet. */
70 #ifndef PTRACE_GETVRREGS
71 #define PTRACE_GETVRREGS 18
72 #define PTRACE_SETVRREGS 19
76 /* Similarly for the ptrace requests for getting / setting the SPE
77 registers (ev0 -- ev31, acc, and spefscr). See the description of
78 gdb_evrregset_t for details. */
79 #ifndef PTRACE_GETEVRREGS
80 #define PTRACE_GETEVRREGS 20
81 #define PTRACE_SETEVRREGS 21
85 /* This oddity is because the Linux kernel defines elf_vrregset_t as
86 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
87 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
88 the vrsave as an extra 4 bytes at the end. I opted for creating a
89 flat array of chars, so that it is easier to manipulate for gdb.
91 There are 32 vector registers 16 bytes longs, plus a VSCR register
92 which is only 4 bytes long, but is fetched as a 16 bytes
93 quantity. Up to here we have the elf_vrregset_t structure.
94 Appended to this there is space for the VRSAVE register: 4 bytes.
95 Even though this vrsave register is not included in the regset
96 typedef, it is handled by the ptrace requests.
98 Note that GNU/Linux doesn't support little endian PPC hardware,
99 therefore the offset at which the real value of the VSCR register
100 is located will be always 12 bytes.
102 The layout is like this (where x is the actual value of the vscr reg): */
106 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
107 <-------> <-------><-------><->
112 #define SIZEOF_VRREGS 33*16+4
114 typedef char gdb_vrregset_t
[SIZEOF_VRREGS
];
117 /* On PPC processors that support the the Signal Processing Extension
118 (SPE) APU, the general-purpose registers are 64 bits long.
119 However, the ordinary Linux kernel PTRACE_PEEKUSR / PTRACE_POKEUSR
120 / PT_READ_U / PT_WRITE_U ptrace calls only access the lower half of
121 each register, to allow them to behave the same way they do on
122 non-SPE systems. There's a separate pair of calls,
123 PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that read and write the top
124 halves of all the general-purpose registers at once, along with
125 some SPE-specific registers.
127 GDB itself continues to claim the general-purpose registers are 32
128 bits long. It has unnamed raw registers that hold the upper halves
129 of the gprs, and the the full 64-bit SIMD views of the registers,
130 'ev0' -- 'ev31', are pseudo-registers that splice the top and
131 bottom halves together.
133 This is the structure filled in by PTRACE_GETEVRREGS and written to
134 the inferior's registers by PTRACE_SETEVRREGS. */
135 struct gdb_evrregset_t
137 unsigned long evr
[32];
138 unsigned long long acc
;
139 unsigned long spefscr
;
143 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
144 PTRACE_SETVRREGS requests, for reading and writing the Altivec
145 registers. Zero if we've tried one of them and gotten an
147 int have_ptrace_getvrregs
= 1;
150 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
151 PTRACE_SETEVRREGS requests, for reading and writing the SPE
152 registers. Zero if we've tried one of them and gotten an
154 int have_ptrace_getsetevrregs
= 1;
160 return (sizeof (struct user
));
164 /* registers layout, as presented by the ptrace interface:
165 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
166 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
167 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
168 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
169 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
170 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
171 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
172 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
173 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
177 ppc_register_u_addr (int regno
)
180 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
181 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
182 interface, and not the wordsize of the program's ABI. */
183 int wordsize
= sizeof (PTRACE_XFER_TYPE
);
185 /* General purpose registers occupy 1 slot each in the buffer */
186 if (regno
>= tdep
->ppc_gp0_regnum
187 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
188 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
190 /* Floating point regs: eight bytes each in both 32- and 64-bit
191 ptrace interfaces. Thus, two slots each in 32-bit interface, one
192 slot each in 64-bit interface. */
193 if (tdep
->ppc_fp0_regnum
>= 0
194 && regno
>= tdep
->ppc_fp0_regnum
195 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
196 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
198 /* UISA special purpose registers: 1 slot each */
199 if (regno
== PC_REGNUM
)
200 u_addr
= PT_NIP
* wordsize
;
201 if (regno
== tdep
->ppc_lr_regnum
)
202 u_addr
= PT_LNK
* wordsize
;
203 if (regno
== tdep
->ppc_cr_regnum
)
204 u_addr
= PT_CCR
* wordsize
;
205 if (regno
== tdep
->ppc_xer_regnum
)
206 u_addr
= PT_XER
* wordsize
;
207 if (regno
== tdep
->ppc_ctr_regnum
)
208 u_addr
= PT_CTR
* wordsize
;
210 if (regno
== tdep
->ppc_mq_regnum
)
211 u_addr
= PT_MQ
* wordsize
;
213 if (regno
== tdep
->ppc_ps_regnum
)
214 u_addr
= PT_MSR
* wordsize
;
215 if (tdep
->ppc_fpscr_regnum
>= 0
216 && regno
== tdep
->ppc_fpscr_regnum
)
218 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
219 kernel headers incorrectly contained the 32-bit definition of
220 PT_FPSCR. For the 32-bit definition, floating-point
221 registers occupy two 32-bit "slots", and the FPSCR lives in
222 the secondhalf of such a slot-pair (hence +1). For 64-bit,
223 the FPSCR instead occupies the full 64-bit 2-word-slot and
224 hence no adjustment is necessary. Hack around this. */
225 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
226 u_addr
= (48 + 32) * wordsize
;
228 u_addr
= PT_FPSCR
* wordsize
;
233 /* The Linux kernel ptrace interface for AltiVec registers uses the
234 registers set mechanism, as opposed to the interface for all the
235 other registers, that stores/fetches each register individually. */
237 fetch_altivec_register (int tid
, int regno
)
242 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
243 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
245 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
250 have_ptrace_getvrregs
= 0;
253 perror_with_name (_("Unable to fetch AltiVec register"));
256 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
257 long on the hardware. We deal only with the lower 4 bytes of the
258 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
259 there is no need to define an offset for it. */
260 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
261 offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
263 regcache_raw_supply (current_regcache
, regno
,
264 regs
+ (regno
- tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
267 /* Fetch the top 32 bits of TID's general-purpose registers and the
268 SPE-specific registers, and place the results in EVRREGSET. If we
269 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
272 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
273 PTRACE_SETEVRREGS requests are supported is isolated here, and in
274 set_spe_registers. */
276 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
278 if (have_ptrace_getsetevrregs
)
280 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
284 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
285 we just return zeros. */
287 have_ptrace_getsetevrregs
= 0;
289 /* Anything else needs to be reported. */
290 perror_with_name (_("Unable to fetch SPE registers"));
294 memset (evrregset
, 0, sizeof (*evrregset
));
297 /* Supply values from TID for SPE-specific raw registers: the upper
298 halves of the GPRs, the accumulator, and the spefscr. REGNO must
299 be the number of an upper half register, acc, spefscr, or -1 to
300 supply the values of all registers. */
302 fetch_spe_register (int tid
, int regno
)
304 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
305 struct gdb_evrregset_t evrregs
;
307 gdb_assert (sizeof (evrregs
.evr
[0])
308 == register_size (current_gdbarch
, tdep
->ppc_ev0_upper_regnum
));
309 gdb_assert (sizeof (evrregs
.acc
)
310 == register_size (current_gdbarch
, tdep
->ppc_acc_regnum
));
311 gdb_assert (sizeof (evrregs
.spefscr
)
312 == register_size (current_gdbarch
, tdep
->ppc_spefscr_regnum
));
314 get_spe_registers (tid
, &evrregs
);
320 for (i
= 0; i
< ppc_num_gprs
; i
++)
321 regcache_raw_supply (current_regcache
, tdep
->ppc_ev0_upper_regnum
+ i
,
324 else if (tdep
->ppc_ev0_upper_regnum
<= regno
325 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
326 regcache_raw_supply (current_regcache
, regno
,
327 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
330 || regno
== tdep
->ppc_acc_regnum
)
331 regcache_raw_supply (current_regcache
, tdep
->ppc_acc_regnum
, &evrregs
.acc
);
334 || regno
== tdep
->ppc_spefscr_regnum
)
335 regcache_raw_supply (current_regcache
, tdep
->ppc_spefscr_regnum
,
340 fetch_register (int tid
, int regno
)
342 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
343 /* This isn't really an address. But ptrace thinks of it as one. */
344 CORE_ADDR regaddr
= ppc_register_u_addr (regno
);
345 int bytes_transferred
;
346 unsigned int offset
; /* Offset of registers within the u area. */
347 char buf
[MAX_REGISTER_SIZE
];
349 if (altivec_register_p (regno
))
351 /* If this is the first time through, or if it is not the first
352 time through, and we have comfirmed that there is kernel
353 support for such a ptrace request, then go and fetch the
355 if (have_ptrace_getvrregs
)
357 fetch_altivec_register (tid
, regno
);
360 /* If we have discovered that there is no ptrace support for
361 AltiVec registers, fall through and return zeroes, because
362 regaddr will be -1 in this case. */
364 else if (spe_register_p (regno
))
366 fetch_spe_register (tid
, regno
);
372 memset (buf
, '\0', register_size (current_gdbarch
, regno
)); /* Supply zeroes */
373 regcache_raw_supply (current_regcache
, regno
, buf
);
377 /* Read the raw register using PTRACE_XFER_TYPE sized chunks. On a
378 32-bit platform, 64-bit floating-point registers will require two
380 for (bytes_transferred
= 0;
381 bytes_transferred
< register_size (current_gdbarch
, regno
);
382 bytes_transferred
+= sizeof (PTRACE_XFER_TYPE
))
385 *(PTRACE_XFER_TYPE
*) & buf
[bytes_transferred
]
386 = ptrace (PT_READ_U
, tid
, (PTRACE_ARG3_TYPE
) regaddr
, 0);
387 regaddr
+= sizeof (PTRACE_XFER_TYPE
);
391 sprintf (message
, "reading register %s (#%d)",
392 REGISTER_NAME (regno
), regno
);
393 perror_with_name (message
);
397 /* Now supply the register. Keep in mind that the regcache's idea
398 of the register's size may not be a multiple of sizeof
399 (PTRACE_XFER_TYPE). */
400 if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_LITTLE
)
402 /* Little-endian values are always found at the left end of the
403 bytes transferred. */
404 regcache_raw_supply (current_regcache
, regno
, buf
);
406 else if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
)
408 /* Big-endian values are found at the right end of the bytes
410 size_t padding
= (bytes_transferred
411 - register_size (current_gdbarch
, regno
));
412 regcache_raw_supply (current_regcache
, regno
, buf
+ padding
);
415 internal_error (__FILE__
, __LINE__
,
416 _("fetch_register: unexpected byte order: %d"),
417 gdbarch_byte_order (current_gdbarch
));
421 supply_vrregset (gdb_vrregset_t
*vrregsetp
)
424 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
425 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
426 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
427 int offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
429 for (i
= 0; i
< num_of_vrregs
; i
++)
431 /* The last 2 registers of this set are only 32 bit long, not
432 128. However an offset is necessary only for VSCR because it
433 occupies a whole vector, while VRSAVE occupies a full 4 bytes
435 if (i
== (num_of_vrregs
- 2))
436 regcache_raw_supply (current_regcache
, tdep
->ppc_vr0_regnum
+ i
,
437 *vrregsetp
+ i
* vrregsize
+ offset
);
439 regcache_raw_supply (current_regcache
, tdep
->ppc_vr0_regnum
+ i
,
440 *vrregsetp
+ i
* vrregsize
);
445 fetch_altivec_registers (int tid
)
450 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
455 have_ptrace_getvrregs
= 0;
458 perror_with_name (_("Unable to fetch AltiVec registers"));
460 supply_vrregset (®s
);
464 fetch_ppc_registers (int tid
)
467 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
469 for (i
= 0; i
< ppc_num_gprs
; i
++)
470 fetch_register (tid
, tdep
->ppc_gp0_regnum
+ i
);
471 if (tdep
->ppc_fp0_regnum
>= 0)
472 for (i
= 0; i
< ppc_num_fprs
; i
++)
473 fetch_register (tid
, tdep
->ppc_fp0_regnum
+ i
);
474 fetch_register (tid
, PC_REGNUM
);
475 if (tdep
->ppc_ps_regnum
!= -1)
476 fetch_register (tid
, tdep
->ppc_ps_regnum
);
477 if (tdep
->ppc_cr_regnum
!= -1)
478 fetch_register (tid
, tdep
->ppc_cr_regnum
);
479 if (tdep
->ppc_lr_regnum
!= -1)
480 fetch_register (tid
, tdep
->ppc_lr_regnum
);
481 if (tdep
->ppc_ctr_regnum
!= -1)
482 fetch_register (tid
, tdep
->ppc_ctr_regnum
);
483 if (tdep
->ppc_xer_regnum
!= -1)
484 fetch_register (tid
, tdep
->ppc_xer_regnum
);
485 if (tdep
->ppc_mq_regnum
!= -1)
486 fetch_register (tid
, tdep
->ppc_mq_regnum
);
487 if (tdep
->ppc_fpscr_regnum
!= -1)
488 fetch_register (tid
, tdep
->ppc_fpscr_regnum
);
489 if (have_ptrace_getvrregs
)
490 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
491 fetch_altivec_registers (tid
);
492 if (tdep
->ppc_ev0_upper_regnum
>= 0)
493 fetch_spe_register (tid
, -1);
496 /* Fetch registers from the child process. Fetch all registers if
497 regno == -1, otherwise fetch all general registers or all floating
498 point registers depending upon the value of regno. */
500 ppc_linux_fetch_inferior_registers (int regno
)
502 /* Overload thread id onto process id */
503 int tid
= TIDGET (inferior_ptid
);
505 /* No thread id, just use process id */
507 tid
= PIDGET (inferior_ptid
);
510 fetch_ppc_registers (tid
);
512 fetch_register (tid
, regno
);
515 /* Store one register. */
517 store_altivec_register (int tid
, int regno
)
522 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
523 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
525 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
530 have_ptrace_getvrregs
= 0;
533 perror_with_name (_("Unable to fetch AltiVec register"));
536 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
537 long on the hardware. */
538 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
539 offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
541 regcache_raw_collect (current_regcache
, regno
,
542 regs
+ (regno
- tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
544 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
546 perror_with_name (_("Unable to store AltiVec register"));
549 /* Assuming TID referrs to an SPE process, set the top halves of TID's
550 general-purpose registers and its SPE-specific registers to the
551 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
554 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
555 PTRACE_SETEVRREGS requests are supported is isolated here, and in
556 get_spe_registers. */
558 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
560 if (have_ptrace_getsetevrregs
)
562 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
566 /* EIO means that the PTRACE_SETEVRREGS request isn't
567 supported; we fail silently, and don't try the call
570 have_ptrace_getsetevrregs
= 0;
572 /* Anything else needs to be reported. */
573 perror_with_name (_("Unable to set SPE registers"));
578 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
579 If REGNO is -1, write the values of all the SPE-specific
582 store_spe_register (int tid
, int regno
)
584 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
585 struct gdb_evrregset_t evrregs
;
587 gdb_assert (sizeof (evrregs
.evr
[0])
588 == register_size (current_gdbarch
, tdep
->ppc_ev0_upper_regnum
));
589 gdb_assert (sizeof (evrregs
.acc
)
590 == register_size (current_gdbarch
, tdep
->ppc_acc_regnum
));
591 gdb_assert (sizeof (evrregs
.spefscr
)
592 == register_size (current_gdbarch
, tdep
->ppc_spefscr_regnum
));
595 /* Since we're going to write out every register, the code below
596 should store to every field of evrregs; if that doesn't happen,
597 make it obvious by initializing it with suspicious values. */
598 memset (&evrregs
, 42, sizeof (evrregs
));
600 /* We can only read and write the entire EVR register set at a
601 time, so to write just a single register, we do a
602 read-modify-write maneuver. */
603 get_spe_registers (tid
, &evrregs
);
609 for (i
= 0; i
< ppc_num_gprs
; i
++)
610 regcache_raw_collect (current_regcache
,
611 tdep
->ppc_ev0_upper_regnum
+ i
,
614 else if (tdep
->ppc_ev0_upper_regnum
<= regno
615 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
616 regcache_raw_collect (current_regcache
, regno
,
617 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
620 || regno
== tdep
->ppc_acc_regnum
)
621 regcache_raw_collect (current_regcache
,
622 tdep
->ppc_acc_regnum
,
626 || regno
== tdep
->ppc_spefscr_regnum
)
627 regcache_raw_collect (current_regcache
,
628 tdep
->ppc_spefscr_regnum
,
631 /* Write back the modified register set. */
632 set_spe_registers (tid
, &evrregs
);
636 store_register (int tid
, int regno
)
638 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
639 /* This isn't really an address. But ptrace thinks of it as one. */
640 CORE_ADDR regaddr
= ppc_register_u_addr (regno
);
642 size_t bytes_to_transfer
;
643 char buf
[MAX_REGISTER_SIZE
];
645 if (altivec_register_p (regno
))
647 store_altivec_register (tid
, regno
);
650 else if (spe_register_p (regno
))
652 store_spe_register (tid
, regno
);
659 /* First collect the register. Keep in mind that the regcache's
660 idea of the register's size may not be a multiple of sizeof
661 (PTRACE_XFER_TYPE). */
662 memset (buf
, 0, sizeof buf
);
663 bytes_to_transfer
= align_up (register_size (current_gdbarch
, regno
),
664 sizeof (PTRACE_XFER_TYPE
));
665 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
)
667 /* Little-endian values always sit at the left end of the buffer. */
668 regcache_raw_collect (current_regcache
, regno
, buf
);
670 else if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
672 /* Big-endian values sit at the right end of the buffer. */
673 size_t padding
= (bytes_to_transfer
674 - register_size (current_gdbarch
, regno
));
675 regcache_raw_collect (current_regcache
, regno
, buf
+ padding
);
678 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (PTRACE_XFER_TYPE
))
681 ptrace (PT_WRITE_U
, tid
, (PTRACE_ARG3_TYPE
) regaddr
,
682 *(PTRACE_XFER_TYPE
*) & buf
[i
]);
683 regaddr
+= sizeof (PTRACE_XFER_TYPE
);
686 && regno
== tdep
->ppc_fpscr_regnum
)
688 /* Some older kernel versions don't allow fpscr to be written. */
695 sprintf (message
, "writing register %s (#%d)",
696 REGISTER_NAME (regno
), regno
);
697 perror_with_name (message
);
703 fill_vrregset (gdb_vrregset_t
*vrregsetp
)
706 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
707 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
708 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
709 int offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
711 for (i
= 0; i
< num_of_vrregs
; i
++)
713 /* The last 2 registers of this set are only 32 bit long, not
714 128, but only VSCR is fetched as a 16 bytes quantity. */
715 if (i
== (num_of_vrregs
- 2))
716 regcache_raw_collect (current_regcache
, tdep
->ppc_vr0_regnum
+ i
,
717 *vrregsetp
+ i
* vrregsize
+ offset
);
719 regcache_raw_collect (current_regcache
, tdep
->ppc_vr0_regnum
+ i
,
720 *vrregsetp
+ i
* vrregsize
);
725 store_altivec_registers (int tid
)
730 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
735 have_ptrace_getvrregs
= 0;
738 perror_with_name (_("Couldn't get AltiVec registers"));
741 fill_vrregset (®s
);
743 if (ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
) < 0)
744 perror_with_name (_("Couldn't write AltiVec registers"));
748 store_ppc_registers (int tid
)
751 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
753 for (i
= 0; i
< ppc_num_gprs
; i
++)
754 store_register (tid
, tdep
->ppc_gp0_regnum
+ i
);
755 if (tdep
->ppc_fp0_regnum
>= 0)
756 for (i
= 0; i
< ppc_num_fprs
; i
++)
757 store_register (tid
, tdep
->ppc_fp0_regnum
+ i
);
758 store_register (tid
, PC_REGNUM
);
759 if (tdep
->ppc_ps_regnum
!= -1)
760 store_register (tid
, tdep
->ppc_ps_regnum
);
761 if (tdep
->ppc_cr_regnum
!= -1)
762 store_register (tid
, tdep
->ppc_cr_regnum
);
763 if (tdep
->ppc_lr_regnum
!= -1)
764 store_register (tid
, tdep
->ppc_lr_regnum
);
765 if (tdep
->ppc_ctr_regnum
!= -1)
766 store_register (tid
, tdep
->ppc_ctr_regnum
);
767 if (tdep
->ppc_xer_regnum
!= -1)
768 store_register (tid
, tdep
->ppc_xer_regnum
);
769 if (tdep
->ppc_mq_regnum
!= -1)
770 store_register (tid
, tdep
->ppc_mq_regnum
);
771 if (tdep
->ppc_fpscr_regnum
!= -1)
772 store_register (tid
, tdep
->ppc_fpscr_regnum
);
773 if (have_ptrace_getvrregs
)
774 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
775 store_altivec_registers (tid
);
776 if (tdep
->ppc_ev0_upper_regnum
>= 0)
777 store_spe_register (tid
, -1);
781 ppc_linux_store_inferior_registers (int regno
)
783 /* Overload thread id onto process id */
784 int tid
= TIDGET (inferior_ptid
);
786 /* No thread id, just use process id */
788 tid
= PIDGET (inferior_ptid
);
791 store_register (tid
, regno
);
793 store_ppc_registers (tid
);
797 supply_gregset (gdb_gregset_t
*gregsetp
)
799 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
800 interface, and not the wordsize of the program's ABI. */
801 int wordsize
= sizeof (PTRACE_XFER_TYPE
);
802 ppc_linux_supply_gregset (current_regcache
, -1, gregsetp
,
803 sizeof (gdb_gregset_t
), wordsize
);
807 right_fill_reg (int regnum
, void *reg
)
809 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
810 interface, and not the wordsize of the program's ABI. */
811 int wordsize
= sizeof (PTRACE_XFER_TYPE
);
812 /* Right fill the register. */
813 regcache_raw_collect (current_regcache
, regnum
,
816 - register_size (current_gdbarch
, regnum
)));
820 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
823 elf_greg_t
*regp
= (elf_greg_t
*) gregsetp
;
824 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
825 const int elf_ngreg
= 48;
828 /* Start with zeros. */
829 memset (regp
, 0, elf_ngreg
* sizeof (*regp
));
831 for (regi
= 0; regi
< ppc_num_gprs
; regi
++)
833 if ((regno
== -1) || regno
== tdep
->ppc_gp0_regnum
+ regi
)
834 right_fill_reg (tdep
->ppc_gp0_regnum
+ regi
, (regp
+ PT_R0
+ regi
));
837 if ((regno
== -1) || regno
== PC_REGNUM
)
838 right_fill_reg (PC_REGNUM
, regp
+ PT_NIP
);
839 if ((regno
== -1) || regno
== tdep
->ppc_lr_regnum
)
840 right_fill_reg (tdep
->ppc_lr_regnum
, regp
+ PT_LNK
);
841 if ((regno
== -1) || regno
== tdep
->ppc_cr_regnum
)
842 regcache_raw_collect (current_regcache
, tdep
->ppc_cr_regnum
,
844 if ((regno
== -1) || regno
== tdep
->ppc_xer_regnum
)
845 regcache_raw_collect (current_regcache
, tdep
->ppc_xer_regnum
,
847 if ((regno
== -1) || regno
== tdep
->ppc_ctr_regnum
)
848 right_fill_reg (tdep
->ppc_ctr_regnum
, regp
+ PT_CTR
);
850 if (((regno
== -1) || regno
== tdep
->ppc_mq_regnum
)
851 && (tdep
->ppc_mq_regnum
!= -1))
852 right_fill_reg (tdep
->ppc_mq_regnum
, regp
+ PT_MQ
);
854 if ((regno
== -1) || regno
== tdep
->ppc_ps_regnum
)
855 right_fill_reg (tdep
->ppc_ps_regnum
, regp
+ PT_MSR
);
859 supply_fpregset (gdb_fpregset_t
* fpregsetp
)
861 ppc_linux_supply_fpregset (NULL
, current_regcache
, -1, fpregsetp
,
862 sizeof (gdb_fpregset_t
));
865 /* Given a pointer to a floating point register set in /proc format
866 (fpregset_t *), update the register specified by REGNO from gdb's
867 idea of the current floating point register set. If REGNO is -1,
870 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
873 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
874 bfd_byte
*fpp
= (void *) fpregsetp
;
876 if (ppc_floating_point_unit_p (current_gdbarch
))
878 for (regi
= 0; regi
< ppc_num_fprs
; regi
++)
880 if ((regno
== -1) || (regno
== tdep
->ppc_fp0_regnum
+ regi
))
881 regcache_raw_collect (current_regcache
, tdep
->ppc_fp0_regnum
+ regi
,
884 if (regno
== -1 || regno
== tdep
->ppc_fpscr_regnum
)
885 right_fill_reg (tdep
->ppc_fpscr_regnum
, (fpp
+ 8 * 32));
889 void _initialize_ppc_linux_nat (void);
892 _initialize_ppc_linux_nat (void)
894 struct target_ops
*t
;
896 /* Fill in the generic GNU/Linux methods. */
899 /* Add our register access methods. */
900 t
->to_fetch_registers
= ppc_linux_fetch_inferior_registers
;
901 t
->to_store_registers
= ppc_linux_store_inferior_registers
;
903 /* Register the target. */