1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
36 #include <sys/procfs.h>
37 #include "nat/gdb_ptrace.h"
38 #include "inf-ptrace.h"
40 /* Prototypes for supply_gregset etc. */
43 #include "ppc-linux-tdep.h"
45 /* Required when using the AUXV. */
46 #include "elf/common.h"
49 #include "arch/ppc-linux-common.h"
50 #include "arch/ppc-linux-tdesc.h"
51 #include "nat/ppc-linux.h"
53 /* Similarly for the hardware watchpoint support. These requests are used
54 when the PowerPC HWDEBUG ptrace interface is not available. */
55 #ifndef PTRACE_GET_DEBUGREG
56 #define PTRACE_GET_DEBUGREG 25
58 #ifndef PTRACE_SET_DEBUGREG
59 #define PTRACE_SET_DEBUGREG 26
61 #ifndef PTRACE_GETSIGINFO
62 #define PTRACE_GETSIGINFO 0x4202
65 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
66 available. It exposes the debug facilities of PowerPC processors, as well
67 as additional features of BookE processors, such as ranged breakpoints and
68 watchpoints and hardware-accelerated condition evaluation. */
69 #ifndef PPC_PTRACE_GETHWDBGINFO
71 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
72 ptrace interface is not present in ptrace.h, so we'll have to pretty much
73 include it all here so that the code at least compiles on older systems. */
74 #define PPC_PTRACE_GETHWDBGINFO 0x89
75 #define PPC_PTRACE_SETHWDEBUG 0x88
76 #define PPC_PTRACE_DELHWDEBUG 0x87
80 uint32_t version
; /* Only version 1 exists to date. */
81 uint32_t num_instruction_bps
;
82 uint32_t num_data_bps
;
83 uint32_t num_condition_regs
;
84 uint32_t data_bp_alignment
;
85 uint32_t sizeof_condition
; /* size of the DVC register. */
89 /* Features will have bits indicating whether there is support for: */
90 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
91 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
92 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
93 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
95 struct ppc_hw_breakpoint
97 uint32_t version
; /* currently, version must be 1 */
98 uint32_t trigger_type
; /* only some combinations allowed */
99 uint32_t addr_mode
; /* address match mode */
100 uint32_t condition_mode
; /* break/watchpoint condition flags */
101 uint64_t addr
; /* break/watchpoint address */
102 uint64_t addr2
; /* range end or mask */
103 uint64_t condition_value
; /* contents of the DVC register */
107 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
108 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
109 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
110 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
113 #define PPC_BREAKPOINT_MODE_EXACT 0x0
114 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
115 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
116 #define PPC_BREAKPOINT_MODE_MASK 0x3
118 /* Condition mode. */
119 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
120 #define PPC_BREAKPOINT_CONDITION_AND 0x1
121 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
122 #define PPC_BREAKPOINT_CONDITION_OR 0x2
123 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
124 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
125 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
126 #define PPC_BREAKPOINT_CONDITION_BE(n) \
127 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
128 #endif /* PPC_PTRACE_GETHWDBGINFO */
130 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
131 watchpoint (up to 512 bytes). */
132 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
133 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
134 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
136 /* Similarly for the general-purpose (gp0 -- gp31)
137 and floating-point registers (fp0 -- fp31). */
138 #ifndef PTRACE_GETREGS
139 #define PTRACE_GETREGS 12
141 #ifndef PTRACE_SETREGS
142 #define PTRACE_SETREGS 13
144 #ifndef PTRACE_GETFPREGS
145 #define PTRACE_GETFPREGS 14
147 #ifndef PTRACE_SETFPREGS
148 #define PTRACE_SETFPREGS 15
151 /* This oddity is because the Linux kernel defines elf_vrregset_t as
152 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
153 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
154 the vrsave as an extra 4 bytes at the end. I opted for creating a
155 flat array of chars, so that it is easier to manipulate for gdb.
157 There are 32 vector registers 16 bytes longs, plus a VSCR register
158 which is only 4 bytes long, but is fetched as a 16 bytes
159 quantity. Up to here we have the elf_vrregset_t structure.
160 Appended to this there is space for the VRSAVE register: 4 bytes.
161 Even though this vrsave register is not included in the regset
162 typedef, it is handled by the ptrace requests.
164 The layout is like this (where x is the actual value of the vscr reg): */
169 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
170 <-------> <-------><-------><->
173 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
174 <-------> <-------><-------><->
179 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
181 /* This is the layout of the POWER7 VSX registers and the way they overlap
182 with the existing FPR and VMX registers.
184 VSR doubleword 0 VSR doubleword 1
185 ----------------------------------------------------------------
187 ----------------------------------------------------------------
189 ----------------------------------------------------------------
192 ----------------------------------------------------------------
193 VSR[30] | FPR[30] | |
194 ----------------------------------------------------------------
195 VSR[31] | FPR[31] | |
196 ----------------------------------------------------------------
198 ----------------------------------------------------------------
200 ----------------------------------------------------------------
203 ----------------------------------------------------------------
205 ----------------------------------------------------------------
207 ----------------------------------------------------------------
209 VSX has 64 128bit registers. The first 32 registers overlap with
210 the FP registers (doubleword 0) and hence extend them with additional
211 64 bits (doubleword 1). The other 32 regs overlap with the VMX
213 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
215 /* On PPC processors that support the Signal Processing Extension
216 (SPE) APU, the general-purpose registers are 64 bits long.
217 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
218 ptrace calls only access the lower half of each register, to allow
219 them to behave the same way they do on non-SPE systems. There's a
220 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
221 read and write the top halves of all the general-purpose registers
222 at once, along with some SPE-specific registers.
224 GDB itself continues to claim the general-purpose registers are 32
225 bits long. It has unnamed raw registers that hold the upper halves
226 of the gprs, and the full 64-bit SIMD views of the registers,
227 'ev0' -- 'ev31', are pseudo-registers that splice the top and
228 bottom halves together.
230 This is the structure filled in by PTRACE_GETEVRREGS and written to
231 the inferior's registers by PTRACE_SETEVRREGS. */
232 struct gdb_evrregset_t
234 unsigned long evr
[32];
235 unsigned long long acc
;
236 unsigned long spefscr
;
239 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
240 PTRACE_SETVSXREGS requests, for reading and writing the VSX
241 POWER7 registers 0 through 31. Zero if we've tried one of them and
242 gotten an error. Note that VSX registers 32 through 63 overlap
243 with VR registers 0 through 31. */
244 int have_ptrace_getsetvsxregs
= 1;
246 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
247 PTRACE_SETVRREGS requests, for reading and writing the Altivec
248 registers. Zero if we've tried one of them and gotten an
250 int have_ptrace_getvrregs
= 1;
252 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
253 PTRACE_SETEVRREGS requests, for reading and writing the SPE
254 registers. Zero if we've tried one of them and gotten an
256 int have_ptrace_getsetevrregs
= 1;
258 /* Non-zero if our kernel may support the PTRACE_GETREGS and
259 PTRACE_SETREGS requests, for reading and writing the
260 general-purpose registers. Zero if we've tried one of
261 them and gotten an error. */
262 int have_ptrace_getsetregs
= 1;
264 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
265 PTRACE_SETFPREGS requests, for reading and writing the
266 floating-pointers registers. Zero if we've tried one of
267 them and gotten an error. */
268 int have_ptrace_getsetfpregs
= 1;
270 struct ppc_linux_nat_target final
: public linux_nat_target
272 /* Add our register access methods. */
273 void fetch_registers (struct regcache
*, int) override
;
274 void store_registers (struct regcache
*, int) override
;
276 /* Add our breakpoint/watchpoint methods. */
277 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
279 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
282 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
285 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
287 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
288 struct expression
*) override
;
290 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
291 struct expression
*) override
;
293 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
296 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
299 bool stopped_by_watchpoint () override
;
301 bool stopped_data_address (CORE_ADDR
*) override
;
303 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
305 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
308 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
310 int ranged_break_num_registers () override
;
312 const struct target_desc
*read_description () override
;
314 int auxv_parse (gdb_byte
**readptr
,
315 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
318 /* Override linux_nat_target low methods. */
319 void low_new_thread (struct lwp_info
*lp
) override
;
322 static ppc_linux_nat_target the_ppc_linux_nat_target
;
325 /* registers layout, as presented by the ptrace interface:
326 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
327 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
328 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
329 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
330 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
331 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
332 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
333 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
334 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
335 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
336 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
337 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
338 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
342 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
345 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
346 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
347 interface, and not the wordsize of the program's ABI. */
348 int wordsize
= sizeof (long);
350 /* General purpose registers occupy 1 slot each in the buffer. */
351 if (regno
>= tdep
->ppc_gp0_regnum
352 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
353 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
355 /* Floating point regs: eight bytes each in both 32- and 64-bit
356 ptrace interfaces. Thus, two slots each in 32-bit interface, one
357 slot each in 64-bit interface. */
358 if (tdep
->ppc_fp0_regnum
>= 0
359 && regno
>= tdep
->ppc_fp0_regnum
360 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
361 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
363 /* UISA special purpose registers: 1 slot each. */
364 if (regno
== gdbarch_pc_regnum (gdbarch
))
365 u_addr
= PT_NIP
* wordsize
;
366 if (regno
== tdep
->ppc_lr_regnum
)
367 u_addr
= PT_LNK
* wordsize
;
368 if (regno
== tdep
->ppc_cr_regnum
)
369 u_addr
= PT_CCR
* wordsize
;
370 if (regno
== tdep
->ppc_xer_regnum
)
371 u_addr
= PT_XER
* wordsize
;
372 if (regno
== tdep
->ppc_ctr_regnum
)
373 u_addr
= PT_CTR
* wordsize
;
375 if (regno
== tdep
->ppc_mq_regnum
)
376 u_addr
= PT_MQ
* wordsize
;
378 if (regno
== tdep
->ppc_ps_regnum
)
379 u_addr
= PT_MSR
* wordsize
;
380 if (regno
== PPC_ORIG_R3_REGNUM
)
381 u_addr
= PT_ORIG_R3
* wordsize
;
382 if (regno
== PPC_TRAP_REGNUM
)
383 u_addr
= PT_TRAP
* wordsize
;
384 if (tdep
->ppc_fpscr_regnum
>= 0
385 && regno
== tdep
->ppc_fpscr_regnum
)
387 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
388 kernel headers incorrectly contained the 32-bit definition of
389 PT_FPSCR. For the 32-bit definition, floating-point
390 registers occupy two 32-bit "slots", and the FPSCR lives in
391 the second half of such a slot-pair (hence +1). For 64-bit,
392 the FPSCR instead occupies the full 64-bit 2-word-slot and
393 hence no adjustment is necessary. Hack around this. */
394 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
395 u_addr
= (48 + 32) * wordsize
;
396 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
397 slot and not just its second word. The PT_FPSCR supplied when
398 GDB is compiled as a 32-bit app doesn't reflect this. */
399 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
400 && PT_FPSCR
== (48 + 2*32 + 1))
401 u_addr
= (48 + 2*32) * wordsize
;
403 u_addr
= PT_FPSCR
* wordsize
;
408 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
409 registers set mechanism, as opposed to the interface for all the
410 other registers, that stores/fetches each register individually. */
412 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
415 gdb_vsxregset_t regs
;
416 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
418 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
423 have_ptrace_getsetvsxregs
= 0;
426 perror_with_name (_("Unable to fetch VSX registers"));
429 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
430 PPC_LINUX_SIZEOF_VSXREGSET
);
433 /* The Linux kernel ptrace interface for AltiVec registers uses the
434 registers set mechanism, as opposed to the interface for all the
435 other registers, that stores/fetches each register individually. */
437 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
442 struct gdbarch
*gdbarch
= regcache
->arch ();
443 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
445 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
450 have_ptrace_getvrregs
= 0;
453 perror_with_name (_("Unable to fetch AltiVec registers"));
456 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
457 PPC_LINUX_SIZEOF_VRREGSET
);
460 /* Fetch the top 32 bits of TID's general-purpose registers and the
461 SPE-specific registers, and place the results in EVRREGSET. If we
462 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
465 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
466 PTRACE_SETEVRREGS requests are supported is isolated here, and in
467 set_spe_registers. */
469 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
471 if (have_ptrace_getsetevrregs
)
473 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
477 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
478 we just return zeros. */
480 have_ptrace_getsetevrregs
= 0;
482 /* Anything else needs to be reported. */
483 perror_with_name (_("Unable to fetch SPE registers"));
487 memset (evrregset
, 0, sizeof (*evrregset
));
490 /* Supply values from TID for SPE-specific raw registers: the upper
491 halves of the GPRs, the accumulator, and the spefscr. REGNO must
492 be the number of an upper half register, acc, spefscr, or -1 to
493 supply the values of all registers. */
495 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
497 struct gdbarch
*gdbarch
= regcache
->arch ();
498 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
499 struct gdb_evrregset_t evrregs
;
501 gdb_assert (sizeof (evrregs
.evr
[0])
502 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
503 gdb_assert (sizeof (evrregs
.acc
)
504 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
505 gdb_assert (sizeof (evrregs
.spefscr
)
506 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
508 get_spe_registers (tid
, &evrregs
);
514 for (i
= 0; i
< ppc_num_gprs
; i
++)
515 regcache_raw_supply (regcache
, tdep
->ppc_ev0_upper_regnum
+ i
,
518 else if (tdep
->ppc_ev0_upper_regnum
<= regno
519 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
520 regcache_raw_supply (regcache
, regno
,
521 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
524 || regno
== tdep
->ppc_acc_regnum
)
525 regcache_raw_supply (regcache
, tdep
->ppc_acc_regnum
, &evrregs
.acc
);
528 || regno
== tdep
->ppc_spefscr_regnum
)
529 regcache_raw_supply (regcache
, tdep
->ppc_spefscr_regnum
,
534 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
536 struct gdbarch
*gdbarch
= regcache
->arch ();
537 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
538 /* This isn't really an address. But ptrace thinks of it as one. */
539 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
540 int bytes_transferred
;
541 unsigned int offset
; /* Offset of registers within the u area. */
542 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
544 if (altivec_register_p (gdbarch
, regno
))
546 /* If this is the first time through, or if it is not the first
547 time through, and we have comfirmed that there is kernel
548 support for such a ptrace request, then go and fetch the
550 if (have_ptrace_getvrregs
)
552 fetch_altivec_registers (regcache
, tid
, regno
);
555 /* If we have discovered that there is no ptrace support for
556 AltiVec registers, fall through and return zeroes, because
557 regaddr will be -1 in this case. */
559 if (vsx_register_p (gdbarch
, regno
))
561 if (have_ptrace_getsetvsxregs
)
563 fetch_vsx_registers (regcache
, tid
, regno
);
567 else if (spe_register_p (gdbarch
, regno
))
569 fetch_spe_register (regcache
, tid
, regno
);
575 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
576 regcache_raw_supply (regcache
, regno
, buf
);
580 /* Read the raw register using sizeof(long) sized chunks. On a
581 32-bit platform, 64-bit floating-point registers will require two
583 for (bytes_transferred
= 0;
584 bytes_transferred
< register_size (gdbarch
, regno
);
585 bytes_transferred
+= sizeof (long))
590 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
591 regaddr
+= sizeof (long);
595 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
596 gdbarch_register_name (gdbarch
, regno
), regno
);
597 perror_with_name (message
);
599 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
602 /* Now supply the register. Keep in mind that the regcache's idea
603 of the register's size may not be a multiple of sizeof
605 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
607 /* Little-endian values are always found at the left end of the
608 bytes transferred. */
609 regcache_raw_supply (regcache
, regno
, buf
);
611 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
613 /* Big-endian values are found at the right end of the bytes
615 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
616 regcache_raw_supply (regcache
, regno
, buf
+ padding
);
619 internal_error (__FILE__
, __LINE__
,
620 _("fetch_register: unexpected byte order: %d"),
621 gdbarch_byte_order (gdbarch
));
624 /* This function actually issues the request to ptrace, telling
625 it to get all general-purpose registers and put them into the
628 If the ptrace request does not exist, this function returns 0
629 and properly sets the have_ptrace_* flag. If the request fails,
630 this function calls perror_with_name. Otherwise, if the request
631 succeeds, then the regcache gets filled and 1 is returned. */
633 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
635 struct gdbarch
*gdbarch
= regcache
->arch ();
636 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
637 gdb_gregset_t gregset
;
639 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
643 have_ptrace_getsetregs
= 0;
646 perror_with_name (_("Couldn't get general-purpose registers."));
649 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
654 /* This is a wrapper for the fetch_all_gp_regs function. It is
655 responsible for verifying if this target has the ptrace request
656 that can be used to fetch all general-purpose registers at one
657 shot. If it doesn't, then we should fetch them using the
658 old-fashioned way, which is to iterate over the registers and
659 request them one by one. */
661 fetch_gp_regs (struct regcache
*regcache
, int tid
)
663 struct gdbarch
*gdbarch
= regcache
->arch ();
664 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
667 if (have_ptrace_getsetregs
)
668 if (fetch_all_gp_regs (regcache
, tid
))
671 /* If we've hit this point, it doesn't really matter which
672 architecture we are using. We just need to read the
673 registers in the "old-fashioned way". */
674 for (i
= 0; i
< ppc_num_gprs
; i
++)
675 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
678 /* This function actually issues the request to ptrace, telling
679 it to get all floating-point registers and put them into the
682 If the ptrace request does not exist, this function returns 0
683 and properly sets the have_ptrace_* flag. If the request fails,
684 this function calls perror_with_name. Otherwise, if the request
685 succeeds, then the regcache gets filled and 1 is returned. */
687 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
689 gdb_fpregset_t fpregs
;
691 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
695 have_ptrace_getsetfpregs
= 0;
698 perror_with_name (_("Couldn't get floating-point registers."));
701 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
706 /* This is a wrapper for the fetch_all_fp_regs function. It is
707 responsible for verifying if this target has the ptrace request
708 that can be used to fetch all floating-point registers at one
709 shot. If it doesn't, then we should fetch them using the
710 old-fashioned way, which is to iterate over the registers and
711 request them one by one. */
713 fetch_fp_regs (struct regcache
*regcache
, int tid
)
715 struct gdbarch
*gdbarch
= regcache
->arch ();
716 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
719 if (have_ptrace_getsetfpregs
)
720 if (fetch_all_fp_regs (regcache
, tid
))
723 /* If we've hit this point, it doesn't really matter which
724 architecture we are using. We just need to read the
725 registers in the "old-fashioned way". */
726 for (i
= 0; i
< ppc_num_fprs
; i
++)
727 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
731 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
734 struct gdbarch
*gdbarch
= regcache
->arch ();
735 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
737 fetch_gp_regs (regcache
, tid
);
738 if (tdep
->ppc_fp0_regnum
>= 0)
739 fetch_fp_regs (regcache
, tid
);
740 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
741 if (tdep
->ppc_ps_regnum
!= -1)
742 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
743 if (tdep
->ppc_cr_regnum
!= -1)
744 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
745 if (tdep
->ppc_lr_regnum
!= -1)
746 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
747 if (tdep
->ppc_ctr_regnum
!= -1)
748 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
749 if (tdep
->ppc_xer_regnum
!= -1)
750 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
751 if (tdep
->ppc_mq_regnum
!= -1)
752 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
753 if (ppc_linux_trap_reg_p (gdbarch
))
755 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
756 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
758 if (tdep
->ppc_fpscr_regnum
!= -1)
759 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
760 if (have_ptrace_getvrregs
)
761 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
762 fetch_altivec_registers (regcache
, tid
, -1);
763 if (have_ptrace_getsetvsxregs
)
764 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
765 fetch_vsx_registers (regcache
, tid
, -1);
766 if (tdep
->ppc_ev0_upper_regnum
>= 0)
767 fetch_spe_register (regcache
, tid
, -1);
770 /* Fetch registers from the child process. Fetch all registers if
771 regno == -1, otherwise fetch all general registers or all floating
772 point registers depending upon the value of regno. */
774 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
776 pid_t tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
779 fetch_ppc_registers (regcache
, tid
);
781 fetch_register (regcache
, tid
, regno
);
785 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
788 gdb_vsxregset_t regs
;
789 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
791 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
796 have_ptrace_getsetvsxregs
= 0;
799 perror_with_name (_("Unable to fetch VSX registers"));
802 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
803 PPC_LINUX_SIZEOF_VSXREGSET
);
805 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
807 perror_with_name (_("Unable to store VSX registers"));
811 store_altivec_registers (const struct regcache
*regcache
, int tid
,
816 struct gdbarch
*gdbarch
= regcache
->arch ();
817 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
819 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
824 have_ptrace_getvrregs
= 0;
827 perror_with_name (_("Unable to fetch AltiVec registers"));
830 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
831 PPC_LINUX_SIZEOF_VRREGSET
);
833 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
835 perror_with_name (_("Unable to store AltiVec registers"));
838 /* Assuming TID referrs to an SPE process, set the top halves of TID's
839 general-purpose registers and its SPE-specific registers to the
840 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
843 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
844 PTRACE_SETEVRREGS requests are supported is isolated here, and in
845 get_spe_registers. */
847 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
849 if (have_ptrace_getsetevrregs
)
851 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
855 /* EIO means that the PTRACE_SETEVRREGS request isn't
856 supported; we fail silently, and don't try the call
859 have_ptrace_getsetevrregs
= 0;
861 /* Anything else needs to be reported. */
862 perror_with_name (_("Unable to set SPE registers"));
867 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
868 If REGNO is -1, write the values of all the SPE-specific
871 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
873 struct gdbarch
*gdbarch
= regcache
->arch ();
874 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
875 struct gdb_evrregset_t evrregs
;
877 gdb_assert (sizeof (evrregs
.evr
[0])
878 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
879 gdb_assert (sizeof (evrregs
.acc
)
880 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
881 gdb_assert (sizeof (evrregs
.spefscr
)
882 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
885 /* Since we're going to write out every register, the code below
886 should store to every field of evrregs; if that doesn't happen,
887 make it obvious by initializing it with suspicious values. */
888 memset (&evrregs
, 42, sizeof (evrregs
));
890 /* We can only read and write the entire EVR register set at a
891 time, so to write just a single register, we do a
892 read-modify-write maneuver. */
893 get_spe_registers (tid
, &evrregs
);
899 for (i
= 0; i
< ppc_num_gprs
; i
++)
900 regcache_raw_collect (regcache
,
901 tdep
->ppc_ev0_upper_regnum
+ i
,
904 else if (tdep
->ppc_ev0_upper_regnum
<= regno
905 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
906 regcache_raw_collect (regcache
, regno
,
907 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
910 || regno
== tdep
->ppc_acc_regnum
)
911 regcache_raw_collect (regcache
,
912 tdep
->ppc_acc_regnum
,
916 || regno
== tdep
->ppc_spefscr_regnum
)
917 regcache_raw_collect (regcache
,
918 tdep
->ppc_spefscr_regnum
,
921 /* Write back the modified register set. */
922 set_spe_registers (tid
, &evrregs
);
926 store_register (const struct regcache
*regcache
, int tid
, int regno
)
928 struct gdbarch
*gdbarch
= regcache
->arch ();
929 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
930 /* This isn't really an address. But ptrace thinks of it as one. */
931 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
933 size_t bytes_to_transfer
;
934 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
936 if (altivec_register_p (gdbarch
, regno
))
938 store_altivec_registers (regcache
, tid
, regno
);
941 if (vsx_register_p (gdbarch
, regno
))
943 store_vsx_registers (regcache
, tid
, regno
);
946 else if (spe_register_p (gdbarch
, regno
))
948 store_spe_register (regcache
, tid
, regno
);
955 /* First collect the register. Keep in mind that the regcache's
956 idea of the register's size may not be a multiple of sizeof
958 memset (buf
, 0, sizeof buf
);
959 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
960 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
962 /* Little-endian values always sit at the left end of the buffer. */
963 regcache_raw_collect (regcache
, regno
, buf
);
965 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
967 /* Big-endian values sit at the right end of the buffer. */
968 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
969 regcache_raw_collect (regcache
, regno
, buf
+ padding
);
972 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
976 memcpy (&l
, &buf
[i
], sizeof (l
));
978 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
979 regaddr
+= sizeof (long);
982 && (regno
== tdep
->ppc_fpscr_regnum
983 || regno
== PPC_ORIG_R3_REGNUM
984 || regno
== PPC_TRAP_REGNUM
))
986 /* Some older kernel versions don't allow fpscr, orig_r3
987 or trap to be written. */
994 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
995 gdbarch_register_name (gdbarch
, regno
), regno
);
996 perror_with_name (message
);
1001 /* This function actually issues the request to ptrace, telling
1002 it to store all general-purpose registers present in the specified
1005 If the ptrace request does not exist, this function returns 0
1006 and properly sets the have_ptrace_* flag. If the request fails,
1007 this function calls perror_with_name. Otherwise, if the request
1008 succeeds, then the regcache is stored and 1 is returned. */
1010 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1012 struct gdbarch
*gdbarch
= regcache
->arch ();
1013 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1014 gdb_gregset_t gregset
;
1016 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1020 have_ptrace_getsetregs
= 0;
1023 perror_with_name (_("Couldn't get general-purpose registers."));
1026 fill_gregset (regcache
, &gregset
, regno
);
1028 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1032 have_ptrace_getsetregs
= 0;
1035 perror_with_name (_("Couldn't set general-purpose registers."));
1041 /* This is a wrapper for the store_all_gp_regs function. It is
1042 responsible for verifying if this target has the ptrace request
1043 that can be used to store all general-purpose registers at one
1044 shot. If it doesn't, then we should store them using the
1045 old-fashioned way, which is to iterate over the registers and
1046 store them one by one. */
1048 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1050 struct gdbarch
*gdbarch
= regcache
->arch ();
1051 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1054 if (have_ptrace_getsetregs
)
1055 if (store_all_gp_regs (regcache
, tid
, regno
))
1058 /* If we hit this point, it doesn't really matter which
1059 architecture we are using. We just need to store the
1060 registers in the "old-fashioned way". */
1061 for (i
= 0; i
< ppc_num_gprs
; i
++)
1062 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1065 /* This function actually issues the request to ptrace, telling
1066 it to store all floating-point registers present in the specified
1069 If the ptrace request does not exist, this function returns 0
1070 and properly sets the have_ptrace_* flag. If the request fails,
1071 this function calls perror_with_name. Otherwise, if the request
1072 succeeds, then the regcache is stored and 1 is returned. */
1074 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1076 gdb_fpregset_t fpregs
;
1078 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1082 have_ptrace_getsetfpregs
= 0;
1085 perror_with_name (_("Couldn't get floating-point registers."));
1088 fill_fpregset (regcache
, &fpregs
, regno
);
1090 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1094 have_ptrace_getsetfpregs
= 0;
1097 perror_with_name (_("Couldn't set floating-point registers."));
1103 /* This is a wrapper for the store_all_fp_regs function. It is
1104 responsible for verifying if this target has the ptrace request
1105 that can be used to store all floating-point registers at one
1106 shot. If it doesn't, then we should store them using the
1107 old-fashioned way, which is to iterate over the registers and
1108 store them one by one. */
1110 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1112 struct gdbarch
*gdbarch
= regcache
->arch ();
1113 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1116 if (have_ptrace_getsetfpregs
)
1117 if (store_all_fp_regs (regcache
, tid
, regno
))
1120 /* If we hit this point, it doesn't really matter which
1121 architecture we are using. We just need to store the
1122 registers in the "old-fashioned way". */
1123 for (i
= 0; i
< ppc_num_fprs
; i
++)
1124 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1128 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1131 struct gdbarch
*gdbarch
= regcache
->arch ();
1132 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1134 store_gp_regs (regcache
, tid
, -1);
1135 if (tdep
->ppc_fp0_regnum
>= 0)
1136 store_fp_regs (regcache
, tid
, -1);
1137 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1138 if (tdep
->ppc_ps_regnum
!= -1)
1139 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1140 if (tdep
->ppc_cr_regnum
!= -1)
1141 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1142 if (tdep
->ppc_lr_regnum
!= -1)
1143 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1144 if (tdep
->ppc_ctr_regnum
!= -1)
1145 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1146 if (tdep
->ppc_xer_regnum
!= -1)
1147 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1148 if (tdep
->ppc_mq_regnum
!= -1)
1149 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1150 if (tdep
->ppc_fpscr_regnum
!= -1)
1151 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1152 if (ppc_linux_trap_reg_p (gdbarch
))
1154 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1155 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1157 if (have_ptrace_getvrregs
)
1158 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1159 store_altivec_registers (regcache
, tid
, -1);
1160 if (have_ptrace_getsetvsxregs
)
1161 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1162 store_vsx_registers (regcache
, tid
, -1);
1163 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1164 store_spe_register (regcache
, tid
, -1);
1167 /* Fetch the AT_HWCAP entry from the aux vector. */
1168 static unsigned long
1169 ppc_linux_get_hwcap (void)
1173 if (target_auxv_search (target_stack
, AT_HWCAP
, &field
))
1174 return (unsigned long) field
;
1179 /* The cached DABR value, to install in new threads.
1180 This variable is used when the PowerPC HWDEBUG ptrace
1181 interface is not available. */
1182 static long saved_dabr_value
;
1184 /* Global structure that will store information about the available
1185 features provided by the PowerPC HWDEBUG ptrace interface. */
1186 static struct ppc_debug_info hwdebug_info
;
1188 /* Global variable that holds the maximum number of slots that the
1189 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1191 static size_t max_slots_number
= 0;
1193 struct hw_break_tuple
1196 struct ppc_hw_breakpoint
*hw_break
;
1199 /* This is an internal VEC created to store information about *points inserted
1200 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1202 typedef struct thread_points
1204 /* The TID to which this *point relates. */
1206 /* Information about the *point, such as its address, type, etc.
1208 Each element inside this vector corresponds to a hardware
1209 breakpoint or watchpoint in the thread represented by TID. The maximum
1210 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1211 the tuple is NULL, then the position in the vector is free. */
1212 struct hw_break_tuple
*hw_breaks
;
1214 DEF_VEC_P (thread_points_p
);
1216 VEC(thread_points_p
) *ppc_threads
= NULL
;
1218 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1220 #define PPC_DEBUG_CURRENT_VERSION 1
1222 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1224 have_ptrace_hwdebug_interface (void)
1226 static int have_ptrace_hwdebug_interface
= -1;
1228 if (have_ptrace_hwdebug_interface
== -1)
1232 tid
= ptid_get_lwp (inferior_ptid
);
1234 tid
= ptid_get_pid (inferior_ptid
);
1236 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1237 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1239 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1240 provides any supported feature. */
1241 if (hwdebug_info
.features
!= 0)
1243 have_ptrace_hwdebug_interface
= 1;
1244 max_slots_number
= hwdebug_info
.num_instruction_bps
1245 + hwdebug_info
.num_data_bps
1246 + hwdebug_info
.num_condition_regs
;
1247 return have_ptrace_hwdebug_interface
;
1250 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1251 have_ptrace_hwdebug_interface
= 0;
1252 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1255 return have_ptrace_hwdebug_interface
;
1259 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1261 int total_hw_wp
, total_hw_bp
;
1263 if (have_ptrace_hwdebug_interface ())
1265 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1266 available hardware watchpoints and breakpoints is stored at the
1267 hwdebug_info struct. */
1268 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1269 total_hw_wp
= hwdebug_info
.num_data_bps
;
1273 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1274 consider having 1 hardware watchpoint and no hardware breakpoints. */
1279 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1280 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1282 if (cnt
+ ot
> total_hw_wp
)
1285 else if (type
== bp_hardware_breakpoint
)
1287 if (total_hw_bp
== 0)
1289 /* No hardware breakpoint support. */
1292 if (cnt
> total_hw_bp
)
1296 if (!have_ptrace_hwdebug_interface ())
1299 ptid_t ptid
= inferior_ptid
;
1301 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1302 and whether the target has DABR. If either answer is no, the
1303 ptrace call will return -1. Fail in that case. */
1304 tid
= ptid_get_lwp (ptid
);
1306 tid
= ptid_get_pid (ptid
);
1308 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1316 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1318 /* Handle sub-8-byte quantities. */
1322 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1323 restrictions for watchpoints in the processors. In that case, we use that
1324 information to determine the hardcoded watchable region for
1326 if (have_ptrace_hwdebug_interface ())
1329 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1330 watchpoints and can watch any access within an arbitrary memory
1331 region. This is useful to watch arrays and structs, for instance. It
1332 takes two hardware watchpoints though. */
1334 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1335 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1337 /* Check if the processor provides DAWR interface. */
1338 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1339 /* DAWR interface allows to watch up to 512 byte wide ranges which
1340 can't cross a 512 byte boundary. */
1343 region_size
= hwdebug_info
.data_bp_alignment
;
1344 /* Server processors provide one hardware watchpoint and addr+len should
1345 fall in the watchable region provided by the ptrace interface. */
1347 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1350 /* addr+len must fall in the 8 byte watchable region for DABR-based
1351 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1352 ptrace interface, DAC-based processors (i.e., embedded processors) will
1353 use addresses aligned to 4-bytes due to the way the read/write flags are
1354 passed in the old ptrace interface. */
1355 else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1356 && (addr
+ len
) > (addr
& ~3) + 4)
1357 || (addr
+ len
) > (addr
& ~7) + 8)
1363 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1365 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1367 return (a
->trigger_type
== b
->trigger_type
1368 && a
->addr_mode
== b
->addr_mode
1369 && a
->condition_mode
== b
->condition_mode
1370 && a
->addr
== b
->addr
1371 && a
->addr2
== b
->addr2
1372 && a
->condition_value
== b
->condition_value
);
1375 /* This function can be used to retrieve a thread_points by the TID of the
1376 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1377 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1378 provided TID will be created and returned. */
1379 static struct thread_points
*
1380 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1383 struct thread_points
*t
;
1385 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1391 /* Do we need to allocate a new point_item
1392 if the wanted one does not exist? */
1395 t
= XNEW (struct thread_points
);
1396 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1398 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1404 /* This function is a generic wrapper that is responsible for inserting a
1405 *point (i.e., calling `ptrace' in order to issue the request to the
1406 kernel) and registering it internally in GDB. */
1408 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1412 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1413 struct hw_break_tuple
*hw_breaks
;
1414 struct thread_points
*t
;
1415 struct hw_break_tuple
*tuple
;
1418 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1420 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1422 /* Everything went fine, so we have to register this *point. */
1423 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1424 gdb_assert (t
!= NULL
);
1425 hw_breaks
= t
->hw_breaks
;
1427 /* Find a free element in the hw_breaks vector. */
1428 for (i
= 0; i
< max_slots_number
; i
++)
1429 if (hw_breaks
[i
].hw_break
== NULL
)
1431 hw_breaks
[i
].slot
= slot
;
1432 hw_breaks
[i
].hw_break
= p
.release ();
1436 gdb_assert (i
!= max_slots_number
);
1439 /* This function is a generic wrapper that is responsible for removing a
1440 *point (i.e., calling `ptrace' in order to issue the request to the
1441 kernel), and unregistering it internally at GDB. */
1443 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1446 struct hw_break_tuple
*hw_breaks
;
1447 struct thread_points
*t
;
1449 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1450 gdb_assert (t
!= NULL
);
1451 hw_breaks
= t
->hw_breaks
;
1453 for (i
= 0; i
< max_slots_number
; i
++)
1454 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1457 gdb_assert (i
!= max_slots_number
);
1459 /* We have to ignore ENOENT errors because the kernel implements hardware
1460 breakpoints/watchpoints as "one-shot", that is, they are automatically
1461 deleted when hit. */
1463 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1464 if (errno
!= ENOENT
)
1465 perror_with_name (_("Unexpected error deleting "
1466 "breakpoint or watchpoint"));
1468 xfree (hw_breaks
[i
].hw_break
);
1469 hw_breaks
[i
].hw_break
= NULL
;
1472 /* Return the number of registers needed for a ranged breakpoint. */
1475 ppc_linux_nat_target::ranged_break_num_registers ()
1477 return ((have_ptrace_hwdebug_interface ()
1478 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1482 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1483 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1486 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1487 struct bp_target_info
*bp_tgt
)
1489 struct lwp_info
*lp
;
1490 struct ppc_hw_breakpoint p
;
1492 if (!have_ptrace_hwdebug_interface ())
1495 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1496 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1497 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1498 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1499 p
.condition_value
= 0;
1503 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1505 /* The breakpoint will trigger if the address of the instruction is
1506 within the defined range, as follows: p.addr <= address < p.addr2. */
1507 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1511 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1516 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1522 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1523 struct bp_target_info
*bp_tgt
)
1525 struct lwp_info
*lp
;
1526 struct ppc_hw_breakpoint p
;
1528 if (!have_ptrace_hwdebug_interface ())
1531 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1532 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1533 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1534 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1535 p
.condition_value
= 0;
1539 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1541 /* The breakpoint will trigger if the address of the instruction is within
1542 the defined range, as follows: p.addr <= address < p.addr2. */
1543 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1547 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1552 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1558 get_trigger_type (enum target_hw_bp_type type
)
1562 if (type
== hw_read
)
1563 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1564 else if (type
== hw_write
)
1565 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1567 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1572 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1573 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1574 or hw_access for an access watchpoint. Returns 0 on success and throws
1575 an error on failure. */
1578 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1579 target_hw_bp_type rw
)
1581 struct lwp_info
*lp
;
1582 struct ppc_hw_breakpoint p
;
1584 gdb_assert (have_ptrace_hwdebug_interface ());
1586 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1587 p
.trigger_type
= get_trigger_type (rw
);
1588 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1589 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1592 p
.condition_value
= 0;
1595 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1600 /* Remove a masked watchpoint at ADDR with the mask MASK.
1601 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1602 or hw_access for an access watchpoint. Returns 0 on success and throws
1603 an error on failure. */
1606 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1607 target_hw_bp_type rw
)
1609 struct lwp_info
*lp
;
1610 struct ppc_hw_breakpoint p
;
1612 gdb_assert (have_ptrace_hwdebug_interface ());
1614 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1615 p
.trigger_type
= get_trigger_type (rw
);
1616 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1617 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1620 p
.condition_value
= 0;
1623 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1628 /* Check whether we have at least one free DVC register. */
1630 can_use_watchpoint_cond_accel (void)
1632 struct thread_points
*p
;
1633 int tid
= ptid_get_lwp (inferior_ptid
);
1634 int cnt
= hwdebug_info
.num_condition_regs
, i
;
1635 CORE_ADDR tmp_value
;
1637 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
1640 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
1644 for (i
= 0; i
< max_slots_number
; i
++)
1645 if (p
->hw_breaks
[i
].hw_break
!= NULL
1646 && (p
->hw_breaks
[i
].hw_break
->condition_mode
1647 != PPC_BREAKPOINT_CONDITION_NONE
))
1650 /* There are no available slots now. */
1658 /* Calculate the enable bits and the contents of the Data Value Compare
1659 debug register present in BookE processors.
1661 ADDR is the address to be watched, LEN is the length of watched data
1662 and DATA_VALUE is the value which will trigger the watchpoint.
1663 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
1664 CONDITION_VALUE will hold the value which should be put in the
1667 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
1668 uint32_t *condition_mode
, uint64_t *condition_value
)
1670 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
1671 rightmost_enabled_byte
;
1672 CORE_ADDR addr_end_data
, addr_end_dvc
;
1674 /* The DVC register compares bytes within fixed-length windows which
1675 are word-aligned, with length equal to that of the DVC register.
1676 We need to calculate where our watch region is relative to that
1677 window and enable comparison of the bytes which fall within it. */
1679 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
1680 addr_end_data
= addr
+ len
;
1681 addr_end_dvc
= (addr
- align_offset
1682 + hwdebug_info
.sizeof_condition
);
1683 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
1684 addr_end_data
- addr_end_dvc
: 0;
1685 num_byte_enable
= len
- num_bytes_off_dvc
;
1686 /* Here, bytes are numbered from right to left. */
1687 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
1688 addr_end_dvc
- addr_end_data
: 0;
1690 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
1691 for (i
= 0; i
< num_byte_enable
; i
++)
1693 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
1695 /* Now we need to match the position within the DVC of the comparison
1696 value with where the watch region is relative to the window
1697 (i.e., the ALIGN_OFFSET). */
1699 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
1700 << rightmost_enabled_byte
* 8);
1703 /* Return the number of memory locations that need to be accessed to
1704 evaluate the expression which generated the given value chain.
1705 Returns -1 if there's any register access involved, or if there are
1706 other kinds of values which are not acceptable in a condition
1707 expression (e.g., lval_computed or lval_internalvar). */
1709 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
1711 int found_memory_cnt
= 0;
1713 /* The idea here is that evaluating an expression generates a series
1714 of values, one holding the value of every subexpression. (The
1715 expression a*b+c has five subexpressions: a, b, a*b, c, and
1716 a*b+c.) GDB's values hold almost enough information to establish
1717 the criteria given above --- they identify memory lvalues,
1718 register lvalues, computed values, etcetera. So we can evaluate
1719 the expression, and then scan the chain of values that leaves
1720 behind to determine the memory locations involved in the evaluation
1723 However, I don't think that the values returned by inferior
1724 function calls are special in any way. So this function may not
1725 notice that an expression contains an inferior function call.
1728 for (const value_ref_ptr
&iter
: chain
)
1730 struct value
*v
= iter
.get ();
1732 /* Constants and values from the history are fine. */
1733 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
1735 else if (VALUE_LVAL (v
) == lval_memory
)
1737 /* A lazy memory lvalue is one that GDB never needed to fetch;
1738 we either just used its address (e.g., `a' in `a.b') or
1739 we never needed it at all (e.g., `a' in `a,b'). */
1740 if (!value_lazy (v
))
1743 /* Other kinds of values are not fine. */
1748 return found_memory_cnt
;
1751 /* Verifies whether the expression COND can be implemented using the
1752 DVC (Data Value Compare) register in BookE processors. The expression
1753 must test the watch value for equality with a constant expression.
1754 If the function returns 1, DATA_VALUE will contain the constant against
1755 which the watch value should be compared and LEN will contain the size
1758 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
1759 CORE_ADDR
*data_value
, int *len
)
1761 int pc
= 1, num_accesses_left
, num_accesses_right
;
1762 struct value
*left_val
, *right_val
;
1763 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
1765 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
1768 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
1769 num_accesses_left
= num_memory_accesses (left_chain
);
1771 if (left_val
== NULL
|| num_accesses_left
< 0)
1774 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
1775 num_accesses_right
= num_memory_accesses (right_chain
);
1777 if (right_val
== NULL
|| num_accesses_right
< 0)
1780 if (num_accesses_left
== 1 && num_accesses_right
== 0
1781 && VALUE_LVAL (left_val
) == lval_memory
1782 && value_address (left_val
) == watch_addr
)
1784 *data_value
= value_as_long (right_val
);
1786 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
1787 the same type as the memory region referenced by LEFT_VAL. */
1788 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
1790 else if (num_accesses_left
== 0 && num_accesses_right
== 1
1791 && VALUE_LVAL (right_val
) == lval_memory
1792 && value_address (right_val
) == watch_addr
)
1794 *data_value
= value_as_long (left_val
);
1796 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
1797 the same type as the memory region referenced by RIGHT_VAL. */
1798 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
1806 /* Return non-zero if the target is capable of using hardware to evaluate
1807 the condition expression, thus only triggering the watchpoint when it is
1810 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
1812 struct expression
*cond
)
1814 CORE_ADDR data_value
;
1816 return (have_ptrace_hwdebug_interface ()
1817 && hwdebug_info
.num_condition_regs
> 0
1818 && check_condition (addr
, cond
, &data_value
, &len
));
1821 /* Set up P with the parameters necessary to request a watchpoint covering
1822 LEN bytes starting at ADDR and if possible with condition expression COND
1823 evaluated by hardware. INSERT tells if we are creating a request for
1824 inserting or removing the watchpoint. */
1827 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
1828 int len
, enum target_hw_bp_type type
,
1829 struct expression
*cond
, int insert
)
1832 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
1835 CORE_ADDR data_value
;
1837 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
1838 : hwdebug_info
.num_condition_regs
> 0);
1839 if (cond
&& use_condition
&& check_condition (addr
, cond
,
1841 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
1842 &p
->condition_value
);
1845 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1846 p
->condition_value
= 0;
1849 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1854 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1855 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1856 p
->condition_value
= 0;
1858 /* The watchpoint will trigger if the address of the memory access is
1859 within the defined range, as follows: p->addr <= address < p->addr2.
1861 Note that the above sentence just documents how ptrace interprets
1862 its arguments; the watchpoint is set to watch the range defined by
1863 the user _inclusively_, as specified by the user interface. */
1864 p
->addr2
= (uint64_t) addr
+ len
;
1867 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
1868 p
->trigger_type
= get_trigger_type (type
);
1869 p
->addr
= (uint64_t) addr
;
1873 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
1874 enum target_hw_bp_type type
,
1875 struct expression
*cond
)
1877 struct lwp_info
*lp
;
1880 if (have_ptrace_hwdebug_interface ())
1882 struct ppc_hw_breakpoint p
;
1884 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
1887 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1894 long read_mode
, write_mode
;
1896 if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1898 /* PowerPC 440 requires only the read/write flags to be passed
1905 /* PowerPC 970 and other DABR-based processors are required to pass
1906 the Breakpoint Translation bit together with the flags. */
1911 dabr_value
= addr
& ~(read_mode
| write_mode
);
1915 /* Set read and translate bits. */
1916 dabr_value
|= read_mode
;
1919 /* Set write and translate bits. */
1920 dabr_value
|= write_mode
;
1923 /* Set read, write and translate bits. */
1924 dabr_value
|= read_mode
| write_mode
;
1928 saved_dabr_value
= dabr_value
;
1931 if (ptrace (PTRACE_SET_DEBUGREG
, ptid_get_lwp (lp
->ptid
), 0,
1932 saved_dabr_value
) < 0)
1942 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
1943 enum target_hw_bp_type type
,
1944 struct expression
*cond
)
1946 struct lwp_info
*lp
;
1949 if (have_ptrace_hwdebug_interface ())
1951 struct ppc_hw_breakpoint p
;
1953 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
1956 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1962 saved_dabr_value
= 0;
1964 if (ptrace (PTRACE_SET_DEBUGREG
, ptid_get_lwp (lp
->ptid
), 0,
1965 saved_dabr_value
) < 0)
1975 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
1977 int tid
= ptid_get_lwp (lp
->ptid
);
1979 if (have_ptrace_hwdebug_interface ())
1982 struct thread_points
*p
;
1983 struct hw_break_tuple
*hw_breaks
;
1985 if (VEC_empty (thread_points_p
, ppc_threads
))
1988 /* Get a list of breakpoints from any thread. */
1989 p
= VEC_last (thread_points_p
, ppc_threads
);
1990 hw_breaks
= p
->hw_breaks
;
1992 /* Copy that thread's breakpoints and watchpoints to the new thread. */
1993 for (i
= 0; i
< max_slots_number
; i
++)
1994 if (hw_breaks
[i
].hw_break
)
1996 /* Older kernels did not make new threads inherit their parent
1997 thread's debug state, so we always clear the slot and replicate
1998 the debug state ourselves, ensuring compatibility with all
2001 /* The ppc debug resource accounting is done through "slots".
2002 Ask the kernel the deallocate this specific *point's slot. */
2003 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2005 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2009 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2013 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2016 int tid
= ptid_get_lwp (tp
->ptid
);
2017 struct hw_break_tuple
*hw_breaks
;
2018 struct thread_points
*t
= NULL
, *p
;
2020 if (!have_ptrace_hwdebug_interface ())
2023 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2033 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2035 hw_breaks
= t
->hw_breaks
;
2037 for (i
= 0; i
< max_slots_number
; i
++)
2038 if (hw_breaks
[i
].hw_break
)
2039 xfree (hw_breaks
[i
].hw_break
);
2041 xfree (t
->hw_breaks
);
2046 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2050 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2053 if (siginfo
.si_signo
!= SIGTRAP
2054 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2057 if (have_ptrace_hwdebug_interface ())
2060 struct thread_points
*t
;
2061 struct hw_break_tuple
*hw_breaks
;
2062 /* The index (or slot) of the *point is passed in the si_errno field. */
2063 int slot
= siginfo
.si_errno
;
2065 t
= hwdebug_find_thread_points_by_tid (ptid_get_lwp (inferior_ptid
), 0);
2067 /* Find out if this *point is a hardware breakpoint.
2068 If so, we should return 0. */
2071 hw_breaks
= t
->hw_breaks
;
2072 for (i
= 0; i
< max_slots_number
; i
++)
2073 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2074 && hw_breaks
[i
].hw_break
->trigger_type
2075 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2080 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2085 ppc_linux_nat_target::stopped_by_watchpoint ()
2088 return stopped_data_address (&addr
);
2092 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2098 if (have_ptrace_hwdebug_interface ()
2099 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2100 return start
<= addr
&& start
+ length
>= addr
;
2101 else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2108 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2109 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2112 /* Return the number of registers needed for a masked hardware watchpoint. */
2115 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2117 if (!have_ptrace_hwdebug_interface ()
2118 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2120 else if ((mask
& 0xC0000000) != 0xC0000000)
2122 warning (_("The given mask covers kernel address space "
2123 "and cannot be used.\n"));
2132 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2134 pid_t tid
= get_ptrace_pid (regcache_get_ptid (regcache
));
2137 store_register (regcache
, tid
, regno
);
2139 store_ppc_registers (regcache
, tid
);
2142 /* Functions for transferring registers between a gregset_t or fpregset_t
2143 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2144 by the ptrace interface, not the current program's ABI. Eg. if a
2145 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2146 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2149 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2151 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2153 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2157 fill_gregset (const struct regcache
*regcache
,
2158 gdb_gregset_t
*gregsetp
, int regno
)
2160 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2163 memset (gregsetp
, 0, sizeof (*gregsetp
));
2164 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2168 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2170 const struct regset
*regset
= ppc_linux_fpregset ();
2172 ppc_supply_fpregset (regset
, regcache
, -1,
2173 fpregsetp
, sizeof (*fpregsetp
));
2177 fill_fpregset (const struct regcache
*regcache
,
2178 gdb_fpregset_t
*fpregsetp
, int regno
)
2180 const struct regset
*regset
= ppc_linux_fpregset ();
2182 ppc_collect_fpregset (regset
, regcache
, regno
,
2183 fpregsetp
, sizeof (*fpregsetp
));
2187 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2188 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2191 int tid
= ptid_get_lwp (inferior_ptid
);
2193 tid
= ptid_get_pid (inferior_ptid
);
2195 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2197 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2198 gdb_byte
*ptr
= *readptr
;
2203 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2206 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2207 ptr
+= sizeof_auxv_field
;
2208 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2209 ptr
+= sizeof_auxv_field
;
2215 const struct target_desc
*
2216 ppc_linux_nat_target::read_description ()
2218 int tid
= ptid_get_lwp (inferior_ptid
);
2220 tid
= ptid_get_pid (inferior_ptid
);
2222 if (have_ptrace_getsetevrregs
)
2224 struct gdb_evrregset_t evrregset
;
2226 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2227 return tdesc_powerpc_e500l
;
2229 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2230 Anything else needs to be reported. */
2231 else if (errno
!= EIO
)
2232 perror_with_name (_("Unable to fetch SPE registers"));
2235 struct ppc_linux_features features
= ppc_linux_no_features
;
2237 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2239 unsigned long hwcap
= ppc_linux_get_hwcap ();
2241 if (have_ptrace_getsetvsxregs
2242 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2244 gdb_vsxregset_t vsxregset
;
2246 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2247 features
.vsx
= true;
2249 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2250 Anything else needs to be reported. */
2251 else if (errno
!= EIO
)
2252 perror_with_name (_("Unable to fetch VSX registers"));
2255 if (have_ptrace_getvrregs
2256 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2258 gdb_vrregset_t vrregset
;
2260 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2261 features
.altivec
= true;
2263 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2264 Anything else needs to be reported. */
2265 else if (errno
!= EIO
)
2266 perror_with_name (_("Unable to fetch AltiVec registers"));
2269 if (hwcap
& PPC_FEATURE_CELL
)
2270 features
.cell
= true;
2272 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2274 return ppc_linux_match_description (features
);
2278 _initialize_ppc_linux_nat (void)
2280 linux_target
= &the_ppc_linux_nat_target
;
2282 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2284 /* Register the target. */
2285 add_inf_child_target (linux_target
);