1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdbthread.h"
28 #include "linux-nat.h"
29 #include <sys/types.h>
32 #include <sys/ioctl.h>
34 #include "gdbsupport/gdb_wait.h"
36 #include <sys/procfs.h>
37 #include "nat/gdb_ptrace.h"
38 #include "nat/linux-ptrace.h"
39 #include "inf-ptrace.h"
41 #include <unordered_map>
44 /* Prototypes for supply_gregset etc. */
47 #include "ppc-linux-tdep.h"
49 /* Required when using the AUXV. */
50 #include "elf/common.h"
53 #include "arch/ppc-linux-common.h"
54 #include "arch/ppc-linux-tdesc.h"
55 #include "nat/ppc-linux.h"
56 #include "linux-tdep.h"
58 /* Similarly for the hardware watchpoint support. These requests are used
59 when the PowerPC HWDEBUG ptrace interface is not available. */
60 #ifndef PTRACE_GET_DEBUGREG
61 #define PTRACE_GET_DEBUGREG 25
63 #ifndef PTRACE_SET_DEBUGREG
64 #define PTRACE_SET_DEBUGREG 26
66 #ifndef PTRACE_GETSIGINFO
67 #define PTRACE_GETSIGINFO 0x4202
70 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
71 available. It exposes the debug facilities of PowerPC processors, as well
72 as additional features of BookE processors, such as ranged breakpoints and
73 watchpoints and hardware-accelerated condition evaluation. */
74 #ifndef PPC_PTRACE_GETHWDBGINFO
76 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
77 ptrace interface is not present in ptrace.h, so we'll have to pretty much
78 include it all here so that the code at least compiles on older systems. */
79 #define PPC_PTRACE_GETHWDBGINFO 0x89
80 #define PPC_PTRACE_SETHWDEBUG 0x88
81 #define PPC_PTRACE_DELHWDEBUG 0x87
85 uint32_t version
; /* Only version 1 exists to date. */
86 uint32_t num_instruction_bps
;
87 uint32_t num_data_bps
;
88 uint32_t num_condition_regs
;
89 uint32_t data_bp_alignment
;
90 uint32_t sizeof_condition
; /* size of the DVC register. */
94 /* Features will have bits indicating whether there is support for: */
95 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
96 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
97 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
98 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
100 struct ppc_hw_breakpoint
102 uint32_t version
; /* currently, version must be 1 */
103 uint32_t trigger_type
; /* only some combinations allowed */
104 uint32_t addr_mode
; /* address match mode */
105 uint32_t condition_mode
; /* break/watchpoint condition flags */
106 uint64_t addr
; /* break/watchpoint address */
107 uint64_t addr2
; /* range end or mask */
108 uint64_t condition_value
; /* contents of the DVC register */
112 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
113 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
114 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
115 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
118 #define PPC_BREAKPOINT_MODE_EXACT 0x0
119 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
120 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
121 #define PPC_BREAKPOINT_MODE_MASK 0x3
123 /* Condition mode. */
124 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
125 #define PPC_BREAKPOINT_CONDITION_AND 0x1
126 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
127 #define PPC_BREAKPOINT_CONDITION_OR 0x2
128 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
129 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
130 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
131 #define PPC_BREAKPOINT_CONDITION_BE(n) \
132 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
133 #endif /* PPC_PTRACE_GETHWDBGINFO */
135 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
136 watchpoint (up to 512 bytes). */
137 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
138 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
139 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
141 /* Feature defined on Linux kernel v5.1: Second watchpoint support. */
142 #ifndef PPC_DEBUG_FEATURE_DATA_BP_ARCH_31
143 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 0x20
144 #endif /* PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 */
146 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
148 #define PPC_DEBUG_CURRENT_VERSION 1
150 /* Similarly for the general-purpose (gp0 -- gp31)
151 and floating-point registers (fp0 -- fp31). */
152 #ifndef PTRACE_GETREGS
153 #define PTRACE_GETREGS 12
155 #ifndef PTRACE_SETREGS
156 #define PTRACE_SETREGS 13
158 #ifndef PTRACE_GETFPREGS
159 #define PTRACE_GETFPREGS 14
161 #ifndef PTRACE_SETFPREGS
162 #define PTRACE_SETFPREGS 15
165 /* This oddity is because the Linux kernel defines elf_vrregset_t as
166 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
167 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
168 the vrsave as an extra 4 bytes at the end. I opted for creating a
169 flat array of chars, so that it is easier to manipulate for gdb.
171 There are 32 vector registers 16 bytes longs, plus a VSCR register
172 which is only 4 bytes long, but is fetched as a 16 bytes
173 quantity. Up to here we have the elf_vrregset_t structure.
174 Appended to this there is space for the VRSAVE register: 4 bytes.
175 Even though this vrsave register is not included in the regset
176 typedef, it is handled by the ptrace requests.
178 The layout is like this (where x is the actual value of the vscr reg): */
183 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
184 <-------> <-------><-------><->
187 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
188 <-------> <-------><-------><->
193 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
195 /* This is the layout of the POWER7 VSX registers and the way they overlap
196 with the existing FPR and VMX registers.
198 VSR doubleword 0 VSR doubleword 1
199 ----------------------------------------------------------------
201 ----------------------------------------------------------------
203 ----------------------------------------------------------------
206 ----------------------------------------------------------------
207 VSR[30] | FPR[30] | |
208 ----------------------------------------------------------------
209 VSR[31] | FPR[31] | |
210 ----------------------------------------------------------------
212 ----------------------------------------------------------------
214 ----------------------------------------------------------------
217 ----------------------------------------------------------------
219 ----------------------------------------------------------------
221 ----------------------------------------------------------------
223 VSX has 64 128bit registers. The first 32 registers overlap with
224 the FP registers (doubleword 0) and hence extend them with additional
225 64 bits (doubleword 1). The other 32 regs overlap with the VMX
227 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
229 /* On PPC processors that support the Signal Processing Extension
230 (SPE) APU, the general-purpose registers are 64 bits long.
231 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
232 ptrace calls only access the lower half of each register, to allow
233 them to behave the same way they do on non-SPE systems. There's a
234 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
235 read and write the top halves of all the general-purpose registers
236 at once, along with some SPE-specific registers.
238 GDB itself continues to claim the general-purpose registers are 32
239 bits long. It has unnamed raw registers that hold the upper halves
240 of the gprs, and the full 64-bit SIMD views of the registers,
241 'ev0' -- 'ev31', are pseudo-registers that splice the top and
242 bottom halves together.
244 This is the structure filled in by PTRACE_GETEVRREGS and written to
245 the inferior's registers by PTRACE_SETEVRREGS. */
246 struct gdb_evrregset_t
248 unsigned long evr
[32];
249 unsigned long long acc
;
250 unsigned long spefscr
;
253 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
254 PTRACE_SETVSXREGS requests, for reading and writing the VSX
255 POWER7 registers 0 through 31. Zero if we've tried one of them and
256 gotten an error. Note that VSX registers 32 through 63 overlap
257 with VR registers 0 through 31. */
258 int have_ptrace_getsetvsxregs
= 1;
260 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
261 PTRACE_SETVRREGS requests, for reading and writing the Altivec
262 registers. Zero if we've tried one of them and gotten an
264 int have_ptrace_getvrregs
= 1;
266 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
267 PTRACE_SETEVRREGS requests, for reading and writing the SPE
268 registers. Zero if we've tried one of them and gotten an
270 int have_ptrace_getsetevrregs
= 1;
272 /* Non-zero if our kernel may support the PTRACE_GETREGS and
273 PTRACE_SETREGS requests, for reading and writing the
274 general-purpose registers. Zero if we've tried one of
275 them and gotten an error. */
276 int have_ptrace_getsetregs
= 1;
278 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
279 PTRACE_SETFPREGS requests, for reading and writing the
280 floating-pointers registers. Zero if we've tried one of
281 them and gotten an error. */
282 int have_ptrace_getsetfpregs
= 1;
284 /* Private arch info associated with each thread lwp_info object, used
285 for debug register handling. */
289 /* When true, indicates that the debug registers installed in the
290 thread no longer correspond to the watchpoints and breakpoints
292 bool debug_regs_stale
;
294 /* We need a back-reference to the PTID of the thread so that we can
295 cleanup the debug register state of the thread in
296 low_delete_thread. */
300 /* Class used to detect which set of ptrace requests that
301 ppc_linux_nat_target will use to install and remove hardware
302 breakpoints and watchpoints.
304 The interface is only detected once, testing the ptrace calls. The
305 result can indicate that no interface is available.
307 The Linux kernel provides two different sets of ptrace requests to
308 handle hardware watchpoints and breakpoints for Power:
310 - PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG, and
311 PPC_PTRACE_DELHWDEBUG.
315 - PTRACE_SET_DEBUGREG and PTRACE_GET_DEBUGREG
317 The first set is the more flexible one and allows setting watchpoints
318 with a variable watched region length and, for BookE processors,
319 multiple types of debug registers (e.g. hardware breakpoints and
320 hardware-assisted conditions for watchpoints). The second one only
321 allows setting one debug register, a watchpoint, so we only use it if
322 the first one is not available. */
324 class ppc_linux_dreg_interface
328 ppc_linux_dreg_interface ()
329 : m_interface (), m_hwdebug_info ()
333 DISABLE_COPY_AND_ASSIGN (ppc_linux_dreg_interface
);
335 /* One and only one of these three functions returns true, indicating
336 whether the corresponding interface is the one we detected. The
337 interface must already have been detected as a precontidion. */
341 gdb_assert (detected_p ());
342 return *m_interface
== HWDEBUG
;
347 gdb_assert (detected_p ());
348 return *m_interface
== DEBUGREG
;
351 bool unavailable_p ()
353 gdb_assert (detected_p ());
354 return *m_interface
== UNAVAILABLE
;
357 /* Returns the debug register capabilities of the target. Should only
358 be called if the interface is HWDEBUG. */
359 const struct ppc_debug_info
&hwdebug_info ()
361 gdb_assert (hwdebug_p ());
363 return m_hwdebug_info
;
366 /* Returns true if the interface has already been detected. This is
367 useful for cases when we know there is no work to be done if the
368 interface hasn't been detected yet. */
371 return m_interface
.has_value ();
374 /* Detect the available interface, if any, if it hasn't been detected
375 before, using PTID for the necessary ptrace calls. */
377 void detect (const ptid_t
&ptid
)
379 if (m_interface
.has_value ())
382 gdb_assert (ptid
.lwp_p ());
384 bool no_features
= false;
386 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, ptid
.lwp (), 0, &m_hwdebug_info
)
389 /* If there are no advertised features, we don't use the
390 HWDEBUG interface and try the DEBUGREG interface instead.
391 It shouldn't be necessary to do this, however, when the
392 kernel is configured without CONFIG_HW_BREAKPOINTS (selected
393 by CONFIG_PERF_EVENTS), there is a bug that causes
394 watchpoints installed with the HWDEBUG interface not to
395 trigger. When this is the case, features will be zero,
396 which we use as an indicator to fall back to the DEBUGREG
398 if (m_hwdebug_info
.features
!= 0)
400 m_interface
.emplace (HWDEBUG
);
407 /* EIO indicates that the request is invalid, so we try DEBUGREG
408 next. Technically, it can also indicate other failures, but we
409 can't differentiate those.
411 Other errors could happen for various reasons. We could get an
412 ESRCH if the traced thread was killed by a signal. Trying to
413 detect the interface with another thread in the future would be
414 complicated, as callers would have to handle an "unknown
415 interface" case. It's also unclear if raising an exception
418 Other errors, such as ENODEV, could be more permanent and cause
419 a failure for any thread.
421 For simplicity, with all errors other than EIO, we set the
422 interface to UNAVAILABLE and don't try DEBUGREG. If DEBUGREG
423 fails too, we'll also set the interface to UNAVAILABLE. It's
424 unlikely that trying the DEBUGREG interface with this same thread
425 would work, for errors other than EIO. This means that these
426 errors will cause hardware watchpoints and breakpoints to become
427 unavailable throughout a GDB session. */
429 if (no_features
|| errno
== EIO
)
433 if (ptrace (PTRACE_GET_DEBUGREG
, ptid
.lwp (), 0, &wp
) >= 0)
435 m_interface
.emplace (DEBUGREG
);
441 warning (_("Error when detecting the debug register interface. "
442 "Debug registers will be unavailable."));
444 m_interface
.emplace (UNAVAILABLE
);
450 /* HWDEBUG represents the set of calls PPC_PTRACE_GETHWDBGINFO,
451 PPC_PTRACE_SETHWDEBUG and PPC_PTRACE_DELHWDEBUG.
453 DEBUGREG represents the set of calls PTRACE_SET_DEBUGREG and
456 UNAVAILABLE can indicate that the kernel doesn't support any of the
457 two sets of requests or that there was an error when we tried to
458 detect wich interface is available. */
460 enum debug_reg_interface
467 /* The interface option. Initialized if has_value () returns true. */
468 gdb::optional
<enum debug_reg_interface
> m_interface
;
470 /* The info returned by the kernel with PPC_PTRACE_GETHWDBGINFO. Only
471 valid if we determined that the interface is HWDEBUG. */
472 struct ppc_debug_info m_hwdebug_info
;
475 /* Per-process information. This includes the hardware watchpoints and
476 breakpoints that GDB requested to this target. */
478 struct ppc_linux_process_info
480 /* The list of hardware watchpoints and breakpoints that GDB requested
483 Only used when the interface is HWDEBUG. */
484 std::list
<struct ppc_hw_breakpoint
> requested_hw_bps
;
486 /* The watchpoint value that GDB requested for this process.
488 Only used when the interface is DEBUGREG. */
489 gdb::optional
<long> requested_wp_val
;
492 struct ppc_linux_nat_target final
: public linux_nat_target
494 /* Add our register access methods. */
495 void fetch_registers (struct regcache
*, int) override
;
496 void store_registers (struct regcache
*, int) override
;
498 /* Add our breakpoint/watchpoint methods. */
499 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
501 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
504 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
507 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
509 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
510 struct expression
*) override
;
512 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
513 struct expression
*) override
;
515 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
518 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
521 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
523 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
526 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
528 int ranged_break_num_registers () override
;
530 const struct target_desc
*read_description () override
;
532 int auxv_parse (gdb_byte
**readptr
,
533 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
536 /* Override linux_nat_target low methods. */
537 bool low_stopped_by_watchpoint () override
;
539 bool low_stopped_data_address (CORE_ADDR
*) override
;
541 void low_new_thread (struct lwp_info
*lp
) override
;
543 void low_delete_thread (arch_lwp_info
*) override
;
545 void low_new_fork (struct lwp_info
*, pid_t
) override
;
547 void low_new_clone (struct lwp_info
*, pid_t
) override
;
549 void low_forget_process (pid_t pid
) override
;
551 void low_prepare_to_resume (struct lwp_info
*) override
;
555 void copy_thread_dreg_state (const ptid_t
&parent_ptid
,
556 const ptid_t
&child_ptid
);
558 void mark_thread_stale (struct lwp_info
*lp
);
560 void mark_debug_registers_changed (pid_t pid
);
562 void register_hw_breakpoint (pid_t pid
,
563 const struct ppc_hw_breakpoint
&bp
);
565 void clear_hw_breakpoint (pid_t pid
,
566 const struct ppc_hw_breakpoint
&a
);
568 void register_wp (pid_t pid
, long wp_value
);
570 void clear_wp (pid_t pid
);
572 bool can_use_watchpoint_cond_accel (void);
574 void calculate_dvc (CORE_ADDR addr
, int len
,
575 CORE_ADDR data_value
,
576 uint32_t *condition_mode
,
577 uint64_t *condition_value
);
579 int check_condition (CORE_ADDR watch_addr
,
580 struct expression
*cond
,
581 CORE_ADDR
*data_value
, int *len
);
583 int num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
);
585 int get_trigger_type (enum target_hw_bp_type type
);
587 void create_watchpoint_request (struct ppc_hw_breakpoint
*p
,
590 enum target_hw_bp_type type
,
591 struct expression
*cond
,
594 bool hwdebug_point_cmp (const struct ppc_hw_breakpoint
&a
,
595 const struct ppc_hw_breakpoint
&b
);
597 void init_arch_lwp_info (struct lwp_info
*lp
);
599 arch_lwp_info
*get_arch_lwp_info (struct lwp_info
*lp
);
601 /* The ptrace interface we'll use to install hardware watchpoints and
602 breakpoints (debug registers). */
603 ppc_linux_dreg_interface m_dreg_interface
;
605 /* A map from pids to structs containing info specific to each
607 std::unordered_map
<pid_t
, ppc_linux_process_info
> m_process_info
;
609 /* Callable object to hash ptids by their lwp number. */
612 std::size_t operator() (const ptid_t
&ptid
) const
614 return std::hash
<long>{} (ptid
.lwp ());
618 /* A map from ptid_t objects to a list of pairs of slots and hardware
619 breakpoint objects. This keeps track of which hardware breakpoints
620 and watchpoints were last installed in each slot of each thread.
622 Only used when the interface is HWDEBUG. */
623 std::unordered_map
<ptid_t
,
624 std::list
<std::pair
<long, ppc_hw_breakpoint
>>,
625 ptid_hash
> m_installed_hw_bps
;
628 static ppc_linux_nat_target the_ppc_linux_nat_target
;
631 /* registers layout, as presented by the ptrace interface:
632 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
633 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
634 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
635 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
636 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
637 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
638 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
639 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
640 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
641 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
642 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
643 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
644 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
648 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
651 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
652 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
653 interface, and not the wordsize of the program's ABI. */
654 int wordsize
= sizeof (long);
656 /* General purpose registers occupy 1 slot each in the buffer. */
657 if (regno
>= tdep
->ppc_gp0_regnum
658 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
659 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
661 /* Floating point regs: eight bytes each in both 32- and 64-bit
662 ptrace interfaces. Thus, two slots each in 32-bit interface, one
663 slot each in 64-bit interface. */
664 if (tdep
->ppc_fp0_regnum
>= 0
665 && regno
>= tdep
->ppc_fp0_regnum
666 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
667 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
669 /* UISA special purpose registers: 1 slot each. */
670 if (regno
== gdbarch_pc_regnum (gdbarch
))
671 u_addr
= PT_NIP
* wordsize
;
672 if (regno
== tdep
->ppc_lr_regnum
)
673 u_addr
= PT_LNK
* wordsize
;
674 if (regno
== tdep
->ppc_cr_regnum
)
675 u_addr
= PT_CCR
* wordsize
;
676 if (regno
== tdep
->ppc_xer_regnum
)
677 u_addr
= PT_XER
* wordsize
;
678 if (regno
== tdep
->ppc_ctr_regnum
)
679 u_addr
= PT_CTR
* wordsize
;
681 if (regno
== tdep
->ppc_mq_regnum
)
682 u_addr
= PT_MQ
* wordsize
;
684 if (regno
== tdep
->ppc_ps_regnum
)
685 u_addr
= PT_MSR
* wordsize
;
686 if (regno
== PPC_ORIG_R3_REGNUM
)
687 u_addr
= PT_ORIG_R3
* wordsize
;
688 if (regno
== PPC_TRAP_REGNUM
)
689 u_addr
= PT_TRAP
* wordsize
;
690 if (tdep
->ppc_fpscr_regnum
>= 0
691 && regno
== tdep
->ppc_fpscr_regnum
)
693 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
694 kernel headers incorrectly contained the 32-bit definition of
695 PT_FPSCR. For the 32-bit definition, floating-point
696 registers occupy two 32-bit "slots", and the FPSCR lives in
697 the second half of such a slot-pair (hence +1). For 64-bit,
698 the FPSCR instead occupies the full 64-bit 2-word-slot and
699 hence no adjustment is necessary. Hack around this. */
700 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
701 u_addr
= (48 + 32) * wordsize
;
702 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
703 slot and not just its second word. The PT_FPSCR supplied when
704 GDB is compiled as a 32-bit app doesn't reflect this. */
705 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
706 && PT_FPSCR
== (48 + 2*32 + 1))
707 u_addr
= (48 + 2*32) * wordsize
;
709 u_addr
= PT_FPSCR
* wordsize
;
714 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
715 registers set mechanism, as opposed to the interface for all the
716 other registers, that stores/fetches each register individually. */
718 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
721 gdb_vsxregset_t regs
;
722 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
724 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
729 have_ptrace_getsetvsxregs
= 0;
732 perror_with_name (_("Unable to fetch VSX registers"));
735 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
736 PPC_LINUX_SIZEOF_VSXREGSET
);
739 /* The Linux kernel ptrace interface for AltiVec registers uses the
740 registers set mechanism, as opposed to the interface for all the
741 other registers, that stores/fetches each register individually. */
743 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
748 struct gdbarch
*gdbarch
= regcache
->arch ();
749 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
751 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
756 have_ptrace_getvrregs
= 0;
759 perror_with_name (_("Unable to fetch AltiVec registers"));
762 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
763 PPC_LINUX_SIZEOF_VRREGSET
);
766 /* Fetch the top 32 bits of TID's general-purpose registers and the
767 SPE-specific registers, and place the results in EVRREGSET. If we
768 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
771 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
772 PTRACE_SETEVRREGS requests are supported is isolated here, and in
773 set_spe_registers. */
775 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
777 if (have_ptrace_getsetevrregs
)
779 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
783 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
784 we just return zeros. */
786 have_ptrace_getsetevrregs
= 0;
788 /* Anything else needs to be reported. */
789 perror_with_name (_("Unable to fetch SPE registers"));
793 memset (evrregset
, 0, sizeof (*evrregset
));
796 /* Supply values from TID for SPE-specific raw registers: the upper
797 halves of the GPRs, the accumulator, and the spefscr. REGNO must
798 be the number of an upper half register, acc, spefscr, or -1 to
799 supply the values of all registers. */
801 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
803 struct gdbarch
*gdbarch
= regcache
->arch ();
804 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
805 struct gdb_evrregset_t evrregs
;
807 gdb_assert (sizeof (evrregs
.evr
[0])
808 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
809 gdb_assert (sizeof (evrregs
.acc
)
810 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
811 gdb_assert (sizeof (evrregs
.spefscr
)
812 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
814 get_spe_registers (tid
, &evrregs
);
820 for (i
= 0; i
< ppc_num_gprs
; i
++)
821 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
823 else if (tdep
->ppc_ev0_upper_regnum
<= regno
824 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
825 regcache
->raw_supply (regno
,
826 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
829 || regno
== tdep
->ppc_acc_regnum
)
830 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
833 || regno
== tdep
->ppc_spefscr_regnum
)
834 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
837 /* Use ptrace to fetch all registers from the register set with note
838 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
839 process/thread TID and supply their values to REGCACHE. If ptrace
840 returns ENODATA to indicate the regset is unavailable, mark the
841 registers as unavailable in REGCACHE. */
844 fetch_regset (struct regcache
*regcache
, int tid
,
845 int regset_id
, int regsetsize
, const struct regset
*regset
)
847 void *buf
= alloca (regsetsize
);
851 iov
.iov_len
= regsetsize
;
853 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
855 if (errno
== ENODATA
)
856 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
858 perror_with_name (_("Couldn't get register set"));
861 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
864 /* Use ptrace to store register REGNUM of the regset with note type
865 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
866 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
867 in the set are collected and stored. */
870 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
871 int regset_id
, int regsetsize
, const struct regset
*regset
)
873 void *buf
= alloca (regsetsize
);
877 iov
.iov_len
= regsetsize
;
879 /* Make sure that the buffer that will be stored has up to date values
880 for the registers that won't be collected. */
881 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
882 perror_with_name (_("Couldn't get register set"));
884 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
886 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
887 perror_with_name (_("Couldn't set register set"));
890 /* Check whether the kernel provides a register set with number
891 REGSET_ID of size REGSETSIZE for process/thread TID. */
894 check_regset (int tid
, int regset_id
, int regsetsize
)
896 void *buf
= alloca (regsetsize
);
900 iov
.iov_len
= regsetsize
;
902 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
910 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
912 struct gdbarch
*gdbarch
= regcache
->arch ();
913 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
914 /* This isn't really an address. But ptrace thinks of it as one. */
915 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
916 int bytes_transferred
;
917 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
919 if (altivec_register_p (gdbarch
, regno
))
921 /* If this is the first time through, or if it is not the first
922 time through, and we have confirmed that there is kernel
923 support for such a ptrace request, then go and fetch the
925 if (have_ptrace_getvrregs
)
927 fetch_altivec_registers (regcache
, tid
, regno
);
930 /* If we have discovered that there is no ptrace support for
931 AltiVec registers, fall through and return zeroes, because
932 regaddr will be -1 in this case. */
934 else if (vsx_register_p (gdbarch
, regno
))
936 if (have_ptrace_getsetvsxregs
)
938 fetch_vsx_registers (regcache
, tid
, regno
);
942 else if (spe_register_p (gdbarch
, regno
))
944 fetch_spe_register (regcache
, tid
, regno
);
947 else if (regno
== PPC_DSCR_REGNUM
)
949 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
951 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
952 PPC_LINUX_SIZEOF_DSCRREGSET
,
953 &ppc32_linux_dscrregset
);
956 else if (regno
== PPC_PPR_REGNUM
)
958 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
960 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
961 PPC_LINUX_SIZEOF_PPRREGSET
,
962 &ppc32_linux_pprregset
);
965 else if (regno
== PPC_TAR_REGNUM
)
967 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
969 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
970 PPC_LINUX_SIZEOF_TARREGSET
,
971 &ppc32_linux_tarregset
);
974 else if (PPC_IS_EBB_REGNUM (regno
))
976 gdb_assert (tdep
->have_ebb
);
978 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
979 PPC_LINUX_SIZEOF_EBBREGSET
,
980 &ppc32_linux_ebbregset
);
983 else if (PPC_IS_PMU_REGNUM (regno
))
985 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
987 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
988 PPC_LINUX_SIZEOF_PMUREGSET
,
989 &ppc32_linux_pmuregset
);
992 else if (PPC_IS_TMSPR_REGNUM (regno
))
994 gdb_assert (tdep
->have_htm_spr
);
996 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
997 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
998 &ppc32_linux_tm_sprregset
);
1001 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1003 gdb_assert (tdep
->have_htm_core
);
1005 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1006 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
1007 (tdep
->wordsize
== 4?
1008 PPC32_LINUX_SIZEOF_CGPRREGSET
1009 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1013 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1015 gdb_assert (tdep
->have_htm_fpu
);
1017 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
1018 PPC_LINUX_SIZEOF_CFPRREGSET
,
1019 &ppc32_linux_cfprregset
);
1022 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1024 gdb_assert (tdep
->have_htm_altivec
);
1026 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1027 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
1028 PPC_LINUX_SIZEOF_CVMXREGSET
,
1032 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1034 gdb_assert (tdep
->have_htm_vsx
);
1036 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1037 PPC_LINUX_SIZEOF_CVSXREGSET
,
1038 &ppc32_linux_cvsxregset
);
1041 else if (regno
== PPC_CPPR_REGNUM
)
1043 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1045 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1046 PPC_LINUX_SIZEOF_CPPRREGSET
,
1047 &ppc32_linux_cpprregset
);
1050 else if (regno
== PPC_CDSCR_REGNUM
)
1052 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1054 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1055 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1056 &ppc32_linux_cdscrregset
);
1059 else if (regno
== PPC_CTAR_REGNUM
)
1061 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1063 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1064 PPC_LINUX_SIZEOF_CTARREGSET
,
1065 &ppc32_linux_ctarregset
);
1071 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
1072 regcache
->raw_supply (regno
, buf
);
1076 /* Read the raw register using sizeof(long) sized chunks. On a
1077 32-bit platform, 64-bit floating-point registers will require two
1079 for (bytes_transferred
= 0;
1080 bytes_transferred
< register_size (gdbarch
, regno
);
1081 bytes_transferred
+= sizeof (long))
1086 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
1087 regaddr
+= sizeof (long);
1091 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
1092 gdbarch_register_name (gdbarch
, regno
), regno
);
1093 perror_with_name (message
);
1095 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
1098 /* Now supply the register. Keep in mind that the regcache's idea
1099 of the register's size may not be a multiple of sizeof
1101 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1103 /* Little-endian values are always found at the left end of the
1104 bytes transferred. */
1105 regcache
->raw_supply (regno
, buf
);
1107 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1109 /* Big-endian values are found at the right end of the bytes
1111 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
1112 regcache
->raw_supply (regno
, buf
+ padding
);
1115 internal_error (__FILE__
, __LINE__
,
1116 _("fetch_register: unexpected byte order: %d"),
1117 gdbarch_byte_order (gdbarch
));
1120 /* This function actually issues the request to ptrace, telling
1121 it to get all general-purpose registers and put them into the
1124 If the ptrace request does not exist, this function returns 0
1125 and properly sets the have_ptrace_* flag. If the request fails,
1126 this function calls perror_with_name. Otherwise, if the request
1127 succeeds, then the regcache gets filled and 1 is returned. */
1129 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
1131 gdb_gregset_t gregset
;
1133 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1137 have_ptrace_getsetregs
= 0;
1140 perror_with_name (_("Couldn't get general-purpose registers."));
1143 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
1148 /* This is a wrapper for the fetch_all_gp_regs function. It is
1149 responsible for verifying if this target has the ptrace request
1150 that can be used to fetch all general-purpose registers at one
1151 shot. If it doesn't, then we should fetch them using the
1152 old-fashioned way, which is to iterate over the registers and
1153 request them one by one. */
1155 fetch_gp_regs (struct regcache
*regcache
, int tid
)
1157 struct gdbarch
*gdbarch
= regcache
->arch ();
1158 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1161 if (have_ptrace_getsetregs
)
1162 if (fetch_all_gp_regs (regcache
, tid
))
1165 /* If we've hit this point, it doesn't really matter which
1166 architecture we are using. We just need to read the
1167 registers in the "old-fashioned way". */
1168 for (i
= 0; i
< ppc_num_gprs
; i
++)
1169 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1172 /* This function actually issues the request to ptrace, telling
1173 it to get all floating-point registers and put them into the
1176 If the ptrace request does not exist, this function returns 0
1177 and properly sets the have_ptrace_* flag. If the request fails,
1178 this function calls perror_with_name. Otherwise, if the request
1179 succeeds, then the regcache gets filled and 1 is returned. */
1181 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
1183 gdb_fpregset_t fpregs
;
1185 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1189 have_ptrace_getsetfpregs
= 0;
1192 perror_with_name (_("Couldn't get floating-point registers."));
1195 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
1200 /* This is a wrapper for the fetch_all_fp_regs function. It is
1201 responsible for verifying if this target has the ptrace request
1202 that can be used to fetch all floating-point registers at one
1203 shot. If it doesn't, then we should fetch them using the
1204 old-fashioned way, which is to iterate over the registers and
1205 request them one by one. */
1207 fetch_fp_regs (struct regcache
*regcache
, int tid
)
1209 struct gdbarch
*gdbarch
= regcache
->arch ();
1210 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1213 if (have_ptrace_getsetfpregs
)
1214 if (fetch_all_fp_regs (regcache
, tid
))
1217 /* If we've hit this point, it doesn't really matter which
1218 architecture we are using. We just need to read the
1219 registers in the "old-fashioned way". */
1220 for (i
= 0; i
< ppc_num_fprs
; i
++)
1221 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1225 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
1227 struct gdbarch
*gdbarch
= regcache
->arch ();
1228 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1230 fetch_gp_regs (regcache
, tid
);
1231 if (tdep
->ppc_fp0_regnum
>= 0)
1232 fetch_fp_regs (regcache
, tid
);
1233 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1234 if (tdep
->ppc_ps_regnum
!= -1)
1235 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1236 if (tdep
->ppc_cr_regnum
!= -1)
1237 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1238 if (tdep
->ppc_lr_regnum
!= -1)
1239 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1240 if (tdep
->ppc_ctr_regnum
!= -1)
1241 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1242 if (tdep
->ppc_xer_regnum
!= -1)
1243 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1244 if (tdep
->ppc_mq_regnum
!= -1)
1245 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1246 if (ppc_linux_trap_reg_p (gdbarch
))
1248 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1249 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1251 if (tdep
->ppc_fpscr_regnum
!= -1)
1252 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1253 if (have_ptrace_getvrregs
)
1254 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1255 fetch_altivec_registers (regcache
, tid
, -1);
1256 if (have_ptrace_getsetvsxregs
)
1257 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1258 fetch_vsx_registers (regcache
, tid
, -1);
1259 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1260 fetch_spe_register (regcache
, tid
, -1);
1261 if (tdep
->ppc_ppr_regnum
!= -1)
1262 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
1263 PPC_LINUX_SIZEOF_PPRREGSET
,
1264 &ppc32_linux_pprregset
);
1265 if (tdep
->ppc_dscr_regnum
!= -1)
1266 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
1267 PPC_LINUX_SIZEOF_DSCRREGSET
,
1268 &ppc32_linux_dscrregset
);
1269 if (tdep
->ppc_tar_regnum
!= -1)
1270 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
1271 PPC_LINUX_SIZEOF_TARREGSET
,
1272 &ppc32_linux_tarregset
);
1274 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
1275 PPC_LINUX_SIZEOF_EBBREGSET
,
1276 &ppc32_linux_ebbregset
);
1277 if (tdep
->ppc_mmcr0_regnum
!= -1)
1278 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
1279 PPC_LINUX_SIZEOF_PMUREGSET
,
1280 &ppc32_linux_pmuregset
);
1281 if (tdep
->have_htm_spr
)
1282 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
1283 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1284 &ppc32_linux_tm_sprregset
);
1285 if (tdep
->have_htm_core
)
1287 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1288 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
1289 (tdep
->wordsize
== 4?
1290 PPC32_LINUX_SIZEOF_CGPRREGSET
1291 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1294 if (tdep
->have_htm_fpu
)
1295 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
1296 PPC_LINUX_SIZEOF_CFPRREGSET
,
1297 &ppc32_linux_cfprregset
);
1298 if (tdep
->have_htm_altivec
)
1300 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1301 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
1302 PPC_LINUX_SIZEOF_CVMXREGSET
,
1305 if (tdep
->have_htm_vsx
)
1306 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1307 PPC_LINUX_SIZEOF_CVSXREGSET
,
1308 &ppc32_linux_cvsxregset
);
1309 if (tdep
->ppc_cppr_regnum
!= -1)
1310 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1311 PPC_LINUX_SIZEOF_CPPRREGSET
,
1312 &ppc32_linux_cpprregset
);
1313 if (tdep
->ppc_cdscr_regnum
!= -1)
1314 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1315 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1316 &ppc32_linux_cdscrregset
);
1317 if (tdep
->ppc_ctar_regnum
!= -1)
1318 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1319 PPC_LINUX_SIZEOF_CTARREGSET
,
1320 &ppc32_linux_ctarregset
);
1323 /* Fetch registers from the child process. Fetch all registers if
1324 regno == -1, otherwise fetch all general registers or all floating
1325 point registers depending upon the value of regno. */
1327 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
1329 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1332 fetch_ppc_registers (regcache
, tid
);
1334 fetch_register (regcache
, tid
, regno
);
1338 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
1341 gdb_vsxregset_t regs
;
1342 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
1344 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
1349 have_ptrace_getsetvsxregs
= 0;
1352 perror_with_name (_("Unable to fetch VSX registers"));
1355 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
1356 PPC_LINUX_SIZEOF_VSXREGSET
);
1358 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
1360 perror_with_name (_("Unable to store VSX registers"));
1364 store_altivec_registers (const struct regcache
*regcache
, int tid
,
1368 gdb_vrregset_t regs
;
1369 struct gdbarch
*gdbarch
= regcache
->arch ();
1370 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
1372 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
1377 have_ptrace_getvrregs
= 0;
1380 perror_with_name (_("Unable to fetch AltiVec registers"));
1383 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
1384 PPC_LINUX_SIZEOF_VRREGSET
);
1386 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
1388 perror_with_name (_("Unable to store AltiVec registers"));
1391 /* Assuming TID refers to an SPE process, set the top halves of TID's
1392 general-purpose registers and its SPE-specific registers to the
1393 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
1396 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
1397 PTRACE_SETEVRREGS requests are supported is isolated here, and in
1398 get_spe_registers. */
1400 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
1402 if (have_ptrace_getsetevrregs
)
1404 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
1408 /* EIO means that the PTRACE_SETEVRREGS request isn't
1409 supported; we fail silently, and don't try the call
1412 have_ptrace_getsetevrregs
= 0;
1414 /* Anything else needs to be reported. */
1415 perror_with_name (_("Unable to set SPE registers"));
1420 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
1421 If REGNO is -1, write the values of all the SPE-specific
1424 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
1426 struct gdbarch
*gdbarch
= regcache
->arch ();
1427 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1428 struct gdb_evrregset_t evrregs
;
1430 gdb_assert (sizeof (evrregs
.evr
[0])
1431 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
1432 gdb_assert (sizeof (evrregs
.acc
)
1433 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
1434 gdb_assert (sizeof (evrregs
.spefscr
)
1435 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
1438 /* Since we're going to write out every register, the code below
1439 should store to every field of evrregs; if that doesn't happen,
1440 make it obvious by initializing it with suspicious values. */
1441 memset (&evrregs
, 42, sizeof (evrregs
));
1443 /* We can only read and write the entire EVR register set at a
1444 time, so to write just a single register, we do a
1445 read-modify-write maneuver. */
1446 get_spe_registers (tid
, &evrregs
);
1452 for (i
= 0; i
< ppc_num_gprs
; i
++)
1453 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1456 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1457 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1458 regcache
->raw_collect (regno
,
1459 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1462 || regno
== tdep
->ppc_acc_regnum
)
1463 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1467 || regno
== tdep
->ppc_spefscr_regnum
)
1468 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1471 /* Write back the modified register set. */
1472 set_spe_registers (tid
, &evrregs
);
1476 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1478 struct gdbarch
*gdbarch
= regcache
->arch ();
1479 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1480 /* This isn't really an address. But ptrace thinks of it as one. */
1481 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1483 size_t bytes_to_transfer
;
1484 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1486 if (altivec_register_p (gdbarch
, regno
))
1488 store_altivec_registers (regcache
, tid
, regno
);
1491 else if (vsx_register_p (gdbarch
, regno
))
1493 store_vsx_registers (regcache
, tid
, regno
);
1496 else if (spe_register_p (gdbarch
, regno
))
1498 store_spe_register (regcache
, tid
, regno
);
1501 else if (regno
== PPC_DSCR_REGNUM
)
1503 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1505 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1506 PPC_LINUX_SIZEOF_DSCRREGSET
,
1507 &ppc32_linux_dscrregset
);
1510 else if (regno
== PPC_PPR_REGNUM
)
1512 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1514 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1515 PPC_LINUX_SIZEOF_PPRREGSET
,
1516 &ppc32_linux_pprregset
);
1519 else if (regno
== PPC_TAR_REGNUM
)
1521 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1523 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1524 PPC_LINUX_SIZEOF_TARREGSET
,
1525 &ppc32_linux_tarregset
);
1528 else if (PPC_IS_EBB_REGNUM (regno
))
1530 gdb_assert (tdep
->have_ebb
);
1532 store_regset (regcache
, tid
, regno
, NT_PPC_EBB
,
1533 PPC_LINUX_SIZEOF_EBBREGSET
,
1534 &ppc32_linux_ebbregset
);
1537 else if (PPC_IS_PMU_REGNUM (regno
))
1539 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
1541 store_regset (regcache
, tid
, regno
, NT_PPC_PMU
,
1542 PPC_LINUX_SIZEOF_PMUREGSET
,
1543 &ppc32_linux_pmuregset
);
1546 else if (PPC_IS_TMSPR_REGNUM (regno
))
1548 gdb_assert (tdep
->have_htm_spr
);
1550 store_regset (regcache
, tid
, regno
, NT_PPC_TM_SPR
,
1551 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1552 &ppc32_linux_tm_sprregset
);
1555 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1557 gdb_assert (tdep
->have_htm_core
);
1559 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1560 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CGPR
,
1561 (tdep
->wordsize
== 4?
1562 PPC32_LINUX_SIZEOF_CGPRREGSET
1563 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1567 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1569 gdb_assert (tdep
->have_htm_fpu
);
1571 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CFPR
,
1572 PPC_LINUX_SIZEOF_CFPRREGSET
,
1573 &ppc32_linux_cfprregset
);
1576 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1578 gdb_assert (tdep
->have_htm_altivec
);
1580 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1581 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVMX
,
1582 PPC_LINUX_SIZEOF_CVMXREGSET
,
1586 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1588 gdb_assert (tdep
->have_htm_vsx
);
1590 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVSX
,
1591 PPC_LINUX_SIZEOF_CVSXREGSET
,
1592 &ppc32_linux_cvsxregset
);
1595 else if (regno
== PPC_CPPR_REGNUM
)
1597 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1599 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CPPR
,
1600 PPC_LINUX_SIZEOF_CPPRREGSET
,
1601 &ppc32_linux_cpprregset
);
1604 else if (regno
== PPC_CDSCR_REGNUM
)
1606 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1608 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CDSCR
,
1609 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1610 &ppc32_linux_cdscrregset
);
1613 else if (regno
== PPC_CTAR_REGNUM
)
1615 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1617 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CTAR
,
1618 PPC_LINUX_SIZEOF_CTARREGSET
,
1619 &ppc32_linux_ctarregset
);
1626 /* First collect the register. Keep in mind that the regcache's
1627 idea of the register's size may not be a multiple of sizeof
1629 memset (buf
, 0, sizeof buf
);
1630 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1631 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1633 /* Little-endian values always sit at the left end of the buffer. */
1634 regcache
->raw_collect (regno
, buf
);
1636 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1638 /* Big-endian values sit at the right end of the buffer. */
1639 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1640 regcache
->raw_collect (regno
, buf
+ padding
);
1643 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1647 memcpy (&l
, &buf
[i
], sizeof (l
));
1649 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1650 regaddr
+= sizeof (long);
1653 && (regno
== tdep
->ppc_fpscr_regnum
1654 || regno
== PPC_ORIG_R3_REGNUM
1655 || regno
== PPC_TRAP_REGNUM
))
1657 /* Some older kernel versions don't allow fpscr, orig_r3
1658 or trap to be written. */
1665 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1666 gdbarch_register_name (gdbarch
, regno
), regno
);
1667 perror_with_name (message
);
1672 /* This function actually issues the request to ptrace, telling
1673 it to store all general-purpose registers present in the specified
1676 If the ptrace request does not exist, this function returns 0
1677 and properly sets the have_ptrace_* flag. If the request fails,
1678 this function calls perror_with_name. Otherwise, if the request
1679 succeeds, then the regcache is stored and 1 is returned. */
1681 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1683 gdb_gregset_t gregset
;
1685 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1689 have_ptrace_getsetregs
= 0;
1692 perror_with_name (_("Couldn't get general-purpose registers."));
1695 fill_gregset (regcache
, &gregset
, regno
);
1697 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1701 have_ptrace_getsetregs
= 0;
1704 perror_with_name (_("Couldn't set general-purpose registers."));
1710 /* This is a wrapper for the store_all_gp_regs function. It is
1711 responsible for verifying if this target has the ptrace request
1712 that can be used to store all general-purpose registers at one
1713 shot. If it doesn't, then we should store them using the
1714 old-fashioned way, which is to iterate over the registers and
1715 store them one by one. */
1717 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1719 struct gdbarch
*gdbarch
= regcache
->arch ();
1720 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1723 if (have_ptrace_getsetregs
)
1724 if (store_all_gp_regs (regcache
, tid
, regno
))
1727 /* If we hit this point, it doesn't really matter which
1728 architecture we are using. We just need to store the
1729 registers in the "old-fashioned way". */
1730 for (i
= 0; i
< ppc_num_gprs
; i
++)
1731 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1734 /* This function actually issues the request to ptrace, telling
1735 it to store all floating-point registers present in the specified
1738 If the ptrace request does not exist, this function returns 0
1739 and properly sets the have_ptrace_* flag. If the request fails,
1740 this function calls perror_with_name. Otherwise, if the request
1741 succeeds, then the regcache is stored and 1 is returned. */
1743 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1745 gdb_fpregset_t fpregs
;
1747 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1751 have_ptrace_getsetfpregs
= 0;
1754 perror_with_name (_("Couldn't get floating-point registers."));
1757 fill_fpregset (regcache
, &fpregs
, regno
);
1759 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1763 have_ptrace_getsetfpregs
= 0;
1766 perror_with_name (_("Couldn't set floating-point registers."));
1772 /* This is a wrapper for the store_all_fp_regs function. It is
1773 responsible for verifying if this target has the ptrace request
1774 that can be used to store all floating-point registers at one
1775 shot. If it doesn't, then we should store them using the
1776 old-fashioned way, which is to iterate over the registers and
1777 store them one by one. */
1779 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1781 struct gdbarch
*gdbarch
= regcache
->arch ();
1782 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1785 if (have_ptrace_getsetfpregs
)
1786 if (store_all_fp_regs (regcache
, tid
, regno
))
1789 /* If we hit this point, it doesn't really matter which
1790 architecture we are using. We just need to store the
1791 registers in the "old-fashioned way". */
1792 for (i
= 0; i
< ppc_num_fprs
; i
++)
1793 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1797 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1799 struct gdbarch
*gdbarch
= regcache
->arch ();
1800 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1802 store_gp_regs (regcache
, tid
, -1);
1803 if (tdep
->ppc_fp0_regnum
>= 0)
1804 store_fp_regs (regcache
, tid
, -1);
1805 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1806 if (tdep
->ppc_ps_regnum
!= -1)
1807 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1808 if (tdep
->ppc_cr_regnum
!= -1)
1809 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1810 if (tdep
->ppc_lr_regnum
!= -1)
1811 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1812 if (tdep
->ppc_ctr_regnum
!= -1)
1813 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1814 if (tdep
->ppc_xer_regnum
!= -1)
1815 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1816 if (tdep
->ppc_mq_regnum
!= -1)
1817 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1818 if (tdep
->ppc_fpscr_regnum
!= -1)
1819 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1820 if (ppc_linux_trap_reg_p (gdbarch
))
1822 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1823 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1825 if (have_ptrace_getvrregs
)
1826 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1827 store_altivec_registers (regcache
, tid
, -1);
1828 if (have_ptrace_getsetvsxregs
)
1829 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1830 store_vsx_registers (regcache
, tid
, -1);
1831 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1832 store_spe_register (regcache
, tid
, -1);
1833 if (tdep
->ppc_ppr_regnum
!= -1)
1834 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1835 PPC_LINUX_SIZEOF_PPRREGSET
,
1836 &ppc32_linux_pprregset
);
1837 if (tdep
->ppc_dscr_regnum
!= -1)
1838 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1839 PPC_LINUX_SIZEOF_DSCRREGSET
,
1840 &ppc32_linux_dscrregset
);
1841 if (tdep
->ppc_tar_regnum
!= -1)
1842 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1843 PPC_LINUX_SIZEOF_TARREGSET
,
1844 &ppc32_linux_tarregset
);
1846 if (tdep
->ppc_mmcr0_regnum
!= -1)
1847 store_regset (regcache
, tid
, -1, NT_PPC_PMU
,
1848 PPC_LINUX_SIZEOF_PMUREGSET
,
1849 &ppc32_linux_pmuregset
);
1851 if (tdep
->have_htm_spr
)
1852 store_regset (regcache
, tid
, -1, NT_PPC_TM_SPR
,
1853 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1854 &ppc32_linux_tm_sprregset
);
1856 /* Because the EBB and checkpointed HTM registers can be
1857 unavailable, attempts to store them here would cause this
1858 function to fail most of the time, so we ignore them. */
1862 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
1864 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1867 store_register (regcache
, tid
, regno
);
1869 store_ppc_registers (regcache
, tid
);
1872 /* Functions for transferring registers between a gregset_t or fpregset_t
1873 (see sys/ucontext.h) and gdb's regcache. The word size is that used
1874 by the ptrace interface, not the current program's ABI. Eg. if a
1875 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
1876 read or write 64-bit gregsets. This is to suit the host libthread_db. */
1879 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
1881 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
1883 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
1887 fill_gregset (const struct regcache
*regcache
,
1888 gdb_gregset_t
*gregsetp
, int regno
)
1890 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
1893 memset (gregsetp
, 0, sizeof (*gregsetp
));
1894 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
1898 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
1900 const struct regset
*regset
= ppc_linux_fpregset ();
1902 ppc_supply_fpregset (regset
, regcache
, -1,
1903 fpregsetp
, sizeof (*fpregsetp
));
1907 fill_fpregset (const struct regcache
*regcache
,
1908 gdb_fpregset_t
*fpregsetp
, int regno
)
1910 const struct regset
*regset
= ppc_linux_fpregset ();
1912 ppc_collect_fpregset (regset
, regcache
, regno
,
1913 fpregsetp
, sizeof (*fpregsetp
));
1917 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
1918 gdb_byte
*endptr
, CORE_ADDR
*typep
,
1921 int tid
= inferior_ptid
.lwp ();
1923 tid
= inferior_ptid
.pid ();
1925 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
1927 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
1928 gdb_byte
*ptr
= *readptr
;
1933 if (endptr
- ptr
< sizeof_auxv_field
* 2)
1936 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
1937 ptr
+= sizeof_auxv_field
;
1938 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
1939 ptr
+= sizeof_auxv_field
;
1945 const struct target_desc
*
1946 ppc_linux_nat_target::read_description ()
1948 int tid
= inferior_ptid
.lwp ();
1950 tid
= inferior_ptid
.pid ();
1952 if (have_ptrace_getsetevrregs
)
1954 struct gdb_evrregset_t evrregset
;
1956 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
1957 return tdesc_powerpc_e500l
;
1959 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
1960 Anything else needs to be reported. */
1961 else if (errno
!= EIO
)
1962 perror_with_name (_("Unable to fetch SPE registers"));
1965 struct ppc_linux_features features
= ppc_linux_no_features
;
1967 features
.wordsize
= ppc_linux_target_wordsize (tid
);
1969 CORE_ADDR hwcap
= linux_get_hwcap (current_top_target ());
1970 CORE_ADDR hwcap2
= linux_get_hwcap2 (current_top_target ());
1972 if (have_ptrace_getsetvsxregs
1973 && (hwcap
& PPC_FEATURE_HAS_VSX
))
1975 gdb_vsxregset_t vsxregset
;
1977 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
1978 features
.vsx
= true;
1980 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
1981 Anything else needs to be reported. */
1982 else if (errno
!= EIO
)
1983 perror_with_name (_("Unable to fetch VSX registers"));
1986 if (have_ptrace_getvrregs
1987 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
1989 gdb_vrregset_t vrregset
;
1991 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
1992 features
.altivec
= true;
1994 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
1995 Anything else needs to be reported. */
1996 else if (errno
!= EIO
)
1997 perror_with_name (_("Unable to fetch AltiVec registers"));
2000 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2002 if ((hwcap2
& PPC_FEATURE2_DSCR
)
2003 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
2004 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
2006 features
.ppr_dscr
= true;
2007 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
2008 && (hwcap2
& PPC_FEATURE2_TAR
)
2009 && (hwcap2
& PPC_FEATURE2_EBB
)
2010 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
)
2011 && check_regset (tid
, NT_PPC_EBB
, PPC_LINUX_SIZEOF_EBBREGSET
)
2012 && check_regset (tid
, NT_PPC_PMU
, PPC_LINUX_SIZEOF_PMUREGSET
))
2014 features
.isa207
= true;
2015 if ((hwcap2
& PPC_FEATURE2_HTM
)
2016 && check_regset (tid
, NT_PPC_TM_SPR
,
2017 PPC_LINUX_SIZEOF_TM_SPRREGSET
))
2018 features
.htm
= true;
2022 return ppc_linux_match_description (features
);
2025 /* Routines for installing hardware watchpoints and breakpoints. When
2026 GDB requests a hardware watchpoint or breakpoint to be installed, we
2027 register the request for the pid of inferior_ptid in a map with one
2028 entry per process. We then issue a stop request to all the threads of
2029 this process, and mark a per-thread flag indicating that their debug
2030 registers should be updated. Right before they are next resumed, we
2031 remove all previously installed debug registers and install all the
2032 ones GDB requested. We then update a map with one entry per thread
2033 that keeps track of what debug registers were last installed in each
2036 We use this second map to remove installed registers before installing
2037 the ones requested by GDB, and to copy the debug register state after
2038 a thread clones or forks, since depending on the kernel configuration,
2039 debug registers can be inherited. */
2041 /* Check if we support and have enough resources to install a hardware
2042 watchpoint or breakpoint. See the description in target.h. */
2045 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
,
2048 int total_hw_wp
, total_hw_bp
;
2050 m_dreg_interface
.detect (inferior_ptid
);
2052 if (m_dreg_interface
.unavailable_p ())
2055 if (m_dreg_interface
.hwdebug_p ())
2057 /* When PowerPC HWDEBUG ptrace interface is available, the number of
2058 available hardware watchpoints and breakpoints is stored at the
2059 hwdebug_info struct. */
2060 total_hw_bp
= m_dreg_interface
.hwdebug_info ().num_instruction_bps
;
2061 total_hw_wp
= m_dreg_interface
.hwdebug_info ().num_data_bps
;
2065 gdb_assert (m_dreg_interface
.debugreg_p ());
2067 /* With the DEBUGREG ptrace interface, we should consider having 1
2068 hardware watchpoint and no hardware breakpoints. */
2073 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
2074 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
2076 if (total_hw_wp
== 0)
2078 else if (cnt
+ ot
> total_hw_wp
)
2083 else if (type
== bp_hardware_breakpoint
)
2085 if (total_hw_bp
== 0)
2087 else if (cnt
> total_hw_bp
)
2096 /* Returns 1 if we can watch LEN bytes at address ADDR, 0 otherwise. */
2099 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
2101 /* Handle sub-8-byte quantities. */
2105 m_dreg_interface
.detect (inferior_ptid
);
2107 if (m_dreg_interface
.unavailable_p ())
2110 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
2111 restrictions for watchpoints in the processors. In that case, we use that
2112 information to determine the hardcoded watchable region for
2114 if (m_dreg_interface
.hwdebug_p ())
2116 const struct ppc_debug_info
&hwdebug_info
= (m_dreg_interface
2118 int region_size
= hwdebug_info
.data_bp_alignment
;
2119 int region_align
= region_size
;
2121 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
2122 watchpoints and can watch any access within an arbitrary memory
2123 region. This is useful to watch arrays and structs, for instance. It
2124 takes two hardware watchpoints though. */
2126 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
2127 && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2129 /* Check if the processor provides DAWR interface. */
2130 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
2132 /* DAWR interface allows to watch up to 512 byte wide ranges. */
2134 /* DAWR interface allows to watch up to 512 byte wide ranges which
2135 can't cross a 512 byte bondary on machines that doesn't have a
2136 second DAWR (P9 or less). */
2137 if (!(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_ARCH_31
))
2140 /* Server processors provide one hardware watchpoint and addr+len should
2141 fall in the watchable region provided by the ptrace interface. */
2143 && (addr
+ len
> (addr
& ~(region_align
- 1)) + region_size
))
2146 /* addr+len must fall in the 8 byte watchable region for DABR-based
2147 processors (i.e., server processors). Without the new PowerPC HWDEBUG
2148 ptrace interface, DAC-based processors (i.e., embedded processors) will
2149 use addresses aligned to 4-bytes due to the way the read/write flags are
2150 passed in the old ptrace interface. */
2153 gdb_assert (m_dreg_interface
.debugreg_p ());
2155 if (((linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2156 && (addr
+ len
) > (addr
& ~3) + 4)
2157 || (addr
+ len
) > (addr
& ~7) + 8)
2164 /* This function compares two ppc_hw_breakpoint structs
2168 ppc_linux_nat_target::hwdebug_point_cmp (const struct ppc_hw_breakpoint
&a
,
2169 const struct ppc_hw_breakpoint
&b
)
2171 return (a
.trigger_type
== b
.trigger_type
2172 && a
.addr_mode
== b
.addr_mode
2173 && a
.condition_mode
== b
.condition_mode
2175 && a
.addr2
== b
.addr2
2176 && a
.condition_value
== b
.condition_value
);
2179 /* Return the number of registers needed for a ranged breakpoint. */
2182 ppc_linux_nat_target::ranged_break_num_registers ()
2184 m_dreg_interface
.detect (inferior_ptid
);
2186 return ((m_dreg_interface
.hwdebug_p ()
2187 && (m_dreg_interface
.hwdebug_info ().features
2188 & PPC_DEBUG_FEATURE_INSN_BP_RANGE
))?
2192 /* Register the hardware breakpoint described by BP_TGT, to be inserted
2193 when the threads of inferior_ptid are resumed. Returns 0 for success,
2194 or -1 if the HWDEBUG interface that we need for hardware breakpoints
2195 is not available. */
2198 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
2199 struct bp_target_info
*bp_tgt
)
2201 struct ppc_hw_breakpoint p
;
2203 m_dreg_interface
.detect (inferior_ptid
);
2205 if (!m_dreg_interface
.hwdebug_p ())
2208 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2209 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
2210 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2211 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
2212 p
.condition_value
= 0;
2216 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2218 /* The breakpoint will trigger if the address of the instruction is
2219 within the defined range, as follows: p.addr <= address < p.addr2. */
2220 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
2224 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2228 register_hw_breakpoint (inferior_ptid
.pid (), p
);
2233 /* Clear a registration for the hardware breakpoint given by type BP_TGT.
2234 It will be removed from the threads of inferior_ptid when they are
2235 next resumed. Returns 0 for success, or -1 if the HWDEBUG interface
2236 that we need for hardware breakpoints is not available. */
2239 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
2240 struct bp_target_info
*bp_tgt
)
2242 struct ppc_hw_breakpoint p
;
2244 m_dreg_interface
.detect (inferior_ptid
);
2246 if (!m_dreg_interface
.hwdebug_p ())
2249 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2250 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
2251 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2252 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
2253 p
.condition_value
= 0;
2257 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2259 /* The breakpoint will trigger if the address of the instruction is within
2260 the defined range, as follows: p.addr <= address < p.addr2. */
2261 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
2265 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2269 clear_hw_breakpoint (inferior_ptid
.pid (), p
);
2274 /* Return the trigger value to set in a ppc_hw_breakpoint object for a
2275 given hardware watchpoint TYPE. We assume type is not hw_execute. */
2278 ppc_linux_nat_target::get_trigger_type (enum target_hw_bp_type type
)
2282 if (type
== hw_read
)
2283 t
= PPC_BREAKPOINT_TRIGGER_READ
;
2284 else if (type
== hw_write
)
2285 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
2287 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
2292 /* Register a new masked watchpoint at ADDR using the mask MASK, to be
2293 inserted when the threads of inferior_ptid are resumed. RW may be
2294 hw_read for a read watchpoint, hw_write for a write watchpoint or
2295 hw_access for an access watchpoint. */
2298 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2299 target_hw_bp_type rw
)
2301 struct ppc_hw_breakpoint p
;
2303 gdb_assert (m_dreg_interface
.hwdebug_p ());
2305 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2306 p
.trigger_type
= get_trigger_type (rw
);
2307 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2308 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2311 p
.condition_value
= 0;
2313 register_hw_breakpoint (inferior_ptid
.pid (), p
);
2318 /* Clear a registration for a masked watchpoint at ADDR with the mask
2319 MASK. It will be removed from the threads of inferior_ptid when they
2320 are next resumed. RW may be hw_read for a read watchpoint, hw_write
2321 for a write watchpoint or hw_access for an access watchpoint. */
2324 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2325 target_hw_bp_type rw
)
2327 struct ppc_hw_breakpoint p
;
2329 gdb_assert (m_dreg_interface
.hwdebug_p ());
2331 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2332 p
.trigger_type
= get_trigger_type (rw
);
2333 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2334 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2337 p
.condition_value
= 0;
2339 clear_hw_breakpoint (inferior_ptid
.pid (), p
);
2344 /* Check whether we have at least one free DVC register for the threads
2345 of the pid of inferior_ptid. */
2348 ppc_linux_nat_target::can_use_watchpoint_cond_accel (void)
2350 m_dreg_interface
.detect (inferior_ptid
);
2352 if (!m_dreg_interface
.hwdebug_p ())
2355 int cnt
= m_dreg_interface
.hwdebug_info ().num_condition_regs
;
2360 auto process_it
= m_process_info
.find (inferior_ptid
.pid ());
2362 /* No breakpoints or watchpoints have been requested for this process,
2363 we have at least one free DVC register. */
2364 if (process_it
== m_process_info
.end ())
2367 for (const ppc_hw_breakpoint
&bp
: process_it
->second
.requested_hw_bps
)
2368 if (bp
.condition_mode
!= PPC_BREAKPOINT_CONDITION_NONE
)
2377 /* Calculate the enable bits and the contents of the Data Value Compare
2378 debug register present in BookE processors.
2380 ADDR is the address to be watched, LEN is the length of watched data
2381 and DATA_VALUE is the value which will trigger the watchpoint.
2382 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
2383 CONDITION_VALUE will hold the value which should be put in the
2387 ppc_linux_nat_target::calculate_dvc (CORE_ADDR addr
, int len
,
2388 CORE_ADDR data_value
,
2389 uint32_t *condition_mode
,
2390 uint64_t *condition_value
)
2392 const struct ppc_debug_info
&hwdebug_info
= (m_dreg_interface
.
2395 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
2396 rightmost_enabled_byte
;
2397 CORE_ADDR addr_end_data
, addr_end_dvc
;
2399 /* The DVC register compares bytes within fixed-length windows which
2400 are word-aligned, with length equal to that of the DVC register.
2401 We need to calculate where our watch region is relative to that
2402 window and enable comparison of the bytes which fall within it. */
2404 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
2405 addr_end_data
= addr
+ len
;
2406 addr_end_dvc
= (addr
- align_offset
2407 + hwdebug_info
.sizeof_condition
);
2408 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
2409 addr_end_data
- addr_end_dvc
: 0;
2410 num_byte_enable
= len
- num_bytes_off_dvc
;
2411 /* Here, bytes are numbered from right to left. */
2412 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
2413 addr_end_dvc
- addr_end_data
: 0;
2415 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
2416 for (i
= 0; i
< num_byte_enable
; i
++)
2418 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
2420 /* Now we need to match the position within the DVC of the comparison
2421 value with where the watch region is relative to the window
2422 (i.e., the ALIGN_OFFSET). */
2424 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
2425 << rightmost_enabled_byte
* 8);
2428 /* Return the number of memory locations that need to be accessed to
2429 evaluate the expression which generated the given value chain.
2430 Returns -1 if there's any register access involved, or if there are
2431 other kinds of values which are not acceptable in a condition
2432 expression (e.g., lval_computed or lval_internalvar). */
2435 ppc_linux_nat_target::num_memory_accesses (const std::vector
<value_ref_ptr
>
2438 int found_memory_cnt
= 0;
2440 /* The idea here is that evaluating an expression generates a series
2441 of values, one holding the value of every subexpression. (The
2442 expression a*b+c has five subexpressions: a, b, a*b, c, and
2443 a*b+c.) GDB's values hold almost enough information to establish
2444 the criteria given above --- they identify memory lvalues,
2445 register lvalues, computed values, etcetera. So we can evaluate
2446 the expression, and then scan the chain of values that leaves
2447 behind to determine the memory locations involved in the evaluation
2450 However, I don't think that the values returned by inferior
2451 function calls are special in any way. So this function may not
2452 notice that an expression contains an inferior function call.
2455 for (const value_ref_ptr
&iter
: chain
)
2457 struct value
*v
= iter
.get ();
2459 /* Constants and values from the history are fine. */
2460 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
2462 else if (VALUE_LVAL (v
) == lval_memory
)
2464 /* A lazy memory lvalue is one that GDB never needed to fetch;
2465 we either just used its address (e.g., `a' in `a.b') or
2466 we never needed it at all (e.g., `a' in `a,b'). */
2467 if (!value_lazy (v
))
2470 /* Other kinds of values are not fine. */
2475 return found_memory_cnt
;
2478 /* Verifies whether the expression COND can be implemented using the
2479 DVC (Data Value Compare) register in BookE processors. The expression
2480 must test the watch value for equality with a constant expression.
2481 If the function returns 1, DATA_VALUE will contain the constant against
2482 which the watch value should be compared and LEN will contain the size
2486 ppc_linux_nat_target::check_condition (CORE_ADDR watch_addr
,
2487 struct expression
*cond
,
2488 CORE_ADDR
*data_value
, int *len
)
2490 int pc
= 1, num_accesses_left
, num_accesses_right
;
2491 struct value
*left_val
, *right_val
;
2492 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
2494 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
2497 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, false);
2498 num_accesses_left
= num_memory_accesses (left_chain
);
2500 if (left_val
== NULL
|| num_accesses_left
< 0)
2503 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, false);
2504 num_accesses_right
= num_memory_accesses (right_chain
);
2506 if (right_val
== NULL
|| num_accesses_right
< 0)
2509 if (num_accesses_left
== 1 && num_accesses_right
== 0
2510 && VALUE_LVAL (left_val
) == lval_memory
2511 && value_address (left_val
) == watch_addr
)
2513 *data_value
= value_as_long (right_val
);
2515 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
2516 the same type as the memory region referenced by LEFT_VAL. */
2517 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
2519 else if (num_accesses_left
== 0 && num_accesses_right
== 1
2520 && VALUE_LVAL (right_val
) == lval_memory
2521 && value_address (right_val
) == watch_addr
)
2523 *data_value
= value_as_long (left_val
);
2525 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
2526 the same type as the memory region referenced by RIGHT_VAL. */
2527 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
2535 /* Return true if the target is capable of using hardware to evaluate the
2536 condition expression, thus only triggering the watchpoint when it is
2540 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
,
2542 struct expression
*cond
)
2544 CORE_ADDR data_value
;
2546 m_dreg_interface
.detect (inferior_ptid
);
2548 return (m_dreg_interface
.hwdebug_p ()
2549 && (m_dreg_interface
.hwdebug_info ().num_condition_regs
> 0)
2550 && check_condition (addr
, cond
, &data_value
, &len
));
2553 /* Set up P with the parameters necessary to request a watchpoint covering
2554 LEN bytes starting at ADDR and if possible with condition expression COND
2555 evaluated by hardware. INSERT tells if we are creating a request for
2556 inserting or removing the watchpoint. */
2559 ppc_linux_nat_target::create_watchpoint_request (struct ppc_hw_breakpoint
*p
,
2560 CORE_ADDR addr
, int len
,
2561 enum target_hw_bp_type type
,
2562 struct expression
*cond
,
2565 const struct ppc_debug_info
&hwdebug_info
= (m_dreg_interface
2569 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2572 CORE_ADDR data_value
;
2574 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2575 : hwdebug_info
.num_condition_regs
> 0);
2576 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2578 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2579 &p
->condition_value
);
2582 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2583 p
->condition_value
= 0;
2586 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2591 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2592 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2593 p
->condition_value
= 0;
2595 /* The watchpoint will trigger if the address of the memory access is
2596 within the defined range, as follows: p->addr <= address < p->addr2.
2598 Note that the above sentence just documents how ptrace interprets
2599 its arguments; the watchpoint is set to watch the range defined by
2600 the user _inclusively_, as specified by the user interface. */
2601 p
->addr2
= (uint64_t) addr
+ len
;
2604 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2605 p
->trigger_type
= get_trigger_type (type
);
2606 p
->addr
= (uint64_t) addr
;
2609 /* Register a watchpoint, to be inserted when the threads of the group of
2610 inferior_ptid are next resumed. Returns 0 on success, and -1 if there
2611 is no ptrace interface available to install the watchpoint. */
2614 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2615 enum target_hw_bp_type type
,
2616 struct expression
*cond
)
2618 m_dreg_interface
.detect (inferior_ptid
);
2620 if (m_dreg_interface
.unavailable_p ())
2623 if (m_dreg_interface
.hwdebug_p ())
2625 struct ppc_hw_breakpoint p
;
2627 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2629 register_hw_breakpoint (inferior_ptid
.pid (), p
);
2633 gdb_assert (m_dreg_interface
.debugreg_p ());
2636 long read_mode
, write_mode
;
2638 if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2640 /* PowerPC 440 requires only the read/write flags to be passed
2647 /* PowerPC 970 and other DABR-based processors are required to pass
2648 the Breakpoint Translation bit together with the flags. */
2653 wp_value
= addr
& ~(read_mode
| write_mode
);
2657 /* Set read and translate bits. */
2658 wp_value
|= read_mode
;
2661 /* Set write and translate bits. */
2662 wp_value
|= write_mode
;
2665 /* Set read, write and translate bits. */
2666 wp_value
|= read_mode
| write_mode
;
2670 register_wp (inferior_ptid
.pid (), wp_value
);
2676 /* Clear a registration for a hardware watchpoint. It will be removed
2677 from the threads of the group of inferior_ptid when they are next
2681 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2682 enum target_hw_bp_type type
,
2683 struct expression
*cond
)
2685 gdb_assert (!m_dreg_interface
.unavailable_p ());
2687 if (m_dreg_interface
.hwdebug_p ())
2689 struct ppc_hw_breakpoint p
;
2691 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2693 clear_hw_breakpoint (inferior_ptid
.pid (), p
);
2697 gdb_assert (m_dreg_interface
.debugreg_p ());
2699 clear_wp (inferior_ptid
.pid ());
2705 /* Clean up the per-process info associated with PID. When using the
2706 HWDEBUG interface, we also erase the per-thread state of installed
2707 debug registers for all the threads that belong to the group of PID.
2709 Usually the thread state is cleaned up by low_delete_thread. We also
2710 do it here because low_new_thread is not called for the initial LWP,
2711 so low_delete_thread won't be able to clean up this state. */
2714 ppc_linux_nat_target::low_forget_process (pid_t pid
)
2716 if ((!m_dreg_interface
.detected_p ())
2717 || (m_dreg_interface
.unavailable_p ()))
2720 ptid_t
pid_ptid (pid
, 0, 0);
2722 m_process_info
.erase (pid
);
2724 if (m_dreg_interface
.hwdebug_p ())
2726 for (auto it
= m_installed_hw_bps
.begin ();
2727 it
!= m_installed_hw_bps
.end ();)
2729 if (it
->first
.matches (pid_ptid
))
2730 it
= m_installed_hw_bps
.erase (it
);
2737 /* Copy the per-process state associated with the pid of PARENT to the
2738 sate of CHILD_PID. GDB expects that a forked process will have the
2739 same hardware breakpoints and watchpoints as the parent.
2741 If we're using the HWDEBUG interface, also copy the thread debug
2742 register state for the ptid of PARENT to the state for CHILD_PID.
2744 Like for clone events, we assume the kernel will copy the debug
2745 registers from the parent thread to the child. The
2746 low_prepare_to_resume function is made to work even if it doesn't.
2748 We copy the thread state here and not in low_new_thread since we don't
2749 have the pid of the parent in low_new_thread. Even if we did,
2750 low_new_thread might not be called immediately after the fork event is
2751 detected. For instance, with the checkpointing system (see
2752 linux-fork.c), the thread won't be added until GDB decides to switch
2753 to a new checkpointed process. At that point, the debug register
2754 state of the parent thread is unlikely to correspond to the state it
2755 had at the point when it forked. */
2758 ppc_linux_nat_target::low_new_fork (struct lwp_info
*parent
,
2761 if ((!m_dreg_interface
.detected_p ())
2762 || (m_dreg_interface
.unavailable_p ()))
2765 auto process_it
= m_process_info
.find (parent
->ptid
.pid ());
2767 if (process_it
!= m_process_info
.end ())
2768 m_process_info
[child_pid
] = m_process_info
[parent
->ptid
.pid ()];
2770 if (m_dreg_interface
.hwdebug_p ())
2772 ptid_t
child_ptid (child_pid
, child_pid
, 0);
2774 copy_thread_dreg_state (parent
->ptid
, child_ptid
);
2778 /* Copy the thread debug register state from the PARENT thread to the the
2779 state for CHILD_LWP, if we're using the HWDEBUG interface. We assume
2780 the kernel copies the debug registers from one thread to another after
2781 a clone event. The low_prepare_to_resume function is made to work
2782 even if it doesn't. */
2785 ppc_linux_nat_target::low_new_clone (struct lwp_info
*parent
,
2788 if ((!m_dreg_interface
.detected_p ())
2789 || (m_dreg_interface
.unavailable_p ()))
2792 if (m_dreg_interface
.hwdebug_p ())
2794 ptid_t
child_ptid (parent
->ptid
.pid (), child_lwp
, 0);
2796 copy_thread_dreg_state (parent
->ptid
, child_ptid
);
2800 /* Initialize the arch-specific thread state for LP so that it contains
2801 the ptid for lp, so that we can use it in low_delete_thread. Mark the
2802 new thread LP as stale so that we update its debug registers before
2803 resuming it. This is not called for the initial thread. */
2806 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2808 init_arch_lwp_info (lp
);
2810 mark_thread_stale (lp
);
2813 /* Delete the per-thread debug register stale flag. */
2816 ppc_linux_nat_target::low_delete_thread (struct arch_lwp_info
2819 if (lp_arch_info
!= NULL
)
2821 if (m_dreg_interface
.detected_p ()
2822 && m_dreg_interface
.hwdebug_p ())
2823 m_installed_hw_bps
.erase (lp_arch_info
->lwp_ptid
);
2825 xfree (lp_arch_info
);
2829 /* Install or delete debug registers in thread LP so that it matches what
2830 GDB requested before it is resumed. */
2833 ppc_linux_nat_target::low_prepare_to_resume (struct lwp_info
*lp
)
2835 if ((!m_dreg_interface
.detected_p ())
2836 || (m_dreg_interface
.unavailable_p ()))
2839 /* We have to re-install or clear the debug registers if we set the
2842 In addition, some kernels configurations can disable a hardware
2843 watchpoint after it is hit. Usually, GDB will remove and re-install
2844 a hardware watchpoint when the thread stops if "breakpoint
2845 always-inserted" is off, or to single-step a watchpoint. But so
2846 that we don't rely on this behavior, if we stop due to a hardware
2847 breakpoint or watchpoint, we also refresh our debug registers. */
2849 arch_lwp_info
*lp_arch_info
= get_arch_lwp_info (lp
);
2851 bool stale_dregs
= (lp
->stop_reason
== TARGET_STOPPED_BY_WATCHPOINT
2852 || lp
->stop_reason
== TARGET_STOPPED_BY_HW_BREAKPOINT
2853 || lp_arch_info
->debug_regs_stale
);
2858 gdb_assert (lp
->ptid
.lwp_p ());
2860 auto process_it
= m_process_info
.find (lp
->ptid
.pid ());
2862 if (m_dreg_interface
.hwdebug_p ())
2864 /* First, delete any hardware watchpoint or breakpoint installed in
2865 the inferior and update the thread state. */
2866 auto installed_it
= m_installed_hw_bps
.find (lp
->ptid
);
2868 if (installed_it
!= m_installed_hw_bps
.end ())
2870 auto &bp_list
= installed_it
->second
;
2872 for (auto bp_it
= bp_list
.begin (); bp_it
!= bp_list
.end ();)
2874 /* We ignore ENOENT to account for various possible kernel
2875 behaviors, e.g. the kernel might or might not copy debug
2876 registers across forks and clones, and we always copy
2877 the debug register state when fork and clone events are
2879 if (ptrace (PPC_PTRACE_DELHWDEBUG
, lp
->ptid
.lwp (), 0,
2881 if (errno
!= ENOENT
)
2882 perror_with_name (_("Error deleting hardware "
2883 "breakpoint or watchpoint"));
2885 /* We erase the entries one at a time after successfuly
2886 removing the corresponding slot form the thread so that
2887 if we throw an exception above in a future iteration the
2888 map remains consistent. */
2889 bp_it
= bp_list
.erase (bp_it
);
2892 gdb_assert (bp_list
.empty ());
2895 /* Now we install all the requested hardware breakpoints and
2896 watchpoints and update the thread state. */
2898 if (process_it
!= m_process_info
.end ())
2900 auto &bp_list
= m_installed_hw_bps
[lp
->ptid
];
2902 for (ppc_hw_breakpoint bp
2903 : process_it
->second
.requested_hw_bps
)
2905 long slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, lp
->ptid
.lwp (),
2909 perror_with_name (_("Error setting hardware "
2910 "breakpoint or watchpoint"));
2912 /* Keep track of which slots we installed in this
2914 bp_list
.emplace (bp_list
.begin (), slot
, bp
);
2920 gdb_assert (m_dreg_interface
.debugreg_p ());
2922 /* Passing 0 to PTRACE_SET_DEBUGREG will clear the watchpoint. We
2923 always clear the watchpoint instead of just overwriting it, in
2924 case there is a request for a new watchpoint, because on some
2925 older kernel versions and configurations simply overwriting the
2926 watchpoint after it was hit would not re-enable it. */
2927 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0, 0) < 0)
2928 perror_with_name (_("Error clearing hardware watchpoint"));
2930 /* GDB requested a watchpoint to be installed. */
2931 if (process_it
!= m_process_info
.end ()
2932 && process_it
->second
.requested_wp_val
.has_value ())
2934 long wp
= *(process_it
->second
.requested_wp_val
);
2936 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0, wp
) < 0)
2937 perror_with_name (_("Error setting hardware watchpoint"));
2941 lp_arch_info
->debug_regs_stale
= false;
2944 /* Return true if INFERIOR_PTID is known to have been stopped by a
2945 hardware watchpoint, false otherwise. If true is returned, write the
2946 address that the kernel reported as causing the SIGTRAP in ADDR_P. */
2949 ppc_linux_nat_target::low_stopped_data_address (CORE_ADDR
*addr_p
)
2953 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2956 if (siginfo
.si_signo
!= SIGTRAP
2957 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2960 gdb_assert (!m_dreg_interface
.unavailable_p ());
2962 /* Check if this signal corresponds to a hardware breakpoint. We only
2963 need to check this if we're using the HWDEBUG interface, since the
2964 DEBUGREG interface only allows setting one hardware watchpoint. */
2965 if (m_dreg_interface
.hwdebug_p ())
2967 /* The index (or slot) of the *point is passed in the si_errno
2968 field. Currently, this is only the case if the kernel was
2969 configured with CONFIG_PPC_ADV_DEBUG_REGS. If not, we assume
2970 the kernel will set si_errno to a value that doesn't correspond
2971 to any real slot. */
2972 int slot
= siginfo
.si_errno
;
2974 auto installed_it
= m_installed_hw_bps
.find (inferior_ptid
);
2976 /* We must have installed slots for the thread if it got a
2977 TRAP_HWBKPT signal. */
2978 gdb_assert (installed_it
!= m_installed_hw_bps
.end ());
2980 for (const auto & slot_bp_pair
: installed_it
->second
)
2981 if (slot_bp_pair
.first
== slot
2982 && (slot_bp_pair
.second
.trigger_type
2983 == PPC_BREAKPOINT_TRIGGER_EXECUTE
))
2987 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2991 /* Return true if INFERIOR_PTID is known to have been stopped by a
2992 hardware watchpoint, false otherwise. */
2995 ppc_linux_nat_target::low_stopped_by_watchpoint ()
2998 return low_stopped_data_address (&addr
);
3002 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
3006 gdb_assert (!m_dreg_interface
.unavailable_p ());
3010 if (m_dreg_interface
.hwdebug_p ()
3011 && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
3012 return start
<= addr
&& start
+ length
>= addr
;
3013 else if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
3020 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
3021 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
3024 /* Return the number of registers needed for a masked hardware watchpoint. */
3027 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
,
3030 m_dreg_interface
.detect (inferior_ptid
);
3032 if (!m_dreg_interface
.hwdebug_p ()
3033 || (m_dreg_interface
.hwdebug_info ().features
3034 & PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
3036 else if ((mask
& 0xC0000000) != 0xC0000000)
3038 warning (_("The given mask covers kernel address space "
3039 "and cannot be used.\n"));
3047 /* Copy the per-thread debug register state, if any, from thread
3048 PARENT_PTID to thread CHILD_PTID, if the debug register being used is
3052 ppc_linux_nat_target::copy_thread_dreg_state (const ptid_t
&parent_ptid
,
3053 const ptid_t
&child_ptid
)
3055 gdb_assert (m_dreg_interface
.hwdebug_p ());
3057 auto installed_it
= m_installed_hw_bps
.find (parent_ptid
);
3059 if (installed_it
!= m_installed_hw_bps
.end ())
3060 m_installed_hw_bps
[child_ptid
] = m_installed_hw_bps
[parent_ptid
];
3063 /* Mark the debug register stale flag for the new thread, if we have
3064 already detected which debug register interface we use. */
3067 ppc_linux_nat_target::mark_thread_stale (struct lwp_info
*lp
)
3069 if ((!m_dreg_interface
.detected_p ())
3070 || (m_dreg_interface
.unavailable_p ()))
3073 arch_lwp_info
*lp_arch_info
= get_arch_lwp_info (lp
);
3075 lp_arch_info
->debug_regs_stale
= true;
3078 /* Mark all the threads of the group of PID as stale with respect to
3079 debug registers and issue a stop request to each such thread that
3080 isn't already stopped. */
3083 ppc_linux_nat_target::mark_debug_registers_changed (pid_t pid
)
3085 /* We do this in two passes to make sure all threads are marked even if
3086 we get an exception when stopping one of them. */
3088 iterate_over_lwps (ptid_t (pid
),
3089 [this] (struct lwp_info
*lp
) -> int {
3090 this->mark_thread_stale (lp
);
3094 iterate_over_lwps (ptid_t (pid
),
3095 [] (struct lwp_info
*lp
) -> int {
3096 if (!lwp_is_stopped (lp
))
3097 linux_stop_lwp (lp
);
3102 /* Register a hardware breakpoint or watchpoint BP for the pid PID, then
3103 mark the stale flag for all threads of the group of PID, and issue a
3104 stop request for them. The breakpoint or watchpoint will be installed
3105 the next time each thread is resumed. Should only be used if the
3106 debug register interface is HWDEBUG. */
3109 ppc_linux_nat_target::register_hw_breakpoint (pid_t pid
,
3111 ppc_hw_breakpoint
&bp
)
3113 gdb_assert (m_dreg_interface
.hwdebug_p ());
3115 m_process_info
[pid
].requested_hw_bps
.push_back (bp
);
3117 mark_debug_registers_changed (pid
);
3120 /* Clear a registration for a hardware breakpoint or watchpoint BP for
3121 the pid PID, then mark the stale flag for all threads of the group of
3122 PID, and issue a stop request for them. The breakpoint or watchpoint
3123 will be removed the next time each thread is resumed. Should only be
3124 used if the debug register interface is HWDEBUG. */
3127 ppc_linux_nat_target::clear_hw_breakpoint (pid_t pid
,
3128 const struct ppc_hw_breakpoint
&bp
)
3130 gdb_assert (m_dreg_interface
.hwdebug_p ());
3132 auto process_it
= m_process_info
.find (pid
);
3134 gdb_assert (process_it
!= m_process_info
.end ());
3136 auto bp_it
= std::find_if (process_it
->second
.requested_hw_bps
.begin (),
3137 process_it
->second
.requested_hw_bps
.end (),
3139 (const struct ppc_hw_breakpoint
&curr
)
3140 { return hwdebug_point_cmp (bp
, curr
); }
3143 /* If GDB is removing a watchpoint, it must have been inserted. */
3144 gdb_assert (bp_it
!= process_it
->second
.requested_hw_bps
.end ());
3146 process_it
->second
.requested_hw_bps
.erase (bp_it
);
3148 mark_debug_registers_changed (pid
);
3151 /* Register the hardware watchpoint value WP_VALUE for the pid PID,
3152 then mark the stale flag for all threads of the group of PID, and
3153 issue a stop request for them. The breakpoint or watchpoint will be
3154 installed the next time each thread is resumed. Should only be used
3155 if the debug register interface is DEBUGREG. */
3158 ppc_linux_nat_target::register_wp (pid_t pid
, long wp_value
)
3160 gdb_assert (m_dreg_interface
.debugreg_p ());
3162 /* Our other functions should have told GDB that we only have one
3163 hardware watchpoint with this interface. */
3164 gdb_assert (!m_process_info
[pid
].requested_wp_val
.has_value ());
3166 m_process_info
[pid
].requested_wp_val
.emplace (wp_value
);
3168 mark_debug_registers_changed (pid
);
3171 /* Clear the hardware watchpoint registration for the pid PID, then mark
3172 the stale flag for all threads of the group of PID, and issue a stop
3173 request for them. The breakpoint or watchpoint will be installed the
3174 next time each thread is resumed. Should only be used if the debug
3175 register interface is DEBUGREG. */
3178 ppc_linux_nat_target::clear_wp (pid_t pid
)
3180 gdb_assert (m_dreg_interface
.debugreg_p ());
3182 auto process_it
= m_process_info
.find (pid
);
3184 gdb_assert (process_it
!= m_process_info
.end ());
3185 gdb_assert (process_it
->second
.requested_wp_val
.has_value ());
3187 process_it
->second
.requested_wp_val
.reset ();
3189 mark_debug_registers_changed (pid
);
3192 /* Initialize the arch-specific thread state for LWP, if it not already
3196 ppc_linux_nat_target::init_arch_lwp_info (struct lwp_info
*lp
)
3198 if (lwp_arch_private_info (lp
) == NULL
)
3200 lwp_set_arch_private_info (lp
, XCNEW (struct arch_lwp_info
));
3201 lwp_arch_private_info (lp
)->debug_regs_stale
= false;
3202 lwp_arch_private_info (lp
)->lwp_ptid
= lp
->ptid
;
3206 /* Get the arch-specific thread state for LWP, creating it if
3210 ppc_linux_nat_target::get_arch_lwp_info (struct lwp_info
*lp
)
3212 init_arch_lwp_info (lp
);
3214 return lwp_arch_private_info (lp
);
3217 void _initialize_ppc_linux_nat ();
3219 _initialize_ppc_linux_nat ()
3221 linux_target
= &the_ppc_linux_nat_target
;
3223 /* Register the target. */
3224 add_inf_child_target (linux_target
);