1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002, 2003,
4 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "gdb_string.h"
27 #include "gdb_assert.h"
29 #include "linux-nat.h"
32 #include <sys/types.h>
33 #include <sys/param.h>
36 #include <sys/ioctl.h>
39 #include <sys/procfs.h>
40 #include <sys/ptrace.h>
42 /* Prototypes for supply_gregset etc. */
46 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
47 configure time check. Some older glibc's (for instance 2.2.1)
48 don't have a specific powerpc version of ptrace.h, and fall back on
49 a generic one. In such cases, sys/ptrace.h defines
50 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
51 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
52 PTRACE_SETVRREGS to be. This also makes a configury check pretty
55 /* These definitions should really come from the glibc header files,
56 but Glibc doesn't know about the vrregs yet. */
57 #ifndef PTRACE_GETVRREGS
58 #define PTRACE_GETVRREGS 18
59 #define PTRACE_SETVRREGS 19
63 /* Similarly for the ptrace requests for getting / setting the SPE
64 registers (ev0 -- ev31, acc, and spefscr). See the description of
65 gdb_evrregset_t for details. */
66 #ifndef PTRACE_GETEVRREGS
67 #define PTRACE_GETEVRREGS 20
68 #define PTRACE_SETEVRREGS 21
71 /* Similarly for the hardware watchpoint support. */
72 #ifndef PTRACE_GET_DEBUGREG
73 #define PTRACE_GET_DEBUGREG 25
75 #ifndef PTRACE_SET_DEBUGREG
76 #define PTRACE_SET_DEBUGREG 26
78 #ifndef PTRACE_GETSIGINFO
79 #define PTRACE_GETSIGINFO 0x4202
82 /* This oddity is because the Linux kernel defines elf_vrregset_t as
83 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
84 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
85 the vrsave as an extra 4 bytes at the end. I opted for creating a
86 flat array of chars, so that it is easier to manipulate for gdb.
88 There are 32 vector registers 16 bytes longs, plus a VSCR register
89 which is only 4 bytes long, but is fetched as a 16 bytes
90 quantity. Up to here we have the elf_vrregset_t structure.
91 Appended to this there is space for the VRSAVE register: 4 bytes.
92 Even though this vrsave register is not included in the regset
93 typedef, it is handled by the ptrace requests.
95 Note that GNU/Linux doesn't support little endian PPC hardware,
96 therefore the offset at which the real value of the VSCR register
97 is located will be always 12 bytes.
99 The layout is like this (where x is the actual value of the vscr reg): */
103 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
104 <-------> <-------><-------><->
109 #define SIZEOF_VRREGS 33*16+4
111 typedef char gdb_vrregset_t
[SIZEOF_VRREGS
];
114 /* On PPC processors that support the the Signal Processing Extension
115 (SPE) APU, the general-purpose registers are 64 bits long.
116 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
117 ptrace calls only access the lower half of each register, to allow
118 them to behave the same way they do on non-SPE systems. There's a
119 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
120 read and write the top halves of all the general-purpose registers
121 at once, along with some SPE-specific registers.
123 GDB itself continues to claim the general-purpose registers are 32
124 bits long. It has unnamed raw registers that hold the upper halves
125 of the gprs, and the the full 64-bit SIMD views of the registers,
126 'ev0' -- 'ev31', are pseudo-registers that splice the top and
127 bottom halves together.
129 This is the structure filled in by PTRACE_GETEVRREGS and written to
130 the inferior's registers by PTRACE_SETEVRREGS. */
131 struct gdb_evrregset_t
133 unsigned long evr
[32];
134 unsigned long long acc
;
135 unsigned long spefscr
;
139 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
140 PTRACE_SETVRREGS requests, for reading and writing the Altivec
141 registers. Zero if we've tried one of them and gotten an
143 int have_ptrace_getvrregs
= 1;
145 static CORE_ADDR last_stopped_data_address
= 0;
147 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
148 PTRACE_SETEVRREGS requests, for reading and writing the SPE
149 registers. Zero if we've tried one of them and gotten an
151 int have_ptrace_getsetevrregs
= 1;
154 /* registers layout, as presented by the ptrace interface:
155 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
156 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
157 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
158 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
159 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
160 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
161 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
162 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
163 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
167 ppc_register_u_addr (int regno
)
170 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
171 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
172 interface, and not the wordsize of the program's ABI. */
173 int wordsize
= sizeof (long);
175 /* General purpose registers occupy 1 slot each in the buffer */
176 if (regno
>= tdep
->ppc_gp0_regnum
177 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
178 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
180 /* Floating point regs: eight bytes each in both 32- and 64-bit
181 ptrace interfaces. Thus, two slots each in 32-bit interface, one
182 slot each in 64-bit interface. */
183 if (tdep
->ppc_fp0_regnum
>= 0
184 && regno
>= tdep
->ppc_fp0_regnum
185 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
186 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
188 /* UISA special purpose registers: 1 slot each */
189 if (regno
== gdbarch_pc_regnum (current_gdbarch
))
190 u_addr
= PT_NIP
* wordsize
;
191 if (regno
== tdep
->ppc_lr_regnum
)
192 u_addr
= PT_LNK
* wordsize
;
193 if (regno
== tdep
->ppc_cr_regnum
)
194 u_addr
= PT_CCR
* wordsize
;
195 if (regno
== tdep
->ppc_xer_regnum
)
196 u_addr
= PT_XER
* wordsize
;
197 if (regno
== tdep
->ppc_ctr_regnum
)
198 u_addr
= PT_CTR
* wordsize
;
200 if (regno
== tdep
->ppc_mq_regnum
)
201 u_addr
= PT_MQ
* wordsize
;
203 if (regno
== tdep
->ppc_ps_regnum
)
204 u_addr
= PT_MSR
* wordsize
;
205 if (tdep
->ppc_fpscr_regnum
>= 0
206 && regno
== tdep
->ppc_fpscr_regnum
)
208 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
209 kernel headers incorrectly contained the 32-bit definition of
210 PT_FPSCR. For the 32-bit definition, floating-point
211 registers occupy two 32-bit "slots", and the FPSCR lives in
212 the secondhalf of such a slot-pair (hence +1). For 64-bit,
213 the FPSCR instead occupies the full 64-bit 2-word-slot and
214 hence no adjustment is necessary. Hack around this. */
215 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
216 u_addr
= (48 + 32) * wordsize
;
218 u_addr
= PT_FPSCR
* wordsize
;
223 /* The Linux kernel ptrace interface for AltiVec registers uses the
224 registers set mechanism, as opposed to the interface for all the
225 other registers, that stores/fetches each register individually. */
227 fetch_altivec_register (struct regcache
*regcache
, int tid
, int regno
)
232 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
233 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
235 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
240 have_ptrace_getvrregs
= 0;
243 perror_with_name (_("Unable to fetch AltiVec register"));
246 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
247 long on the hardware. We deal only with the lower 4 bytes of the
248 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
249 there is no need to define an offset for it. */
250 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
251 offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
253 regcache_raw_supply (regcache
, regno
,
254 regs
+ (regno
- tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
257 /* Fetch the top 32 bits of TID's general-purpose registers and the
258 SPE-specific registers, and place the results in EVRREGSET. If we
259 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
262 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
263 PTRACE_SETEVRREGS requests are supported is isolated here, and in
264 set_spe_registers. */
266 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
268 if (have_ptrace_getsetevrregs
)
270 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
274 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
275 we just return zeros. */
277 have_ptrace_getsetevrregs
= 0;
279 /* Anything else needs to be reported. */
280 perror_with_name (_("Unable to fetch SPE registers"));
284 memset (evrregset
, 0, sizeof (*evrregset
));
287 /* Supply values from TID for SPE-specific raw registers: the upper
288 halves of the GPRs, the accumulator, and the spefscr. REGNO must
289 be the number of an upper half register, acc, spefscr, or -1 to
290 supply the values of all registers. */
292 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
294 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
295 struct gdb_evrregset_t evrregs
;
297 gdb_assert (sizeof (evrregs
.evr
[0])
298 == register_size (current_gdbarch
, tdep
->ppc_ev0_upper_regnum
));
299 gdb_assert (sizeof (evrregs
.acc
)
300 == register_size (current_gdbarch
, tdep
->ppc_acc_regnum
));
301 gdb_assert (sizeof (evrregs
.spefscr
)
302 == register_size (current_gdbarch
, tdep
->ppc_spefscr_regnum
));
304 get_spe_registers (tid
, &evrregs
);
310 for (i
= 0; i
< ppc_num_gprs
; i
++)
311 regcache_raw_supply (regcache
, tdep
->ppc_ev0_upper_regnum
+ i
,
314 else if (tdep
->ppc_ev0_upper_regnum
<= regno
315 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
316 regcache_raw_supply (regcache
, regno
,
317 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
320 || regno
== tdep
->ppc_acc_regnum
)
321 regcache_raw_supply (regcache
, tdep
->ppc_acc_regnum
, &evrregs
.acc
);
324 || regno
== tdep
->ppc_spefscr_regnum
)
325 regcache_raw_supply (regcache
, tdep
->ppc_spefscr_regnum
,
330 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
333 /* This isn't really an address. But ptrace thinks of it as one. */
334 CORE_ADDR regaddr
= ppc_register_u_addr (regno
);
335 int bytes_transferred
;
336 unsigned int offset
; /* Offset of registers within the u area. */
337 char buf
[MAX_REGISTER_SIZE
];
339 if (altivec_register_p (regno
))
341 /* If this is the first time through, or if it is not the first
342 time through, and we have comfirmed that there is kernel
343 support for such a ptrace request, then go and fetch the
345 if (have_ptrace_getvrregs
)
347 fetch_altivec_register (regcache
, tid
, regno
);
350 /* If we have discovered that there is no ptrace support for
351 AltiVec registers, fall through and return zeroes, because
352 regaddr will be -1 in this case. */
354 else if (spe_register_p (regno
))
356 fetch_spe_register (regcache
, tid
, regno
);
362 memset (buf
, '\0', register_size (current_gdbarch
, regno
)); /* Supply zeroes */
363 regcache_raw_supply (regcache
, regno
, buf
);
367 /* Read the raw register using sizeof(long) sized chunks. On a
368 32-bit platform, 64-bit floating-point registers will require two
370 for (bytes_transferred
= 0;
371 bytes_transferred
< register_size (current_gdbarch
, regno
);
372 bytes_transferred
+= sizeof (long))
375 *(long *) &buf
[bytes_transferred
]
376 = ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
377 regaddr
+= sizeof (long);
381 sprintf (message
, "reading register %s (#%d)",
382 gdbarch_register_name (current_gdbarch
, regno
), regno
);
383 perror_with_name (message
);
387 /* Now supply the register. Keep in mind that the regcache's idea
388 of the register's size may not be a multiple of sizeof
390 if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_LITTLE
)
392 /* Little-endian values are always found at the left end of the
393 bytes transferred. */
394 regcache_raw_supply (regcache
, regno
, buf
);
396 else if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
)
398 /* Big-endian values are found at the right end of the bytes
400 size_t padding
= (bytes_transferred
401 - register_size (current_gdbarch
, regno
));
402 regcache_raw_supply (regcache
, regno
, buf
+ padding
);
405 internal_error (__FILE__
, __LINE__
,
406 _("fetch_register: unexpected byte order: %d"),
407 gdbarch_byte_order (current_gdbarch
));
411 supply_vrregset (struct regcache
*regcache
, gdb_vrregset_t
*vrregsetp
)
414 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
415 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
416 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
417 int offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
419 for (i
= 0; i
< num_of_vrregs
; i
++)
421 /* The last 2 registers of this set are only 32 bit long, not
422 128. However an offset is necessary only for VSCR because it
423 occupies a whole vector, while VRSAVE occupies a full 4 bytes
425 if (i
== (num_of_vrregs
- 2))
426 regcache_raw_supply (regcache
, tdep
->ppc_vr0_regnum
+ i
,
427 *vrregsetp
+ i
* vrregsize
+ offset
);
429 regcache_raw_supply (regcache
, tdep
->ppc_vr0_regnum
+ i
,
430 *vrregsetp
+ i
* vrregsize
);
435 fetch_altivec_registers (struct regcache
*regcache
, int tid
)
440 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
445 have_ptrace_getvrregs
= 0;
448 perror_with_name (_("Unable to fetch AltiVec registers"));
450 supply_vrregset (regcache
, ®s
);
454 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
457 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
459 for (i
= 0; i
< ppc_num_gprs
; i
++)
460 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
461 if (tdep
->ppc_fp0_regnum
>= 0)
462 for (i
= 0; i
< ppc_num_fprs
; i
++)
463 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
464 fetch_register (regcache
, tid
, gdbarch_pc_regnum (current_gdbarch
));
465 if (tdep
->ppc_ps_regnum
!= -1)
466 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
467 if (tdep
->ppc_cr_regnum
!= -1)
468 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
469 if (tdep
->ppc_lr_regnum
!= -1)
470 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
471 if (tdep
->ppc_ctr_regnum
!= -1)
472 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
473 if (tdep
->ppc_xer_regnum
!= -1)
474 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
475 if (tdep
->ppc_mq_regnum
!= -1)
476 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
477 if (tdep
->ppc_fpscr_regnum
!= -1)
478 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
479 if (have_ptrace_getvrregs
)
480 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
481 fetch_altivec_registers (regcache
, tid
);
482 if (tdep
->ppc_ev0_upper_regnum
>= 0)
483 fetch_spe_register (regcache
, tid
, -1);
486 /* Fetch registers from the child process. Fetch all registers if
487 regno == -1, otherwise fetch all general registers or all floating
488 point registers depending upon the value of regno. */
490 ppc_linux_fetch_inferior_registers (struct regcache
*regcache
, int regno
)
492 /* Overload thread id onto process id */
493 int tid
= TIDGET (inferior_ptid
);
495 /* No thread id, just use process id */
497 tid
= PIDGET (inferior_ptid
);
500 fetch_ppc_registers (regcache
, tid
);
502 fetch_register (regcache
, tid
, regno
);
505 /* Store one register. */
507 store_altivec_register (const struct regcache
*regcache
, int tid
, int regno
)
512 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
513 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
515 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
520 have_ptrace_getvrregs
= 0;
523 perror_with_name (_("Unable to fetch AltiVec register"));
526 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
527 long on the hardware. */
528 if (regno
== (tdep
->ppc_vrsave_regnum
- 1))
529 offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
531 regcache_raw_collect (regcache
, regno
,
532 regs
+ (regno
- tdep
->ppc_vr0_regnum
) * vrregsize
+ offset
);
534 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
536 perror_with_name (_("Unable to store AltiVec register"));
539 /* Assuming TID referrs to an SPE process, set the top halves of TID's
540 general-purpose registers and its SPE-specific registers to the
541 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
544 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
545 PTRACE_SETEVRREGS requests are supported is isolated here, and in
546 get_spe_registers. */
548 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
550 if (have_ptrace_getsetevrregs
)
552 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
556 /* EIO means that the PTRACE_SETEVRREGS request isn't
557 supported; we fail silently, and don't try the call
560 have_ptrace_getsetevrregs
= 0;
562 /* Anything else needs to be reported. */
563 perror_with_name (_("Unable to set SPE registers"));
568 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
569 If REGNO is -1, write the values of all the SPE-specific
572 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
574 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
575 struct gdb_evrregset_t evrregs
;
577 gdb_assert (sizeof (evrregs
.evr
[0])
578 == register_size (current_gdbarch
, tdep
->ppc_ev0_upper_regnum
));
579 gdb_assert (sizeof (evrregs
.acc
)
580 == register_size (current_gdbarch
, tdep
->ppc_acc_regnum
));
581 gdb_assert (sizeof (evrregs
.spefscr
)
582 == register_size (current_gdbarch
, tdep
->ppc_spefscr_regnum
));
585 /* Since we're going to write out every register, the code below
586 should store to every field of evrregs; if that doesn't happen,
587 make it obvious by initializing it with suspicious values. */
588 memset (&evrregs
, 42, sizeof (evrregs
));
590 /* We can only read and write the entire EVR register set at a
591 time, so to write just a single register, we do a
592 read-modify-write maneuver. */
593 get_spe_registers (tid
, &evrregs
);
599 for (i
= 0; i
< ppc_num_gprs
; i
++)
600 regcache_raw_collect (regcache
,
601 tdep
->ppc_ev0_upper_regnum
+ i
,
604 else if (tdep
->ppc_ev0_upper_regnum
<= regno
605 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
606 regcache_raw_collect (regcache
, regno
,
607 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
610 || regno
== tdep
->ppc_acc_regnum
)
611 regcache_raw_collect (regcache
,
612 tdep
->ppc_acc_regnum
,
616 || regno
== tdep
->ppc_spefscr_regnum
)
617 regcache_raw_collect (regcache
,
618 tdep
->ppc_spefscr_regnum
,
621 /* Write back the modified register set. */
622 set_spe_registers (tid
, &evrregs
);
626 store_register (const struct regcache
*regcache
, int tid
, int regno
)
628 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
629 /* This isn't really an address. But ptrace thinks of it as one. */
630 CORE_ADDR regaddr
= ppc_register_u_addr (regno
);
632 size_t bytes_to_transfer
;
633 char buf
[MAX_REGISTER_SIZE
];
635 if (altivec_register_p (regno
))
637 store_altivec_register (regcache
, tid
, regno
);
640 else if (spe_register_p (regno
))
642 store_spe_register (regcache
, tid
, regno
);
649 /* First collect the register. Keep in mind that the regcache's
650 idea of the register's size may not be a multiple of sizeof
652 memset (buf
, 0, sizeof buf
);
653 bytes_to_transfer
= align_up (register_size (current_gdbarch
, regno
),
655 if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_LITTLE
)
657 /* Little-endian values always sit at the left end of the buffer. */
658 regcache_raw_collect (regcache
, regno
, buf
);
660 else if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
)
662 /* Big-endian values sit at the right end of the buffer. */
663 size_t padding
= (bytes_to_transfer
664 - register_size (current_gdbarch
, regno
));
665 regcache_raw_collect (regcache
, regno
, buf
+ padding
);
668 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
671 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
,
673 regaddr
+= sizeof (long);
676 && regno
== tdep
->ppc_fpscr_regnum
)
678 /* Some older kernel versions don't allow fpscr to be written. */
685 sprintf (message
, "writing register %s (#%d)",
686 gdbarch_register_name (current_gdbarch
, regno
), regno
);
687 perror_with_name (message
);
693 fill_vrregset (const struct regcache
*regcache
, gdb_vrregset_t
*vrregsetp
)
696 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
697 int num_of_vrregs
= tdep
->ppc_vrsave_regnum
- tdep
->ppc_vr0_regnum
+ 1;
698 int vrregsize
= register_size (current_gdbarch
, tdep
->ppc_vr0_regnum
);
699 int offset
= vrregsize
- register_size (current_gdbarch
, tdep
->ppc_vrsave_regnum
);
701 for (i
= 0; i
< num_of_vrregs
; i
++)
703 /* The last 2 registers of this set are only 32 bit long, not
704 128, but only VSCR is fetched as a 16 bytes quantity. */
705 if (i
== (num_of_vrregs
- 2))
706 regcache_raw_collect (regcache
, tdep
->ppc_vr0_regnum
+ i
,
707 *vrregsetp
+ i
* vrregsize
+ offset
);
709 regcache_raw_collect (regcache
, tdep
->ppc_vr0_regnum
+ i
,
710 *vrregsetp
+ i
* vrregsize
);
715 store_altivec_registers (const struct regcache
*regcache
, int tid
)
720 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
725 have_ptrace_getvrregs
= 0;
728 perror_with_name (_("Couldn't get AltiVec registers"));
731 fill_vrregset (regcache
, ®s
);
733 if (ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
) < 0)
734 perror_with_name (_("Couldn't write AltiVec registers"));
738 store_ppc_registers (const struct regcache
*regcache
, int tid
)
741 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
743 for (i
= 0; i
< ppc_num_gprs
; i
++)
744 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
745 if (tdep
->ppc_fp0_regnum
>= 0)
746 for (i
= 0; i
< ppc_num_fprs
; i
++)
747 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
748 store_register (regcache
, tid
, gdbarch_pc_regnum (current_gdbarch
));
749 if (tdep
->ppc_ps_regnum
!= -1)
750 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
751 if (tdep
->ppc_cr_regnum
!= -1)
752 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
753 if (tdep
->ppc_lr_regnum
!= -1)
754 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
755 if (tdep
->ppc_ctr_regnum
!= -1)
756 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
757 if (tdep
->ppc_xer_regnum
!= -1)
758 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
759 if (tdep
->ppc_mq_regnum
!= -1)
760 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
761 if (tdep
->ppc_fpscr_regnum
!= -1)
762 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
763 if (have_ptrace_getvrregs
)
764 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
765 store_altivec_registers (regcache
, tid
);
766 if (tdep
->ppc_ev0_upper_regnum
>= 0)
767 store_spe_register (regcache
, tid
, -1);
771 ppc_linux_check_watch_resources (int type
, int cnt
, int ot
)
774 ptid_t ptid
= inferior_ptid
;
776 /* DABR (data address breakpoint register) is optional for PPC variants.
777 Some variants have one DABR, others have none. So CNT can't be larger
782 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG and whether
783 the target has DABR. If either answer is no, the ptrace call will
784 return -1. Fail in that case. */
789 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
795 ppc_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
797 /* Handle sub-8-byte quantities. */
801 /* addr+len must fall in the 8 byte watchable region. */
802 if ((addr
+ len
) > (addr
& ~7) + 8)
808 /* Set a watchpoint of type TYPE at address ADDR. */
810 ppc_linux_insert_watchpoint (CORE_ADDR addr
, int len
, int rw
)
814 ptid_t ptid
= inferior_ptid
;
816 dabr_value
= addr
& ~7;
820 /* Set read and translate bits. */
824 /* Set write and translate bits. */
828 /* Set read, write and translate bits. */
837 return ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, dabr_value
);
841 ppc_linux_remove_watchpoint (CORE_ADDR addr
, int len
, int rw
)
844 ptid_t ptid
= inferior_ptid
;
850 return ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0);
854 ppc_linux_stopped_data_address (struct target_ops
*target
, CORE_ADDR
*addr_p
)
856 if (last_stopped_data_address
)
858 *addr_p
= last_stopped_data_address
;
859 last_stopped_data_address
= 0;
866 ppc_linux_stopped_by_watchpoint (void)
869 struct siginfo siginfo
;
870 ptid_t ptid
= inferior_ptid
;
878 ptrace (PTRACE_GETSIGINFO
, tid
, (PTRACE_TYPE_ARG3
) 0, &siginfo
);
880 if (errno
!= 0 || siginfo
.si_signo
!= SIGTRAP
||
881 (siginfo
.si_code
& 0xffff) != 0x0004)
884 last_stopped_data_address
= (uintptr_t) siginfo
.si_addr
;
889 ppc_linux_store_inferior_registers (struct regcache
*regcache
, int regno
)
891 /* Overload thread id onto process id */
892 int tid
= TIDGET (inferior_ptid
);
894 /* No thread id, just use process id */
896 tid
= PIDGET (inferior_ptid
);
899 store_register (regcache
, tid
, regno
);
901 store_ppc_registers (regcache
, tid
);
905 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
907 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
908 interface, and not the wordsize of the program's ABI. */
909 int wordsize
= sizeof (long);
910 ppc_linux_supply_gregset (regcache
, -1, gregsetp
,
911 sizeof (gdb_gregset_t
), wordsize
);
915 right_fill_reg (const struct regcache
*regcache
, int regnum
, void *reg
)
917 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
918 interface, and not the wordsize of the program's ABI. */
919 int wordsize
= sizeof (long);
920 /* Right fill the register. */
921 regcache_raw_collect (regcache
, regnum
,
924 - register_size (current_gdbarch
, regnum
)));
928 fill_gregset (const struct regcache
*regcache
,
929 gdb_gregset_t
*gregsetp
, int regno
)
932 elf_greg_t
*regp
= (elf_greg_t
*) gregsetp
;
933 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
934 const int elf_ngreg
= 48;
937 /* Start with zeros. */
938 memset (regp
, 0, elf_ngreg
* sizeof (*regp
));
940 for (regi
= 0; regi
< ppc_num_gprs
; regi
++)
942 if ((regno
== -1) || regno
== tdep
->ppc_gp0_regnum
+ regi
)
943 right_fill_reg (regcache
, tdep
->ppc_gp0_regnum
+ regi
,
944 (regp
+ PT_R0
+ regi
));
947 if ((regno
== -1) || regno
== gdbarch_pc_regnum (current_gdbarch
))
948 right_fill_reg (regcache
, gdbarch_pc_regnum (current_gdbarch
),
950 if ((regno
== -1) || regno
== tdep
->ppc_lr_regnum
)
951 right_fill_reg (regcache
, tdep
->ppc_lr_regnum
, regp
+ PT_LNK
);
952 if ((regno
== -1) || regno
== tdep
->ppc_cr_regnum
)
953 regcache_raw_collect (regcache
, tdep
->ppc_cr_regnum
,
955 if ((regno
== -1) || regno
== tdep
->ppc_xer_regnum
)
956 regcache_raw_collect (regcache
, tdep
->ppc_xer_regnum
,
958 if ((regno
== -1) || regno
== tdep
->ppc_ctr_regnum
)
959 right_fill_reg (regcache
, tdep
->ppc_ctr_regnum
, regp
+ PT_CTR
);
961 if (((regno
== -1) || regno
== tdep
->ppc_mq_regnum
)
962 && (tdep
->ppc_mq_regnum
!= -1))
963 right_fill_reg (regcache
, tdep
->ppc_mq_regnum
, regp
+ PT_MQ
);
965 if ((regno
== -1) || regno
== tdep
->ppc_ps_regnum
)
966 right_fill_reg (regcache
, tdep
->ppc_ps_regnum
, regp
+ PT_MSR
);
970 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
972 ppc_linux_supply_fpregset (NULL
, regcache
, -1, fpregsetp
,
973 sizeof (gdb_fpregset_t
));
976 /* Given a pointer to a floating point register set in /proc format
977 (fpregset_t *), update the register specified by REGNO from gdb's
978 idea of the current floating point register set. If REGNO is -1,
981 fill_fpregset (const struct regcache
*regcache
,
982 gdb_fpregset_t
*fpregsetp
, int regno
)
985 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
986 bfd_byte
*fpp
= (void *) fpregsetp
;
988 if (ppc_floating_point_unit_p (current_gdbarch
))
990 for (regi
= 0; regi
< ppc_num_fprs
; regi
++)
992 if ((regno
== -1) || (regno
== tdep
->ppc_fp0_regnum
+ regi
))
993 regcache_raw_collect (regcache
, tdep
->ppc_fp0_regnum
+ regi
,
996 if (regno
== -1 || regno
== tdep
->ppc_fpscr_regnum
)
997 right_fill_reg (regcache
, tdep
->ppc_fpscr_regnum
, (fpp
+ 8 * 32));
1001 void _initialize_ppc_linux_nat (void);
1004 _initialize_ppc_linux_nat (void)
1006 struct target_ops
*t
;
1008 /* Fill in the generic GNU/Linux methods. */
1009 t
= linux_target ();
1011 /* Add our register access methods. */
1012 t
->to_fetch_registers
= ppc_linux_fetch_inferior_registers
;
1013 t
->to_store_registers
= ppc_linux_store_inferior_registers
;
1015 /* Add our watchpoint methods. */
1016 t
->to_can_use_hw_breakpoint
= ppc_linux_check_watch_resources
;
1017 t
->to_region_ok_for_hw_watchpoint
= ppc_linux_region_ok_for_hw_watchpoint
;
1018 t
->to_insert_watchpoint
= ppc_linux_insert_watchpoint
;
1019 t
->to_remove_watchpoint
= ppc_linux_remove_watchpoint
;
1020 t
->to_stopped_by_watchpoint
= ppc_linux_stopped_by_watchpoint
;
1021 t
->to_stopped_data_address
= ppc_linux_stopped_data_address
;
1023 /* Register the target. */
1024 linux_nat_add_target (t
);