1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
37 #include <sys/procfs.h>
38 #include "nat/gdb_ptrace.h"
39 #include "inf-ptrace.h"
41 /* Prototypes for supply_gregset etc. */
44 #include "ppc-linux-tdep.h"
46 /* Required when using the AUXV. */
47 #include "elf/common.h"
50 #include "arch/ppc-linux-common.h"
51 #include "arch/ppc-linux-tdesc.h"
52 #include "nat/ppc-linux.h"
54 /* Similarly for the hardware watchpoint support. These requests are used
55 when the PowerPC HWDEBUG ptrace interface is not available. */
56 #ifndef PTRACE_GET_DEBUGREG
57 #define PTRACE_GET_DEBUGREG 25
59 #ifndef PTRACE_SET_DEBUGREG
60 #define PTRACE_SET_DEBUGREG 26
62 #ifndef PTRACE_GETSIGINFO
63 #define PTRACE_GETSIGINFO 0x4202
66 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
67 available. It exposes the debug facilities of PowerPC processors, as well
68 as additional features of BookE processors, such as ranged breakpoints and
69 watchpoints and hardware-accelerated condition evaluation. */
70 #ifndef PPC_PTRACE_GETHWDBGINFO
72 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
73 ptrace interface is not present in ptrace.h, so we'll have to pretty much
74 include it all here so that the code at least compiles on older systems. */
75 #define PPC_PTRACE_GETHWDBGINFO 0x89
76 #define PPC_PTRACE_SETHWDEBUG 0x88
77 #define PPC_PTRACE_DELHWDEBUG 0x87
81 uint32_t version
; /* Only version 1 exists to date. */
82 uint32_t num_instruction_bps
;
83 uint32_t num_data_bps
;
84 uint32_t num_condition_regs
;
85 uint32_t data_bp_alignment
;
86 uint32_t sizeof_condition
; /* size of the DVC register. */
90 /* Features will have bits indicating whether there is support for: */
91 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
92 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
93 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
94 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
96 struct ppc_hw_breakpoint
98 uint32_t version
; /* currently, version must be 1 */
99 uint32_t trigger_type
; /* only some combinations allowed */
100 uint32_t addr_mode
; /* address match mode */
101 uint32_t condition_mode
; /* break/watchpoint condition flags */
102 uint64_t addr
; /* break/watchpoint address */
103 uint64_t addr2
; /* range end or mask */
104 uint64_t condition_value
; /* contents of the DVC register */
108 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
109 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
110 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
111 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
114 #define PPC_BREAKPOINT_MODE_EXACT 0x0
115 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
116 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
117 #define PPC_BREAKPOINT_MODE_MASK 0x3
119 /* Condition mode. */
120 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
121 #define PPC_BREAKPOINT_CONDITION_AND 0x1
122 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
123 #define PPC_BREAKPOINT_CONDITION_OR 0x2
124 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
125 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
126 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
127 #define PPC_BREAKPOINT_CONDITION_BE(n) \
128 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
129 #endif /* PPC_PTRACE_GETHWDBGINFO */
131 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
132 watchpoint (up to 512 bytes). */
133 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
134 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
135 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
137 /* Similarly for the general-purpose (gp0 -- gp31)
138 and floating-point registers (fp0 -- fp31). */
139 #ifndef PTRACE_GETREGS
140 #define PTRACE_GETREGS 12
142 #ifndef PTRACE_SETREGS
143 #define PTRACE_SETREGS 13
145 #ifndef PTRACE_GETFPREGS
146 #define PTRACE_GETFPREGS 14
148 #ifndef PTRACE_SETFPREGS
149 #define PTRACE_SETFPREGS 15
152 /* This oddity is because the Linux kernel defines elf_vrregset_t as
153 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
154 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
155 the vrsave as an extra 4 bytes at the end. I opted for creating a
156 flat array of chars, so that it is easier to manipulate for gdb.
158 There are 32 vector registers 16 bytes longs, plus a VSCR register
159 which is only 4 bytes long, but is fetched as a 16 bytes
160 quantity. Up to here we have the elf_vrregset_t structure.
161 Appended to this there is space for the VRSAVE register: 4 bytes.
162 Even though this vrsave register is not included in the regset
163 typedef, it is handled by the ptrace requests.
165 The layout is like this (where x is the actual value of the vscr reg): */
170 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
171 <-------> <-------><-------><->
174 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
175 <-------> <-------><-------><->
180 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
182 /* This is the layout of the POWER7 VSX registers and the way they overlap
183 with the existing FPR and VMX registers.
185 VSR doubleword 0 VSR doubleword 1
186 ----------------------------------------------------------------
188 ----------------------------------------------------------------
190 ----------------------------------------------------------------
193 ----------------------------------------------------------------
194 VSR[30] | FPR[30] | |
195 ----------------------------------------------------------------
196 VSR[31] | FPR[31] | |
197 ----------------------------------------------------------------
199 ----------------------------------------------------------------
201 ----------------------------------------------------------------
204 ----------------------------------------------------------------
206 ----------------------------------------------------------------
208 ----------------------------------------------------------------
210 VSX has 64 128bit registers. The first 32 registers overlap with
211 the FP registers (doubleword 0) and hence extend them with additional
212 64 bits (doubleword 1). The other 32 regs overlap with the VMX
214 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
216 /* On PPC processors that support the Signal Processing Extension
217 (SPE) APU, the general-purpose registers are 64 bits long.
218 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
219 ptrace calls only access the lower half of each register, to allow
220 them to behave the same way they do on non-SPE systems. There's a
221 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
222 read and write the top halves of all the general-purpose registers
223 at once, along with some SPE-specific registers.
225 GDB itself continues to claim the general-purpose registers are 32
226 bits long. It has unnamed raw registers that hold the upper halves
227 of the gprs, and the full 64-bit SIMD views of the registers,
228 'ev0' -- 'ev31', are pseudo-registers that splice the top and
229 bottom halves together.
231 This is the structure filled in by PTRACE_GETEVRREGS and written to
232 the inferior's registers by PTRACE_SETEVRREGS. */
233 struct gdb_evrregset_t
235 unsigned long evr
[32];
236 unsigned long long acc
;
237 unsigned long spefscr
;
240 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
241 PTRACE_SETVSXREGS requests, for reading and writing the VSX
242 POWER7 registers 0 through 31. Zero if we've tried one of them and
243 gotten an error. Note that VSX registers 32 through 63 overlap
244 with VR registers 0 through 31. */
245 int have_ptrace_getsetvsxregs
= 1;
247 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
248 PTRACE_SETVRREGS requests, for reading and writing the Altivec
249 registers. Zero if we've tried one of them and gotten an
251 int have_ptrace_getvrregs
= 1;
253 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
254 PTRACE_SETEVRREGS requests, for reading and writing the SPE
255 registers. Zero if we've tried one of them and gotten an
257 int have_ptrace_getsetevrregs
= 1;
259 /* Non-zero if our kernel may support the PTRACE_GETREGS and
260 PTRACE_SETREGS requests, for reading and writing the
261 general-purpose registers. Zero if we've tried one of
262 them and gotten an error. */
263 int have_ptrace_getsetregs
= 1;
265 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
266 PTRACE_SETFPREGS requests, for reading and writing the
267 floating-pointers registers. Zero if we've tried one of
268 them and gotten an error. */
269 int have_ptrace_getsetfpregs
= 1;
271 struct ppc_linux_nat_target final
: public linux_nat_target
273 /* Add our register access methods. */
274 void fetch_registers (struct regcache
*, int) override
;
275 void store_registers (struct regcache
*, int) override
;
277 /* Add our breakpoint/watchpoint methods. */
278 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
280 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
283 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
286 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
288 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
289 struct expression
*) override
;
291 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
292 struct expression
*) override
;
294 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
297 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
300 bool stopped_by_watchpoint () override
;
302 bool stopped_data_address (CORE_ADDR
*) override
;
304 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
306 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
309 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
311 int ranged_break_num_registers () override
;
313 const struct target_desc
*read_description () override
;
315 int auxv_parse (gdb_byte
**readptr
,
316 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
319 /* Override linux_nat_target low methods. */
320 void low_new_thread (struct lwp_info
*lp
) override
;
323 static ppc_linux_nat_target the_ppc_linux_nat_target
;
326 /* registers layout, as presented by the ptrace interface:
327 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
328 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
329 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
330 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
331 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
332 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
333 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
334 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
335 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
336 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
337 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
338 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
339 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
343 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
346 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
347 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
348 interface, and not the wordsize of the program's ABI. */
349 int wordsize
= sizeof (long);
351 /* General purpose registers occupy 1 slot each in the buffer. */
352 if (regno
>= tdep
->ppc_gp0_regnum
353 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
354 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
356 /* Floating point regs: eight bytes each in both 32- and 64-bit
357 ptrace interfaces. Thus, two slots each in 32-bit interface, one
358 slot each in 64-bit interface. */
359 if (tdep
->ppc_fp0_regnum
>= 0
360 && regno
>= tdep
->ppc_fp0_regnum
361 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
362 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
364 /* UISA special purpose registers: 1 slot each. */
365 if (regno
== gdbarch_pc_regnum (gdbarch
))
366 u_addr
= PT_NIP
* wordsize
;
367 if (regno
== tdep
->ppc_lr_regnum
)
368 u_addr
= PT_LNK
* wordsize
;
369 if (regno
== tdep
->ppc_cr_regnum
)
370 u_addr
= PT_CCR
* wordsize
;
371 if (regno
== tdep
->ppc_xer_regnum
)
372 u_addr
= PT_XER
* wordsize
;
373 if (regno
== tdep
->ppc_ctr_regnum
)
374 u_addr
= PT_CTR
* wordsize
;
376 if (regno
== tdep
->ppc_mq_regnum
)
377 u_addr
= PT_MQ
* wordsize
;
379 if (regno
== tdep
->ppc_ps_regnum
)
380 u_addr
= PT_MSR
* wordsize
;
381 if (regno
== PPC_ORIG_R3_REGNUM
)
382 u_addr
= PT_ORIG_R3
* wordsize
;
383 if (regno
== PPC_TRAP_REGNUM
)
384 u_addr
= PT_TRAP
* wordsize
;
385 if (tdep
->ppc_fpscr_regnum
>= 0
386 && regno
== tdep
->ppc_fpscr_regnum
)
388 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
389 kernel headers incorrectly contained the 32-bit definition of
390 PT_FPSCR. For the 32-bit definition, floating-point
391 registers occupy two 32-bit "slots", and the FPSCR lives in
392 the second half of such a slot-pair (hence +1). For 64-bit,
393 the FPSCR instead occupies the full 64-bit 2-word-slot and
394 hence no adjustment is necessary. Hack around this. */
395 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
396 u_addr
= (48 + 32) * wordsize
;
397 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
398 slot and not just its second word. The PT_FPSCR supplied when
399 GDB is compiled as a 32-bit app doesn't reflect this. */
400 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
401 && PT_FPSCR
== (48 + 2*32 + 1))
402 u_addr
= (48 + 2*32) * wordsize
;
404 u_addr
= PT_FPSCR
* wordsize
;
409 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
410 registers set mechanism, as opposed to the interface for all the
411 other registers, that stores/fetches each register individually. */
413 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
416 gdb_vsxregset_t regs
;
417 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
419 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
424 have_ptrace_getsetvsxregs
= 0;
427 perror_with_name (_("Unable to fetch VSX registers"));
430 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
431 PPC_LINUX_SIZEOF_VSXREGSET
);
434 /* The Linux kernel ptrace interface for AltiVec registers uses the
435 registers set mechanism, as opposed to the interface for all the
436 other registers, that stores/fetches each register individually. */
438 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
443 struct gdbarch
*gdbarch
= regcache
->arch ();
444 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
446 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
451 have_ptrace_getvrregs
= 0;
454 perror_with_name (_("Unable to fetch AltiVec registers"));
457 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
458 PPC_LINUX_SIZEOF_VRREGSET
);
461 /* Fetch the top 32 bits of TID's general-purpose registers and the
462 SPE-specific registers, and place the results in EVRREGSET. If we
463 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
466 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
467 PTRACE_SETEVRREGS requests are supported is isolated here, and in
468 set_spe_registers. */
470 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
472 if (have_ptrace_getsetevrregs
)
474 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
478 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
479 we just return zeros. */
481 have_ptrace_getsetevrregs
= 0;
483 /* Anything else needs to be reported. */
484 perror_with_name (_("Unable to fetch SPE registers"));
488 memset (evrregset
, 0, sizeof (*evrregset
));
491 /* Supply values from TID for SPE-specific raw registers: the upper
492 halves of the GPRs, the accumulator, and the spefscr. REGNO must
493 be the number of an upper half register, acc, spefscr, or -1 to
494 supply the values of all registers. */
496 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
498 struct gdbarch
*gdbarch
= regcache
->arch ();
499 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
500 struct gdb_evrregset_t evrregs
;
502 gdb_assert (sizeof (evrregs
.evr
[0])
503 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
504 gdb_assert (sizeof (evrregs
.acc
)
505 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
506 gdb_assert (sizeof (evrregs
.spefscr
)
507 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
509 get_spe_registers (tid
, &evrregs
);
515 for (i
= 0; i
< ppc_num_gprs
; i
++)
516 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
518 else if (tdep
->ppc_ev0_upper_regnum
<= regno
519 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
520 regcache
->raw_supply (regno
,
521 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
524 || regno
== tdep
->ppc_acc_regnum
)
525 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
528 || regno
== tdep
->ppc_spefscr_regnum
)
529 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
532 /* Use ptrace to fetch all registers from the register set with note
533 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
534 process/thread TID and supply their values to REGCACHE. If ptrace
535 returns ENODATA to indicate the regset is unavailable, mark the
536 registers as unavailable in REGCACHE. */
539 fetch_regset (struct regcache
*regcache
, int tid
,
540 int regset_id
, int regsetsize
, const struct regset
*regset
)
542 void *buf
= alloca (regsetsize
);
546 iov
.iov_len
= regsetsize
;
548 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
550 if (errno
== ENODATA
)
551 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
553 perror_with_name (_("Couldn't get register set"));
556 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
559 /* Use ptrace to store register REGNUM of the regset with note type
560 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
561 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
562 in the set are collected and stored. */
565 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
566 int regset_id
, int regsetsize
, const struct regset
*regset
)
568 void *buf
= alloca (regsetsize
);
572 iov
.iov_len
= regsetsize
;
574 /* Make sure that the buffer that will be stored has up to date values
575 for the registers that won't be collected. */
576 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
577 perror_with_name (_("Couldn't get register set"));
579 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
581 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
582 perror_with_name (_("Couldn't set register set"));
585 /* Check whether the kernel provides a register set with number
586 REGSET_ID of size REGSETSIZE for process/thread TID. */
589 check_regset (int tid
, int regset_id
, int regsetsize
)
591 void *buf
= alloca (regsetsize
);
595 iov
.iov_len
= regsetsize
;
597 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
605 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
607 struct gdbarch
*gdbarch
= regcache
->arch ();
608 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
609 /* This isn't really an address. But ptrace thinks of it as one. */
610 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
611 int bytes_transferred
;
612 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
614 if (altivec_register_p (gdbarch
, regno
))
616 /* If this is the first time through, or if it is not the first
617 time through, and we have comfirmed that there is kernel
618 support for such a ptrace request, then go and fetch the
620 if (have_ptrace_getvrregs
)
622 fetch_altivec_registers (regcache
, tid
, regno
);
625 /* If we have discovered that there is no ptrace support for
626 AltiVec registers, fall through and return zeroes, because
627 regaddr will be -1 in this case. */
629 else if (vsx_register_p (gdbarch
, regno
))
631 if (have_ptrace_getsetvsxregs
)
633 fetch_vsx_registers (regcache
, tid
, regno
);
637 else if (spe_register_p (gdbarch
, regno
))
639 fetch_spe_register (regcache
, tid
, regno
);
642 else if (regno
== PPC_DSCR_REGNUM
)
644 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
646 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
647 PPC_LINUX_SIZEOF_DSCRREGSET
,
648 &ppc32_linux_dscrregset
);
651 else if (regno
== PPC_PPR_REGNUM
)
653 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
655 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
656 PPC_LINUX_SIZEOF_PPRREGSET
,
657 &ppc32_linux_pprregset
);
660 else if (regno
== PPC_TAR_REGNUM
)
662 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
664 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
665 PPC_LINUX_SIZEOF_TARREGSET
,
666 &ppc32_linux_tarregset
);
672 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
673 regcache
->raw_supply (regno
, buf
);
677 /* Read the raw register using sizeof(long) sized chunks. On a
678 32-bit platform, 64-bit floating-point registers will require two
680 for (bytes_transferred
= 0;
681 bytes_transferred
< register_size (gdbarch
, regno
);
682 bytes_transferred
+= sizeof (long))
687 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
688 regaddr
+= sizeof (long);
692 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
693 gdbarch_register_name (gdbarch
, regno
), regno
);
694 perror_with_name (message
);
696 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
699 /* Now supply the register. Keep in mind that the regcache's idea
700 of the register's size may not be a multiple of sizeof
702 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
704 /* Little-endian values are always found at the left end of the
705 bytes transferred. */
706 regcache
->raw_supply (regno
, buf
);
708 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
710 /* Big-endian values are found at the right end of the bytes
712 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
713 regcache
->raw_supply (regno
, buf
+ padding
);
716 internal_error (__FILE__
, __LINE__
,
717 _("fetch_register: unexpected byte order: %d"),
718 gdbarch_byte_order (gdbarch
));
721 /* This function actually issues the request to ptrace, telling
722 it to get all general-purpose registers and put them into the
725 If the ptrace request does not exist, this function returns 0
726 and properly sets the have_ptrace_* flag. If the request fails,
727 this function calls perror_with_name. Otherwise, if the request
728 succeeds, then the regcache gets filled and 1 is returned. */
730 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
732 gdb_gregset_t gregset
;
734 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
738 have_ptrace_getsetregs
= 0;
741 perror_with_name (_("Couldn't get general-purpose registers."));
744 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
749 /* This is a wrapper for the fetch_all_gp_regs function. It is
750 responsible for verifying if this target has the ptrace request
751 that can be used to fetch all general-purpose registers at one
752 shot. If it doesn't, then we should fetch them using the
753 old-fashioned way, which is to iterate over the registers and
754 request them one by one. */
756 fetch_gp_regs (struct regcache
*regcache
, int tid
)
758 struct gdbarch
*gdbarch
= regcache
->arch ();
759 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
762 if (have_ptrace_getsetregs
)
763 if (fetch_all_gp_regs (regcache
, tid
))
766 /* If we've hit this point, it doesn't really matter which
767 architecture we are using. We just need to read the
768 registers in the "old-fashioned way". */
769 for (i
= 0; i
< ppc_num_gprs
; i
++)
770 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
773 /* This function actually issues the request to ptrace, telling
774 it to get all floating-point registers and put them into the
777 If the ptrace request does not exist, this function returns 0
778 and properly sets the have_ptrace_* flag. If the request fails,
779 this function calls perror_with_name. Otherwise, if the request
780 succeeds, then the regcache gets filled and 1 is returned. */
782 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
784 gdb_fpregset_t fpregs
;
786 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
790 have_ptrace_getsetfpregs
= 0;
793 perror_with_name (_("Couldn't get floating-point registers."));
796 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
801 /* This is a wrapper for the fetch_all_fp_regs function. It is
802 responsible for verifying if this target has the ptrace request
803 that can be used to fetch all floating-point registers at one
804 shot. If it doesn't, then we should fetch them using the
805 old-fashioned way, which is to iterate over the registers and
806 request them one by one. */
808 fetch_fp_regs (struct regcache
*regcache
, int tid
)
810 struct gdbarch
*gdbarch
= regcache
->arch ();
811 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
814 if (have_ptrace_getsetfpregs
)
815 if (fetch_all_fp_regs (regcache
, tid
))
818 /* If we've hit this point, it doesn't really matter which
819 architecture we are using. We just need to read the
820 registers in the "old-fashioned way". */
821 for (i
= 0; i
< ppc_num_fprs
; i
++)
822 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
826 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
828 struct gdbarch
*gdbarch
= regcache
->arch ();
829 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
831 fetch_gp_regs (regcache
, tid
);
832 if (tdep
->ppc_fp0_regnum
>= 0)
833 fetch_fp_regs (regcache
, tid
);
834 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
835 if (tdep
->ppc_ps_regnum
!= -1)
836 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
837 if (tdep
->ppc_cr_regnum
!= -1)
838 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
839 if (tdep
->ppc_lr_regnum
!= -1)
840 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
841 if (tdep
->ppc_ctr_regnum
!= -1)
842 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
843 if (tdep
->ppc_xer_regnum
!= -1)
844 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
845 if (tdep
->ppc_mq_regnum
!= -1)
846 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
847 if (ppc_linux_trap_reg_p (gdbarch
))
849 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
850 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
852 if (tdep
->ppc_fpscr_regnum
!= -1)
853 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
854 if (have_ptrace_getvrregs
)
855 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
856 fetch_altivec_registers (regcache
, tid
, -1);
857 if (have_ptrace_getsetvsxregs
)
858 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
859 fetch_vsx_registers (regcache
, tid
, -1);
860 if (tdep
->ppc_ev0_upper_regnum
>= 0)
861 fetch_spe_register (regcache
, tid
, -1);
862 if (tdep
->ppc_ppr_regnum
!= -1)
863 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
864 PPC_LINUX_SIZEOF_PPRREGSET
,
865 &ppc32_linux_pprregset
);
866 if (tdep
->ppc_dscr_regnum
!= -1)
867 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
868 PPC_LINUX_SIZEOF_DSCRREGSET
,
869 &ppc32_linux_dscrregset
);
870 if (tdep
->ppc_tar_regnum
!= -1)
871 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
872 PPC_LINUX_SIZEOF_TARREGSET
,
873 &ppc32_linux_tarregset
);
876 /* Fetch registers from the child process. Fetch all registers if
877 regno == -1, otherwise fetch all general registers or all floating
878 point registers depending upon the value of regno. */
880 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
882 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
885 fetch_ppc_registers (regcache
, tid
);
887 fetch_register (regcache
, tid
, regno
);
891 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
894 gdb_vsxregset_t regs
;
895 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
897 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
902 have_ptrace_getsetvsxregs
= 0;
905 perror_with_name (_("Unable to fetch VSX registers"));
908 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
909 PPC_LINUX_SIZEOF_VSXREGSET
);
911 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
913 perror_with_name (_("Unable to store VSX registers"));
917 store_altivec_registers (const struct regcache
*regcache
, int tid
,
922 struct gdbarch
*gdbarch
= regcache
->arch ();
923 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
925 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
930 have_ptrace_getvrregs
= 0;
933 perror_with_name (_("Unable to fetch AltiVec registers"));
936 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
937 PPC_LINUX_SIZEOF_VRREGSET
);
939 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
941 perror_with_name (_("Unable to store AltiVec registers"));
944 /* Assuming TID referrs to an SPE process, set the top halves of TID's
945 general-purpose registers and its SPE-specific registers to the
946 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
949 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
950 PTRACE_SETEVRREGS requests are supported is isolated here, and in
951 get_spe_registers. */
953 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
955 if (have_ptrace_getsetevrregs
)
957 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
961 /* EIO means that the PTRACE_SETEVRREGS request isn't
962 supported; we fail silently, and don't try the call
965 have_ptrace_getsetevrregs
= 0;
967 /* Anything else needs to be reported. */
968 perror_with_name (_("Unable to set SPE registers"));
973 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
974 If REGNO is -1, write the values of all the SPE-specific
977 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
979 struct gdbarch
*gdbarch
= regcache
->arch ();
980 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
981 struct gdb_evrregset_t evrregs
;
983 gdb_assert (sizeof (evrregs
.evr
[0])
984 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
985 gdb_assert (sizeof (evrregs
.acc
)
986 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
987 gdb_assert (sizeof (evrregs
.spefscr
)
988 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
991 /* Since we're going to write out every register, the code below
992 should store to every field of evrregs; if that doesn't happen,
993 make it obvious by initializing it with suspicious values. */
994 memset (&evrregs
, 42, sizeof (evrregs
));
996 /* We can only read and write the entire EVR register set at a
997 time, so to write just a single register, we do a
998 read-modify-write maneuver. */
999 get_spe_registers (tid
, &evrregs
);
1005 for (i
= 0; i
< ppc_num_gprs
; i
++)
1006 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1009 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1010 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1011 regcache
->raw_collect (regno
,
1012 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1015 || regno
== tdep
->ppc_acc_regnum
)
1016 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1020 || regno
== tdep
->ppc_spefscr_regnum
)
1021 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1024 /* Write back the modified register set. */
1025 set_spe_registers (tid
, &evrregs
);
1029 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1031 struct gdbarch
*gdbarch
= regcache
->arch ();
1032 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1033 /* This isn't really an address. But ptrace thinks of it as one. */
1034 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1036 size_t bytes_to_transfer
;
1037 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1039 if (altivec_register_p (gdbarch
, regno
))
1041 store_altivec_registers (regcache
, tid
, regno
);
1044 else if (vsx_register_p (gdbarch
, regno
))
1046 store_vsx_registers (regcache
, tid
, regno
);
1049 else if (spe_register_p (gdbarch
, regno
))
1051 store_spe_register (regcache
, tid
, regno
);
1054 else if (regno
== PPC_DSCR_REGNUM
)
1056 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1058 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1059 PPC_LINUX_SIZEOF_DSCRREGSET
,
1060 &ppc32_linux_dscrregset
);
1063 else if (regno
== PPC_PPR_REGNUM
)
1065 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1067 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1068 PPC_LINUX_SIZEOF_PPRREGSET
,
1069 &ppc32_linux_pprregset
);
1072 else if (regno
== PPC_TAR_REGNUM
)
1074 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1076 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1077 PPC_LINUX_SIZEOF_TARREGSET
,
1078 &ppc32_linux_tarregset
);
1085 /* First collect the register. Keep in mind that the regcache's
1086 idea of the register's size may not be a multiple of sizeof
1088 memset (buf
, 0, sizeof buf
);
1089 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1090 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1092 /* Little-endian values always sit at the left end of the buffer. */
1093 regcache
->raw_collect (regno
, buf
);
1095 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1097 /* Big-endian values sit at the right end of the buffer. */
1098 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1099 regcache
->raw_collect (regno
, buf
+ padding
);
1102 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1106 memcpy (&l
, &buf
[i
], sizeof (l
));
1108 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1109 regaddr
+= sizeof (long);
1112 && (regno
== tdep
->ppc_fpscr_regnum
1113 || regno
== PPC_ORIG_R3_REGNUM
1114 || regno
== PPC_TRAP_REGNUM
))
1116 /* Some older kernel versions don't allow fpscr, orig_r3
1117 or trap to be written. */
1124 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1125 gdbarch_register_name (gdbarch
, regno
), regno
);
1126 perror_with_name (message
);
1131 /* This function actually issues the request to ptrace, telling
1132 it to store all general-purpose registers present in the specified
1135 If the ptrace request does not exist, this function returns 0
1136 and properly sets the have_ptrace_* flag. If the request fails,
1137 this function calls perror_with_name. Otherwise, if the request
1138 succeeds, then the regcache is stored and 1 is returned. */
1140 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1142 gdb_gregset_t gregset
;
1144 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1148 have_ptrace_getsetregs
= 0;
1151 perror_with_name (_("Couldn't get general-purpose registers."));
1154 fill_gregset (regcache
, &gregset
, regno
);
1156 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1160 have_ptrace_getsetregs
= 0;
1163 perror_with_name (_("Couldn't set general-purpose registers."));
1169 /* This is a wrapper for the store_all_gp_regs function. It is
1170 responsible for verifying if this target has the ptrace request
1171 that can be used to store all general-purpose registers at one
1172 shot. If it doesn't, then we should store them using the
1173 old-fashioned way, which is to iterate over the registers and
1174 store them one by one. */
1176 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1178 struct gdbarch
*gdbarch
= regcache
->arch ();
1179 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1182 if (have_ptrace_getsetregs
)
1183 if (store_all_gp_regs (regcache
, tid
, regno
))
1186 /* If we hit this point, it doesn't really matter which
1187 architecture we are using. We just need to store the
1188 registers in the "old-fashioned way". */
1189 for (i
= 0; i
< ppc_num_gprs
; i
++)
1190 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1193 /* This function actually issues the request to ptrace, telling
1194 it to store all floating-point registers present in the specified
1197 If the ptrace request does not exist, this function returns 0
1198 and properly sets the have_ptrace_* flag. If the request fails,
1199 this function calls perror_with_name. Otherwise, if the request
1200 succeeds, then the regcache is stored and 1 is returned. */
1202 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1204 gdb_fpregset_t fpregs
;
1206 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1210 have_ptrace_getsetfpregs
= 0;
1213 perror_with_name (_("Couldn't get floating-point registers."));
1216 fill_fpregset (regcache
, &fpregs
, regno
);
1218 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1222 have_ptrace_getsetfpregs
= 0;
1225 perror_with_name (_("Couldn't set floating-point registers."));
1231 /* This is a wrapper for the store_all_fp_regs function. It is
1232 responsible for verifying if this target has the ptrace request
1233 that can be used to store all floating-point registers at one
1234 shot. If it doesn't, then we should store them using the
1235 old-fashioned way, which is to iterate over the registers and
1236 store them one by one. */
1238 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1240 struct gdbarch
*gdbarch
= regcache
->arch ();
1241 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1244 if (have_ptrace_getsetfpregs
)
1245 if (store_all_fp_regs (regcache
, tid
, regno
))
1248 /* If we hit this point, it doesn't really matter which
1249 architecture we are using. We just need to store the
1250 registers in the "old-fashioned way". */
1251 for (i
= 0; i
< ppc_num_fprs
; i
++)
1252 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1256 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1258 struct gdbarch
*gdbarch
= regcache
->arch ();
1259 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1261 store_gp_regs (regcache
, tid
, -1);
1262 if (tdep
->ppc_fp0_regnum
>= 0)
1263 store_fp_regs (regcache
, tid
, -1);
1264 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1265 if (tdep
->ppc_ps_regnum
!= -1)
1266 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1267 if (tdep
->ppc_cr_regnum
!= -1)
1268 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1269 if (tdep
->ppc_lr_regnum
!= -1)
1270 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1271 if (tdep
->ppc_ctr_regnum
!= -1)
1272 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1273 if (tdep
->ppc_xer_regnum
!= -1)
1274 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1275 if (tdep
->ppc_mq_regnum
!= -1)
1276 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1277 if (tdep
->ppc_fpscr_regnum
!= -1)
1278 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1279 if (ppc_linux_trap_reg_p (gdbarch
))
1281 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1282 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1284 if (have_ptrace_getvrregs
)
1285 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1286 store_altivec_registers (regcache
, tid
, -1);
1287 if (have_ptrace_getsetvsxregs
)
1288 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1289 store_vsx_registers (regcache
, tid
, -1);
1290 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1291 store_spe_register (regcache
, tid
, -1);
1292 if (tdep
->ppc_ppr_regnum
!= -1)
1293 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1294 PPC_LINUX_SIZEOF_PPRREGSET
,
1295 &ppc32_linux_pprregset
);
1296 if (tdep
->ppc_dscr_regnum
!= -1)
1297 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1298 PPC_LINUX_SIZEOF_DSCRREGSET
,
1299 &ppc32_linux_dscrregset
);
1300 if (tdep
->ppc_tar_regnum
!= -1)
1301 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1302 PPC_LINUX_SIZEOF_TARREGSET
,
1303 &ppc32_linux_tarregset
);
1306 /* Fetch the AT_HWCAP entry from the aux vector. */
1308 ppc_linux_get_hwcap (void)
1312 if (target_auxv_search (current_top_target (), AT_HWCAP
, &field
) != 1)
1318 /* Fetch the AT_HWCAP2 entry from the aux vector. */
1321 ppc_linux_get_hwcap2 (void)
1325 if (target_auxv_search (current_top_target (), AT_HWCAP2
, &field
) != 1)
1331 /* The cached DABR value, to install in new threads.
1332 This variable is used when the PowerPC HWDEBUG ptrace
1333 interface is not available. */
1334 static long saved_dabr_value
;
1336 /* Global structure that will store information about the available
1337 features provided by the PowerPC HWDEBUG ptrace interface. */
1338 static struct ppc_debug_info hwdebug_info
;
1340 /* Global variable that holds the maximum number of slots that the
1341 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1343 static size_t max_slots_number
= 0;
1345 struct hw_break_tuple
1348 struct ppc_hw_breakpoint
*hw_break
;
1351 /* This is an internal VEC created to store information about *points inserted
1352 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1354 typedef struct thread_points
1356 /* The TID to which this *point relates. */
1358 /* Information about the *point, such as its address, type, etc.
1360 Each element inside this vector corresponds to a hardware
1361 breakpoint or watchpoint in the thread represented by TID. The maximum
1362 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1363 the tuple is NULL, then the position in the vector is free. */
1364 struct hw_break_tuple
*hw_breaks
;
1366 DEF_VEC_P (thread_points_p
);
1368 VEC(thread_points_p
) *ppc_threads
= NULL
;
1370 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1372 #define PPC_DEBUG_CURRENT_VERSION 1
1374 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1376 have_ptrace_hwdebug_interface (void)
1378 static int have_ptrace_hwdebug_interface
= -1;
1380 if (have_ptrace_hwdebug_interface
== -1)
1384 tid
= inferior_ptid
.lwp ();
1386 tid
= inferior_ptid
.pid ();
1388 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1389 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1391 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1392 provides any supported feature. */
1393 if (hwdebug_info
.features
!= 0)
1395 have_ptrace_hwdebug_interface
= 1;
1396 max_slots_number
= hwdebug_info
.num_instruction_bps
1397 + hwdebug_info
.num_data_bps
1398 + hwdebug_info
.num_condition_regs
;
1399 return have_ptrace_hwdebug_interface
;
1402 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1403 have_ptrace_hwdebug_interface
= 0;
1404 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1407 return have_ptrace_hwdebug_interface
;
1411 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1413 int total_hw_wp
, total_hw_bp
;
1415 if (have_ptrace_hwdebug_interface ())
1417 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1418 available hardware watchpoints and breakpoints is stored at the
1419 hwdebug_info struct. */
1420 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1421 total_hw_wp
= hwdebug_info
.num_data_bps
;
1425 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1426 consider having 1 hardware watchpoint and no hardware breakpoints. */
1431 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1432 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1434 if (cnt
+ ot
> total_hw_wp
)
1437 else if (type
== bp_hardware_breakpoint
)
1439 if (total_hw_bp
== 0)
1441 /* No hardware breakpoint support. */
1444 if (cnt
> total_hw_bp
)
1448 if (!have_ptrace_hwdebug_interface ())
1451 ptid_t ptid
= inferior_ptid
;
1453 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1454 and whether the target has DABR. If either answer is no, the
1455 ptrace call will return -1. Fail in that case. */
1460 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1468 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1470 /* Handle sub-8-byte quantities. */
1474 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1475 restrictions for watchpoints in the processors. In that case, we use that
1476 information to determine the hardcoded watchable region for
1478 if (have_ptrace_hwdebug_interface ())
1481 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1482 watchpoints and can watch any access within an arbitrary memory
1483 region. This is useful to watch arrays and structs, for instance. It
1484 takes two hardware watchpoints though. */
1486 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1487 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1489 /* Check if the processor provides DAWR interface. */
1490 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1491 /* DAWR interface allows to watch up to 512 byte wide ranges which
1492 can't cross a 512 byte boundary. */
1495 region_size
= hwdebug_info
.data_bp_alignment
;
1496 /* Server processors provide one hardware watchpoint and addr+len should
1497 fall in the watchable region provided by the ptrace interface. */
1499 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1502 /* addr+len must fall in the 8 byte watchable region for DABR-based
1503 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1504 ptrace interface, DAC-based processors (i.e., embedded processors) will
1505 use addresses aligned to 4-bytes due to the way the read/write flags are
1506 passed in the old ptrace interface. */
1507 else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1508 && (addr
+ len
) > (addr
& ~3) + 4)
1509 || (addr
+ len
) > (addr
& ~7) + 8)
1515 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1517 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1519 return (a
->trigger_type
== b
->trigger_type
1520 && a
->addr_mode
== b
->addr_mode
1521 && a
->condition_mode
== b
->condition_mode
1522 && a
->addr
== b
->addr
1523 && a
->addr2
== b
->addr2
1524 && a
->condition_value
== b
->condition_value
);
1527 /* This function can be used to retrieve a thread_points by the TID of the
1528 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1529 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1530 provided TID will be created and returned. */
1531 static struct thread_points
*
1532 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1535 struct thread_points
*t
;
1537 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1543 /* Do we need to allocate a new point_item
1544 if the wanted one does not exist? */
1547 t
= XNEW (struct thread_points
);
1548 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1550 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1556 /* This function is a generic wrapper that is responsible for inserting a
1557 *point (i.e., calling `ptrace' in order to issue the request to the
1558 kernel) and registering it internally in GDB. */
1560 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1564 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1565 struct hw_break_tuple
*hw_breaks
;
1566 struct thread_points
*t
;
1569 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1571 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1573 /* Everything went fine, so we have to register this *point. */
1574 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1575 gdb_assert (t
!= NULL
);
1576 hw_breaks
= t
->hw_breaks
;
1578 /* Find a free element in the hw_breaks vector. */
1579 for (i
= 0; i
< max_slots_number
; i
++)
1580 if (hw_breaks
[i
].hw_break
== NULL
)
1582 hw_breaks
[i
].slot
= slot
;
1583 hw_breaks
[i
].hw_break
= p
.release ();
1587 gdb_assert (i
!= max_slots_number
);
1590 /* This function is a generic wrapper that is responsible for removing a
1591 *point (i.e., calling `ptrace' in order to issue the request to the
1592 kernel), and unregistering it internally at GDB. */
1594 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1597 struct hw_break_tuple
*hw_breaks
;
1598 struct thread_points
*t
;
1600 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1601 gdb_assert (t
!= NULL
);
1602 hw_breaks
= t
->hw_breaks
;
1604 for (i
= 0; i
< max_slots_number
; i
++)
1605 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1608 gdb_assert (i
!= max_slots_number
);
1610 /* We have to ignore ENOENT errors because the kernel implements hardware
1611 breakpoints/watchpoints as "one-shot", that is, they are automatically
1612 deleted when hit. */
1614 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1615 if (errno
!= ENOENT
)
1616 perror_with_name (_("Unexpected error deleting "
1617 "breakpoint or watchpoint"));
1619 xfree (hw_breaks
[i
].hw_break
);
1620 hw_breaks
[i
].hw_break
= NULL
;
1623 /* Return the number of registers needed for a ranged breakpoint. */
1626 ppc_linux_nat_target::ranged_break_num_registers ()
1628 return ((have_ptrace_hwdebug_interface ()
1629 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1633 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1634 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1637 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1638 struct bp_target_info
*bp_tgt
)
1640 struct lwp_info
*lp
;
1641 struct ppc_hw_breakpoint p
;
1643 if (!have_ptrace_hwdebug_interface ())
1646 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1647 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1648 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1649 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1650 p
.condition_value
= 0;
1654 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1656 /* The breakpoint will trigger if the address of the instruction is
1657 within the defined range, as follows: p.addr <= address < p.addr2. */
1658 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1662 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1667 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1673 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1674 struct bp_target_info
*bp_tgt
)
1676 struct lwp_info
*lp
;
1677 struct ppc_hw_breakpoint p
;
1679 if (!have_ptrace_hwdebug_interface ())
1682 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1683 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1684 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1685 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1686 p
.condition_value
= 0;
1690 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1692 /* The breakpoint will trigger if the address of the instruction is within
1693 the defined range, as follows: p.addr <= address < p.addr2. */
1694 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1698 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1703 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
1709 get_trigger_type (enum target_hw_bp_type type
)
1713 if (type
== hw_read
)
1714 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1715 else if (type
== hw_write
)
1716 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1718 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1723 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1724 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1725 or hw_access for an access watchpoint. Returns 0 on success and throws
1726 an error on failure. */
1729 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1730 target_hw_bp_type rw
)
1732 struct lwp_info
*lp
;
1733 struct ppc_hw_breakpoint p
;
1735 gdb_assert (have_ptrace_hwdebug_interface ());
1737 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1738 p
.trigger_type
= get_trigger_type (rw
);
1739 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1740 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1743 p
.condition_value
= 0;
1746 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
1751 /* Remove a masked watchpoint at ADDR with the mask MASK.
1752 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1753 or hw_access for an access watchpoint. Returns 0 on success and throws
1754 an error on failure. */
1757 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1758 target_hw_bp_type rw
)
1760 struct lwp_info
*lp
;
1761 struct ppc_hw_breakpoint p
;
1763 gdb_assert (have_ptrace_hwdebug_interface ());
1765 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1766 p
.trigger_type
= get_trigger_type (rw
);
1767 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1768 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1771 p
.condition_value
= 0;
1774 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
1779 /* Check whether we have at least one free DVC register. */
1781 can_use_watchpoint_cond_accel (void)
1783 struct thread_points
*p
;
1784 int tid
= inferior_ptid
.lwp ();
1785 int cnt
= hwdebug_info
.num_condition_regs
, i
;
1787 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
1790 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
1794 for (i
= 0; i
< max_slots_number
; i
++)
1795 if (p
->hw_breaks
[i
].hw_break
!= NULL
1796 && (p
->hw_breaks
[i
].hw_break
->condition_mode
1797 != PPC_BREAKPOINT_CONDITION_NONE
))
1800 /* There are no available slots now. */
1808 /* Calculate the enable bits and the contents of the Data Value Compare
1809 debug register present in BookE processors.
1811 ADDR is the address to be watched, LEN is the length of watched data
1812 and DATA_VALUE is the value which will trigger the watchpoint.
1813 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
1814 CONDITION_VALUE will hold the value which should be put in the
1817 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
1818 uint32_t *condition_mode
, uint64_t *condition_value
)
1820 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
1821 rightmost_enabled_byte
;
1822 CORE_ADDR addr_end_data
, addr_end_dvc
;
1824 /* The DVC register compares bytes within fixed-length windows which
1825 are word-aligned, with length equal to that of the DVC register.
1826 We need to calculate where our watch region is relative to that
1827 window and enable comparison of the bytes which fall within it. */
1829 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
1830 addr_end_data
= addr
+ len
;
1831 addr_end_dvc
= (addr
- align_offset
1832 + hwdebug_info
.sizeof_condition
);
1833 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
1834 addr_end_data
- addr_end_dvc
: 0;
1835 num_byte_enable
= len
- num_bytes_off_dvc
;
1836 /* Here, bytes are numbered from right to left. */
1837 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
1838 addr_end_dvc
- addr_end_data
: 0;
1840 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
1841 for (i
= 0; i
< num_byte_enable
; i
++)
1843 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
1845 /* Now we need to match the position within the DVC of the comparison
1846 value with where the watch region is relative to the window
1847 (i.e., the ALIGN_OFFSET). */
1849 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
1850 << rightmost_enabled_byte
* 8);
1853 /* Return the number of memory locations that need to be accessed to
1854 evaluate the expression which generated the given value chain.
1855 Returns -1 if there's any register access involved, or if there are
1856 other kinds of values which are not acceptable in a condition
1857 expression (e.g., lval_computed or lval_internalvar). */
1859 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
1861 int found_memory_cnt
= 0;
1863 /* The idea here is that evaluating an expression generates a series
1864 of values, one holding the value of every subexpression. (The
1865 expression a*b+c has five subexpressions: a, b, a*b, c, and
1866 a*b+c.) GDB's values hold almost enough information to establish
1867 the criteria given above --- they identify memory lvalues,
1868 register lvalues, computed values, etcetera. So we can evaluate
1869 the expression, and then scan the chain of values that leaves
1870 behind to determine the memory locations involved in the evaluation
1873 However, I don't think that the values returned by inferior
1874 function calls are special in any way. So this function may not
1875 notice that an expression contains an inferior function call.
1878 for (const value_ref_ptr
&iter
: chain
)
1880 struct value
*v
= iter
.get ();
1882 /* Constants and values from the history are fine. */
1883 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
1885 else if (VALUE_LVAL (v
) == lval_memory
)
1887 /* A lazy memory lvalue is one that GDB never needed to fetch;
1888 we either just used its address (e.g., `a' in `a.b') or
1889 we never needed it at all (e.g., `a' in `a,b'). */
1890 if (!value_lazy (v
))
1893 /* Other kinds of values are not fine. */
1898 return found_memory_cnt
;
1901 /* Verifies whether the expression COND can be implemented using the
1902 DVC (Data Value Compare) register in BookE processors. The expression
1903 must test the watch value for equality with a constant expression.
1904 If the function returns 1, DATA_VALUE will contain the constant against
1905 which the watch value should be compared and LEN will contain the size
1908 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
1909 CORE_ADDR
*data_value
, int *len
)
1911 int pc
= 1, num_accesses_left
, num_accesses_right
;
1912 struct value
*left_val
, *right_val
;
1913 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
1915 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
1918 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
1919 num_accesses_left
= num_memory_accesses (left_chain
);
1921 if (left_val
== NULL
|| num_accesses_left
< 0)
1924 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
1925 num_accesses_right
= num_memory_accesses (right_chain
);
1927 if (right_val
== NULL
|| num_accesses_right
< 0)
1930 if (num_accesses_left
== 1 && num_accesses_right
== 0
1931 && VALUE_LVAL (left_val
) == lval_memory
1932 && value_address (left_val
) == watch_addr
)
1934 *data_value
= value_as_long (right_val
);
1936 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
1937 the same type as the memory region referenced by LEFT_VAL. */
1938 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
1940 else if (num_accesses_left
== 0 && num_accesses_right
== 1
1941 && VALUE_LVAL (right_val
) == lval_memory
1942 && value_address (right_val
) == watch_addr
)
1944 *data_value
= value_as_long (left_val
);
1946 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
1947 the same type as the memory region referenced by RIGHT_VAL. */
1948 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
1956 /* Return non-zero if the target is capable of using hardware to evaluate
1957 the condition expression, thus only triggering the watchpoint when it is
1960 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
1962 struct expression
*cond
)
1964 CORE_ADDR data_value
;
1966 return (have_ptrace_hwdebug_interface ()
1967 && hwdebug_info
.num_condition_regs
> 0
1968 && check_condition (addr
, cond
, &data_value
, &len
));
1971 /* Set up P with the parameters necessary to request a watchpoint covering
1972 LEN bytes starting at ADDR and if possible with condition expression COND
1973 evaluated by hardware. INSERT tells if we are creating a request for
1974 inserting or removing the watchpoint. */
1977 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
1978 int len
, enum target_hw_bp_type type
,
1979 struct expression
*cond
, int insert
)
1982 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
1985 CORE_ADDR data_value
;
1987 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
1988 : hwdebug_info
.num_condition_regs
> 0);
1989 if (cond
&& use_condition
&& check_condition (addr
, cond
,
1991 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
1992 &p
->condition_value
);
1995 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1996 p
->condition_value
= 0;
1999 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2004 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2005 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2006 p
->condition_value
= 0;
2008 /* The watchpoint will trigger if the address of the memory access is
2009 within the defined range, as follows: p->addr <= address < p->addr2.
2011 Note that the above sentence just documents how ptrace interprets
2012 its arguments; the watchpoint is set to watch the range defined by
2013 the user _inclusively_, as specified by the user interface. */
2014 p
->addr2
= (uint64_t) addr
+ len
;
2017 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2018 p
->trigger_type
= get_trigger_type (type
);
2019 p
->addr
= (uint64_t) addr
;
2023 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2024 enum target_hw_bp_type type
,
2025 struct expression
*cond
)
2027 struct lwp_info
*lp
;
2030 if (have_ptrace_hwdebug_interface ())
2032 struct ppc_hw_breakpoint p
;
2034 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2037 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2044 long read_mode
, write_mode
;
2046 if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2048 /* PowerPC 440 requires only the read/write flags to be passed
2055 /* PowerPC 970 and other DABR-based processors are required to pass
2056 the Breakpoint Translation bit together with the flags. */
2061 dabr_value
= addr
& ~(read_mode
| write_mode
);
2065 /* Set read and translate bits. */
2066 dabr_value
|= read_mode
;
2069 /* Set write and translate bits. */
2070 dabr_value
|= write_mode
;
2073 /* Set read, write and translate bits. */
2074 dabr_value
|= read_mode
| write_mode
;
2078 saved_dabr_value
= dabr_value
;
2081 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2082 saved_dabr_value
) < 0)
2092 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2093 enum target_hw_bp_type type
,
2094 struct expression
*cond
)
2096 struct lwp_info
*lp
;
2099 if (have_ptrace_hwdebug_interface ())
2101 struct ppc_hw_breakpoint p
;
2103 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2106 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2112 saved_dabr_value
= 0;
2114 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2115 saved_dabr_value
) < 0)
2125 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2127 int tid
= lp
->ptid
.lwp ();
2129 if (have_ptrace_hwdebug_interface ())
2132 struct thread_points
*p
;
2133 struct hw_break_tuple
*hw_breaks
;
2135 if (VEC_empty (thread_points_p
, ppc_threads
))
2138 /* Get a list of breakpoints from any thread. */
2139 p
= VEC_last (thread_points_p
, ppc_threads
);
2140 hw_breaks
= p
->hw_breaks
;
2142 /* Copy that thread's breakpoints and watchpoints to the new thread. */
2143 for (i
= 0; i
< max_slots_number
; i
++)
2144 if (hw_breaks
[i
].hw_break
)
2146 /* Older kernels did not make new threads inherit their parent
2147 thread's debug state, so we always clear the slot and replicate
2148 the debug state ourselves, ensuring compatibility with all
2151 /* The ppc debug resource accounting is done through "slots".
2152 Ask the kernel the deallocate this specific *point's slot. */
2153 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2155 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2159 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2163 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2166 int tid
= tp
->ptid
.lwp ();
2167 struct hw_break_tuple
*hw_breaks
;
2168 struct thread_points
*t
= NULL
, *p
;
2170 if (!have_ptrace_hwdebug_interface ())
2173 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2183 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2185 hw_breaks
= t
->hw_breaks
;
2187 for (i
= 0; i
< max_slots_number
; i
++)
2188 if (hw_breaks
[i
].hw_break
)
2189 xfree (hw_breaks
[i
].hw_break
);
2191 xfree (t
->hw_breaks
);
2196 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2200 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2203 if (siginfo
.si_signo
!= SIGTRAP
2204 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2207 if (have_ptrace_hwdebug_interface ())
2210 struct thread_points
*t
;
2211 struct hw_break_tuple
*hw_breaks
;
2212 /* The index (or slot) of the *point is passed in the si_errno field. */
2213 int slot
= siginfo
.si_errno
;
2215 t
= hwdebug_find_thread_points_by_tid (inferior_ptid
.lwp (), 0);
2217 /* Find out if this *point is a hardware breakpoint.
2218 If so, we should return 0. */
2221 hw_breaks
= t
->hw_breaks
;
2222 for (i
= 0; i
< max_slots_number
; i
++)
2223 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2224 && hw_breaks
[i
].hw_break
->trigger_type
2225 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2230 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2235 ppc_linux_nat_target::stopped_by_watchpoint ()
2238 return stopped_data_address (&addr
);
2242 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2248 if (have_ptrace_hwdebug_interface ()
2249 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2250 return start
<= addr
&& start
+ length
>= addr
;
2251 else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2258 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2259 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2262 /* Return the number of registers needed for a masked hardware watchpoint. */
2265 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2267 if (!have_ptrace_hwdebug_interface ()
2268 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2270 else if ((mask
& 0xC0000000) != 0xC0000000)
2272 warning (_("The given mask covers kernel address space "
2273 "and cannot be used.\n"));
2282 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2284 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
2287 store_register (regcache
, tid
, regno
);
2289 store_ppc_registers (regcache
, tid
);
2292 /* Functions for transferring registers between a gregset_t or fpregset_t
2293 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2294 by the ptrace interface, not the current program's ABI. Eg. if a
2295 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2296 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2299 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2301 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2303 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2307 fill_gregset (const struct regcache
*regcache
,
2308 gdb_gregset_t
*gregsetp
, int regno
)
2310 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2313 memset (gregsetp
, 0, sizeof (*gregsetp
));
2314 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2318 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2320 const struct regset
*regset
= ppc_linux_fpregset ();
2322 ppc_supply_fpregset (regset
, regcache
, -1,
2323 fpregsetp
, sizeof (*fpregsetp
));
2327 fill_fpregset (const struct regcache
*regcache
,
2328 gdb_fpregset_t
*fpregsetp
, int regno
)
2330 const struct regset
*regset
= ppc_linux_fpregset ();
2332 ppc_collect_fpregset (regset
, regcache
, regno
,
2333 fpregsetp
, sizeof (*fpregsetp
));
2337 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2338 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2341 int tid
= inferior_ptid
.lwp ();
2343 tid
= inferior_ptid
.pid ();
2345 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2347 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2348 gdb_byte
*ptr
= *readptr
;
2353 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2356 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2357 ptr
+= sizeof_auxv_field
;
2358 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2359 ptr
+= sizeof_auxv_field
;
2365 const struct target_desc
*
2366 ppc_linux_nat_target::read_description ()
2368 int tid
= inferior_ptid
.lwp ();
2370 tid
= inferior_ptid
.pid ();
2372 if (have_ptrace_getsetevrregs
)
2374 struct gdb_evrregset_t evrregset
;
2376 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2377 return tdesc_powerpc_e500l
;
2379 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2380 Anything else needs to be reported. */
2381 else if (errno
!= EIO
)
2382 perror_with_name (_("Unable to fetch SPE registers"));
2385 struct ppc_linux_features features
= ppc_linux_no_features
;
2387 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2389 CORE_ADDR hwcap
= ppc_linux_get_hwcap ();
2390 CORE_ADDR hwcap2
= ppc_linux_get_hwcap2 ();
2392 if (have_ptrace_getsetvsxregs
2393 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2395 gdb_vsxregset_t vsxregset
;
2397 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2398 features
.vsx
= true;
2400 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2401 Anything else needs to be reported. */
2402 else if (errno
!= EIO
)
2403 perror_with_name (_("Unable to fetch VSX registers"));
2406 if (have_ptrace_getvrregs
2407 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2409 gdb_vrregset_t vrregset
;
2411 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2412 features
.altivec
= true;
2414 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2415 Anything else needs to be reported. */
2416 else if (errno
!= EIO
)
2417 perror_with_name (_("Unable to fetch AltiVec registers"));
2420 if (hwcap
& PPC_FEATURE_CELL
)
2421 features
.cell
= true;
2423 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2425 if ((hwcap2
& PPC_FEATURE2_DSCR
)
2426 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
2427 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
2429 features
.ppr_dscr
= true;
2430 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
2431 && (hwcap2
& PPC_FEATURE2_TAR
)
2432 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
))
2433 features
.isa207
= true;
2436 return ppc_linux_match_description (features
);
2440 _initialize_ppc_linux_nat (void)
2442 linux_target
= &the_ppc_linux_nat_target
;
2444 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2446 /* Register the target. */
2447 add_inf_child_target (linux_target
);