1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
35 #include "solib-svr4.h"
37 #include "ppc-linux-tdep.h"
38 #include "trad-frame.h"
39 #include "frame-unwind.h"
40 #include "tramp-frame.h"
42 #include "features/rs6000/powerpc-32l.c"
43 #include "features/rs6000/powerpc-altivec32l.c"
44 #include "features/rs6000/powerpc-cell32l.c"
45 #include "features/rs6000/powerpc-vsx32l.c"
46 #include "features/rs6000/powerpc-isa205-32l.c"
47 #include "features/rs6000/powerpc-isa205-altivec32l.c"
48 #include "features/rs6000/powerpc-isa205-vsx32l.c"
49 #include "features/rs6000/powerpc-64l.c"
50 #include "features/rs6000/powerpc-altivec64l.c"
51 #include "features/rs6000/powerpc-cell64l.c"
52 #include "features/rs6000/powerpc-vsx64l.c"
53 #include "features/rs6000/powerpc-isa205-64l.c"
54 #include "features/rs6000/powerpc-isa205-altivec64l.c"
55 #include "features/rs6000/powerpc-isa205-vsx64l.c"
56 #include "features/rs6000/powerpc-e500l.c"
59 /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
60 in much the same fashion as memory_remove_breakpoint in mem-break.c,
61 but is careful not to write back the previous contents if the code
62 in question has changed in between inserting the breakpoint and
65 Here is the problem that we're trying to solve...
67 Once upon a time, before introducing this function to remove
68 breakpoints from the inferior, setting a breakpoint on a shared
69 library function prior to running the program would not work
70 properly. In order to understand the problem, it is first
71 necessary to understand a little bit about dynamic linking on
74 A call to a shared library function is accomplished via a bl
75 (branch-and-link) instruction whose branch target is an entry
76 in the procedure linkage table (PLT). The PLT in the object
77 file is uninitialized. To gdb, prior to running the program, the
78 entries in the PLT are all zeros.
80 Once the program starts running, the shared libraries are loaded
81 and the procedure linkage table is initialized, but the entries in
82 the table are not (necessarily) resolved. Once a function is
83 actually called, the code in the PLT is hit and the function is
84 resolved. In order to better illustrate this, an example is in
85 order; the following example is from the gdb testsuite.
87 We start the program shmain.
89 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
92 We place two breakpoints, one on shr1 and the other on main.
95 Breakpoint 1 at 0x100409d4
97 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
99 Examine the instruction (and the immediatly following instruction)
100 upon which the breakpoint was placed. Note that the PLT entry
101 for shr1 contains zeros.
103 (gdb) x/2i 0x100409d4
104 0x100409d4 <shr1>: .long 0x0
105 0x100409d8 <shr1+4>: .long 0x0
110 Starting program: gdb.base/shmain
111 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
113 Breakpoint 2, main ()
114 at gdb.base/shmain.c:44
117 Examine the PLT again. Note that the loading of the shared
118 library has initialized the PLT to code which loads a constant
119 (which I think is an index into the GOT) into r11 and then
120 branchs a short distance to the code which actually does the
123 (gdb) x/2i 0x100409d4
124 0x100409d4 <shr1>: li r11,4
125 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
129 Breakpoint 1, shr1 (x=1)
130 at gdb.base/shr1.c:19
133 Now we've hit the breakpoint at shr1. (The breakpoint was
134 reset from the PLT entry to the actual shr1 function after the
135 shared library was loaded.) Note that the PLT entry has been
136 resolved to contain a branch that takes us directly to shr1.
137 (The real one, not the PLT entry.)
139 (gdb) x/2i 0x100409d4
140 0x100409d4 <shr1>: b 0xffaf76c <shr1>
141 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
143 The thing to note here is that the PLT entry for shr1 has been
146 Now the problem should be obvious. GDB places a breakpoint (a
147 trap instruction) on the zero value of the PLT entry for shr1.
148 Later on, after the shared library had been loaded and the PLT
149 initialized, GDB gets a signal indicating this fact and attempts
150 (as it always does when it stops) to remove all the breakpoints.
152 The breakpoint removal was causing the former contents (a zero
153 word) to be written back to the now initialized PLT entry thus
154 destroying a portion of the initialization that had occurred only a
155 short time ago. When execution continued, the zero word would be
156 executed as an instruction an an illegal instruction trap was
157 generated instead. (0 is not a legal instruction.)
159 The fix for this problem was fairly straightforward. The function
160 memory_remove_breakpoint from mem-break.c was copied to this file,
161 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
162 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
165 The differences between ppc_linux_memory_remove_breakpoint () and
166 memory_remove_breakpoint () are minor. All that the former does
167 that the latter does not is check to make sure that the breakpoint
168 location actually contains a breakpoint (trap instruction) prior
169 to attempting to write back the old contents. If it does contain
170 a trap instruction, we allow the old contents to be written back.
171 Otherwise, we silently do nothing.
173 The big question is whether memory_remove_breakpoint () should be
174 changed to have the same functionality. The downside is that more
175 traffic is generated for remote targets since we'll have an extra
176 fetch of a memory word each time a breakpoint is removed.
178 For the time being, we'll leave this self-modifying-code-friendly
179 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
180 else in the event that some other platform has similar needs with
181 regard to removing breakpoints in some potentially self modifying
184 ppc_linux_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
185 struct bp_target_info
*bp_tgt
)
187 CORE_ADDR addr
= bp_tgt
->placed_address
;
188 const unsigned char *bp
;
191 gdb_byte old_contents
[BREAKPOINT_MAX
];
192 struct cleanup
*cleanup
;
194 /* Determine appropriate breakpoint contents and size for this address. */
195 bp
= gdbarch_breakpoint_from_pc (gdbarch
, &addr
, &bplen
);
197 error (_("Software breakpoints not implemented for this target."));
199 /* Make sure we see the memory breakpoints. */
200 cleanup
= make_show_memory_breakpoints_cleanup (1);
201 val
= target_read_memory (addr
, old_contents
, bplen
);
203 /* If our breakpoint is no longer at the address, this means that the
204 program modified the code on us, so it is wrong to put back the
206 if (val
== 0 && memcmp (bp
, old_contents
, bplen
) == 0)
207 val
= target_write_memory (addr
, bp_tgt
->shadow_contents
, bplen
);
209 do_cleanups (cleanup
);
213 /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
214 than the 32 bit SYSV R4 ABI structure return convention - all
215 structures, no matter their size, are put in memory. Vectors,
216 which were added later, do get returned in a register though. */
218 static enum return_value_convention
219 ppc_linux_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
220 struct type
*valtype
, struct regcache
*regcache
,
221 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
223 if ((TYPE_CODE (valtype
) == TYPE_CODE_STRUCT
224 || TYPE_CODE (valtype
) == TYPE_CODE_UNION
)
225 && !((TYPE_LENGTH (valtype
) == 16 || TYPE_LENGTH (valtype
) == 8)
226 && TYPE_VECTOR (valtype
)))
227 return RETURN_VALUE_STRUCT_CONVENTION
;
229 return ppc_sysv_abi_return_value (gdbarch
, func_type
, valtype
, regcache
,
233 /* Macros for matching instructions. Note that, since all the
234 operands are masked off before they're or-ed into the instruction,
235 you can use -1 to make masks. */
237 #define insn_d(opcd, rts, ra, d) \
238 ((((opcd) & 0x3f) << 26) \
239 | (((rts) & 0x1f) << 21) \
240 | (((ra) & 0x1f) << 16) \
243 #define insn_ds(opcd, rts, ra, d, xo) \
244 ((((opcd) & 0x3f) << 26) \
245 | (((rts) & 0x1f) << 21) \
246 | (((ra) & 0x1f) << 16) \
250 #define insn_xfx(opcd, rts, spr, xo) \
251 ((((opcd) & 0x3f) << 26) \
252 | (((rts) & 0x1f) << 21) \
253 | (((spr) & 0x1f) << 16) \
254 | (((spr) & 0x3e0) << 6) \
255 | (((xo) & 0x3ff) << 1))
257 /* Read a PPC instruction from memory. PPC instructions are always
258 big-endian, no matter what endianness the program is running in, so
259 we can't use read_memory_integer or one of its friends here. */
261 read_insn (CORE_ADDR pc
)
263 unsigned char buf
[4];
265 read_memory (pc
, buf
, 4);
266 return (buf
[0] << 24) | (buf
[1] << 16) | (buf
[2] << 8) | buf
[3];
270 /* An instruction to match. */
273 unsigned int mask
; /* mask the insn with this... */
274 unsigned int data
; /* ...and see if it matches this. */
275 int optional
; /* If non-zero, this insn may be absent. */
278 /* Return non-zero if the instructions at PC match the series
279 described in PATTERN, or zero otherwise. PATTERN is an array of
280 'struct insn_pattern' objects, terminated by an entry whose mask is
283 When the match is successful, fill INSN[i] with what PATTERN[i]
284 matched. If PATTERN[i] is optional, and the instruction wasn't
285 present, set INSN[i] to 0 (which is not a valid PPC instruction).
286 INSN should have as many elements as PATTERN. Note that, if
287 PATTERN contains optional instructions which aren't present in
288 memory, then INSN will have holes, so INSN[i] isn't necessarily the
289 i'th instruction in memory. */
291 insns_match_pattern (CORE_ADDR pc
,
292 struct insn_pattern
*pattern
,
297 for (i
= 0; pattern
[i
].mask
; i
++)
299 insn
[i
] = read_insn (pc
);
300 if ((insn
[i
] & pattern
[i
].mask
) == pattern
[i
].data
)
302 else if (pattern
[i
].optional
)
312 /* Return the 'd' field of the d-form instruction INSN, properly
315 insn_d_field (unsigned int insn
)
317 return ((((CORE_ADDR
) insn
& 0xffff) ^ 0x8000) - 0x8000);
321 /* Return the 'ds' field of the ds-form instruction INSN, with the two
322 zero bits concatenated at the right, and properly
325 insn_ds_field (unsigned int insn
)
327 return ((((CORE_ADDR
) insn
& 0xfffc) ^ 0x8000) - 0x8000);
331 /* If DESC is the address of a 64-bit PowerPC GNU/Linux function
332 descriptor, return the descriptor's entry point. */
334 ppc64_desc_entry_point (struct gdbarch
*gdbarch
, CORE_ADDR desc
)
336 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
337 /* The first word of the descriptor is the entry point. */
338 return (CORE_ADDR
) read_memory_unsigned_integer (desc
, 8, byte_order
);
342 /* Pattern for the standard linkage function. These are built by
343 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
345 static struct insn_pattern ppc64_standard_linkage1
[] =
347 /* addis r12, r2, <any> */
348 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
351 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
353 /* ld r11, <any>(r12) */
354 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
356 /* addis r12, r12, 1 <optional> */
357 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
359 /* ld r2, <any>(r12) */
360 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
362 /* addis r12, r12, 1 <optional> */
363 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
366 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
368 /* ld r11, <any>(r12) */
369 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
372 { -1, 0x4e800420, 0 },
376 #define PPC64_STANDARD_LINKAGE1_LEN \
377 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
379 static struct insn_pattern ppc64_standard_linkage2
[] =
381 /* addis r12, r2, <any> */
382 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
385 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
387 /* ld r11, <any>(r12) */
388 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
390 /* addi r12, r12, <any> <optional> */
391 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
394 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
396 /* ld r2, <any>(r12) */
397 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
399 /* ld r11, <any>(r12) */
400 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
403 { -1, 0x4e800420, 0 },
407 #define PPC64_STANDARD_LINKAGE2_LEN \
408 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
410 static struct insn_pattern ppc64_standard_linkage3
[] =
413 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
415 /* ld r11, <any>(r2) */
416 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
418 /* addi r2, r2, <any> <optional> */
419 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
422 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
424 /* ld r11, <any>(r2) */
425 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
427 /* ld r2, <any>(r2) */
428 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
431 { -1, 0x4e800420, 0 },
435 #define PPC64_STANDARD_LINKAGE3_LEN \
436 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
439 /* When the dynamic linker is doing lazy symbol resolution, the first
440 call to a function in another object will go like this:
442 - The user's function calls the linkage function:
444 100007c4: 4b ff fc d5 bl 10000498
445 100007c8: e8 41 00 28 ld r2,40(r1)
447 - The linkage function loads the entry point (and other stuff) from
448 the function descriptor in the PLT, and jumps to it:
450 10000498: 3d 82 00 00 addis r12,r2,0
451 1000049c: f8 41 00 28 std r2,40(r1)
452 100004a0: e9 6c 80 98 ld r11,-32616(r12)
453 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
454 100004a8: 7d 69 03 a6 mtctr r11
455 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
456 100004b0: 4e 80 04 20 bctr
458 - But since this is the first time that PLT entry has been used, it
459 sends control to its glink entry. That loads the number of the
460 PLT entry and jumps to the common glink0 code:
462 10000c98: 38 00 00 00 li r0,0
463 10000c9c: 4b ff ff dc b 10000c78
465 - The common glink0 code then transfers control to the dynamic
468 10000c78: e8 41 00 28 ld r2,40(r1)
469 10000c7c: 3d 82 00 00 addis r12,r2,0
470 10000c80: e9 6c 80 80 ld r11,-32640(r12)
471 10000c84: e8 4c 80 88 ld r2,-32632(r12)
472 10000c88: 7d 69 03 a6 mtctr r11
473 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
474 10000c90: 4e 80 04 20 bctr
476 Eventually, this code will figure out how to skip all of this,
477 including the dynamic linker. At the moment, we just get through
478 the linkage function. */
480 /* If the current thread is about to execute a series of instructions
481 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
482 from that pattern match, return the code address to which the
483 standard linkage function will send them. (This doesn't deal with
484 dynamic linker lazy symbol resolution stubs.) */
486 ppc64_standard_linkage1_target (struct frame_info
*frame
,
487 CORE_ADDR pc
, unsigned int *insn
)
489 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
490 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
492 /* The address of the function descriptor this linkage function
495 = ((CORE_ADDR
) get_frame_register_unsigned (frame
,
496 tdep
->ppc_gp0_regnum
+ 2)
497 + (insn_d_field (insn
[0]) << 16)
498 + insn_ds_field (insn
[2]));
500 /* The first word of the descriptor is the entry point. Return that. */
501 return ppc64_desc_entry_point (gdbarch
, desc
);
504 static struct core_regset_section ppc_linux_vsx_regset_sections
[] =
508 { ".reg-ppc-vmx", 544 },
509 { ".reg-ppc-vsx", 256 },
513 static struct core_regset_section ppc_linux_vmx_regset_sections
[] =
517 { ".reg-ppc-vmx", 544 },
521 static struct core_regset_section ppc_linux_fp_regset_sections
[] =
529 ppc64_standard_linkage2_target (struct frame_info
*frame
,
530 CORE_ADDR pc
, unsigned int *insn
)
532 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
533 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
535 /* The address of the function descriptor this linkage function
538 = ((CORE_ADDR
) get_frame_register_unsigned (frame
,
539 tdep
->ppc_gp0_regnum
+ 2)
540 + (insn_d_field (insn
[0]) << 16)
541 + insn_ds_field (insn
[2]));
543 /* The first word of the descriptor is the entry point. Return that. */
544 return ppc64_desc_entry_point (gdbarch
, desc
);
548 ppc64_standard_linkage3_target (struct frame_info
*frame
,
549 CORE_ADDR pc
, unsigned int *insn
)
551 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
552 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
554 /* The address of the function descriptor this linkage function
557 = ((CORE_ADDR
) get_frame_register_unsigned (frame
,
558 tdep
->ppc_gp0_regnum
+ 2)
559 + insn_ds_field (insn
[1]));
561 /* The first word of the descriptor is the entry point. Return that. */
562 return ppc64_desc_entry_point (gdbarch
, desc
);
566 /* Given that we've begun executing a call trampoline at PC, return
567 the entry point of the function the trampoline will go to. */
569 ppc64_skip_trampoline_code (struct frame_info
*frame
, CORE_ADDR pc
)
571 unsigned int ppc64_standard_linkage1_insn
[PPC64_STANDARD_LINKAGE1_LEN
];
572 unsigned int ppc64_standard_linkage2_insn
[PPC64_STANDARD_LINKAGE2_LEN
];
573 unsigned int ppc64_standard_linkage3_insn
[PPC64_STANDARD_LINKAGE3_LEN
];
576 if (insns_match_pattern (pc
, ppc64_standard_linkage1
,
577 ppc64_standard_linkage1_insn
))
578 pc
= ppc64_standard_linkage1_target (frame
, pc
,
579 ppc64_standard_linkage1_insn
);
580 else if (insns_match_pattern (pc
, ppc64_standard_linkage2
,
581 ppc64_standard_linkage2_insn
))
582 pc
= ppc64_standard_linkage2_target (frame
, pc
,
583 ppc64_standard_linkage2_insn
);
584 else if (insns_match_pattern (pc
, ppc64_standard_linkage3
,
585 ppc64_standard_linkage3_insn
))
586 pc
= ppc64_standard_linkage3_target (frame
, pc
,
587 ppc64_standard_linkage3_insn
);
591 /* The PLT descriptor will either point to the already resolved target
592 address, or else to a glink stub. As the latter carry synthetic @plt
593 symbols, find_solib_trampoline_target should be able to resolve them. */
594 target
= find_solib_trampoline_target (frame
, pc
);
595 return target
? target
: pc
;
599 /* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
602 Usually a function pointer's representation is simply the address
603 of the function. On GNU/Linux on the PowerPC however, a function
604 pointer may be a pointer to a function descriptor.
606 For PPC64, a function descriptor is a TOC entry, in a data section,
607 which contains three words: the first word is the address of the
608 function, the second word is the TOC pointer (r2), and the third word
609 is the static chain value.
611 Throughout GDB it is currently assumed that a function pointer contains
612 the address of the function, which is not easy to fix. In addition, the
613 conversion of a function address to a function pointer would
614 require allocation of a TOC entry in the inferior's memory space,
615 with all its drawbacks. To be able to call C++ virtual methods in
616 the inferior (which are called via function pointers),
617 find_function_addr uses this function to get the function address
618 from a function pointer.
620 If ADDR points at what is clearly a function descriptor, transform
621 it into the address of the corresponding function, if needed. Be
622 conservative, otherwise GDB will do the transformation on any
623 random addresses such as occur when there is no symbol table. */
626 ppc64_linux_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
628 struct target_ops
*targ
)
630 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
631 struct target_section
*s
= target_section_by_addr (targ
, addr
);
633 /* Check if ADDR points to a function descriptor. */
634 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
636 /* There may be relocations that need to be applied to the .opd
637 section. Unfortunately, this function may be called at a time
638 where these relocations have not yet been performed -- this can
639 happen for example shortly after a library has been loaded with
640 dlopen, but ld.so has not yet applied the relocations.
642 To cope with both the case where the relocation has been applied,
643 and the case where it has not yet been applied, we do *not* read
644 the (maybe) relocated value from target memory, but we instead
645 read the non-relocated value from the BFD, and apply the relocation
648 This makes the assumption that all .opd entries are always relocated
649 by the same offset the section itself was relocated. This should
650 always be the case for GNU/Linux executables and shared libraries.
651 Note that other kind of object files (e.g. those added via
652 add-symbol-files) will currently never end up here anyway, as this
653 function accesses *target* sections only; only the main exec and
654 shared libraries are ever added to the target. */
659 res
= bfd_get_section_contents (s
->bfd
, s
->the_bfd_section
,
660 &buf
, addr
- s
->addr
, 8);
662 return extract_unsigned_integer (buf
, 8, byte_order
)
663 - bfd_section_vma (s
->bfd
, s
->the_bfd_section
) + s
->addr
;
669 /* Wrappers to handle Linux-only registers. */
672 ppc_linux_supply_gregset (const struct regset
*regset
,
673 struct regcache
*regcache
,
674 int regnum
, const void *gregs
, size_t len
)
676 const struct ppc_reg_offsets
*offsets
= regset
->descr
;
678 ppc_supply_gregset (regset
, regcache
, regnum
, gregs
, len
);
680 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache
)))
682 /* "orig_r3" is stored 2 slots after "pc". */
683 if (regnum
== -1 || regnum
== PPC_ORIG_R3_REGNUM
)
684 ppc_supply_reg (regcache
, PPC_ORIG_R3_REGNUM
, gregs
,
685 offsets
->pc_offset
+ 2 * offsets
->gpr_size
,
688 /* "trap" is stored 8 slots after "pc". */
689 if (regnum
== -1 || regnum
== PPC_TRAP_REGNUM
)
690 ppc_supply_reg (regcache
, PPC_TRAP_REGNUM
, gregs
,
691 offsets
->pc_offset
+ 8 * offsets
->gpr_size
,
697 ppc_linux_collect_gregset (const struct regset
*regset
,
698 const struct regcache
*regcache
,
699 int regnum
, void *gregs
, size_t len
)
701 const struct ppc_reg_offsets
*offsets
= regset
->descr
;
703 /* Clear areas in the linux gregset not written elsewhere. */
705 memset (gregs
, 0, len
);
707 ppc_collect_gregset (regset
, regcache
, regnum
, gregs
, len
);
709 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache
)))
711 /* "orig_r3" is stored 2 slots after "pc". */
712 if (regnum
== -1 || regnum
== PPC_ORIG_R3_REGNUM
)
713 ppc_collect_reg (regcache
, PPC_ORIG_R3_REGNUM
, gregs
,
714 offsets
->pc_offset
+ 2 * offsets
->gpr_size
,
717 /* "trap" is stored 8 slots after "pc". */
718 if (regnum
== -1 || regnum
== PPC_TRAP_REGNUM
)
719 ppc_collect_reg (regcache
, PPC_TRAP_REGNUM
, gregs
,
720 offsets
->pc_offset
+ 8 * offsets
->gpr_size
,
725 /* Regset descriptions. */
726 static const struct ppc_reg_offsets ppc32_linux_reg_offsets
=
728 /* General-purpose registers. */
729 /* .r0_offset = */ 0,
732 /* .pc_offset = */ 128,
733 /* .ps_offset = */ 132,
734 /* .cr_offset = */ 152,
735 /* .lr_offset = */ 144,
736 /* .ctr_offset = */ 140,
737 /* .xer_offset = */ 148,
738 /* .mq_offset = */ 156,
740 /* Floating-point registers. */
741 /* .f0_offset = */ 0,
742 /* .fpscr_offset = */ 256,
743 /* .fpscr_size = */ 8,
745 /* AltiVec registers. */
746 /* .vr0_offset = */ 0,
747 /* .vscr_offset = */ 512 + 12,
748 /* .vrsave_offset = */ 528
751 static const struct ppc_reg_offsets ppc64_linux_reg_offsets
=
753 /* General-purpose registers. */
754 /* .r0_offset = */ 0,
757 /* .pc_offset = */ 256,
758 /* .ps_offset = */ 264,
759 /* .cr_offset = */ 304,
760 /* .lr_offset = */ 288,
761 /* .ctr_offset = */ 280,
762 /* .xer_offset = */ 296,
763 /* .mq_offset = */ 312,
765 /* Floating-point registers. */
766 /* .f0_offset = */ 0,
767 /* .fpscr_offset = */ 256,
768 /* .fpscr_size = */ 8,
770 /* AltiVec registers. */
771 /* .vr0_offset = */ 0,
772 /* .vscr_offset = */ 512 + 12,
773 /* .vrsave_offset = */ 528
776 static const struct regset ppc32_linux_gregset
= {
777 &ppc32_linux_reg_offsets
,
778 ppc_linux_supply_gregset
,
779 ppc_linux_collect_gregset
,
783 static const struct regset ppc64_linux_gregset
= {
784 &ppc64_linux_reg_offsets
,
785 ppc_linux_supply_gregset
,
786 ppc_linux_collect_gregset
,
790 static const struct regset ppc32_linux_fpregset
= {
791 &ppc32_linux_reg_offsets
,
793 ppc_collect_fpregset
,
797 static const struct regset ppc32_linux_vrregset
= {
798 &ppc32_linux_reg_offsets
,
800 ppc_collect_vrregset
,
804 static const struct regset ppc32_linux_vsxregset
= {
805 &ppc32_linux_reg_offsets
,
806 ppc_supply_vsxregset
,
807 ppc_collect_vsxregset
,
811 const struct regset
*
812 ppc_linux_gregset (int wordsize
)
814 return wordsize
== 8 ? &ppc64_linux_gregset
: &ppc32_linux_gregset
;
817 const struct regset
*
818 ppc_linux_fpregset (void)
820 return &ppc32_linux_fpregset
;
823 static const struct regset
*
824 ppc_linux_regset_from_core_section (struct gdbarch
*core_arch
,
825 const char *sect_name
, size_t sect_size
)
827 struct gdbarch_tdep
*tdep
= gdbarch_tdep (core_arch
);
828 if (strcmp (sect_name
, ".reg") == 0)
830 if (tdep
->wordsize
== 4)
831 return &ppc32_linux_gregset
;
833 return &ppc64_linux_gregset
;
835 if (strcmp (sect_name
, ".reg2") == 0)
836 return &ppc32_linux_fpregset
;
837 if (strcmp (sect_name
, ".reg-ppc-vmx") == 0)
838 return &ppc32_linux_vrregset
;
839 if (strcmp (sect_name
, ".reg-ppc-vsx") == 0)
840 return &ppc32_linux_vsxregset
;
845 ppc_linux_sigtramp_cache (struct frame_info
*this_frame
,
846 struct trad_frame_cache
*this_cache
,
847 CORE_ADDR func
, LONGEST offset
,
855 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
856 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
857 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
859 base
= get_frame_register_unsigned (this_frame
,
860 gdbarch_sp_regnum (gdbarch
));
861 if (bias
> 0 && get_frame_pc (this_frame
) != func
)
862 /* See below, some signal trampolines increment the stack as their
863 first instruction, need to compensate for that. */
866 /* Find the address of the register buffer pointer. */
867 regs
= base
+ offset
;
868 /* Use that to find the address of the corresponding register
870 gpregs
= read_memory_unsigned_integer (regs
, tdep
->wordsize
, byte_order
);
871 fpregs
= gpregs
+ 48 * tdep
->wordsize
;
873 /* General purpose. */
874 for (i
= 0; i
< 32; i
++)
876 int regnum
= i
+ tdep
->ppc_gp0_regnum
;
877 trad_frame_set_reg_addr (this_cache
, regnum
, gpregs
+ i
* tdep
->wordsize
);
879 trad_frame_set_reg_addr (this_cache
,
880 gdbarch_pc_regnum (gdbarch
),
881 gpregs
+ 32 * tdep
->wordsize
);
882 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_ctr_regnum
,
883 gpregs
+ 35 * tdep
->wordsize
);
884 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_lr_regnum
,
885 gpregs
+ 36 * tdep
->wordsize
);
886 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_xer_regnum
,
887 gpregs
+ 37 * tdep
->wordsize
);
888 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_cr_regnum
,
889 gpregs
+ 38 * tdep
->wordsize
);
891 if (ppc_linux_trap_reg_p (gdbarch
))
893 trad_frame_set_reg_addr (this_cache
, PPC_ORIG_R3_REGNUM
,
894 gpregs
+ 34 * tdep
->wordsize
);
895 trad_frame_set_reg_addr (this_cache
, PPC_TRAP_REGNUM
,
896 gpregs
+ 40 * tdep
->wordsize
);
899 if (ppc_floating_point_unit_p (gdbarch
))
901 /* Floating point registers. */
902 for (i
= 0; i
< 32; i
++)
904 int regnum
= i
+ gdbarch_fp0_regnum (gdbarch
);
905 trad_frame_set_reg_addr (this_cache
, regnum
,
906 fpregs
+ i
* tdep
->wordsize
);
908 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_fpscr_regnum
,
909 fpregs
+ 32 * tdep
->wordsize
);
911 trad_frame_set_id (this_cache
, frame_id_build (base
, func
));
915 ppc32_linux_sigaction_cache_init (const struct tramp_frame
*self
,
916 struct frame_info
*this_frame
,
917 struct trad_frame_cache
*this_cache
,
920 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
921 0xd0 /* Offset to ucontext_t. */
922 + 0x30 /* Offset to .reg. */,
927 ppc64_linux_sigaction_cache_init (const struct tramp_frame
*self
,
928 struct frame_info
*this_frame
,
929 struct trad_frame_cache
*this_cache
,
932 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
933 0x80 /* Offset to ucontext_t. */
934 + 0xe0 /* Offset to .reg. */,
939 ppc32_linux_sighandler_cache_init (const struct tramp_frame
*self
,
940 struct frame_info
*this_frame
,
941 struct trad_frame_cache
*this_cache
,
944 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
945 0x40 /* Offset to ucontext_t. */
946 + 0x1c /* Offset to .reg. */,
951 ppc64_linux_sighandler_cache_init (const struct tramp_frame
*self
,
952 struct frame_info
*this_frame
,
953 struct trad_frame_cache
*this_cache
,
956 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
957 0x80 /* Offset to struct sigcontext. */
958 + 0x38 /* Offset to .reg. */,
962 static struct tramp_frame ppc32_linux_sigaction_tramp_frame
= {
966 { 0x380000ac, -1 }, /* li r0, 172 */
967 { 0x44000002, -1 }, /* sc */
968 { TRAMP_SENTINEL_INSN
},
970 ppc32_linux_sigaction_cache_init
972 static struct tramp_frame ppc64_linux_sigaction_tramp_frame
= {
976 { 0x38210080, -1 }, /* addi r1,r1,128 */
977 { 0x380000ac, -1 }, /* li r0, 172 */
978 { 0x44000002, -1 }, /* sc */
979 { TRAMP_SENTINEL_INSN
},
981 ppc64_linux_sigaction_cache_init
983 static struct tramp_frame ppc32_linux_sighandler_tramp_frame
= {
987 { 0x38000077, -1 }, /* li r0,119 */
988 { 0x44000002, -1 }, /* sc */
989 { TRAMP_SENTINEL_INSN
},
991 ppc32_linux_sighandler_cache_init
993 static struct tramp_frame ppc64_linux_sighandler_tramp_frame
= {
997 { 0x38210080, -1 }, /* addi r1,r1,128 */
998 { 0x38000077, -1 }, /* li r0,119 */
999 { 0x44000002, -1 }, /* sc */
1000 { TRAMP_SENTINEL_INSN
},
1002 ppc64_linux_sighandler_cache_init
1006 /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
1008 ppc_linux_trap_reg_p (struct gdbarch
*gdbarch
)
1010 /* If we do not have a target description with registers, then
1011 the special registers will not be included in the register set. */
1012 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
1015 /* If we do, then it is safe to check the size. */
1016 return register_size (gdbarch
, PPC_ORIG_R3_REGNUM
) > 0
1017 && register_size (gdbarch
, PPC_TRAP_REGNUM
) > 0;
1021 ppc_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1023 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1025 regcache_cooked_write_unsigned (regcache
, gdbarch_pc_regnum (gdbarch
), pc
);
1027 /* Set special TRAP register to -1 to prevent the kernel from
1028 messing with the PC we just installed, if we happen to be
1029 within an interrupted system call that the kernel wants to
1032 Note that after we return from the dummy call, the TRAP and
1033 ORIG_R3 registers will be automatically restored, and the
1034 kernel continues to restart the system call at this point. */
1035 if (ppc_linux_trap_reg_p (gdbarch
))
1036 regcache_cooked_write_unsigned (regcache
, PPC_TRAP_REGNUM
, -1);
1040 ppc_linux_spu_section (bfd
*abfd
, asection
*asect
, void *user_data
)
1042 return strncmp (bfd_section_name (abfd
, asect
), "SPU/", 4) == 0;
1045 static const struct target_desc
*
1046 ppc_linux_core_read_description (struct gdbarch
*gdbarch
,
1047 struct target_ops
*target
,
1050 asection
*cell
= bfd_sections_find_if (abfd
, ppc_linux_spu_section
, NULL
);
1051 asection
*altivec
= bfd_get_section_by_name (abfd
, ".reg-ppc-vmx");
1052 asection
*vsx
= bfd_get_section_by_name (abfd
, ".reg-ppc-vsx");
1053 asection
*section
= bfd_get_section_by_name (abfd
, ".reg");
1057 switch (bfd_section_size (abfd
, section
))
1061 return tdesc_powerpc_cell32l
;
1063 return tdesc_powerpc_vsx32l
;
1065 return tdesc_powerpc_altivec32l
;
1067 return tdesc_powerpc_32l
;
1071 return tdesc_powerpc_cell64l
;
1073 return tdesc_powerpc_vsx64l
;
1075 return tdesc_powerpc_altivec64l
;
1077 return tdesc_powerpc_64l
;
1085 ppc_linux_init_abi (struct gdbarch_info info
,
1086 struct gdbarch
*gdbarch
)
1088 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1089 struct tdesc_arch_data
*tdesc_data
= (void *) info
.tdep_info
;
1091 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
1092 128-bit, they are IBM long double, not IEEE quad long double as
1093 in the System V ABI PowerPC Processor Supplement. We can safely
1094 let them default to 128-bit, since the debug info will give the
1095 size of type actually used in each case. */
1096 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
1097 set_gdbarch_long_double_format (gdbarch
, floatformats_ibm_long_double
);
1099 /* Handle inferior calls during interrupted system calls. */
1100 set_gdbarch_write_pc (gdbarch
, ppc_linux_write_pc
);
1102 if (tdep
->wordsize
== 4)
1104 /* Until November 2001, gcc did not comply with the 32 bit SysV
1105 R4 ABI requirement that structures less than or equal to 8
1106 bytes should be returned in registers. Instead GCC was using
1107 the the AIX/PowerOpen ABI - everything returned in memory
1108 (well ignoring vectors that is). When this was corrected, it
1109 wasn't fixed for GNU/Linux native platform. Use the
1110 PowerOpen struct convention. */
1111 set_gdbarch_return_value (gdbarch
, ppc_linux_return_value
);
1113 set_gdbarch_memory_remove_breakpoint (gdbarch
,
1114 ppc_linux_memory_remove_breakpoint
);
1116 /* Shared library handling. */
1117 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1118 set_solib_svr4_fetch_link_map_offsets
1119 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1122 tramp_frame_prepend_unwinder (gdbarch
, &ppc32_linux_sigaction_tramp_frame
);
1123 tramp_frame_prepend_unwinder (gdbarch
, &ppc32_linux_sighandler_tramp_frame
);
1125 /* BFD target for core files. */
1126 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1127 set_gdbarch_gcore_bfd_target (gdbarch
, "elf32-powerpcle");
1129 set_gdbarch_gcore_bfd_target (gdbarch
, "elf32-powerpc");
1132 if (tdep
->wordsize
== 8)
1134 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1135 function descriptors). */
1136 set_gdbarch_convert_from_func_ptr_addr
1137 (gdbarch
, ppc64_linux_convert_from_func_ptr_addr
);
1139 /* Shared library handling. */
1140 set_gdbarch_skip_trampoline_code (gdbarch
, ppc64_skip_trampoline_code
);
1141 set_solib_svr4_fetch_link_map_offsets
1142 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1145 tramp_frame_prepend_unwinder (gdbarch
, &ppc64_linux_sigaction_tramp_frame
);
1146 tramp_frame_prepend_unwinder (gdbarch
, &ppc64_linux_sighandler_tramp_frame
);
1148 /* BFD target for core files. */
1149 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1150 set_gdbarch_gcore_bfd_target (gdbarch
, "elf64-powerpcle");
1152 set_gdbarch_gcore_bfd_target (gdbarch
, "elf64-powerpc");
1154 set_gdbarch_regset_from_core_section (gdbarch
, ppc_linux_regset_from_core_section
);
1155 set_gdbarch_core_read_description (gdbarch
, ppc_linux_core_read_description
);
1157 /* Supported register sections. */
1158 if (tdesc_find_feature (info
.target_desc
,
1159 "org.gnu.gdb.power.vsx"))
1160 set_gdbarch_core_regset_sections (gdbarch
, ppc_linux_vsx_regset_sections
);
1161 else if (tdesc_find_feature (info
.target_desc
,
1162 "org.gnu.gdb.power.altivec"))
1163 set_gdbarch_core_regset_sections (gdbarch
, ppc_linux_vmx_regset_sections
);
1165 set_gdbarch_core_regset_sections (gdbarch
, ppc_linux_fp_regset_sections
);
1167 /* Enable TLS support. */
1168 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1169 svr4_fetch_objfile_link_map
);
1173 const struct tdesc_feature
*feature
;
1175 /* If we have target-described registers, then we can safely
1176 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1177 (whether they are described or not). */
1178 gdb_assert (gdbarch_num_regs (gdbarch
) <= PPC_ORIG_R3_REGNUM
);
1179 set_gdbarch_num_regs (gdbarch
, PPC_TRAP_REGNUM
+ 1);
1181 /* If they are present, then assign them to the reserved number. */
1182 feature
= tdesc_find_feature (info
.target_desc
,
1183 "org.gnu.gdb.power.linux");
1184 if (feature
!= NULL
)
1186 tdesc_numbered_register (feature
, tdesc_data
,
1187 PPC_ORIG_R3_REGNUM
, "orig_r3");
1188 tdesc_numbered_register (feature
, tdesc_data
,
1189 PPC_TRAP_REGNUM
, "trap");
1194 /* Provide a prototype to silence -Wmissing-prototypes. */
1195 extern initialize_file_ftype _initialize_ppc_linux_tdep
;
1198 _initialize_ppc_linux_tdep (void)
1200 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1201 64-bit PowerPC, and the older rs6k. */
1202 gdbarch_register_osabi (bfd_arch_powerpc
, bfd_mach_ppc
, GDB_OSABI_LINUX
,
1203 ppc_linux_init_abi
);
1204 gdbarch_register_osabi (bfd_arch_powerpc
, bfd_mach_ppc64
, GDB_OSABI_LINUX
,
1205 ppc_linux_init_abi
);
1206 gdbarch_register_osabi (bfd_arch_rs6000
, bfd_mach_rs6k
, GDB_OSABI_LINUX
,
1207 ppc_linux_init_abi
);
1209 /* Initialize the Linux target descriptions. */
1210 initialize_tdesc_powerpc_32l ();
1211 initialize_tdesc_powerpc_altivec32l ();
1212 initialize_tdesc_powerpc_cell32l ();
1213 initialize_tdesc_powerpc_vsx32l ();
1214 initialize_tdesc_powerpc_isa205_32l ();
1215 initialize_tdesc_powerpc_isa205_altivec32l ();
1216 initialize_tdesc_powerpc_isa205_vsx32l ();
1217 initialize_tdesc_powerpc_64l ();
1218 initialize_tdesc_powerpc_altivec64l ();
1219 initialize_tdesc_powerpc_cell64l ();
1220 initialize_tdesc_powerpc_vsx64l ();
1221 initialize_tdesc_powerpc_isa205_64l ();
1222 initialize_tdesc_powerpc_isa205_altivec64l ();
1223 initialize_tdesc_powerpc_isa205_vsx64l ();
1224 initialize_tdesc_powerpc_e500l ();