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* dwarf1.c (struct dwarf1_debug): Add syms member.
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbcore.h"
24 #include "inferior.h"
25 #include "regcache.h"
26 #include "value.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
29 #include "ppc-tdep.h"
30 #include "target.h"
31 #include "objfiles.h"
32 #include "infcall.h"
33
34 /* Pass the arguments in either registers, or in the stack. Using the
35 ppc sysv ABI, the first eight words of the argument list (that might
36 be less than eight parameters if some parameters occupy more than one
37 word) are passed in r3..r10 registers. float and double parameters are
38 passed in fpr's, in addition to that. Rest of the parameters if any
39 are passed in user stack.
40
41 If the function is returning a structure, then the return address is passed
42 in r3, then the first 7 words of the parametes can be passed in registers,
43 starting from r4. */
44
45 CORE_ADDR
46 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
47 struct regcache *regcache, CORE_ADDR bp_addr,
48 int nargs, struct value **args, CORE_ADDR sp,
49 int struct_return, CORE_ADDR struct_addr)
50 {
51 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
52 ULONGEST saved_sp;
53 int argspace = 0; /* 0 is an initial wrong guess. */
54 int write_pass;
55
56 gdb_assert (tdep->wordsize == 4);
57
58 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
59 &saved_sp);
60
61 /* Go through the argument list twice.
62
63 Pass 1: Figure out how much new stack space is required for
64 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
65 ABI doesn't reserve any extra space for parameters which are put
66 in registers, but does always push structures and then pass their
67 address.
68
69 Pass 2: Replay the same computation but this time also write the
70 values out to the target. */
71
72 for (write_pass = 0; write_pass < 2; write_pass++)
73 {
74 int argno;
75 /* Next available floating point register for float and double
76 arguments. */
77 int freg = 1;
78 /* Next available general register for non-float, non-vector
79 arguments. */
80 int greg = 3;
81 /* Next available vector register for vector arguments. */
82 int vreg = 2;
83 /* Arguments start above the "LR save word" and "Back chain". */
84 int argoffset = 2 * tdep->wordsize;
85 /* Structures start after the arguments. */
86 int structoffset = argoffset + argspace;
87
88 /* If the function is returning a `struct', then the first word
89 (which will be passed in r3) is used for struct return
90 address. In that case we should advance one word and start
91 from r4 register to copy parameters. */
92 if (struct_return)
93 {
94 if (write_pass)
95 regcache_cooked_write_signed (regcache,
96 tdep->ppc_gp0_regnum + greg,
97 struct_addr);
98 greg++;
99 }
100
101 for (argno = 0; argno < nargs; argno++)
102 {
103 struct value *arg = args[argno];
104 struct type *type = check_typedef (value_type (arg));
105 int len = TYPE_LENGTH (type);
106 const bfd_byte *val = value_contents (arg);
107
108 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
109 && !tdep->soft_float)
110 {
111 /* Floating point value converted to "double" then
112 passed in an FP register, when the registers run out,
113 8 byte aligned stack is used. */
114 if (freg <= 8)
115 {
116 if (write_pass)
117 {
118 /* Always store the floating point value using
119 the register's floating-point format. */
120 gdb_byte regval[MAX_REGISTER_SIZE];
121 struct type *regtype
122 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
123 convert_typed_floating (val, type, regval, regtype);
124 regcache_cooked_write (regcache,
125 tdep->ppc_fp0_regnum + freg,
126 regval);
127 }
128 freg++;
129 }
130 else
131 {
132 /* The SysV ABI tells us to convert floats to
133 doubles before writing them to an 8 byte aligned
134 stack location. Unfortunately GCC does not do
135 that, and stores floats into 4 byte aligned
136 locations without converting them to doubles.
137 Since there is no know compiler that actually
138 follows the ABI here, we implement the GCC
139 convention. */
140
141 /* Align to 4 bytes or 8 bytes depending on the type of
142 the argument (float or double). */
143 argoffset = align_up (argoffset, len);
144 if (write_pass)
145 write_memory (sp + argoffset, val, len);
146 argoffset += len;
147 }
148 }
149 else if (TYPE_CODE (type) == TYPE_CODE_FLT
150 && len == 16
151 && !tdep->soft_float
152 && (gdbarch_long_double_format (gdbarch)
153 == floatformats_ibm_long_double))
154 {
155 /* IBM long double passed in two FP registers if
156 available, otherwise 8-byte aligned stack. */
157 if (freg <= 7)
158 {
159 if (write_pass)
160 {
161 regcache_cooked_write (regcache,
162 tdep->ppc_fp0_regnum + freg,
163 val);
164 regcache_cooked_write (regcache,
165 tdep->ppc_fp0_regnum + freg + 1,
166 val + 8);
167 }
168 freg += 2;
169 }
170 else
171 {
172 argoffset = align_up (argoffset, 8);
173 if (write_pass)
174 write_memory (sp + argoffset, val, len);
175 argoffset += 16;
176 }
177 }
178 else if (len == 8
179 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
180 || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */
181 {
182 /* "long long" or soft-float "double" passed in an odd/even
183 register pair with the low addressed word in the odd
184 register and the high addressed word in the even
185 register, or when the registers run out an 8 byte
186 aligned stack location. */
187 if (greg > 9)
188 {
189 /* Just in case GREG was 10. */
190 greg = 11;
191 argoffset = align_up (argoffset, 8);
192 if (write_pass)
193 write_memory (sp + argoffset, val, len);
194 argoffset += 8;
195 }
196 else
197 {
198 /* Must start on an odd register - r3/r4 etc. */
199 if ((greg & 1) == 0)
200 greg++;
201 if (write_pass)
202 {
203 regcache_cooked_write (regcache,
204 tdep->ppc_gp0_regnum + greg + 0,
205 val + 0);
206 regcache_cooked_write (regcache,
207 tdep->ppc_gp0_regnum + greg + 1,
208 val + 4);
209 }
210 greg += 2;
211 }
212 }
213 else if (len == 16 && TYPE_CODE (type) == TYPE_CODE_FLT
214 && (gdbarch_long_double_format (gdbarch)
215 == floatformats_ibm_long_double))
216 {
217 /* Soft-float IBM long double passed in four consecutive
218 registers, or on the stack. The registers are not
219 necessarily odd/even pairs. */
220 if (greg > 7)
221 {
222 greg = 11;
223 argoffset = align_up (argoffset, 8);
224 if (write_pass)
225 write_memory (sp + argoffset, val, len);
226 argoffset += 16;
227 }
228 else
229 {
230 if (write_pass)
231 {
232 regcache_cooked_write (regcache,
233 tdep->ppc_gp0_regnum + greg + 0,
234 val + 0);
235 regcache_cooked_write (regcache,
236 tdep->ppc_gp0_regnum + greg + 1,
237 val + 4);
238 regcache_cooked_write (regcache,
239 tdep->ppc_gp0_regnum + greg + 2,
240 val + 8);
241 regcache_cooked_write (regcache,
242 tdep->ppc_gp0_regnum + greg + 3,
243 val + 12);
244 }
245 greg += 4;
246 }
247 }
248 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
249 && !tdep->soft_float)
250 {
251 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
252 end up in memory. */
253
254 if (freg <= 8)
255 {
256 if (write_pass)
257 {
258 gdb_byte regval[MAX_REGISTER_SIZE];
259 const gdb_byte *p;
260
261 /* 32-bit decimal floats are right aligned in the
262 doubleword. */
263 if (TYPE_LENGTH (type) == 4)
264 {
265 memcpy (regval + 4, val, 4);
266 p = regval;
267 }
268 else
269 p = val;
270
271 regcache_cooked_write (regcache,
272 tdep->ppc_fp0_regnum + freg, p);
273 }
274
275 freg++;
276 }
277 else
278 {
279 argoffset = align_up (argoffset, len);
280
281 if (write_pass)
282 /* Write value in the stack's parameter save area. */
283 write_memory (sp + argoffset, val, len);
284
285 argoffset += len;
286 }
287 }
288 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
289 && !tdep->soft_float)
290 {
291 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
292 pairs. They can end up in memory, using two doublewords. */
293
294 if (freg <= 6)
295 {
296 /* Make sure freg is even. */
297 freg += freg & 1;
298
299 if (write_pass)
300 {
301 regcache_cooked_write (regcache,
302 tdep->ppc_fp0_regnum + freg, val);
303 regcache_cooked_write (regcache,
304 tdep->ppc_fp0_regnum + freg + 1, val + 8);
305 }
306 }
307 else
308 {
309 argoffset = align_up (argoffset, 8);
310
311 if (write_pass)
312 write_memory (sp + argoffset, val, 16);
313
314 argoffset += 16;
315 }
316
317 /* If a 128-bit decimal float goes to the stack because only f7
318 and f8 are free (thus there's no even/odd register pair
319 available), these registers should be marked as occupied.
320 Hence we increase freg even when writing to memory. */
321 freg += 2;
322 }
323 else if (len == 16
324 && TYPE_CODE (type) == TYPE_CODE_ARRAY
325 && TYPE_VECTOR (type)
326 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
327 {
328 /* Vector parameter passed in an Altivec register, or
329 when that runs out, 16 byte aligned stack location. */
330 if (vreg <= 13)
331 {
332 if (write_pass)
333 regcache_cooked_write (regcache,
334 tdep->ppc_vr0_regnum + vreg, val);
335 vreg++;
336 }
337 else
338 {
339 argoffset = align_up (argoffset, 16);
340 if (write_pass)
341 write_memory (sp + argoffset, val, 16);
342 argoffset += 16;
343 }
344 }
345 else if (len == 8
346 && TYPE_CODE (type) == TYPE_CODE_ARRAY
347 && TYPE_VECTOR (type)
348 && tdep->vector_abi == POWERPC_VEC_SPE)
349 {
350 /* Vector parameter passed in an e500 register, or when
351 that runs out, 8 byte aligned stack location. Note
352 that since e500 vector and general purpose registers
353 both map onto the same underlying register set, a
354 "greg" and not a "vreg" is consumed here. A cooked
355 write stores the value in the correct locations
356 within the raw register cache. */
357 if (greg <= 10)
358 {
359 if (write_pass)
360 regcache_cooked_write (regcache,
361 tdep->ppc_ev0_regnum + greg, val);
362 greg++;
363 }
364 else
365 {
366 argoffset = align_up (argoffset, 8);
367 if (write_pass)
368 write_memory (sp + argoffset, val, 8);
369 argoffset += 8;
370 }
371 }
372 else
373 {
374 /* Reduce the parameter down to something that fits in a
375 "word". */
376 gdb_byte word[MAX_REGISTER_SIZE];
377 memset (word, 0, MAX_REGISTER_SIZE);
378 if (len > tdep->wordsize
379 || TYPE_CODE (type) == TYPE_CODE_STRUCT
380 || TYPE_CODE (type) == TYPE_CODE_UNION)
381 {
382 /* Structs and large values are put in an
383 aligned stack slot ... */
384 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
385 && TYPE_VECTOR (type)
386 && len >= 16)
387 structoffset = align_up (structoffset, 16);
388 else
389 structoffset = align_up (structoffset, 8);
390
391 if (write_pass)
392 write_memory (sp + structoffset, val, len);
393 /* ... and then a "word" pointing to that address is
394 passed as the parameter. */
395 store_unsigned_integer (word, tdep->wordsize,
396 sp + structoffset);
397 structoffset += len;
398 }
399 else if (TYPE_CODE (type) == TYPE_CODE_INT)
400 /* Sign or zero extend the "int" into a "word". */
401 store_unsigned_integer (word, tdep->wordsize,
402 unpack_long (type, val));
403 else
404 /* Always goes in the low address. */
405 memcpy (word, val, len);
406 /* Store that "word" in a register, or on the stack.
407 The words have "4" byte alignment. */
408 if (greg <= 10)
409 {
410 if (write_pass)
411 regcache_cooked_write (regcache,
412 tdep->ppc_gp0_regnum + greg, word);
413 greg++;
414 }
415 else
416 {
417 argoffset = align_up (argoffset, tdep->wordsize);
418 if (write_pass)
419 write_memory (sp + argoffset, word, tdep->wordsize);
420 argoffset += tdep->wordsize;
421 }
422 }
423 }
424
425 /* Compute the actual stack space requirements. */
426 if (!write_pass)
427 {
428 /* Remember the amount of space needed by the arguments. */
429 argspace = argoffset;
430 /* Allocate space for both the arguments and the structures. */
431 sp -= (argoffset + structoffset);
432 /* Ensure that the stack is still 16 byte aligned. */
433 sp = align_down (sp, 16);
434 }
435
436 /* The psABI says that "A caller of a function that takes a
437 variable argument list shall set condition register bit 6 to
438 1 if it passes one or more arguments in the floating-point
439 registers. It is strongly recommended that the caller set the
440 bit to 0 otherwise..." Doing this for normal functions too
441 shouldn't hurt. */
442 if (write_pass)
443 {
444 ULONGEST cr;
445
446 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
447 if (freg > 1)
448 cr |= 0x02000000;
449 else
450 cr &= ~0x02000000;
451 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
452 }
453 }
454
455 /* Update %sp. */
456 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
457
458 /* Write the backchain (it occupies WORDSIZED bytes). */
459 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
460
461 /* Point the inferior function call's return address at the dummy's
462 breakpoint. */
463 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
464
465 return sp;
466 }
467
468 /* Handle the return-value conventions for Decimal Floating Point values
469 in both ppc32 and ppc64, which are the same. */
470 static int
471 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
472 struct regcache *regcache, gdb_byte *readbuf,
473 const gdb_byte *writebuf)
474 {
475 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
476
477 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
478
479 /* 32-bit and 64-bit decimal floats in f1. */
480 if (TYPE_LENGTH (valtype) <= 8)
481 {
482 if (writebuf != NULL)
483 {
484 gdb_byte regval[MAX_REGISTER_SIZE];
485 const gdb_byte *p;
486
487 /* 32-bit decimal float is right aligned in the doubleword. */
488 if (TYPE_LENGTH (valtype) == 4)
489 {
490 memcpy (regval + 4, writebuf, 4);
491 p = regval;
492 }
493 else
494 p = writebuf;
495
496 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
497 }
498 if (readbuf != NULL)
499 {
500 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
501
502 /* Left align 32-bit decimal float. */
503 if (TYPE_LENGTH (valtype) == 4)
504 memcpy (readbuf, readbuf + 4, 4);
505 }
506 }
507 /* 128-bit decimal floats in f2,f3. */
508 else if (TYPE_LENGTH (valtype) == 16)
509 {
510 if (writebuf != NULL || readbuf != NULL)
511 {
512 int i;
513
514 for (i = 0; i < 2; i++)
515 {
516 if (writebuf != NULL)
517 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
518 writebuf + i * 8);
519 if (readbuf != NULL)
520 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
521 readbuf + i * 8);
522 }
523 }
524 }
525 else
526 /* Can't happen. */
527 internal_error (__FILE__, __LINE__, "Unknown decimal float size.");
528
529 return RETURN_VALUE_REGISTER_CONVENTION;
530 }
531
532 /* Handle the return-value conventions specified by the SysV 32-bit
533 PowerPC ABI (including all the supplements):
534
535 no floating-point: floating-point values returned using 32-bit
536 general-purpose registers.
537
538 Altivec: 128-bit vectors returned using vector registers.
539
540 e500: 64-bit vectors returned using the full full 64 bit EV
541 register, floating-point values returned using 32-bit
542 general-purpose registers.
543
544 GCC (broken): Small struct values right (instead of left) aligned
545 when returned in general-purpose registers. */
546
547 static enum return_value_convention
548 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
549 struct regcache *regcache, gdb_byte *readbuf,
550 const gdb_byte *writebuf, int broken_gcc)
551 {
552 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
553 gdb_assert (tdep->wordsize == 4);
554 if (TYPE_CODE (type) == TYPE_CODE_FLT
555 && TYPE_LENGTH (type) <= 8
556 && !tdep->soft_float)
557 {
558 if (readbuf)
559 {
560 /* Floats and doubles stored in "f1". Convert the value to
561 the required type. */
562 gdb_byte regval[MAX_REGISTER_SIZE];
563 struct type *regtype = register_type (gdbarch,
564 tdep->ppc_fp0_regnum + 1);
565 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
566 convert_typed_floating (regval, regtype, readbuf, type);
567 }
568 if (writebuf)
569 {
570 /* Floats and doubles stored in "f1". Convert the value to
571 the register's "double" type. */
572 gdb_byte regval[MAX_REGISTER_SIZE];
573 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
574 convert_typed_floating (writebuf, type, regval, regtype);
575 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
576 }
577 return RETURN_VALUE_REGISTER_CONVENTION;
578 }
579 if (TYPE_CODE (type) == TYPE_CODE_FLT
580 && TYPE_LENGTH (type) == 16
581 && !tdep->soft_float
582 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
583 {
584 /* IBM long double stored in f1 and f2. */
585 if (readbuf)
586 {
587 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
588 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
589 readbuf + 8);
590 }
591 if (writebuf)
592 {
593 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
594 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
595 writebuf + 8);
596 }
597 return RETURN_VALUE_REGISTER_CONVENTION;
598 }
599 if (TYPE_CODE (type) == TYPE_CODE_FLT
600 && TYPE_LENGTH (type) == 16
601 && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
602 {
603 /* Soft-float IBM long double stored in r3, r4, r5, r6. */
604 if (readbuf)
605 {
606 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
607 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
608 readbuf + 4);
609 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
610 readbuf + 8);
611 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
612 readbuf + 12);
613 }
614 if (writebuf)
615 {
616 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
617 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
618 writebuf + 4);
619 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
620 writebuf + 8);
621 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
622 writebuf + 12);
623 }
624 return RETURN_VALUE_REGISTER_CONVENTION;
625 }
626 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
627 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
628 {
629 if (readbuf)
630 {
631 /* A long long, or a double stored in the 32 bit r3/r4. */
632 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
633 readbuf + 0);
634 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
635 readbuf + 4);
636 }
637 if (writebuf)
638 {
639 /* A long long, or a double stored in the 32 bit r3/r4. */
640 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
641 writebuf + 0);
642 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
643 writebuf + 4);
644 }
645 return RETURN_VALUE_REGISTER_CONVENTION;
646 }
647 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
648 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
649 writebuf);
650 else if ((TYPE_CODE (type) == TYPE_CODE_INT
651 || TYPE_CODE (type) == TYPE_CODE_CHAR
652 || TYPE_CODE (type) == TYPE_CODE_BOOL
653 || TYPE_CODE (type) == TYPE_CODE_PTR
654 || TYPE_CODE (type) == TYPE_CODE_REF
655 || TYPE_CODE (type) == TYPE_CODE_ENUM)
656 && TYPE_LENGTH (type) <= tdep->wordsize)
657 {
658 if (readbuf)
659 {
660 /* Some sort of integer stored in r3. Since TYPE isn't
661 bigger than the register, sign extension isn't a problem
662 - just do everything unsigned. */
663 ULONGEST regval;
664 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
665 &regval);
666 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
667 }
668 if (writebuf)
669 {
670 /* Some sort of integer stored in r3. Use unpack_long since
671 that should handle any required sign extension. */
672 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
673 unpack_long (type, writebuf));
674 }
675 return RETURN_VALUE_REGISTER_CONVENTION;
676 }
677 if (TYPE_LENGTH (type) == 16
678 && TYPE_CODE (type) == TYPE_CODE_ARRAY
679 && TYPE_VECTOR (type)
680 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
681 {
682 if (readbuf)
683 {
684 /* Altivec places the return value in "v2". */
685 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
686 }
687 if (writebuf)
688 {
689 /* Altivec places the return value in "v2". */
690 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
691 }
692 return RETURN_VALUE_REGISTER_CONVENTION;
693 }
694 if (TYPE_LENGTH (type) == 16
695 && TYPE_CODE (type) == TYPE_CODE_ARRAY
696 && TYPE_VECTOR (type)
697 && tdep->vector_abi == POWERPC_VEC_GENERIC)
698 {
699 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
700 GCC without AltiVec returns them in memory, but it warns about
701 ABI risks in that case; we don't try to support it. */
702 if (readbuf)
703 {
704 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
705 readbuf + 0);
706 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
707 readbuf + 4);
708 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
709 readbuf + 8);
710 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
711 readbuf + 12);
712 }
713 if (writebuf)
714 {
715 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
716 writebuf + 0);
717 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
718 writebuf + 4);
719 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
720 writebuf + 8);
721 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
722 writebuf + 12);
723 }
724 return RETURN_VALUE_REGISTER_CONVENTION;
725 }
726 if (TYPE_LENGTH (type) == 8
727 && TYPE_CODE (type) == TYPE_CODE_ARRAY
728 && TYPE_VECTOR (type)
729 && tdep->vector_abi == POWERPC_VEC_SPE)
730 {
731 /* The e500 ABI places return values for the 64-bit DSP types
732 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
733 corresponds to the entire r3 value for e500, whereas GDB's r3
734 only corresponds to the least significant 32-bits. So place
735 the 64-bit DSP type's value in ev3. */
736 if (readbuf)
737 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
738 if (writebuf)
739 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
740 return RETURN_VALUE_REGISTER_CONVENTION;
741 }
742 if (broken_gcc && TYPE_LENGTH (type) <= 8)
743 {
744 /* GCC screwed up for structures or unions whose size is less
745 than or equal to 8 bytes.. Instead of left-aligning, it
746 right-aligns the data into the buffer formed by r3, r4. */
747 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
748 int len = TYPE_LENGTH (type);
749 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
750
751 if (readbuf)
752 {
753 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
754 regvals + 0 * tdep->wordsize);
755 if (len > tdep->wordsize)
756 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
757 regvals + 1 * tdep->wordsize);
758 memcpy (readbuf, regvals + offset, len);
759 }
760 if (writebuf)
761 {
762 memset (regvals, 0, sizeof regvals);
763 memcpy (regvals + offset, writebuf, len);
764 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
765 regvals + 0 * tdep->wordsize);
766 if (len > tdep->wordsize)
767 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
768 regvals + 1 * tdep->wordsize);
769 }
770
771 return RETURN_VALUE_REGISTER_CONVENTION;
772 }
773 if (TYPE_LENGTH (type) <= 8)
774 {
775 if (readbuf)
776 {
777 /* This matches SVr4 PPC, it does not match GCC. */
778 /* The value is right-padded to 8 bytes and then loaded, as
779 two "words", into r3/r4. */
780 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
781 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
782 regvals + 0 * tdep->wordsize);
783 if (TYPE_LENGTH (type) > tdep->wordsize)
784 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
785 regvals + 1 * tdep->wordsize);
786 memcpy (readbuf, regvals, TYPE_LENGTH (type));
787 }
788 if (writebuf)
789 {
790 /* This matches SVr4 PPC, it does not match GCC. */
791 /* The value is padded out to 8 bytes and then loaded, as
792 two "words" into r3/r4. */
793 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
794 memset (regvals, 0, sizeof regvals);
795 memcpy (regvals, writebuf, TYPE_LENGTH (type));
796 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
797 regvals + 0 * tdep->wordsize);
798 if (TYPE_LENGTH (type) > tdep->wordsize)
799 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
800 regvals + 1 * tdep->wordsize);
801 }
802 return RETURN_VALUE_REGISTER_CONVENTION;
803 }
804 return RETURN_VALUE_STRUCT_CONVENTION;
805 }
806
807 enum return_value_convention
808 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
809 struct regcache *regcache, gdb_byte *readbuf,
810 const gdb_byte *writebuf)
811 {
812 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
813 writebuf, 0);
814 }
815
816 enum return_value_convention
817 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
818 struct type *valtype,
819 struct regcache *regcache,
820 gdb_byte *readbuf, const gdb_byte *writebuf)
821 {
822 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
823 writebuf, 1);
824 }
825
826 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
827 function's code address back into the function's descriptor
828 address.
829
830 Find a value for the TOC register. Every symbol should have both
831 ".FN" and "FN" in the minimal symbol table. "FN" points at the
832 FN's descriptor, while ".FN" points at the entry point (which
833 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
834 FN's descriptor address (while at the same time being careful to
835 find "FN" in the same object file as ".FN"). */
836
837 static int
838 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
839 {
840 struct obj_section *dot_fn_section;
841 struct minimal_symbol *dot_fn;
842 struct minimal_symbol *fn;
843 CORE_ADDR toc;
844 /* Find the minimal symbol that corresponds to CODE_ADDR (should
845 have a name of the form ".FN"). */
846 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
847 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
848 return 0;
849 /* Get the section that contains CODE_ADDR. Need this for the
850 "objfile" that it contains. */
851 dot_fn_section = find_pc_section (code_addr);
852 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
853 return 0;
854 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
855 address. Only look for the minimal symbol in ".FN"'s object file
856 - avoids problems when two object files (i.e., shared libraries)
857 contain a minimal symbol with the same name. */
858 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
859 dot_fn_section->objfile);
860 if (fn == NULL)
861 return 0;
862 /* Found a descriptor. */
863 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
864 return 1;
865 }
866
867 /* Pass the arguments in either registers, or in the stack. Using the
868 ppc 64 bit SysV ABI.
869
870 This implements a dumbed down version of the ABI. It always writes
871 values to memory, GPR and FPR, even when not necessary. Doing this
872 greatly simplifies the logic. */
873
874 CORE_ADDR
875 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
876 struct regcache *regcache, CORE_ADDR bp_addr,
877 int nargs, struct value **args, CORE_ADDR sp,
878 int struct_return, CORE_ADDR struct_addr)
879 {
880 CORE_ADDR func_addr = find_function_addr (function, NULL);
881 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
882 ULONGEST back_chain;
883 /* See for-loop comment below. */
884 int write_pass;
885 /* Size of the Altivec's vector parameter region, the final value is
886 computed in the for-loop below. */
887 LONGEST vparam_size = 0;
888 /* Size of the general parameter region, the final value is computed
889 in the for-loop below. */
890 LONGEST gparam_size = 0;
891 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
892 calls to align_up(), align_down(), etc. because this makes it
893 easier to reuse this code (in a copy/paste sense) in the future,
894 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
895 at some point makes it easier to verify that this function is
896 correct without having to do a non-local analysis to figure out
897 the possible values of tdep->wordsize. */
898 gdb_assert (tdep->wordsize == 8);
899
900 /* This function exists to support a calling convention that
901 requires floating-point registers. It shouldn't be used on
902 processors that lack them. */
903 gdb_assert (ppc_floating_point_unit_p (gdbarch));
904
905 /* By this stage in the proceedings, SP has been decremented by "red
906 zone size" + "struct return size". Fetch the stack-pointer from
907 before this and use that as the BACK_CHAIN. */
908 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
909 &back_chain);
910
911 /* Go through the argument list twice.
912
913 Pass 1: Compute the function call's stack space and register
914 requirements.
915
916 Pass 2: Replay the same computation but this time also write the
917 values out to the target. */
918
919 for (write_pass = 0; write_pass < 2; write_pass++)
920 {
921 int argno;
922 /* Next available floating point register for float and double
923 arguments. */
924 int freg = 1;
925 /* Next available general register for non-vector (but possibly
926 float) arguments. */
927 int greg = 3;
928 /* Next available vector register for vector arguments. */
929 int vreg = 2;
930 /* The address, at which the next general purpose parameter
931 (integer, struct, float, ...) should be saved. */
932 CORE_ADDR gparam;
933 /* Address, at which the next Altivec vector parameter should be
934 saved. */
935 CORE_ADDR vparam;
936
937 if (!write_pass)
938 {
939 /* During the first pass, GPARAM and VPARAM are more like
940 offsets (start address zero) than addresses. That way
941 the accumulate the total stack space each region
942 requires. */
943 gparam = 0;
944 vparam = 0;
945 }
946 else
947 {
948 /* Decrement the stack pointer making space for the Altivec
949 and general on-stack parameters. Set vparam and gparam
950 to their corresponding regions. */
951 vparam = align_down (sp - vparam_size, 16);
952 gparam = align_down (vparam - gparam_size, 16);
953 /* Add in space for the TOC, link editor double word,
954 compiler double word, LR save area, CR save area. */
955 sp = align_down (gparam - 48, 16);
956 }
957
958 /* If the function is returning a `struct', then there is an
959 extra hidden parameter (which will be passed in r3)
960 containing the address of that struct.. In that case we
961 should advance one word and start from r4 register to copy
962 parameters. This also consumes one on-stack parameter slot. */
963 if (struct_return)
964 {
965 if (write_pass)
966 regcache_cooked_write_signed (regcache,
967 tdep->ppc_gp0_regnum + greg,
968 struct_addr);
969 greg++;
970 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
971 }
972
973 for (argno = 0; argno < nargs; argno++)
974 {
975 struct value *arg = args[argno];
976 struct type *type = check_typedef (value_type (arg));
977 const bfd_byte *val = value_contents (arg);
978
979 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
980 {
981 /* Floats and Doubles go in f1 .. f13. They also
982 consume a left aligned GREG,, and can end up in
983 memory. */
984 if (write_pass)
985 {
986 gdb_byte regval[MAX_REGISTER_SIZE];
987 const gdb_byte *p;
988
989 /* Version 1.7 of the 64-bit PowerPC ELF ABI says:
990
991 "Single precision floating point values are mapped to
992 the first word in a single doubleword."
993
994 And version 1.9 says:
995
996 "Single precision floating point values are mapped to
997 the second word in a single doubleword."
998
999 GDB then writes single precision floating point values
1000 at both words in a doubleword, to support both ABIs. */
1001 if (TYPE_LENGTH (type) == 4)
1002 {
1003 memcpy (regval, val, 4);
1004 memcpy (regval + 4, val, 4);
1005 p = regval;
1006 }
1007 else
1008 p = val;
1009
1010 /* Write value in the stack's parameter save area. */
1011 write_memory (gparam, p, 8);
1012
1013 if (freg <= 13)
1014 {
1015 struct type *regtype
1016 = register_type (gdbarch, tdep->ppc_fp0_regnum);
1017
1018 convert_typed_floating (val, type, regval, regtype);
1019 regcache_cooked_write (regcache,
1020 tdep->ppc_fp0_regnum + freg,
1021 regval);
1022 }
1023 if (greg <= 10)
1024 regcache_cooked_write (regcache,
1025 tdep->ppc_gp0_regnum + greg,
1026 regval);
1027 }
1028
1029 freg++;
1030 greg++;
1031 /* Always consume parameter stack space. */
1032 gparam = align_up (gparam + 8, tdep->wordsize);
1033 }
1034 else if (TYPE_CODE (type) == TYPE_CODE_FLT
1035 && TYPE_LENGTH (type) == 16
1036 && (gdbarch_long_double_format (gdbarch)
1037 == floatformats_ibm_long_double))
1038 {
1039 /* IBM long double stored in two doublewords of the
1040 parameter save area and corresponding registers. */
1041 if (write_pass)
1042 {
1043 if (!tdep->soft_float && freg <= 13)
1044 {
1045 regcache_cooked_write (regcache,
1046 tdep->ppc_fp0_regnum + freg,
1047 val);
1048 if (freg <= 12)
1049 regcache_cooked_write (regcache,
1050 tdep->ppc_fp0_regnum + freg + 1,
1051 val + 8);
1052 }
1053 if (greg <= 10)
1054 {
1055 regcache_cooked_write (regcache,
1056 tdep->ppc_gp0_regnum + greg,
1057 val);
1058 if (greg <= 9)
1059 regcache_cooked_write (regcache,
1060 tdep->ppc_gp0_regnum + greg + 1,
1061 val + 8);
1062 }
1063 write_memory (gparam, val, TYPE_LENGTH (type));
1064 }
1065 freg += 2;
1066 greg += 2;
1067 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1068 }
1069 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
1070 && TYPE_LENGTH (type) <= 8)
1071 {
1072 /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
1073 end up in memory. */
1074 if (write_pass)
1075 {
1076 gdb_byte regval[MAX_REGISTER_SIZE];
1077 const gdb_byte *p;
1078
1079 /* 32-bit decimal floats are right aligned in the
1080 doubleword. */
1081 if (TYPE_LENGTH (type) == 4)
1082 {
1083 memcpy (regval + 4, val, 4);
1084 p = regval;
1085 }
1086 else
1087 p = val;
1088
1089 /* Write value in the stack's parameter save area. */
1090 write_memory (gparam, p, 8);
1091
1092 if (freg <= 13)
1093 regcache_cooked_write (regcache,
1094 tdep->ppc_fp0_regnum + freg, p);
1095 }
1096
1097 freg++;
1098 greg++;
1099 /* Always consume parameter stack space. */
1100 gparam = align_up (gparam + 8, tdep->wordsize);
1101 }
1102 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
1103 TYPE_LENGTH (type) == 16)
1104 {
1105 /* 128-bit decimal floats go in f2 .. f12, always in even/odd
1106 pairs. They can end up in memory, using two doublewords. */
1107 if (write_pass)
1108 {
1109 if (freg <= 12)
1110 {
1111 /* Make sure freg is even. */
1112 freg += freg & 1;
1113 regcache_cooked_write (regcache,
1114 tdep->ppc_fp0_regnum + freg, val);
1115 regcache_cooked_write (regcache,
1116 tdep->ppc_fp0_regnum + freg + 1, val + 8);
1117 }
1118
1119 write_memory (gparam, val, TYPE_LENGTH (type));
1120 }
1121
1122 freg += 2;
1123 greg += 2;
1124 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1125 }
1126 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
1127 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1128 && tdep->ppc_vr0_regnum >= 0)
1129 {
1130 /* In the Altivec ABI, vectors go in the vector
1131 registers v2 .. v13, or when that runs out, a vector
1132 annex which goes above all the normal parameters.
1133 NOTE: cagney/2003-09-21: This is a guess based on the
1134 PowerOpen Altivec ABI. */
1135 if (vreg <= 13)
1136 {
1137 if (write_pass)
1138 regcache_cooked_write (regcache,
1139 tdep->ppc_vr0_regnum + vreg, val);
1140 vreg++;
1141 }
1142 else
1143 {
1144 if (write_pass)
1145 write_memory (vparam, val, TYPE_LENGTH (type));
1146 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
1147 }
1148 }
1149 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1150 || TYPE_CODE (type) == TYPE_CODE_ENUM
1151 || TYPE_CODE (type) == TYPE_CODE_PTR)
1152 && TYPE_LENGTH (type) <= 8)
1153 {
1154 /* Scalars and Pointers get sign[un]extended and go in
1155 gpr3 .. gpr10. They can also end up in memory. */
1156 if (write_pass)
1157 {
1158 /* Sign extend the value, then store it unsigned. */
1159 ULONGEST word = unpack_long (type, val);
1160 /* Convert any function code addresses into
1161 descriptors. */
1162 if (TYPE_CODE (type) == TYPE_CODE_PTR
1163 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1164 {
1165 CORE_ADDR desc = word;
1166 convert_code_addr_to_desc_addr (word, &desc);
1167 word = desc;
1168 }
1169 if (greg <= 10)
1170 regcache_cooked_write_unsigned (regcache,
1171 tdep->ppc_gp0_regnum +
1172 greg, word);
1173 write_memory_unsigned_integer (gparam, tdep->wordsize,
1174 word);
1175 }
1176 greg++;
1177 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1178 }
1179 else
1180 {
1181 int byte;
1182 for (byte = 0; byte < TYPE_LENGTH (type);
1183 byte += tdep->wordsize)
1184 {
1185 if (write_pass && greg <= 10)
1186 {
1187 gdb_byte regval[MAX_REGISTER_SIZE];
1188 int len = TYPE_LENGTH (type) - byte;
1189 if (len > tdep->wordsize)
1190 len = tdep->wordsize;
1191 memset (regval, 0, sizeof regval);
1192 /* The ABI (version 1.9) specifies that values
1193 smaller than one doubleword are right-aligned
1194 and those larger are left-aligned. GCC
1195 versions before 3.4 implemented this
1196 incorrectly; see
1197 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1198 if (byte == 0)
1199 memcpy (regval + tdep->wordsize - len,
1200 val + byte, len);
1201 else
1202 memcpy (regval, val + byte, len);
1203 regcache_cooked_write (regcache, greg, regval);
1204 }
1205 greg++;
1206 }
1207 if (write_pass)
1208 /* WARNING: cagney/2003-09-21: Strictly speaking, this
1209 isn't necessary, unfortunately, GCC appears to get
1210 "struct convention" parameter passing wrong putting
1211 odd sized structures in memory instead of in a
1212 register. Work around this by always writing the
1213 value to memory. Fortunately, doing this
1214 simplifies the code. */
1215 write_memory (gparam, val, TYPE_LENGTH (type));
1216 if (freg <= 13
1217 && TYPE_CODE (type) == TYPE_CODE_STRUCT
1218 && TYPE_NFIELDS (type) == 1
1219 && TYPE_LENGTH (type) <= 16)
1220 {
1221 /* The ABI (version 1.9) specifies that structs
1222 containing a single floating-point value, at any
1223 level of nesting of single-member structs, are
1224 passed in floating-point registers. */
1225 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1226 && TYPE_NFIELDS (type) == 1)
1227 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1228 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1229 {
1230 if (TYPE_LENGTH (type) <= 8)
1231 {
1232 if (write_pass)
1233 {
1234 gdb_byte regval[MAX_REGISTER_SIZE];
1235 struct type *regtype
1236 = register_type (gdbarch,
1237 tdep->ppc_fp0_regnum);
1238 convert_typed_floating (val, type, regval,
1239 regtype);
1240 regcache_cooked_write (regcache,
1241 (tdep->ppc_fp0_regnum
1242 + freg),
1243 regval);
1244 }
1245 freg++;
1246 }
1247 else if (TYPE_LENGTH (type) == 16
1248 && (gdbarch_long_double_format (gdbarch)
1249 == floatformats_ibm_long_double))
1250 {
1251 if (write_pass)
1252 {
1253 regcache_cooked_write (regcache,
1254 (tdep->ppc_fp0_regnum
1255 + freg),
1256 val);
1257 if (freg <= 12)
1258 regcache_cooked_write (regcache,
1259 (tdep->ppc_fp0_regnum
1260 + freg + 1),
1261 val + 8);
1262 }
1263 freg += 2;
1264 }
1265 }
1266 }
1267 /* Always consume parameter stack space. */
1268 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1269 }
1270 }
1271
1272 if (!write_pass)
1273 {
1274 /* Save the true region sizes ready for the second pass. */
1275 vparam_size = vparam;
1276 /* Make certain that the general parameter save area is at
1277 least the minimum 8 registers (or doublewords) in size. */
1278 if (greg < 8)
1279 gparam_size = 8 * tdep->wordsize;
1280 else
1281 gparam_size = gparam;
1282 }
1283 }
1284
1285 /* Update %sp. */
1286 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1287
1288 /* Write the backchain (it occupies WORDSIZED bytes). */
1289 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
1290
1291 /* Point the inferior function call's return address at the dummy's
1292 breakpoint. */
1293 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1294
1295 /* Use the func_addr to find the descriptor, and use that to find
1296 the TOC. */
1297 {
1298 CORE_ADDR desc_addr;
1299 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1300 {
1301 /* The TOC is the second double word in the descriptor. */
1302 CORE_ADDR toc =
1303 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1304 tdep->wordsize);
1305 regcache_cooked_write_unsigned (regcache,
1306 tdep->ppc_gp0_regnum + 2, toc);
1307 }
1308 }
1309
1310 return sp;
1311 }
1312
1313
1314 /* The 64 bit ABI return value convention.
1315
1316 Return non-zero if the return-value is stored in a register, return
1317 0 if the return-value is instead stored on the stack (a.k.a.,
1318 struct return convention).
1319
1320 For a return-value stored in a register: when WRITEBUF is non-NULL,
1321 copy the buffer to the corresponding register return-value location
1322 location; when READBUF is non-NULL, fill the buffer from the
1323 corresponding register return-value location. */
1324 enum return_value_convention
1325 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
1326 struct regcache *regcache, gdb_byte *readbuf,
1327 const gdb_byte *writebuf)
1328 {
1329 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1330
1331 /* This function exists to support a calling convention that
1332 requires floating-point registers. It shouldn't be used on
1333 processors that lack them. */
1334 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1335
1336 /* Floats and doubles in F1. */
1337 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
1338 {
1339 gdb_byte regval[MAX_REGISTER_SIZE];
1340 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
1341 if (writebuf != NULL)
1342 {
1343 convert_typed_floating (writebuf, valtype, regval, regtype);
1344 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
1345 }
1346 if (readbuf != NULL)
1347 {
1348 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
1349 convert_typed_floating (regval, regtype, readbuf, valtype);
1350 }
1351 return RETURN_VALUE_REGISTER_CONVENTION;
1352 }
1353 if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1354 return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
1355 writebuf);
1356 /* Integers in r3. */
1357 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1358 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
1359 && TYPE_LENGTH (valtype) <= 8)
1360 {
1361 if (writebuf != NULL)
1362 {
1363 /* Be careful to sign extend the value. */
1364 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1365 unpack_long (valtype, writebuf));
1366 }
1367 if (readbuf != NULL)
1368 {
1369 /* Extract the integer from r3. Since this is truncating the
1370 value, there isn't a sign extension problem. */
1371 ULONGEST regval;
1372 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1373 &regval);
1374 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
1375 }
1376 return RETURN_VALUE_REGISTER_CONVENTION;
1377 }
1378 /* All pointers live in r3. */
1379 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
1380 {
1381 /* All pointers live in r3. */
1382 if (writebuf != NULL)
1383 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
1384 if (readbuf != NULL)
1385 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
1386 return RETURN_VALUE_REGISTER_CONVENTION;
1387 }
1388 /* Array type has more than one use. */
1389 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
1390 {
1391 /* Small character arrays are returned, right justified, in r3. */
1392 if (TYPE_LENGTH (valtype) <= 8
1393 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1394 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1395 {
1396 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
1397 - TYPE_LENGTH (valtype));
1398 if (writebuf != NULL)
1399 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
1400 offset, TYPE_LENGTH (valtype), writebuf);
1401 if (readbuf != NULL)
1402 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
1403 offset, TYPE_LENGTH (valtype), readbuf);
1404 return RETURN_VALUE_REGISTER_CONVENTION;
1405 }
1406 /* A VMX vector is returned in v2. */
1407 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1408 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
1409 {
1410 if (readbuf)
1411 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
1412 if (writebuf)
1413 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
1414 return RETURN_VALUE_REGISTER_CONVENTION;
1415 }
1416 }
1417 /* Big floating point values get stored in adjacent floating
1418 point registers, starting with F1. */
1419 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
1420 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
1421 {
1422 if (writebuf || readbuf != NULL)
1423 {
1424 int i;
1425 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
1426 {
1427 if (writebuf != NULL)
1428 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1429 (const bfd_byte *) writebuf + i * 8);
1430 if (readbuf != NULL)
1431 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1432 (bfd_byte *) readbuf + i * 8);
1433 }
1434 }
1435 return RETURN_VALUE_REGISTER_CONVENTION;
1436 }
1437 /* Complex values get returned in f1:f2, need to convert. */
1438 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
1439 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
1440 {
1441 if (regcache != NULL)
1442 {
1443 int i;
1444 for (i = 0; i < 2; i++)
1445 {
1446 gdb_byte regval[MAX_REGISTER_SIZE];
1447 struct type *regtype =
1448 register_type (gdbarch, tdep->ppc_fp0_regnum);
1449 if (writebuf != NULL)
1450 {
1451 convert_typed_floating ((const bfd_byte *) writebuf +
1452 i * (TYPE_LENGTH (valtype) / 2),
1453 valtype, regval, regtype);
1454 regcache_cooked_write (regcache,
1455 tdep->ppc_fp0_regnum + 1 + i,
1456 regval);
1457 }
1458 if (readbuf != NULL)
1459 {
1460 regcache_cooked_read (regcache,
1461 tdep->ppc_fp0_regnum + 1 + i,
1462 regval);
1463 convert_typed_floating (regval, regtype,
1464 (bfd_byte *) readbuf +
1465 i * (TYPE_LENGTH (valtype) / 2),
1466 valtype);
1467 }
1468 }
1469 }
1470 return RETURN_VALUE_REGISTER_CONVENTION;
1471 }
1472 /* Big complex values get stored in f1:f4. */
1473 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1474 {
1475 if (regcache != NULL)
1476 {
1477 int i;
1478 for (i = 0; i < 4; i++)
1479 {
1480 if (writebuf != NULL)
1481 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1482 (const bfd_byte *) writebuf + i * 8);
1483 if (readbuf != NULL)
1484 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1485 (bfd_byte *) readbuf + i * 8);
1486 }
1487 }
1488 return RETURN_VALUE_REGISTER_CONVENTION;
1489 }
1490 return RETURN_VALUE_STRUCT_CONVENTION;
1491 }
1492
1493 CORE_ADDR
1494 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1495 CORE_ADDR bpaddr)
1496 {
1497 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1498 a function-descriptor while the corresponding minimal-symbol
1499 ".FN" should point at the entry point. Consequently, a command
1500 like "break FN" applied to an object file with only minimal
1501 symbols, will insert the breakpoint into the descriptor at "FN"
1502 and not the function at ".FN". Avoid this confusion by adjusting
1503 any attempt to set a descriptor breakpoint into a corresponding
1504 function breakpoint. Note that GDB warns the user when this
1505 adjustment is applied - that's ok as otherwise the user will have
1506 no way of knowing why their breakpoint at "FN" resulted in the
1507 program stopping at ".FN". */
1508 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1509 }
GDB Binutils - Deliverables
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