PowerPC64 ELFv2 ABI: stack frame layout changes
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000-2014 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "gdbcore.h"
23 #include "inferior.h"
24 #include "regcache.h"
25 #include "value.h"
26 #include <string.h>
27 #include "gdb_assert.h"
28 #include "ppc-tdep.h"
29 #include "target.h"
30 #include "objfiles.h"
31 #include "infcall.h"
32 #include "dwarf2.h"
33
34
35 /* Check whether FTPYE is a (pointer to) function type that should use
36 the OpenCL vector ABI. */
37
38 static int
39 ppc_sysv_use_opencl_abi (struct type *ftype)
40 {
41 ftype = check_typedef (ftype);
42
43 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
44 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
45
46 return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
47 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
48 }
49
50 /* Pass the arguments in either registers, or in the stack. Using the
51 ppc sysv ABI, the first eight words of the argument list (that might
52 be less than eight parameters if some parameters occupy more than one
53 word) are passed in r3..r10 registers. float and double parameters are
54 passed in fpr's, in addition to that. Rest of the parameters if any
55 are passed in user stack.
56
57 If the function is returning a structure, then the return address is passed
58 in r3, then the first 7 words of the parametes can be passed in registers,
59 starting from r4. */
60
61 CORE_ADDR
62 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
63 struct regcache *regcache, CORE_ADDR bp_addr,
64 int nargs, struct value **args, CORE_ADDR sp,
65 int struct_return, CORE_ADDR struct_addr)
66 {
67 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
68 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
69 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
70 ULONGEST saved_sp;
71 int argspace = 0; /* 0 is an initial wrong guess. */
72 int write_pass;
73
74 gdb_assert (tdep->wordsize == 4);
75
76 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
77 &saved_sp);
78
79 /* Go through the argument list twice.
80
81 Pass 1: Figure out how much new stack space is required for
82 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
83 ABI doesn't reserve any extra space for parameters which are put
84 in registers, but does always push structures and then pass their
85 address.
86
87 Pass 2: Replay the same computation but this time also write the
88 values out to the target. */
89
90 for (write_pass = 0; write_pass < 2; write_pass++)
91 {
92 int argno;
93 /* Next available floating point register for float and double
94 arguments. */
95 int freg = 1;
96 /* Next available general register for non-float, non-vector
97 arguments. */
98 int greg = 3;
99 /* Next available vector register for vector arguments. */
100 int vreg = 2;
101 /* Arguments start above the "LR save word" and "Back chain". */
102 int argoffset = 2 * tdep->wordsize;
103 /* Structures start after the arguments. */
104 int structoffset = argoffset + argspace;
105
106 /* If the function is returning a `struct', then the first word
107 (which will be passed in r3) is used for struct return
108 address. In that case we should advance one word and start
109 from r4 register to copy parameters. */
110 if (struct_return)
111 {
112 if (write_pass)
113 regcache_cooked_write_signed (regcache,
114 tdep->ppc_gp0_regnum + greg,
115 struct_addr);
116 greg++;
117 }
118
119 for (argno = 0; argno < nargs; argno++)
120 {
121 struct value *arg = args[argno];
122 struct type *type = check_typedef (value_type (arg));
123 int len = TYPE_LENGTH (type);
124 const bfd_byte *val = value_contents (arg);
125
126 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
127 && !tdep->soft_float)
128 {
129 /* Floating point value converted to "double" then
130 passed in an FP register, when the registers run out,
131 8 byte aligned stack is used. */
132 if (freg <= 8)
133 {
134 if (write_pass)
135 {
136 /* Always store the floating point value using
137 the register's floating-point format. */
138 gdb_byte regval[MAX_REGISTER_SIZE];
139 struct type *regtype
140 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
141 convert_typed_floating (val, type, regval, regtype);
142 regcache_cooked_write (regcache,
143 tdep->ppc_fp0_regnum + freg,
144 regval);
145 }
146 freg++;
147 }
148 else
149 {
150 /* The SysV ABI tells us to convert floats to
151 doubles before writing them to an 8 byte aligned
152 stack location. Unfortunately GCC does not do
153 that, and stores floats into 4 byte aligned
154 locations without converting them to doubles.
155 Since there is no know compiler that actually
156 follows the ABI here, we implement the GCC
157 convention. */
158
159 /* Align to 4 bytes or 8 bytes depending on the type of
160 the argument (float or double). */
161 argoffset = align_up (argoffset, len);
162 if (write_pass)
163 write_memory (sp + argoffset, val, len);
164 argoffset += len;
165 }
166 }
167 else if (TYPE_CODE (type) == TYPE_CODE_FLT
168 && len == 16
169 && !tdep->soft_float
170 && (gdbarch_long_double_format (gdbarch)
171 == floatformats_ibm_long_double))
172 {
173 /* IBM long double passed in two FP registers if
174 available, otherwise 8-byte aligned stack. */
175 if (freg <= 7)
176 {
177 if (write_pass)
178 {
179 regcache_cooked_write (regcache,
180 tdep->ppc_fp0_regnum + freg,
181 val);
182 regcache_cooked_write (regcache,
183 tdep->ppc_fp0_regnum + freg + 1,
184 val + 8);
185 }
186 freg += 2;
187 }
188 else
189 {
190 argoffset = align_up (argoffset, 8);
191 if (write_pass)
192 write_memory (sp + argoffset, val, len);
193 argoffset += 16;
194 }
195 }
196 else if (len == 8
197 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
198 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
199 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
200 && tdep->soft_float)))
201 {
202 /* "long long" or soft-float "double" or "_Decimal64"
203 passed in an odd/even register pair with the low
204 addressed word in the odd register and the high
205 addressed word in the even register, or when the
206 registers run out an 8 byte aligned stack
207 location. */
208 if (greg > 9)
209 {
210 /* Just in case GREG was 10. */
211 greg = 11;
212 argoffset = align_up (argoffset, 8);
213 if (write_pass)
214 write_memory (sp + argoffset, val, len);
215 argoffset += 8;
216 }
217 else
218 {
219 /* Must start on an odd register - r3/r4 etc. */
220 if ((greg & 1) == 0)
221 greg++;
222 if (write_pass)
223 {
224 regcache_cooked_write (regcache,
225 tdep->ppc_gp0_regnum + greg + 0,
226 val + 0);
227 regcache_cooked_write (regcache,
228 tdep->ppc_gp0_regnum + greg + 1,
229 val + 4);
230 }
231 greg += 2;
232 }
233 }
234 else if (len == 16
235 && ((TYPE_CODE (type) == TYPE_CODE_FLT
236 && (gdbarch_long_double_format (gdbarch)
237 == floatformats_ibm_long_double))
238 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
239 && tdep->soft_float)))
240 {
241 /* Soft-float IBM long double or _Decimal128 passed in
242 four consecutive registers, or on the stack. The
243 registers are not necessarily odd/even pairs. */
244 if (greg > 7)
245 {
246 greg = 11;
247 argoffset = align_up (argoffset, 8);
248 if (write_pass)
249 write_memory (sp + argoffset, val, len);
250 argoffset += 16;
251 }
252 else
253 {
254 if (write_pass)
255 {
256 regcache_cooked_write (regcache,
257 tdep->ppc_gp0_regnum + greg + 0,
258 val + 0);
259 regcache_cooked_write (regcache,
260 tdep->ppc_gp0_regnum + greg + 1,
261 val + 4);
262 regcache_cooked_write (regcache,
263 tdep->ppc_gp0_regnum + greg + 2,
264 val + 8);
265 regcache_cooked_write (regcache,
266 tdep->ppc_gp0_regnum + greg + 3,
267 val + 12);
268 }
269 greg += 4;
270 }
271 }
272 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
273 && !tdep->soft_float)
274 {
275 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
276 end up in memory. */
277
278 if (freg <= 8)
279 {
280 if (write_pass)
281 {
282 gdb_byte regval[MAX_REGISTER_SIZE];
283 const gdb_byte *p;
284
285 /* 32-bit decimal floats are right aligned in the
286 doubleword. */
287 if (TYPE_LENGTH (type) == 4)
288 {
289 memcpy (regval + 4, val, 4);
290 p = regval;
291 }
292 else
293 p = val;
294
295 regcache_cooked_write (regcache,
296 tdep->ppc_fp0_regnum + freg, p);
297 }
298
299 freg++;
300 }
301 else
302 {
303 argoffset = align_up (argoffset, len);
304
305 if (write_pass)
306 /* Write value in the stack's parameter save area. */
307 write_memory (sp + argoffset, val, len);
308
309 argoffset += len;
310 }
311 }
312 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
313 && !tdep->soft_float)
314 {
315 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
316 pairs. They can end up in memory, using two doublewords. */
317
318 if (freg <= 6)
319 {
320 /* Make sure freg is even. */
321 freg += freg & 1;
322
323 if (write_pass)
324 {
325 regcache_cooked_write (regcache,
326 tdep->ppc_fp0_regnum + freg, val);
327 regcache_cooked_write (regcache,
328 tdep->ppc_fp0_regnum + freg + 1, val + 8);
329 }
330 }
331 else
332 {
333 argoffset = align_up (argoffset, 8);
334
335 if (write_pass)
336 write_memory (sp + argoffset, val, 16);
337
338 argoffset += 16;
339 }
340
341 /* If a 128-bit decimal float goes to the stack because only f7
342 and f8 are free (thus there's no even/odd register pair
343 available), these registers should be marked as occupied.
344 Hence we increase freg even when writing to memory. */
345 freg += 2;
346 }
347 else if (len < 16
348 && TYPE_CODE (type) == TYPE_CODE_ARRAY
349 && TYPE_VECTOR (type)
350 && opencl_abi)
351 {
352 /* OpenCL vectors shorter than 16 bytes are passed as if
353 a series of independent scalars. */
354 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
355 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
356
357 for (i = 0; i < nelt; i++)
358 {
359 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
360
361 if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
362 {
363 if (freg <= 8)
364 {
365 if (write_pass)
366 {
367 int regnum = tdep->ppc_fp0_regnum + freg;
368 gdb_byte regval[MAX_REGISTER_SIZE];
369 struct type *regtype
370 = register_type (gdbarch, regnum);
371 convert_typed_floating (elval, eltype,
372 regval, regtype);
373 regcache_cooked_write (regcache, regnum, regval);
374 }
375 freg++;
376 }
377 else
378 {
379 argoffset = align_up (argoffset, len);
380 if (write_pass)
381 write_memory (sp + argoffset, val, len);
382 argoffset += len;
383 }
384 }
385 else if (TYPE_LENGTH (eltype) == 8)
386 {
387 if (greg > 9)
388 {
389 /* Just in case GREG was 10. */
390 greg = 11;
391 argoffset = align_up (argoffset, 8);
392 if (write_pass)
393 write_memory (sp + argoffset, elval,
394 TYPE_LENGTH (eltype));
395 argoffset += 8;
396 }
397 else
398 {
399 /* Must start on an odd register - r3/r4 etc. */
400 if ((greg & 1) == 0)
401 greg++;
402 if (write_pass)
403 {
404 int regnum = tdep->ppc_gp0_regnum + greg;
405 regcache_cooked_write (regcache,
406 regnum + 0, elval + 0);
407 regcache_cooked_write (regcache,
408 regnum + 1, elval + 4);
409 }
410 greg += 2;
411 }
412 }
413 else
414 {
415 gdb_byte word[MAX_REGISTER_SIZE];
416 store_unsigned_integer (word, tdep->wordsize, byte_order,
417 unpack_long (eltype, elval));
418
419 if (greg <= 10)
420 {
421 if (write_pass)
422 regcache_cooked_write (regcache,
423 tdep->ppc_gp0_regnum + greg,
424 word);
425 greg++;
426 }
427 else
428 {
429 argoffset = align_up (argoffset, tdep->wordsize);
430 if (write_pass)
431 write_memory (sp + argoffset, word, tdep->wordsize);
432 argoffset += tdep->wordsize;
433 }
434 }
435 }
436 }
437 else if (len >= 16
438 && TYPE_CODE (type) == TYPE_CODE_ARRAY
439 && TYPE_VECTOR (type)
440 && opencl_abi)
441 {
442 /* OpenCL vectors 16 bytes or longer are passed as if
443 a series of AltiVec vectors. */
444 int i;
445
446 for (i = 0; i < len / 16; i++)
447 {
448 const gdb_byte *elval = val + i * 16;
449
450 if (vreg <= 13)
451 {
452 if (write_pass)
453 regcache_cooked_write (regcache,
454 tdep->ppc_vr0_regnum + vreg,
455 elval);
456 vreg++;
457 }
458 else
459 {
460 argoffset = align_up (argoffset, 16);
461 if (write_pass)
462 write_memory (sp + argoffset, elval, 16);
463 argoffset += 16;
464 }
465 }
466 }
467 else if (len == 16
468 && TYPE_CODE (type) == TYPE_CODE_ARRAY
469 && TYPE_VECTOR (type)
470 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
471 {
472 /* Vector parameter passed in an Altivec register, or
473 when that runs out, 16 byte aligned stack location. */
474 if (vreg <= 13)
475 {
476 if (write_pass)
477 regcache_cooked_write (regcache,
478 tdep->ppc_vr0_regnum + vreg, val);
479 vreg++;
480 }
481 else
482 {
483 argoffset = align_up (argoffset, 16);
484 if (write_pass)
485 write_memory (sp + argoffset, val, 16);
486 argoffset += 16;
487 }
488 }
489 else if (len == 8
490 && TYPE_CODE (type) == TYPE_CODE_ARRAY
491 && TYPE_VECTOR (type)
492 && tdep->vector_abi == POWERPC_VEC_SPE)
493 {
494 /* Vector parameter passed in an e500 register, or when
495 that runs out, 8 byte aligned stack location. Note
496 that since e500 vector and general purpose registers
497 both map onto the same underlying register set, a
498 "greg" and not a "vreg" is consumed here. A cooked
499 write stores the value in the correct locations
500 within the raw register cache. */
501 if (greg <= 10)
502 {
503 if (write_pass)
504 regcache_cooked_write (regcache,
505 tdep->ppc_ev0_regnum + greg, val);
506 greg++;
507 }
508 else
509 {
510 argoffset = align_up (argoffset, 8);
511 if (write_pass)
512 write_memory (sp + argoffset, val, 8);
513 argoffset += 8;
514 }
515 }
516 else
517 {
518 /* Reduce the parameter down to something that fits in a
519 "word". */
520 gdb_byte word[MAX_REGISTER_SIZE];
521 memset (word, 0, MAX_REGISTER_SIZE);
522 if (len > tdep->wordsize
523 || TYPE_CODE (type) == TYPE_CODE_STRUCT
524 || TYPE_CODE (type) == TYPE_CODE_UNION)
525 {
526 /* Structs and large values are put in an
527 aligned stack slot ... */
528 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
529 && TYPE_VECTOR (type)
530 && len >= 16)
531 structoffset = align_up (structoffset, 16);
532 else
533 structoffset = align_up (structoffset, 8);
534
535 if (write_pass)
536 write_memory (sp + structoffset, val, len);
537 /* ... and then a "word" pointing to that address is
538 passed as the parameter. */
539 store_unsigned_integer (word, tdep->wordsize, byte_order,
540 sp + structoffset);
541 structoffset += len;
542 }
543 else if (TYPE_CODE (type) == TYPE_CODE_INT)
544 /* Sign or zero extend the "int" into a "word". */
545 store_unsigned_integer (word, tdep->wordsize, byte_order,
546 unpack_long (type, val));
547 else
548 /* Always goes in the low address. */
549 memcpy (word, val, len);
550 /* Store that "word" in a register, or on the stack.
551 The words have "4" byte alignment. */
552 if (greg <= 10)
553 {
554 if (write_pass)
555 regcache_cooked_write (regcache,
556 tdep->ppc_gp0_regnum + greg, word);
557 greg++;
558 }
559 else
560 {
561 argoffset = align_up (argoffset, tdep->wordsize);
562 if (write_pass)
563 write_memory (sp + argoffset, word, tdep->wordsize);
564 argoffset += tdep->wordsize;
565 }
566 }
567 }
568
569 /* Compute the actual stack space requirements. */
570 if (!write_pass)
571 {
572 /* Remember the amount of space needed by the arguments. */
573 argspace = argoffset;
574 /* Allocate space for both the arguments and the structures. */
575 sp -= (argoffset + structoffset);
576 /* Ensure that the stack is still 16 byte aligned. */
577 sp = align_down (sp, 16);
578 }
579
580 /* The psABI says that "A caller of a function that takes a
581 variable argument list shall set condition register bit 6 to
582 1 if it passes one or more arguments in the floating-point
583 registers. It is strongly recommended that the caller set the
584 bit to 0 otherwise..." Doing this for normal functions too
585 shouldn't hurt. */
586 if (write_pass)
587 {
588 ULONGEST cr;
589
590 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
591 if (freg > 1)
592 cr |= 0x02000000;
593 else
594 cr &= ~0x02000000;
595 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
596 }
597 }
598
599 /* Update %sp. */
600 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
601
602 /* Write the backchain (it occupies WORDSIZED bytes). */
603 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
604
605 /* Point the inferior function call's return address at the dummy's
606 breakpoint. */
607 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
608
609 return sp;
610 }
611
612 /* Handle the return-value conventions for Decimal Floating Point values. */
613 static int
614 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
615 struct regcache *regcache, gdb_byte *readbuf,
616 const gdb_byte *writebuf)
617 {
618 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
619
620 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
621
622 /* 32-bit and 64-bit decimal floats in f1. */
623 if (TYPE_LENGTH (valtype) <= 8)
624 {
625 if (writebuf != NULL)
626 {
627 gdb_byte regval[MAX_REGISTER_SIZE];
628 const gdb_byte *p;
629
630 /* 32-bit decimal float is right aligned in the doubleword. */
631 if (TYPE_LENGTH (valtype) == 4)
632 {
633 memcpy (regval + 4, writebuf, 4);
634 p = regval;
635 }
636 else
637 p = writebuf;
638
639 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
640 }
641 if (readbuf != NULL)
642 {
643 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
644
645 /* Left align 32-bit decimal float. */
646 if (TYPE_LENGTH (valtype) == 4)
647 memcpy (readbuf, readbuf + 4, 4);
648 }
649 }
650 /* 128-bit decimal floats in f2,f3. */
651 else if (TYPE_LENGTH (valtype) == 16)
652 {
653 if (writebuf != NULL || readbuf != NULL)
654 {
655 int i;
656
657 for (i = 0; i < 2; i++)
658 {
659 if (writebuf != NULL)
660 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
661 writebuf + i * 8);
662 if (readbuf != NULL)
663 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
664 readbuf + i * 8);
665 }
666 }
667 }
668 else
669 /* Can't happen. */
670 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
671
672 return RETURN_VALUE_REGISTER_CONVENTION;
673 }
674
675 /* Handle the return-value conventions specified by the SysV 32-bit
676 PowerPC ABI (including all the supplements):
677
678 no floating-point: floating-point values returned using 32-bit
679 general-purpose registers.
680
681 Altivec: 128-bit vectors returned using vector registers.
682
683 e500: 64-bit vectors returned using the full full 64 bit EV
684 register, floating-point values returned using 32-bit
685 general-purpose registers.
686
687 GCC (broken): Small struct values right (instead of left) aligned
688 when returned in general-purpose registers. */
689
690 static enum return_value_convention
691 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
692 struct type *type, struct regcache *regcache,
693 gdb_byte *readbuf, const gdb_byte *writebuf,
694 int broken_gcc)
695 {
696 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
697 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
698 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
699
700 gdb_assert (tdep->wordsize == 4);
701
702 if (TYPE_CODE (type) == TYPE_CODE_FLT
703 && TYPE_LENGTH (type) <= 8
704 && !tdep->soft_float)
705 {
706 if (readbuf)
707 {
708 /* Floats and doubles stored in "f1". Convert the value to
709 the required type. */
710 gdb_byte regval[MAX_REGISTER_SIZE];
711 struct type *regtype = register_type (gdbarch,
712 tdep->ppc_fp0_regnum + 1);
713 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
714 convert_typed_floating (regval, regtype, readbuf, type);
715 }
716 if (writebuf)
717 {
718 /* Floats and doubles stored in "f1". Convert the value to
719 the register's "double" type. */
720 gdb_byte regval[MAX_REGISTER_SIZE];
721 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
722 convert_typed_floating (writebuf, type, regval, regtype);
723 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
724 }
725 return RETURN_VALUE_REGISTER_CONVENTION;
726 }
727 if (TYPE_CODE (type) == TYPE_CODE_FLT
728 && TYPE_LENGTH (type) == 16
729 && !tdep->soft_float
730 && (gdbarch_long_double_format (gdbarch)
731 == floatformats_ibm_long_double))
732 {
733 /* IBM long double stored in f1 and f2. */
734 if (readbuf)
735 {
736 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
737 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
738 readbuf + 8);
739 }
740 if (writebuf)
741 {
742 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
743 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
744 writebuf + 8);
745 }
746 return RETURN_VALUE_REGISTER_CONVENTION;
747 }
748 if (TYPE_LENGTH (type) == 16
749 && ((TYPE_CODE (type) == TYPE_CODE_FLT
750 && (gdbarch_long_double_format (gdbarch)
751 == floatformats_ibm_long_double))
752 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
753 {
754 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
755 r5, r6. */
756 if (readbuf)
757 {
758 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
759 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
760 readbuf + 4);
761 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
762 readbuf + 8);
763 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
764 readbuf + 12);
765 }
766 if (writebuf)
767 {
768 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
769 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
770 writebuf + 4);
771 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
772 writebuf + 8);
773 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
774 writebuf + 12);
775 }
776 return RETURN_VALUE_REGISTER_CONVENTION;
777 }
778 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
779 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
780 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
781 && tdep->soft_float))
782 {
783 if (readbuf)
784 {
785 /* A long long, double or _Decimal64 stored in the 32 bit
786 r3/r4. */
787 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
788 readbuf + 0);
789 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
790 readbuf + 4);
791 }
792 if (writebuf)
793 {
794 /* A long long, double or _Decimal64 stored in the 32 bit
795 r3/r4. */
796 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
797 writebuf + 0);
798 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
799 writebuf + 4);
800 }
801 return RETURN_VALUE_REGISTER_CONVENTION;
802 }
803 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
804 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
805 writebuf);
806 else if ((TYPE_CODE (type) == TYPE_CODE_INT
807 || TYPE_CODE (type) == TYPE_CODE_CHAR
808 || TYPE_CODE (type) == TYPE_CODE_BOOL
809 || TYPE_CODE (type) == TYPE_CODE_PTR
810 || TYPE_CODE (type) == TYPE_CODE_REF
811 || TYPE_CODE (type) == TYPE_CODE_ENUM)
812 && TYPE_LENGTH (type) <= tdep->wordsize)
813 {
814 if (readbuf)
815 {
816 /* Some sort of integer stored in r3. Since TYPE isn't
817 bigger than the register, sign extension isn't a problem
818 - just do everything unsigned. */
819 ULONGEST regval;
820 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
821 &regval);
822 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
823 regval);
824 }
825 if (writebuf)
826 {
827 /* Some sort of integer stored in r3. Use unpack_long since
828 that should handle any required sign extension. */
829 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
830 unpack_long (type, writebuf));
831 }
832 return RETURN_VALUE_REGISTER_CONVENTION;
833 }
834 /* OpenCL vectors < 16 bytes are returned as distinct
835 scalars in f1..f2 or r3..r10. */
836 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
837 && TYPE_VECTOR (type)
838 && TYPE_LENGTH (type) < 16
839 && opencl_abi)
840 {
841 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
842 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
843
844 for (i = 0; i < nelt; i++)
845 {
846 int offset = i * TYPE_LENGTH (eltype);
847
848 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
849 {
850 int regnum = tdep->ppc_fp0_regnum + 1 + i;
851 gdb_byte regval[MAX_REGISTER_SIZE];
852 struct type *regtype = register_type (gdbarch, regnum);
853
854 if (writebuf != NULL)
855 {
856 convert_typed_floating (writebuf + offset, eltype,
857 regval, regtype);
858 regcache_cooked_write (regcache, regnum, regval);
859 }
860 if (readbuf != NULL)
861 {
862 regcache_cooked_read (regcache, regnum, regval);
863 convert_typed_floating (regval, regtype,
864 readbuf + offset, eltype);
865 }
866 }
867 else
868 {
869 int regnum = tdep->ppc_gp0_regnum + 3 + i;
870 ULONGEST regval;
871
872 if (writebuf != NULL)
873 {
874 regval = unpack_long (eltype, writebuf + offset);
875 regcache_cooked_write_unsigned (regcache, regnum, regval);
876 }
877 if (readbuf != NULL)
878 {
879 regcache_cooked_read_unsigned (regcache, regnum, &regval);
880 store_unsigned_integer (readbuf + offset,
881 TYPE_LENGTH (eltype), byte_order,
882 regval);
883 }
884 }
885 }
886
887 return RETURN_VALUE_REGISTER_CONVENTION;
888 }
889 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
890 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
891 && TYPE_VECTOR (type)
892 && TYPE_LENGTH (type) >= 16
893 && opencl_abi)
894 {
895 int n_regs = TYPE_LENGTH (type) / 16;
896 int i;
897
898 for (i = 0; i < n_regs; i++)
899 {
900 int offset = i * 16;
901 int regnum = tdep->ppc_vr0_regnum + 2 + i;
902
903 if (writebuf != NULL)
904 regcache_cooked_write (regcache, regnum, writebuf + offset);
905 if (readbuf != NULL)
906 regcache_cooked_read (regcache, regnum, readbuf + offset);
907 }
908
909 return RETURN_VALUE_REGISTER_CONVENTION;
910 }
911 if (TYPE_LENGTH (type) == 16
912 && TYPE_CODE (type) == TYPE_CODE_ARRAY
913 && TYPE_VECTOR (type)
914 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
915 {
916 if (readbuf)
917 {
918 /* Altivec places the return value in "v2". */
919 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
920 }
921 if (writebuf)
922 {
923 /* Altivec places the return value in "v2". */
924 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
925 }
926 return RETURN_VALUE_REGISTER_CONVENTION;
927 }
928 if (TYPE_LENGTH (type) == 16
929 && TYPE_CODE (type) == TYPE_CODE_ARRAY
930 && TYPE_VECTOR (type)
931 && tdep->vector_abi == POWERPC_VEC_GENERIC)
932 {
933 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
934 GCC without AltiVec returns them in memory, but it warns about
935 ABI risks in that case; we don't try to support it. */
936 if (readbuf)
937 {
938 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
939 readbuf + 0);
940 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
941 readbuf + 4);
942 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
943 readbuf + 8);
944 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
945 readbuf + 12);
946 }
947 if (writebuf)
948 {
949 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
950 writebuf + 0);
951 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
952 writebuf + 4);
953 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
954 writebuf + 8);
955 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
956 writebuf + 12);
957 }
958 return RETURN_VALUE_REGISTER_CONVENTION;
959 }
960 if (TYPE_LENGTH (type) == 8
961 && TYPE_CODE (type) == TYPE_CODE_ARRAY
962 && TYPE_VECTOR (type)
963 && tdep->vector_abi == POWERPC_VEC_SPE)
964 {
965 /* The e500 ABI places return values for the 64-bit DSP types
966 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
967 corresponds to the entire r3 value for e500, whereas GDB's r3
968 only corresponds to the least significant 32-bits. So place
969 the 64-bit DSP type's value in ev3. */
970 if (readbuf)
971 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
972 if (writebuf)
973 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
974 return RETURN_VALUE_REGISTER_CONVENTION;
975 }
976 if (broken_gcc && TYPE_LENGTH (type) <= 8)
977 {
978 /* GCC screwed up for structures or unions whose size is less
979 than or equal to 8 bytes.. Instead of left-aligning, it
980 right-aligns the data into the buffer formed by r3, r4. */
981 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
982 int len = TYPE_LENGTH (type);
983 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
984
985 if (readbuf)
986 {
987 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
988 regvals + 0 * tdep->wordsize);
989 if (len > tdep->wordsize)
990 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
991 regvals + 1 * tdep->wordsize);
992 memcpy (readbuf, regvals + offset, len);
993 }
994 if (writebuf)
995 {
996 memset (regvals, 0, sizeof regvals);
997 memcpy (regvals + offset, writebuf, len);
998 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
999 regvals + 0 * tdep->wordsize);
1000 if (len > tdep->wordsize)
1001 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1002 regvals + 1 * tdep->wordsize);
1003 }
1004
1005 return RETURN_VALUE_REGISTER_CONVENTION;
1006 }
1007 if (TYPE_LENGTH (type) <= 8)
1008 {
1009 if (readbuf)
1010 {
1011 /* This matches SVr4 PPC, it does not match GCC. */
1012 /* The value is right-padded to 8 bytes and then loaded, as
1013 two "words", into r3/r4. */
1014 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
1015 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
1016 regvals + 0 * tdep->wordsize);
1017 if (TYPE_LENGTH (type) > tdep->wordsize)
1018 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
1019 regvals + 1 * tdep->wordsize);
1020 memcpy (readbuf, regvals, TYPE_LENGTH (type));
1021 }
1022 if (writebuf)
1023 {
1024 /* This matches SVr4 PPC, it does not match GCC. */
1025 /* The value is padded out to 8 bytes and then loaded, as
1026 two "words" into r3/r4. */
1027 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
1028 memset (regvals, 0, sizeof regvals);
1029 memcpy (regvals, writebuf, TYPE_LENGTH (type));
1030 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
1031 regvals + 0 * tdep->wordsize);
1032 if (TYPE_LENGTH (type) > tdep->wordsize)
1033 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1034 regvals + 1 * tdep->wordsize);
1035 }
1036 return RETURN_VALUE_REGISTER_CONVENTION;
1037 }
1038 return RETURN_VALUE_STRUCT_CONVENTION;
1039 }
1040
1041 enum return_value_convention
1042 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1043 struct type *valtype, struct regcache *regcache,
1044 gdb_byte *readbuf, const gdb_byte *writebuf)
1045 {
1046 return do_ppc_sysv_return_value (gdbarch,
1047 function ? value_type (function) : NULL,
1048 valtype, regcache, readbuf, writebuf, 0);
1049 }
1050
1051 enum return_value_convention
1052 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
1053 struct value *function,
1054 struct type *valtype,
1055 struct regcache *regcache,
1056 gdb_byte *readbuf, const gdb_byte *writebuf)
1057 {
1058 return do_ppc_sysv_return_value (gdbarch,
1059 function ? value_type (function) : NULL,
1060 valtype, regcache, readbuf, writebuf, 1);
1061 }
1062
1063 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
1064 function's code address back into the function's descriptor
1065 address.
1066
1067 Find a value for the TOC register. Every symbol should have both
1068 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1069 FN's descriptor, while ".FN" points at the entry point (which
1070 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1071 FN's descriptor address (while at the same time being careful to
1072 find "FN" in the same object file as ".FN"). */
1073
1074 static int
1075 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1076 {
1077 struct obj_section *dot_fn_section;
1078 struct bound_minimal_symbol dot_fn;
1079 struct minimal_symbol *fn;
1080
1081 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1082 have a name of the form ".FN"). */
1083 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
1084 if (dot_fn.minsym == NULL || SYMBOL_LINKAGE_NAME (dot_fn.minsym)[0] != '.')
1085 return 0;
1086 /* Get the section that contains CODE_ADDR. Need this for the
1087 "objfile" that it contains. */
1088 dot_fn_section = find_pc_section (code_addr);
1089 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1090 return 0;
1091 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1092 address. Only look for the minimal symbol in ".FN"'s object file
1093 - avoids problems when two object files (i.e., shared libraries)
1094 contain a minimal symbol with the same name. */
1095 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn.minsym) + 1, NULL,
1096 dot_fn_section->objfile);
1097 if (fn == NULL)
1098 return 0;
1099 /* Found a descriptor. */
1100 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
1101 return 1;
1102 }
1103
1104 /* Structure holding the next argument position. */
1105 struct ppc64_sysv_argpos
1106 {
1107 /* Register cache holding argument registers. If this is NULL,
1108 we only simulate argument processing without actually updating
1109 any registers or memory. */
1110 struct regcache *regcache;
1111 /* Next available general-purpose argument register. */
1112 int greg;
1113 /* Next available floating-point argument register. */
1114 int freg;
1115 /* Next available vector argument register. */
1116 int vreg;
1117 /* The address, at which the next general purpose parameter
1118 (integer, struct, float, vector, ...) should be saved. */
1119 CORE_ADDR gparam;
1120 /* The address, at which the next by-reference parameter
1121 (non-Altivec vector, variably-sized type) should be saved. */
1122 CORE_ADDR refparam;
1123 };
1124
1125 /* VAL is a value of length LEN. Store it into the argument area on the
1126 stack and load it into the corresponding general-purpose registers
1127 required by the ABI, and update ARGPOS.
1128
1129 If ALIGN is nonzero, it specifies the minimum alignment required
1130 for the on-stack copy of the argument. */
1131
1132 static void
1133 ppc64_sysv_abi_push_val (struct gdbarch *gdbarch,
1134 const bfd_byte *val, int len, int align,
1135 struct ppc64_sysv_argpos *argpos)
1136 {
1137 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1138 int offset = 0;
1139
1140 /* Enforce alignment of stack location, if requested. */
1141 if (align > tdep->wordsize)
1142 {
1143 CORE_ADDR aligned_gparam = align_up (argpos->gparam, align);
1144
1145 argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize;
1146 argpos->gparam = aligned_gparam;
1147 }
1148
1149 /* The ABI (version 1.9) specifies that values smaller than one
1150 doubleword are right-aligned and those larger are left-aligned.
1151 GCC versions before 3.4 implemented this incorrectly; see
1152 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1153 if (len < tdep->wordsize
1154 && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1155 offset = tdep->wordsize - len;
1156
1157 if (argpos->regcache)
1158 write_memory (argpos->gparam + offset, val, len);
1159 argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize);
1160
1161 while (len >= tdep->wordsize)
1162 {
1163 if (argpos->regcache && argpos->greg <= 10)
1164 regcache_cooked_write (argpos->regcache,
1165 tdep->ppc_gp0_regnum + argpos->greg, val);
1166 argpos->greg++;
1167 len -= tdep->wordsize;
1168 val += tdep->wordsize;
1169 }
1170
1171 if (len > 0)
1172 {
1173 if (argpos->regcache && argpos->greg <= 10)
1174 regcache_cooked_write_part (argpos->regcache,
1175 tdep->ppc_gp0_regnum + argpos->greg,
1176 offset, len, val);
1177 argpos->greg++;
1178 }
1179 }
1180
1181 /* The same as ppc64_sysv_abi_push_val, but using a single-word integer
1182 value VAL as argument. */
1183
1184 static void
1185 ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val,
1186 struct ppc64_sysv_argpos *argpos)
1187 {
1188 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1189 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1190 gdb_byte buf[MAX_REGISTER_SIZE];
1191
1192 if (argpos->regcache)
1193 store_unsigned_integer (buf, tdep->wordsize, byte_order, val);
1194 ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos);
1195 }
1196
1197 /* VAL is a value of TYPE, a (binary or decimal) floating-point type.
1198 Load it into a floating-point register if required by the ABI,
1199 and update ARGPOS. */
1200
1201 static void
1202 ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch,
1203 struct type *type, const bfd_byte *val,
1204 struct ppc64_sysv_argpos *argpos)
1205 {
1206 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1207 if (tdep->soft_float)
1208 return;
1209
1210 if (TYPE_LENGTH (type) <= 8
1211 && TYPE_CODE (type) == TYPE_CODE_FLT)
1212 {
1213 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1214 to double first. */
1215 if (argpos->regcache && argpos->freg <= 13)
1216 {
1217 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1218 struct type *regtype = register_type (gdbarch, regnum);
1219 gdb_byte regval[MAX_REGISTER_SIZE];
1220
1221 convert_typed_floating (val, type, regval, regtype);
1222 regcache_cooked_write (argpos->regcache, regnum, regval);
1223 }
1224
1225 argpos->freg++;
1226 }
1227 else if (TYPE_LENGTH (type) <= 8
1228 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1229 {
1230 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1231 placed in the least significant word. */
1232 if (argpos->regcache && argpos->freg <= 13)
1233 {
1234 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1235 int offset = 0;
1236
1237 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1238 offset = 8 - TYPE_LENGTH (type);
1239
1240 regcache_cooked_write_part (argpos->regcache, regnum,
1241 offset, TYPE_LENGTH (type), val);
1242 }
1243
1244 argpos->freg++;
1245 }
1246 else if (TYPE_LENGTH (type) == 16
1247 && TYPE_CODE (type) == TYPE_CODE_FLT
1248 && (gdbarch_long_double_format (gdbarch)
1249 == floatformats_ibm_long_double))
1250 {
1251 /* IBM long double stored in two consecutive FPRs. */
1252 if (argpos->regcache && argpos->freg <= 13)
1253 {
1254 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1255
1256 regcache_cooked_write (argpos->regcache, regnum, val);
1257 if (argpos->freg <= 12)
1258 regcache_cooked_write (argpos->regcache, regnum + 1, val + 8);
1259 }
1260
1261 argpos->freg += 2;
1262 }
1263 else if (TYPE_LENGTH (type) == 16
1264 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1265 {
1266 /* 128-bit decimal floating-point values are stored in and even/odd
1267 pair of FPRs, with the even FPR holding the most significant half. */
1268 argpos->freg += argpos->freg & 1;
1269
1270 if (argpos->regcache && argpos->freg <= 12)
1271 {
1272 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1273 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1274 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
1275
1276 regcache_cooked_write (argpos->regcache, regnum, val + hipart);
1277 regcache_cooked_write (argpos->regcache, regnum + 1, val + lopart);
1278 }
1279
1280 argpos->freg += 2;
1281 }
1282 }
1283
1284 /* VAL is a value of AltiVec vector type. Load it into a vector register
1285 if required by the ABI, and update ARGPOS. */
1286
1287 static void
1288 ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val,
1289 struct ppc64_sysv_argpos *argpos)
1290 {
1291 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1292
1293 if (argpos->regcache && argpos->vreg <= 13)
1294 regcache_cooked_write (argpos->regcache,
1295 tdep->ppc_vr0_regnum + argpos->vreg, val);
1296
1297 argpos->vreg++;
1298 }
1299
1300 /* VAL is a value of TYPE. Load it into memory and/or registers
1301 as required by the ABI, and update ARGPOS. */
1302
1303 static void
1304 ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
1305 struct type *type, const bfd_byte *val,
1306 struct ppc64_sysv_argpos *argpos)
1307 {
1308 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1309
1310 if (TYPE_CODE (type) == TYPE_CODE_FLT
1311 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1312 {
1313 /* Floating-point scalars are passed in floating-point registers. */
1314 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1315 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1316 }
1317 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1318 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1319 && TYPE_LENGTH (type) == 16)
1320 {
1321 /* AltiVec vectors are passed aligned, and in vector registers. */
1322 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 16, argpos);
1323 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1324 }
1325 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1326 && TYPE_LENGTH (type) >= 16)
1327 {
1328 /* Non-Altivec vectors are passed by reference. */
1329
1330 /* Copy value onto the stack ... */
1331 CORE_ADDR addr = align_up (argpos->refparam, 16);
1332 if (argpos->regcache)
1333 write_memory (addr, val, TYPE_LENGTH (type));
1334 argpos->refparam = align_up (addr + TYPE_LENGTH (type), tdep->wordsize);
1335
1336 /* ... and pass a pointer to the copy as parameter. */
1337 ppc64_sysv_abi_push_integer (gdbarch, addr, argpos);
1338 }
1339 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1340 || TYPE_CODE (type) == TYPE_CODE_ENUM
1341 || TYPE_CODE (type) == TYPE_CODE_BOOL
1342 || TYPE_CODE (type) == TYPE_CODE_CHAR
1343 || TYPE_CODE (type) == TYPE_CODE_PTR
1344 || TYPE_CODE (type) == TYPE_CODE_REF)
1345 && TYPE_LENGTH (type) <= tdep->wordsize)
1346 {
1347 ULONGEST word = 0;
1348
1349 if (argpos->regcache)
1350 {
1351 /* Sign extend the value, then store it unsigned. */
1352 word = unpack_long (type, val);
1353
1354 /* Convert any function code addresses into descriptors. */
1355 if (tdep->elf_abi == POWERPC_ELF_V1
1356 && (TYPE_CODE (type) == TYPE_CODE_PTR
1357 || TYPE_CODE (type) == TYPE_CODE_REF))
1358 {
1359 struct type *target_type
1360 = check_typedef (TYPE_TARGET_TYPE (type));
1361
1362 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1363 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1364 {
1365 CORE_ADDR desc = word;
1366
1367 convert_code_addr_to_desc_addr (word, &desc);
1368 word = desc;
1369 }
1370 }
1371 }
1372
1373 ppc64_sysv_abi_push_integer (gdbarch, word, argpos);
1374 }
1375 else
1376 {
1377 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1378
1379 /* The ABI (version 1.9) specifies that structs containing a
1380 single floating-point value, at any level of nesting of
1381 single-member structs, are passed in floating-point registers. */
1382 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1383 && TYPE_NFIELDS (type) == 1)
1384 {
1385 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1386 && TYPE_NFIELDS (type) == 1)
1387 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1388
1389 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1390 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1391 }
1392 }
1393 }
1394
1395 /* Pass the arguments in either registers, or in the stack. Using the
1396 ppc 64 bit SysV ABI.
1397
1398 This implements a dumbed down version of the ABI. It always writes
1399 values to memory, GPR and FPR, even when not necessary. Doing this
1400 greatly simplifies the logic. */
1401
1402 CORE_ADDR
1403 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1404 struct value *function,
1405 struct regcache *regcache, CORE_ADDR bp_addr,
1406 int nargs, struct value **args, CORE_ADDR sp,
1407 int struct_return, CORE_ADDR struct_addr)
1408 {
1409 CORE_ADDR func_addr = find_function_addr (function, NULL);
1410 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1411 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1412 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
1413 ULONGEST back_chain;
1414 /* See for-loop comment below. */
1415 int write_pass;
1416 /* Size of the by-reference parameter copy region, the final value is
1417 computed in the for-loop below. */
1418 LONGEST refparam_size = 0;
1419 /* Size of the general parameter region, the final value is computed
1420 in the for-loop below. */
1421 LONGEST gparam_size = 0;
1422 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
1423 calls to align_up(), align_down(), etc. because this makes it
1424 easier to reuse this code (in a copy/paste sense) in the future,
1425 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1426 at some point makes it easier to verify that this function is
1427 correct without having to do a non-local analysis to figure out
1428 the possible values of tdep->wordsize. */
1429 gdb_assert (tdep->wordsize == 8);
1430
1431 /* This function exists to support a calling convention that
1432 requires floating-point registers. It shouldn't be used on
1433 processors that lack them. */
1434 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1435
1436 /* By this stage in the proceedings, SP has been decremented by "red
1437 zone size" + "struct return size". Fetch the stack-pointer from
1438 before this and use that as the BACK_CHAIN. */
1439 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
1440 &back_chain);
1441
1442 /* Go through the argument list twice.
1443
1444 Pass 1: Compute the function call's stack space and register
1445 requirements.
1446
1447 Pass 2: Replay the same computation but this time also write the
1448 values out to the target. */
1449
1450 for (write_pass = 0; write_pass < 2; write_pass++)
1451 {
1452 int argno;
1453
1454 struct ppc64_sysv_argpos argpos;
1455 argpos.greg = 3;
1456 argpos.freg = 1;
1457 argpos.vreg = 2;
1458
1459 if (!write_pass)
1460 {
1461 /* During the first pass, GPARAM and REFPARAM are more like
1462 offsets (start address zero) than addresses. That way
1463 they accumulate the total stack space each region
1464 requires. */
1465 argpos.regcache = NULL;
1466 argpos.gparam = 0;
1467 argpos.refparam = 0;
1468 }
1469 else
1470 {
1471 /* Decrement the stack pointer making space for the Altivec
1472 and general on-stack parameters. Set refparam and gparam
1473 to their corresponding regions. */
1474 argpos.regcache = regcache;
1475 argpos.refparam = align_down (sp - refparam_size, 16);
1476 argpos.gparam = align_down (argpos.refparam - gparam_size, 16);
1477 /* Add in space for the TOC, link editor double word (v1 only),
1478 compiler double word (v1 only), LR save area, CR save area,
1479 and backchain. */
1480 if (tdep->elf_abi == POWERPC_ELF_V1)
1481 sp = align_down (argpos.gparam - 48, 16);
1482 else
1483 sp = align_down (argpos.gparam - 32, 16);
1484 }
1485
1486 /* If the function is returning a `struct', then there is an
1487 extra hidden parameter (which will be passed in r3)
1488 containing the address of that struct.. In that case we
1489 should advance one word and start from r4 register to copy
1490 parameters. This also consumes one on-stack parameter slot. */
1491 if (struct_return)
1492 ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos);
1493
1494 for (argno = 0; argno < nargs; argno++)
1495 {
1496 struct value *arg = args[argno];
1497 struct type *type = check_typedef (value_type (arg));
1498 const bfd_byte *val = value_contents (arg);
1499
1500 if (TYPE_CODE (type) == TYPE_CODE_COMPLEX)
1501 {
1502 /* Complex types are passed as if two independent scalars. */
1503 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1504
1505 ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos);
1506 ppc64_sysv_abi_push_param (gdbarch, eltype,
1507 val + TYPE_LENGTH (eltype), &argpos);
1508 }
1509 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1510 && opencl_abi)
1511 {
1512 /* OpenCL vectors shorter than 16 bytes are passed as if
1513 a series of independent scalars; OpenCL vectors 16 bytes
1514 or longer are passed as if a series of AltiVec vectors. */
1515 struct type *eltype;
1516 int i, nelt;
1517
1518 if (TYPE_LENGTH (type) < 16)
1519 eltype = check_typedef (TYPE_TARGET_TYPE (type));
1520 else
1521 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1522
1523 nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
1524 for (i = 0; i < nelt; i++)
1525 {
1526 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1527
1528 ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos);
1529 }
1530 }
1531 else
1532 {
1533 /* All other types are passed as single arguments. */
1534 ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos);
1535 }
1536 }
1537
1538 if (!write_pass)
1539 {
1540 /* Save the true region sizes ready for the second pass. */
1541 refparam_size = argpos.refparam;
1542 /* Make certain that the general parameter save area is at
1543 least the minimum 8 registers (or doublewords) in size. */
1544 if (argpos.greg < 8)
1545 gparam_size = 8 * tdep->wordsize;
1546 else
1547 gparam_size = argpos.gparam;
1548 }
1549 }
1550
1551 /* Update %sp. */
1552 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1553
1554 /* Write the backchain (it occupies WORDSIZED bytes). */
1555 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
1556
1557 /* Point the inferior function call's return address at the dummy's
1558 breakpoint. */
1559 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1560
1561 /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use
1562 that to find the TOC. If we're calling via a function pointer,
1563 the pointer itself identifies the descriptor. */
1564 if (tdep->elf_abi == POWERPC_ELF_V1)
1565 {
1566 struct type *ftype = check_typedef (value_type (function));
1567 CORE_ADDR desc_addr = value_as_address (function);
1568
1569 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1570 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1571 {
1572 /* The TOC is the second double word in the descriptor. */
1573 CORE_ADDR toc =
1574 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1575 tdep->wordsize, byte_order);
1576
1577 regcache_cooked_write_unsigned (regcache,
1578 tdep->ppc_gp0_regnum + 2, toc);
1579 }
1580 }
1581
1582 /* In the ELFv2 ABI, we need to pass the target address in r12 since
1583 we may be calling a global entry point. */
1584 if (tdep->elf_abi == POWERPC_ELF_V2)
1585 regcache_cooked_write_unsigned (regcache,
1586 tdep->ppc_gp0_regnum + 12, func_addr);
1587
1588 return sp;
1589 }
1590
1591 /* Subroutine of ppc64_sysv_abi_return_value that handles "base" types:
1592 integer, floating-point, and AltiVec vector types.
1593
1594 This routine also handles components of aggregate return types;
1595 INDEX describes which part of the aggregate is to be handled.
1596
1597 Returns true if VALTYPE is some such base type that could be handled,
1598 false otherwise. */
1599 static int
1600 ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
1601 struct regcache *regcache, gdb_byte *readbuf,
1602 const gdb_byte *writebuf, int index)
1603 {
1604 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1605
1606 /* Integers live in GPRs starting at r3. */
1607 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1608 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1609 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1610 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
1611 && TYPE_LENGTH (valtype) <= 8)
1612 {
1613 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1614
1615 if (writebuf != NULL)
1616 {
1617 /* Be careful to sign extend the value. */
1618 regcache_cooked_write_unsigned (regcache, regnum,
1619 unpack_long (valtype, writebuf));
1620 }
1621 if (readbuf != NULL)
1622 {
1623 /* Extract the integer from GPR. Since this is truncating the
1624 value, there isn't a sign extension problem. */
1625 ULONGEST regval;
1626
1627 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1628 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype),
1629 gdbarch_byte_order (gdbarch), regval);
1630 }
1631 return 1;
1632 }
1633
1634 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1635 to double first. */
1636 if (TYPE_LENGTH (valtype) <= 8
1637 && TYPE_CODE (valtype) == TYPE_CODE_FLT)
1638 {
1639 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1640 struct type *regtype = register_type (gdbarch, regnum);
1641 gdb_byte regval[MAX_REGISTER_SIZE];
1642
1643 if (writebuf != NULL)
1644 {
1645 convert_typed_floating (writebuf, valtype, regval, regtype);
1646 regcache_cooked_write (regcache, regnum, regval);
1647 }
1648 if (readbuf != NULL)
1649 {
1650 regcache_cooked_read (regcache, regnum, regval);
1651 convert_typed_floating (regval, regtype, readbuf, valtype);
1652 }
1653 return 1;
1654 }
1655
1656 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1657 placed in the least significant word. */
1658 if (TYPE_LENGTH (valtype) <= 8
1659 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1660 {
1661 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1662 int offset = 0;
1663
1664 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1665 offset = 8 - TYPE_LENGTH (valtype);
1666
1667 if (writebuf != NULL)
1668 regcache_cooked_write_part (regcache, regnum,
1669 offset, TYPE_LENGTH (valtype), writebuf);
1670 if (readbuf != NULL)
1671 regcache_cooked_read_part (regcache, regnum,
1672 offset, TYPE_LENGTH (valtype), readbuf);
1673 return 1;
1674 }
1675
1676 /* IBM long double stored in two consecutive FPRs. */
1677 if (TYPE_LENGTH (valtype) == 16
1678 && TYPE_CODE (valtype) == TYPE_CODE_FLT
1679 && (gdbarch_long_double_format (gdbarch)
1680 == floatformats_ibm_long_double))
1681 {
1682 int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index;
1683
1684 if (writebuf != NULL)
1685 {
1686 regcache_cooked_write (regcache, regnum, writebuf);
1687 regcache_cooked_write (regcache, regnum + 1, writebuf + 8);
1688 }
1689 if (readbuf != NULL)
1690 {
1691 regcache_cooked_read (regcache, regnum, readbuf);
1692 regcache_cooked_read (regcache, regnum + 1, readbuf + 8);
1693 }
1694 return 1;
1695 }
1696
1697 /* 128-bit decimal floating-point values are stored in an even/odd
1698 pair of FPRs, with the even FPR holding the most significant half. */
1699 if (TYPE_LENGTH (valtype) == 16
1700 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1701 {
1702 int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index;
1703 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1704 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
1705
1706 if (writebuf != NULL)
1707 {
1708 regcache_cooked_write (regcache, regnum, writebuf + hipart);
1709 regcache_cooked_write (regcache, regnum + 1, writebuf + lopart);
1710 }
1711 if (readbuf != NULL)
1712 {
1713 regcache_cooked_read (regcache, regnum, readbuf + hipart);
1714 regcache_cooked_read (regcache, regnum + 1, readbuf + lopart);
1715 }
1716 return 1;
1717 }
1718
1719 /* AltiVec vectors are returned in VRs starting at v2. */
1720 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
1721 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
1722 {
1723 int regnum = tdep->ppc_vr0_regnum + 2 + index;
1724
1725 if (writebuf != NULL)
1726 regcache_cooked_write (regcache, regnum, writebuf);
1727 if (readbuf != NULL)
1728 regcache_cooked_read (regcache, regnum, readbuf);
1729 return 1;
1730 }
1731
1732 return 0;
1733 }
1734
1735 /* The 64 bit ABI return value convention.
1736
1737 Return non-zero if the return-value is stored in a register, return
1738 0 if the return-value is instead stored on the stack (a.k.a.,
1739 struct return convention).
1740
1741 For a return-value stored in a register: when WRITEBUF is non-NULL,
1742 copy the buffer to the corresponding register return-value location
1743 location; when READBUF is non-NULL, fill the buffer from the
1744 corresponding register return-value location. */
1745 enum return_value_convention
1746 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1747 struct type *valtype, struct regcache *regcache,
1748 gdb_byte *readbuf, const gdb_byte *writebuf)
1749 {
1750 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1751 struct type *func_type = function ? value_type (function) : NULL;
1752 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1753 struct type *eltype;
1754 int nelt, i, ok;
1755
1756 /* This function exists to support a calling convention that
1757 requires floating-point registers. It shouldn't be used on
1758 processors that lack them. */
1759 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1760
1761 /* Complex types are returned as if two independent scalars. */
1762 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX)
1763 {
1764 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1765
1766 for (i = 0; i < 2; i++)
1767 {
1768 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1769 readbuf, writebuf, i);
1770 gdb_assert (ok);
1771
1772 if (readbuf)
1773 readbuf += TYPE_LENGTH (eltype);
1774 if (writebuf)
1775 writebuf += TYPE_LENGTH (eltype);
1776 }
1777 return RETURN_VALUE_REGISTER_CONVENTION;
1778 }
1779
1780 /* OpenCL vectors shorter than 16 bytes are returned as if
1781 a series of independent scalars; OpenCL vectors 16 bytes
1782 or longer are returned as if a series of AltiVec vectors. */
1783 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
1784 && opencl_abi)
1785 {
1786 if (TYPE_LENGTH (valtype) < 16)
1787 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1788 else
1789 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1790
1791 nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
1792 for (i = 0; i < nelt; i++)
1793 {
1794 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1795 readbuf, writebuf, i);
1796 gdb_assert (ok);
1797
1798 if (readbuf)
1799 readbuf += TYPE_LENGTH (eltype);
1800 if (writebuf)
1801 writebuf += TYPE_LENGTH (eltype);
1802 }
1803 return RETURN_VALUE_REGISTER_CONVENTION;
1804 }
1805
1806 /* All pointers live in r3. */
1807 if (TYPE_CODE (valtype) == TYPE_CODE_PTR
1808 || TYPE_CODE (valtype) == TYPE_CODE_REF)
1809 {
1810 int regnum = tdep->ppc_gp0_regnum + 3;
1811
1812 if (writebuf != NULL)
1813 regcache_cooked_write (regcache, regnum, writebuf);
1814 if (readbuf != NULL)
1815 regcache_cooked_read (regcache, regnum, readbuf);
1816 return RETURN_VALUE_REGISTER_CONVENTION;
1817 }
1818
1819 /* Small character arrays are returned, right justified, in r3. */
1820 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1821 && TYPE_LENGTH (valtype) <= 8
1822 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1823 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1824 {
1825 int regnum = tdep->ppc_gp0_regnum + 3;
1826 int offset = (register_size (gdbarch, regnum) - TYPE_LENGTH (valtype));
1827
1828 if (writebuf != NULL)
1829 regcache_cooked_write_part (regcache, regnum,
1830 offset, TYPE_LENGTH (valtype), writebuf);
1831 if (readbuf != NULL)
1832 regcache_cooked_read_part (regcache, regnum,
1833 offset, TYPE_LENGTH (valtype), readbuf);
1834 return RETURN_VALUE_REGISTER_CONVENTION;
1835 }
1836
1837 /* Handle plain base types. */
1838 if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache,
1839 readbuf, writebuf, 0))
1840 return RETURN_VALUE_REGISTER_CONVENTION;
1841
1842 return RETURN_VALUE_STRUCT_CONVENTION;
1843 }
1844
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