1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 /* From ppc-linux-tdep.c... */
31 enum return_value_convention
ppc_sysv_abi_return_value (struct gdbarch
*gdbarch
,
33 struct regcache
*regcache
,
35 const gdb_byte
*writebuf
);
36 enum return_value_convention
ppc_sysv_abi_broken_return_value (struct gdbarch
*gdbarch
,
38 struct regcache
*regcache
,
40 const gdb_byte
*writebuf
);
41 CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
42 struct value
*function
,
43 struct regcache
*regcache
,
44 CORE_ADDR bp_addr
, int nargs
,
45 struct value
**args
, CORE_ADDR sp
,
47 CORE_ADDR struct_addr
);
48 CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
49 struct value
*function
,
50 struct regcache
*regcache
,
51 CORE_ADDR bp_addr
, int nargs
,
52 struct value
**args
, CORE_ADDR sp
,
54 CORE_ADDR struct_addr
);
55 CORE_ADDR
ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch
*gdbarch
,
57 int ppc_linux_memory_remove_breakpoint (struct gdbarch
*, struct bp_target_info
*);
58 struct link_map_offsets
*ppc_linux_svr4_fetch_link_map_offsets (void);
59 const struct regset
*ppc_linux_gregset (int);
60 const struct regset
*ppc_linux_fpregset (void);
62 enum return_value_convention
ppc64_sysv_abi_return_value (struct gdbarch
*gdbarch
,
64 struct regcache
*regcache
,
66 const gdb_byte
*writebuf
);
68 /* From rs6000-tdep.c... */
69 int altivec_register_p (struct gdbarch
*gdbarch
, int regno
);
70 int spe_register_p (struct gdbarch
*gdbarch
, int regno
);
72 /* Return non-zero if the architecture described by GDBARCH has
73 floating-point registers (f0 --- f31 and fpscr). */
74 int ppc_floating_point_unit_p (struct gdbarch
*gdbarch
);
76 /* Return non-zero if the architecture described by GDBARCH has
77 Altivec registers (vr0 --- vr31, vrsave and vscr). */
78 int ppc_altivec_support_p (struct gdbarch
*gdbarch
);
80 /* Register set description. */
82 struct ppc_reg_offsets
84 /* General-purpose registers. */
86 int gpr_size
; /* size for r0-31, pc, ps, lr, ctr. */
87 int xr_size
; /* size for cr, xer, mq. */
96 /* Floating-point registers. */
101 /* AltiVec registers. */
107 /* Supply register REGNUM in the general-purpose register set REGSET
108 from the buffer specified by GREGS and LEN to register cache
109 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
111 extern void ppc_supply_gregset (const struct regset
*regset
,
112 struct regcache
*regcache
,
113 int regnum
, const void *gregs
, size_t len
);
115 /* Supply register REGNUM in the floating-point register set REGSET
116 from the buffer specified by FPREGS and LEN to register cache
117 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
119 extern void ppc_supply_fpregset (const struct regset
*regset
,
120 struct regcache
*regcache
,
121 int regnum
, const void *fpregs
, size_t len
);
123 /* Supply register REGNUM in the Altivec register set REGSET
124 from the buffer specified by VRREGS and LEN to register cache
125 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
127 extern void ppc_supply_vrregset (const struct regset
*regset
,
128 struct regcache
*regcache
,
129 int regnum
, const void *vrregs
, size_t len
);
131 /* Collect register REGNUM in the general-purpose register set
132 REGSET. from register cache REGCACHE into the buffer specified by
133 GREGS and LEN. If REGNUM is -1, do this for all registers in
136 extern void ppc_collect_gregset (const struct regset
*regset
,
137 const struct regcache
*regcache
,
138 int regnum
, void *gregs
, size_t len
);
140 /* Collect register REGNUM in the floating-point register set
141 REGSET. from register cache REGCACHE into the buffer specified by
142 FPREGS and LEN. If REGNUM is -1, do this for all registers in
145 extern void ppc_collect_fpregset (const struct regset
*regset
,
146 const struct regcache
*regcache
,
147 int regnum
, void *fpregs
, size_t len
);
149 /* Collect register REGNUM in the Altivec register set
150 REGSET from register cache REGCACHE into the buffer specified by
151 VRREGS and LEN. If REGNUM is -1, do this for all registers in
154 extern void ppc_collect_vrregset (const struct regset
*regset
,
155 const struct regcache
*regcache
,
156 int regnum
, void *vrregs
, size_t len
);
158 /* Private data that this module attaches to struct gdbarch. */
160 /* Vector ABI used by the inferior. */
161 enum powerpc_vector_abi
172 int wordsize
; /* Size in bytes of fixed-point word. */
173 int soft_float
; /* Avoid FP registers for arguments? */
175 /* How to pass vector arguments. Never set to AUTO or LAST. */
176 enum powerpc_vector_abi vector_abi
;
178 int ppc_gp0_regnum
; /* GPR register 0 */
179 int ppc_toc_regnum
; /* TOC register */
180 int ppc_ps_regnum
; /* Processor (or machine) status (%msr) */
181 int ppc_cr_regnum
; /* Condition register */
182 int ppc_lr_regnum
; /* Link register */
183 int ppc_ctr_regnum
; /* Count register */
184 int ppc_xer_regnum
; /* Integer exception register */
186 /* Not all PPC and RS6000 variants will have the registers
187 represented below. A -1 is used to indicate that the register
188 is not present in this variant. */
190 /* Floating-point registers. */
191 int ppc_fp0_regnum
; /* floating-point register 0 */
192 int ppc_fpscr_regnum
; /* fp status and condition register */
194 /* Multiplier-Quotient Register (older POWER architectures only). */
197 /* Altivec registers. */
198 int ppc_vr0_regnum
; /* First AltiVec register */
199 int ppc_vrsave_regnum
; /* Last AltiVec register */
202 int ppc_ev0_upper_regnum
; /* First GPR upper half register */
203 int ppc_ev0_regnum
; /* First ev register */
204 int ppc_acc_regnum
; /* SPE 'acc' register */
205 int ppc_spefscr_regnum
; /* SPE 'spefscr' register */
207 /* Decimal 128 registers. */
208 int ppc_dl0_regnum
; /* First Decimal128 argument register pair. */
210 /* Offset to ABI specific location where link register is saved. */
213 /* An array of integers, such that sim_regno[I] is the simulator
214 register number for GDB register number I, or -1 if the
215 simulator does not implement that register. */
218 /* Minimum possible text address. */
219 CORE_ADDR text_segment_base
;
221 /* ISA-specific types. */
222 struct type
*ppc_builtin_type_vec64
;
226 /* Constants for register set sizes. */
229 ppc_num_gprs
= 32, /* 32 general-purpose registers */
230 ppc_num_fprs
= 32, /* 32 floating-point registers */
231 ppc_num_srs
= 16, /* 16 segment registers */
232 ppc_num_vrs
= 32 /* 32 Altivec vector registers */
236 /* Register number constants. These are GDB internal register
237 numbers; they are not used for the simulator or remote targets.
238 Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
239 numbers above PPC_NUM_REGS. So are segment registers and other
240 target-defined registers. */
250 PPC_FPSCR_REGNUM
= 70,
252 PPC_SPE_UPPER_GP0_REGNUM
= 72,
253 PPC_SPE_ACC_REGNUM
= 104,
254 PPC_SPE_FSCR_REGNUM
= 105,
255 PPC_VR0_REGNUM
= 106,
256 PPC_VSCR_REGNUM
= 138,
257 PPC_VRSAVE_REGNUM
= 139,
262 /* Instruction size. */
263 #define PPC_INSN_SIZE 4
265 /* Estimate for the maximum number of instrctions in a function epilogue. */
266 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
268 extern struct target_desc
*tdesc_powerpc_e500
;
270 #endif /* ppc-tdep.h */