1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 /* From ppc-sysv-tdep.c ... */
31 enum return_value_convention
ppc_sysv_abi_return_value (struct gdbarch
*gdbarch
,
32 struct type
*func_type
,
34 struct regcache
*regcache
,
36 const gdb_byte
*writebuf
);
37 enum return_value_convention
ppc_sysv_abi_broken_return_value (struct gdbarch
*gdbarch
,
38 struct type
*func_type
,
40 struct regcache
*regcache
,
42 const gdb_byte
*writebuf
);
43 CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
44 struct value
*function
,
45 struct regcache
*regcache
,
46 CORE_ADDR bp_addr
, int nargs
,
47 struct value
**args
, CORE_ADDR sp
,
49 CORE_ADDR struct_addr
);
50 CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch
*gdbarch
,
51 struct value
*function
,
52 struct regcache
*regcache
,
53 CORE_ADDR bp_addr
, int nargs
,
54 struct value
**args
, CORE_ADDR sp
,
56 CORE_ADDR struct_addr
);
57 CORE_ADDR
ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch
*gdbarch
,
60 enum return_value_convention
ppc64_sysv_abi_return_value (struct gdbarch
*gdbarch
,
61 struct type
*func_type
,
63 struct regcache
*regcache
,
65 const gdb_byte
*writebuf
);
67 /* From rs6000-tdep.c... */
68 int altivec_register_p (struct gdbarch
*gdbarch
, int regno
);
69 int spe_register_p (struct gdbarch
*gdbarch
, int regno
);
71 /* Return non-zero if the architecture described by GDBARCH has
72 floating-point registers (f0 --- f31 and fpscr). */
73 int ppc_floating_point_unit_p (struct gdbarch
*gdbarch
);
75 /* Return non-zero if the architecture described by GDBARCH has
76 Altivec registers (vr0 --- vr31, vrsave and vscr). */
77 int ppc_altivec_support_p (struct gdbarch
*gdbarch
);
79 int ppc_deal_with_atomic_sequence (struct frame_info
*frame
);
82 /* Register set description. */
84 struct ppc_reg_offsets
86 /* General-purpose registers. */
88 int gpr_size
; /* size for r0-31, pc, ps, lr, ctr. */
89 int xr_size
; /* size for cr, xer, mq. */
98 /* Floating-point registers. */
103 /* AltiVec registers. */
109 extern void ppc_supply_reg (struct regcache
*regcache
, int regnum
,
110 const gdb_byte
*regs
, size_t offset
, int regsize
);
112 extern void ppc_collect_reg (const struct regcache
*regcache
, int regnum
,
113 gdb_byte
*regs
, size_t offset
, int regsize
);
115 /* Supply register REGNUM in the general-purpose register set REGSET
116 from the buffer specified by GREGS and LEN to register cache
117 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
119 extern void ppc_supply_gregset (const struct regset
*regset
,
120 struct regcache
*regcache
,
121 int regnum
, const void *gregs
, size_t len
);
123 /* Supply register REGNUM in the floating-point register set REGSET
124 from the buffer specified by FPREGS and LEN to register cache
125 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
127 extern void ppc_supply_fpregset (const struct regset
*regset
,
128 struct regcache
*regcache
,
129 int regnum
, const void *fpregs
, size_t len
);
131 /* Supply register REGNUM in the Altivec register set REGSET
132 from the buffer specified by VRREGS and LEN to register cache
133 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
135 extern void ppc_supply_vrregset (const struct regset
*regset
,
136 struct regcache
*regcache
,
137 int regnum
, const void *vrregs
, size_t len
);
139 /* Collect register REGNUM in the general-purpose register set
140 REGSET. from register cache REGCACHE into the buffer specified by
141 GREGS and LEN. If REGNUM is -1, do this for all registers in
144 extern void ppc_collect_gregset (const struct regset
*regset
,
145 const struct regcache
*regcache
,
146 int regnum
, void *gregs
, size_t len
);
148 /* Collect register REGNUM in the floating-point register set
149 REGSET. from register cache REGCACHE into the buffer specified by
150 FPREGS and LEN. If REGNUM is -1, do this for all registers in
153 extern void ppc_collect_fpregset (const struct regset
*regset
,
154 const struct regcache
*regcache
,
155 int regnum
, void *fpregs
, size_t len
);
157 /* Collect register REGNUM in the Altivec register set
158 REGSET from register cache REGCACHE into the buffer specified by
159 VRREGS and LEN. If REGNUM is -1, do this for all registers in
162 extern void ppc_collect_vrregset (const struct regset
*regset
,
163 const struct regcache
*regcache
,
164 int regnum
, void *vrregs
, size_t len
);
166 /* Private data that this module attaches to struct gdbarch. */
168 /* Vector ABI used by the inferior. */
169 enum powerpc_vector_abi
180 int wordsize
; /* Size in bytes of fixed-point word. */
181 int soft_float
; /* Avoid FP registers for arguments? */
183 /* How to pass vector arguments. Never set to AUTO or LAST. */
184 enum powerpc_vector_abi vector_abi
;
186 int ppc_gp0_regnum
; /* GPR register 0 */
187 int ppc_toc_regnum
; /* TOC register */
188 int ppc_ps_regnum
; /* Processor (or machine) status (%msr) */
189 int ppc_cr_regnum
; /* Condition register */
190 int ppc_lr_regnum
; /* Link register */
191 int ppc_ctr_regnum
; /* Count register */
192 int ppc_xer_regnum
; /* Integer exception register */
194 /* Not all PPC and RS6000 variants will have the registers
195 represented below. A -1 is used to indicate that the register
196 is not present in this variant. */
198 /* Floating-point registers. */
199 int ppc_fp0_regnum
; /* floating-point register 0 */
200 int ppc_fpscr_regnum
; /* fp status and condition register */
202 /* Multiplier-Quotient Register (older POWER architectures only). */
205 /* Altivec registers. */
206 int ppc_vr0_regnum
; /* First AltiVec register */
207 int ppc_vrsave_regnum
; /* Last AltiVec register */
210 int ppc_ev0_upper_regnum
; /* First GPR upper half register */
211 int ppc_ev0_regnum
; /* First ev register */
212 int ppc_acc_regnum
; /* SPE 'acc' register */
213 int ppc_spefscr_regnum
; /* SPE 'spefscr' register */
215 /* Decimal 128 registers. */
216 int ppc_dl0_regnum
; /* First Decimal128 argument register pair. */
218 /* Offset to ABI specific location where link register is saved. */
221 /* An array of integers, such that sim_regno[I] is the simulator
222 register number for GDB register number I, or -1 if the
223 simulator does not implement that register. */
226 /* ISA-specific types. */
227 struct type
*ppc_builtin_type_vec64
;
231 /* Constants for register set sizes. */
234 ppc_num_gprs
= 32, /* 32 general-purpose registers */
235 ppc_num_fprs
= 32, /* 32 floating-point registers */
236 ppc_num_srs
= 16, /* 16 segment registers */
237 ppc_num_vrs
= 32 /* 32 Altivec vector registers */
241 /* Register number constants. These are GDB internal register
242 numbers; they are not used for the simulator or remote targets.
243 Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
244 numbers above PPC_NUM_REGS. So are segment registers and other
245 target-defined registers. */
255 PPC_FPSCR_REGNUM
= 70,
257 PPC_SPE_UPPER_GP0_REGNUM
= 72,
258 PPC_SPE_ACC_REGNUM
= 104,
259 PPC_SPE_FSCR_REGNUM
= 105,
260 PPC_VR0_REGNUM
= 106,
261 PPC_VSCR_REGNUM
= 138,
262 PPC_VRSAVE_REGNUM
= 139,
267 /* Instruction size. */
268 #define PPC_INSN_SIZE 4
270 /* Estimate for the maximum number of instrctions in a function epilogue. */
271 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
273 #endif /* ppc-tdep.h */